1. Introduction¶
OpenMP® is the de facto industry standard for shared memory parallel programming. It enables incremental parallelization of existing code bases and is portable across shared memory architectures. More information on the OpenMP API (including the API specification) is available at https://www.openmp.org.
The Texas Instruments OpenMP Accelerator Model implementation is currently supported on the following systems:
The OpenMP 4.0 specification enables the use of OpenMP on heterogeneous systems by adding support for a set of device constructs. The OpenMP community uses the term OpenMP Accelerator Model to refer to this set. OpenMP 4.0 defines a host device on which the OpenMP programs begin execution, and target devices onto which regions of code can be offloaded.
| System | Host | Compute Device |
|---|---|---|
| AM572 EVM | 2 ARM Cortex-A15 CPUs, SMP Linux | 1 device with 2 C66x DSP compute units |
| 66AK2H EVM | 4 ARM Cortex-A15 CPUs, SMP Linux | 1 device with 8 C66x DSP compute units |
| HP m800 Moonshot | 4 ARM Cortex-A15 CPUs, Ubuntu 14.04 Linux | 1 device with 8 C66x DSP compute units |
| 66AK2L EVM | 2 ARM Cortex-A15 CPUs, SMP Linux | 1 device with 4 C66x DSP compute units |
| 66AK2E EVM | 4 ARM Cortex-A15 CPUs, SMP Linux | 1 device with 1 C66x DSP compute unit |
| 66AK2G EVM | 1 ARM Cortex-A15 CPU, SMP Linux | 1 device with 1 C66x DSP compute unit |