cdocutils.nodes document q)q}q(U nametypesq}q(Xpru-icss-iolink-firmware-labelqXpre-requisites to buildingqNX4build instruction from processor sdk release packageqNXadditional referenceq NXidkam572x-idkam574xq Xfirmware featuresq NXcode organizationq NXfirmware build instructionq NXbuild instruction for gitqNXcompiling-icss-emac-firmwaresqX%compiling the pruss sorte applicationqNXpre-requisites-to-buildingqXsupported evmsqNX idkam437xqXrunning the pruss sorte exampleqNX introductionqNX,firmware code location and build instructionqNXbuild instruction from gitqNXpru-icss-i2c-firmware-labelqX"compiling the pruss sorte firmwareqNXdual emac and switchqNX icev2am335xqXi2c firmware exampleqNXfirmware organizationqNX pru-icss i2cqNX examples-listqXfirmware-design-guideq Xpru-icss sorteq!NXprotocol overviewq"NX#running icss-emac firmwares exampleq#NXicss-g dual emacq$NXcompiling-iolink-firmwareq%X dual_emacq&NXbuilding the examplesq'NXswitchq(NXpru-icss iolinkq)NXcompiling-i2c-firmwareq*uUsubstitution_defsq+}q,Uparse_messagesq-]q.(cdocutils.nodes system_message q/)q0}q1(U rawsourceq2UUparentq3cdocutils.nodes section q4)q5}q6(h2UU referencedq7Kh3h4)q8}q9(h2Uh7Kh3h4)q:}q;(h2Uh3hUsourceqUsectionq?U attributesq@}qA(UdupnamesqB]UclassesqC]UbackrefsqD]UidsqE]qFUdual-emac-and-switchqGaUnamesqH]qIhauUlineqJKUdocumentqKhUchildrenqL]qM(cdocutils.nodes title qN)qO}qP(h2XDual EMAC and SwitchqQh3h:hUtitleqRh@}qS(hB]hC]hD]hE]hH]uhJKhKhhL]qTcdocutils.nodes Text qUXDual EMAC and SwitchqVqW}qX(h2hQh3hOubaubcdocutils.nodes comment qY)qZ}q[(h2XNhttp://processors.wiki.ti.com/index.php/Processor_SDK_RTOS_ICSS-EMAC_FIRMWARESh3h:hUcommentq`h@}qa(U xml:spaceqbUpreserveqchE]hD]hB]hC]hH]uhJKhKhhL]qdhUXNhttp://processors.wiki.ti.com/index.php/Processor_SDK_RTOS_ICSS-EMAC_FIRMWARESqeqf}qg(h2Uh3hZubaubh4)qh}qi(h2Uh7Kh3h:hh?h@}qj(hB]qkX introductionqlahC]hD]hE]qmU introductionqnahH]uhJKhKhhL]qo(hN)qp}qq(h2X Introductionqrh3hhhhRh@}qs(hB]hC]hD]hE]hH]uhJKhKhhL]qthUX Introductionquqv}qw(h2hrh3hpubaubcdocutils.nodes line_block qx)qy}qz(h2Uh3hhhU line_blockq{h@}q|(hB]hC]hD]hE]hH]uhJKhKhhL]q}cdocutils.nodes line q~)q}q(h2XThe ICSS FIRMWARES serves as example to implement various network functionalities. Package includes source release for Dual_emac and basic switch firmwares.qUindentqKh3hyhhJh@}q(hB]hC]hD]hE]hH]uhJKhKhhL]qhUXThe ICSS FIRMWARES serves as example to implement various network functionalities. Package includes source release for Dual_emac and basic switch firmwares.qq}q(h2hh3hubaubaubhx)q}q(h2Uh3hhhh{h@}q(hB]hC]hD]hE]hH]uhJK hKhhL]qh~)q}q(h2UhKh3hhhJh@}q(hB]hC]hD]hE]hH]uhJKhKhhL]ubaubeubh4)q}q(h2Uh7Kh3h:hh?h@}q(hB]qX dual_emacqahC]hD]hE]qU dual-emacqahH]uhJK hKhhL]q(hN)q}q(h2X DUAL_EMACqh3hhhRh@}q(hB]hC]hD]hE]hH]uhJK hKhhL]qhUX DUAL_EMACqq}q(h2hh3hubaubcdocutils.nodes paragraph q)q}q(h2XICSS DUAL EMAC FIRMWARE is a single port Ethernet MAC (Media Access Control) i.e. Layer 2 of OSI Model. It implements a 2 port ethernet mac supporting 10/100 Mbps. DUAL EMAC FIRMWARE is standardized to IEEE 802.1 Ethernet Standards. Primary use case of the protocol is to demonstrate basic ethernet functionality via both PRU cores on 10/100 Mbit Ethernet cable. ICSS DUAL EMAC FIRMWARE can be used independently on two PRU's to implement two independent MAC's with two different MAC addresses and two different IP addresses. To provide an analogy, this is somewhat similar to a two port Ethernet PCIe NIC card on a PC.Ethernet interface in this case is available along with Host processor on a single SoC. Following are high level features:qh3hhU paragraphqh@}q(hB]hC]hD]hE]hH]uhJKhKhhL]qhUXICSS DUAL EMAC FIRMWARE is a single port Ethernet MAC (Media Access Control) i.e. Layer 2 of OSI Model. It implements a 2 port ethernet mac supporting 10/100 Mbps. DUAL EMAC FIRMWARE is standardized to IEEE 802.1 Ethernet Standards. Primary use case of the protocol is to demonstrate basic ethernet functionality via both PRU cores on 10/100 Mbit Ethernet cable. ICSS DUAL EMAC FIRMWARE can be used independently on two PRU's to implement two independent MAC's with two different MAC addresses and two different IP addresses. To provide an analogy, this is somewhat similar to a two port Ethernet PCIe NIC card on a PC.Ethernet interface in this case is available along with Host processor on a single SoC. Following are high level features:qq}q(h2hh3hubaubcdocutils.nodes table q)q}q(h2Uh3hhUtableqh@}q(hB]hC]hD]hE]hH]uhJNhKhhL]qcdocutils.nodes tgroup q)q}q(h2Uh@}q(hE]hD]hB]hC]hH]UcolsKuh3hhL]q(cdocutils.nodes colspec q)q}q(h2Uh@}q(hE]hD]hB]hC]hH]UcolwidthK#uh3hhL]h>Ucolspecqubh)q}q(h2Uh@}q(hE]hD]hB]hC]hH]UcolwidthK#uh3hhL]h>hubcdocutils.nodes tbody q)q}q(h2Uh@}q(hB]hC]hD]hE]hH]uh3hhL]q(cdocutils.nodes row q)q}q(h2Uh@}q(hB]hC]hD]hE]hH]uh3hhL]q(cdocutils.nodes entry q)q}q(h2Uh@}q(hB]hC]hD]hE]hH]uh3hhL]qh)q}q(h2X**Requirements**qh3hhhh@}q(hB]hC]hD]hE]hH]uhJKhL]qcdocutils.nodes strong q)q}q(h2hh@}q(hB]hC]hD]hE]hH]uh3hhL]qhUX RequirementsqՅq}q(h2Uh3hubah>Ustrongqubaubah>Uentryqubh)q}q(h2Uh@}q(hB]hC]hD]hE]hH]uh3hhL]qh)q}q(h2X **Remarks**qh3hhhh@}q(hB]hC]hD]hE]hH]uhJKhL]qh)q}q(h2hh@}q(hB]hC]hD]hE]hH]uh3hhL]qhUXRemarksq煁q}q(h2Uh3hubah>hubaubah>hubeh>Urowqubh)q}q(h2Uh@}q(hB]hC]hD]hE]hH]uh3hhL]q(h)q}q(h2Uh@}q(hB]hC]hD]hE]hH]uh3hhL]qh)q}q(h2X1 ms buffering per portqh3hhhh@}q(hB]hC]hD]hE]hH]uhJKhL]qhUX1 ms buffering per portqq}q(h2hh3hubaubah>hubh)q}q(h2Uh@}q(hB]hC]hD]hE]hH]uh3hhL]qh)q}r(h2X Supportedrh3hhhh@}r(hB]hC]hD]hE]hH]uhJKhL]rhUX Supportedrr}r(h2jh3hubaubah>hubeh>hubh)r}r(h2Uh@}r (hB]hC]hD]hE]hH]uh3hhL]r (h)r }r (h2Uh@}r (hB]hC]hD]hE]hH]uh3jhL]rh)r}r(h2XHost IRQrh3j hhh@}r(hB]hC]hD]hE]hH]uhJK hL]rhUXHost IRQrr}r(h2jh3jubaubah>hubh)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]rh)r}r(h2X Supportedrh3jhhh@}r(hB]hC]hD]hE]hH]uhJK hL]rhUX Supportedr r!}r"(h2jh3jubaubah>hubeh>hubh)r#}r$(h2Uh@}r%(hB]hC]hD]hE]hH]uh3hhL]r&(h)r'}r((h2Uh@}r)(hB]hC]hD]hE]hH]uh3j#hL]r*h)r+}r,(h2X Ethernet QoSr-h3j'hhh@}r.(hB]hC]hD]hE]hH]uhJK"hL]r/hUX Ethernet QoSr0r1}r2(h2j-h3j+ubaubah>hubh)r3}r4(h2Uh@}r5(hB]hC]hD]hE]hH]uh3j#hL]r6h)r7}r8(h2XQWith 2 queues instead of 8. So, it is not a standard Ethernet QoS implementation.r9h3j3hhh@}r:(hB]hC]hD]hE]hH]uhJK"hL]r;hUXQWith 2 queues instead of 8. So, it is not a standard Ethernet QoS implementation.r<r=}r>(h2j9h3j7ubaubah>hubeh>hubh)r?}r@(h2Uh@}rA(hB]hC]hD]hE]hH]uh3hhL]rB(h)rC}rD(h2Uh@}rE(hB]hC]hD]hE]hH]uh3j?hL]rFh)rG}rH(h2X StatisticsrIh3jChhh@}rJ(hB]hC]hD]hE]hH]uhJK&hL]rKhUX StatisticsrLrM}rN(h2jIh3jGubaubah>hubh)rO}rP(h2Uh@}rQ(hB]hC]hD]hE]hH]uh3j?hL]rRh)rS}rT(h2X SupportedrUh3jOhhh@}rV(hB]hC]hD]hE]hH]uhJK&hL]rWhUX SupportedrXrY}rZ(h2jUh3jSubaubah>hubeh>hubh)r[}r\(h2Uh@}r](hB]hC]hD]hE]hH]uh3hhL]r^(h)r_}r`(h2Uh@}ra(hB]hC]hD]hE]hH]uh3j[hL]rbh)rc}rd(h2XStorm Preventionreh3j_hhh@}rf(hB]hC]hD]hE]hH]uhJK(hL]rghUXStorm Preventionrhri}rj(h2jeh3jcubaubah>hubh)rk}rl(h2Uh@}rm(hB]hC]hD]hE]hH]uh3j[hL]rnh)ro}rp(h2X Supportedrqh3jkhhh@}rr(hB]hC]hD]hE]hH]uhJK(hL]rshUX Supportedrtru}rv(h2jqh3joubaubah>hubeh>hubh)rw}rx(h2Uh@}ry(hB]hC]hD]hE]hH]uh3hhL]rz(h)r{}r|(h2Uh@}r}(hB]hC]hD]hE]hH]uh3jwhL]r~h)r}r(h2XPromiscuous Moderh3j{hhh@}r(hB]hC]hD]hE]hH]uhJK*hL]rhUXPromiscuous Moderr}r(h2jh3jubaubah>hubh)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jwhL]rh)r}r(h2X Supportedrh3jhhh@}r(hB]hC]hD]hE]hH]uhJK*hL]rhUX Supportedrr}r(h2jh3jubaubah>hubeh>hubh)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3hhL]r(h)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]rh)r}r(h2XTTS (Time Triggered Send)rh3jhhh@}r(hB]hC]hD]hE]hH]uhJK,hL]rhUXTTS (Time Triggered Send)rr}r(h2jh3jubaubah>hubh)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]rh)r}r(h2X Supportedrh3jhhh@}r(hB]hC]hD]hE]hH]uhJK,hL]rhUX Supportedrr}r(h2jh3jubaubah>hubeh>hubh)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3hhL]r(h)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]rh)r}r(h2XError Handlingrh3jhhh@}r(hB]hC]hD]hE]hH]uhJK.hL]rhUXError Handlingrr}r(h2jh3jubaubah>hubh)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]rh)r}r(h2X Supportedrh3jhhh@}r(hB]hC]hD]hE]hH]uhJK.hL]rhUX Supportedrr}r(h2jh3jubaubah>hubeh>hubh)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3hhL]r(h)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]rh)r}r(h2XMulticast filteringrh3jhhh@}r(hB]hC]hD]hE]hH]uhJK0hL]rhUXMulticast filteringrr}r(h2jh3jubaubah>hubh)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]rh)r}r(h2X Supportedrh3jhhh@}r(hB]hC]hD]hE]hH]uhJK0hL]rhUX Supportedrr}r(h2jh3jubaubah>hubeh>hubh)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3hhL]r(h)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]rh)r}r(h2XVLAN filteringrh3jhhh@}r(hB]hC]hD]hE]hH]uhJK2hL]rhUXVLAN filteringrr}r(h2jh3jubaubah>hubh)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]rh)r}r(h2X Supportedrh3jhhh@}r(hB]hC]hD]hE]hH]uhJK2hL]rhUX Supportedrr}r(h2jh3jubaubah>hubeh>hubh)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3hhL]r(h)r}r(h2Uh@}r (hB]hC]hD]hE]hH]uh3jhL]r h)r }r (h2X PTP Handlingr h3jhhh@}r(hB]hC]hD]hE]hH]uhJK4hL]rhUX PTP Handlingrr}r(h2j h3j ubaubah>hubh)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]rh)r}r(h2X Supportedrh3jhhh@}r(hB]hC]hD]hE]hH]uhJK4hL]rhUX Supportedrr}r(h2jh3jubaubah>hubeh>hubeh>Utbodyrubeh>Utgroupr ubaubhx)r!}r"(h2Uh3hhh{h@}r#(hB]hC]hD]hE]hH]uhJK7hKhhL]r$h~)r%}r&(h2UhKh3j!hhJh@}r'(hB]hC]hD]hE]hH]uhJKhKhhL]ubaubeubh4)r(}r)(h2Uh3h:hh?h@}r*(hB]hC]hD]hE]r+Uswitchr,ahH]r-h(auhJK:hKhhL]r.(hN)r/}r0(h2XSWITCHr1h3j(hhRh@}r2(hB]hC]hD]hE]hH]uhJK:hKhhL]r3hUXSWITCHr4r5}r6(h2j1h3j/ubaubh)r7}r8(h2XICSS SWITCH FIRMWARE is a three port learning Ethernet switch i.e. Layer 2 of OSI Model. It implements a 2 port cut through ethernet switch supporting at 100 Mbps. SWITCH FIRMWARE is standardized to IEEE 802.1 Ethernet Standards. The primary use case of the protocol is to use Ethernet to automate applications which require short cut-through latency and low hardware costs. ICSS SWITCH FIRMWARE uses two PRU to implement three port Ethernet switch with one single MAC and IP address. To provide an analogy, this is somewhat standard network switch only here the network functionality is available to the host core within the single SOC. The following are the high level features it supports.r9h3j(hhh@}r:(hB]hC]hD]hE]hH]uhJK(h2j9h3j7ubaubh)r?}r@(h2Uh3j(hhh@}rA(hB]hC]hD]hE]hH]uhJNhKhhL]rBh)rC}rD(h2Uh@}rE(hE]hD]hB]hC]hH]UcolsKuh3j?hL]rF(h)rG}rH(h2Uh@}rI(hE]hD]hB]hC]hH]UcolwidthK#uh3jChL]h>hubh)rJ}rK(h2Uh@}rL(hE]hD]hB]hC]hH]UcolwidthK#uh3jChL]h>hubh)rM}rN(h2Uh@}rO(hB]hC]hD]hE]hH]uh3jChL]rP(h)rQ}rR(h2Uh@}rS(hB]hC]hD]hE]hH]uh3jMhL]rT(h)rU}rV(h2Uh@}rW(hB]hC]hD]hE]hH]uh3jQhL]rXh)rY}rZ(h2X**Requirements**r[h3jUhhh@}r\(hB]hC]hD]hE]hH]uhJKHhL]r]h)r^}r_(h2j[h@}r`(hB]hC]hD]hE]hH]uh3jYhL]rahUX Requirementsrbrc}rd(h2Uh3j^ubah>hubaubah>hubh)re}rf(h2Uh@}rg(hB]hC]hD]hE]hH]uh3jQhL]rhh)ri}rj(h2X **Remarks**rkh3jehhh@}rl(hB]hC]hD]hE]hH]uhJKHhL]rmh)rn}ro(h2jkh@}rp(hB]hC]hD]hE]hH]uh3jihL]rqhUXRemarksrrrs}rt(h2Uh3jnubah>hubaubah>hubeh>hubh)ru}rv(h2Uh@}rw(hB]hC]hD]hE]hH]uh3jMhL]rx(h)ry}rz(h2Uh@}r{(hB]hC]hD]hE]hH]uh3juhL]r|h)r}}r~(h2X Cut-Throughrh3jyhhh@}r(hB]hC]hD]hE]hH]uhJKJhL]rhUX Cut-Throughrr}r(h2jh3j}ubaubah>hubh)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3juhL]rh)r}r(h2X Supportedrh3jhhh@}r(hB]hC]hD]hE]hH]uhJKJhL]rhUX Supportedrr}r(h2jh3jubaubah>hubeh>hubh)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jMhL]r(h)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]rh)r}r(h2XStore and Forwardrh3jhhh@}r(hB]hC]hD]hE]hH]uhJKLhL]rhUXStore and Forwardrr}r(h2jh3jubaubah>hubh)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]rh)r}r(h2X Supportedrh3jhhh@}r(hB]hC]hD]hE]hH]uhJKLhL]rhUX Supportedrr}r(h2jh3jubaubah>hubeh>hubh)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jMhL]r(h)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]rh)r}r(h2X1 ms buffering per portrh3jhhh@}r(hB]hC]hD]hE]hH]uhJKNhL]rhUX1 ms buffering per portrr}r(h2jh3jubaubah>hubh)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]rh)r}r(h2X Supportedrh3jhhh@}r(hB]hC]hD]hE]hH]uhJKNhL]rhUX Supportedrr}r(h2jh3jubaubah>hubeh>hubh)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jMhL]r(h)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]rh)r}r(h2XHost IRQrh3jhhh@}r(hB]hC]hD]hE]hH]uhJKPhL]rhUXHost IRQrr}r(h2jh3jubaubah>hubh)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]rh)r}r(h2X Supportedrh3jhhh@}r(hB]hC]hD]hE]hH]uhJKPhL]rhUX Supportedrr}r(h2jh3jubaubah>hubeh>hubh)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jMhL]r(h)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]rh)r}r(h2X Ethernet QoSrh3jhhh@}r(hB]hC]hD]hE]hH]uhJKRhL]rhUX Ethernet QoSrr}r(h2jh3jubaubah>hubh)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]rh)r}r(h2XQWith 4 queues instead of 8. So, it is not a standard Ethernet QoS implementation.rh3jhhh@}r(hB]hC]hD]hE]hH]uhJKRhL]rhUXQWith 4 queues instead of 8. So, it is not a standard Ethernet QoS implementation.rr}r(h2jh3jubaubah>hubeh>hubh)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jMhL]r(h)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]rh)r }r (h2X802.1 learning switchr h3jhhh@}r (hB]hC]hD]hE]hH]uhJKVhL]r hUX802.1 learning switchrr}r(h2j h3j ubaubah>hubh)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]rh)r}r(h2X Supportedrh3jhhh@}r(hB]hC]hD]hE]hH]uhJKVhL]rhUX Supportedrr}r(h2jh3jubaubah>hubeh>hubh)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jMhL]r (h)r!}r"(h2Uh@}r#(hB]hC]hD]hE]hH]uh3jhL]r$h)r%}r&(h2X Statisticsr'h3j!hhh@}r((hB]hC]hD]hE]hH]uhJKXhL]r)hUX Statisticsr*r+}r,(h2j'h3j%ubaubah>hubh)r-}r.(h2Uh@}r/(hB]hC]hD]hE]hH]uh3jhL]r0h)r1}r2(h2X Supportedr3h3j-hhh@}r4(hB]hC]hD]hE]hH]uhJKXhL]r5hUX Supportedr6r7}r8(h2j3h3j1ubaubah>hubeh>hubh)r9}r:(h2Uh@}r;(hB]hC]hD]hE]hH]uh3jMhL]r<(h)r=}r>(h2Uh@}r?(hB]hC]hD]hE]hH]uh3j9hL]r@h)rA}rB(h2X&Queue-Contention Handling on each portrCh3j=hhh@}rD(hB]hC]hD]hE]hH]uhJKZhL]rEhUX&Queue-Contention Handling on each portrFrG}rH(h2jCh3jAubaubah>hubh)rI}rJ(h2Uh@}rK(hB]hC]hD]hE]hH]uh3j9hL]rLh)rM}rN(h2X SupportedrOh3jIhhh@}rP(hB]hC]hD]hE]hH]uhJKZhL]rQhUX SupportedrRrS}rT(h2jOh3jMubaubah>hubeh>hubh)rU}rV(h2Uh@}rW(hB]hC]hD]hE]hH]uh3jMhL]rX(h)rY}rZ(h2Uh@}r[(hB]hC]hD]hE]hH]uh3jUhL]r\h)r]}r^(h2XThree-Port Switchr_h3jYhhh@}r`(hB]hC]hD]hE]hH]uhJK]hL]rahUXThree-Port Switchrbrc}rd(h2j_h3j]ubaubah>hubh)re}rf(h2Uh@}rg(hB]hC]hD]hE]hH]uh3jUhL]rhh)ri}rj(h2X Supportedrkh3jehhh@}rl(hB]hC]hD]hE]hH]uhJK]hL]rmhUX Supportedrnro}rp(h2jkh3jiubaubah>hubeh>hubh)rq}rr(h2Uh@}rs(hB]hC]hD]hE]hH]uh3jMhL]rt(h)ru}rv(h2Uh@}rw(hB]hC]hD]hE]hH]uh3jqhL]rxh)ry}rz(h2XStorm Preventionr{h3juhhh@}r|(hB]hC]hD]hE]hH]uhJK_hL]r}hUXStorm Preventionr~r}r(h2j{h3jyubaubah>hubh)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jqhL]rh)r}r(h2X Supportedrh3jhhh@}r(hB]hC]hD]hE]hH]uhJK_hL]rhUX Supportedrr}r(h2jh3jubaubah>hubeh>hubh)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jMhL]r(h)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]rh)r}r(h2XError Handlingrh3jhhh@}r(hB]hC]hD]hE]hH]uhJKahL]rhUXError Handlingrr}r(h2jh3jubaubah>hubh)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]rh)r}r(h2X Supportedrh3jhhh@}r(hB]hC]hD]hE]hH]uhJKahL]rhUX Supportedrr}r(h2jh3jubaubah>hubeh>hubeh>jubeh>j ubaubhx)r}r(h2Uh3j(hh{h@}r(hB]hC]hD]hE]hH]uhJKdhKhhL]rh~)r}r(h2UhKh3jhhJh@}r(hB]hC]hD]hE]hH]uhJKhKhhL]ubaubeubh4)r}r(h2Uh7Kh3h:hh?h@}r(hB]rXcode organizationrahC]hD]hE]rUcode-organizationrahH]uhJKghKhhL]r(hN)r}r(h2XCode Organizationrh3jhhRh@}r(hB]hC]hD]hE]hH]uhJKghKhhL]rhUXCode Organizationrr}r(h2jh3jubaubh)r}r(h2Uh3jhhh@}r(hB]hC]hD]hE]hH]uhJNhKhhL]rh)r}r(h2Uh@}r(hE]hD]hB]hC]hH]UcolsKuh3jhL]r(h)r}r(h2Uh@}r(hE]hD]hB]hC]hH]UcolwidthKuh3jhL]h>hubh)r}r(h2Uh@}r(hE]hD]hB]hC]hH]UcolwidthK#uh3jhL]h>hubh)r}r(h2Uh@}r(hE]hD]hB]hC]hH]UcolwidthKuh3jhL]h>hubh)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]r(h)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]r(h)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]rh)r}r(h2X**Requirements**rh3jhhh@}r(hB]hC]hD]hE]hH]uhJKjhL]rh)r}r(h2jh@}r(hB]hC]hD]hE]hH]uh3jhL]rhUX Requirementsrr}r(h2Uh3jubah>hubaubah>hubh)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]rh)r}r(h2X**Location in SDK**rh3jhhh@}r(hB]hC]hD]hE]hH]uhJKjhL]rh)r}r(h2jh@}r(hB]hC]hD]hE]hH]uh3jhL]rhUXLocation in SDKrr}r(h2Uh3jubah>hubaubah>hubh)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]rh)r}r(h2X **Remarks**rh3jhhh@}r(hB]hC]hD]hE]hH]uhJKjhL]rh)r}r(h2jh@}r(hB]hC]hD]hE]hH]uh3jhL]rhUXRemarksrr}r(h2Uh3jubah>hubaubah>hubeh>hubh)r }r (h2Uh@}r (hB]hC]hD]hE]hH]uh3jhL]r (h)r }r(h2Uh@}r(hB]hC]hD]hE]hH]uh3j hL]rh)r}r(h2XCommon baseline coderh3j hhh@}r(hB]hC]hD]hE]hH]uhJKlhL]rhUXCommon baseline coderr}r(h2jh3jubaubah>hubh)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3j hL]rh)r}r(h2X7/packages/ti/drv /icss_emac/firmware/icss_dualemacrh3jhhh@}r (hB]hC]hD]hE]hH]uhJKlhL]r!hUX7/packages/ti/drv /icss_emac/firmware/icss_dualemacr"r#}r$(h2jh3jubaubah>hubh)r%}r&(h2Uh@}r'(hB]hC]hD]hE]hH]uh3j hL]r(h)r)}r*(h2X$common code for dual_emac and switchr+h3j%hhh@}r,(hB]hC]hD]hE]hH]uhJKlhL]r-hUX$common code for dual_emac and switchr.r/}r0(h2j+h3j)ubaubah>hubeh>hubh)r1}r2(h2Uh@}r3(hB]hC]hD]hE]hH]uh3jhL]r4(h)r5}r6(h2Uh@}r7(hB]hC]hD]hE]hH]uh3j1hL]r8h)r9}r:(h2X DUAL_EMACr;h3j5hhh@}r<(hB]hC]hD]hE]hH]uhJKohL]r=hUX DUAL_EMACr>r?}r@(h2j;h3j9ubaubah>hubh)rA}rB(h2Uh@}rC(hB]hC]hD]hE]hH]uh3j1hL]rDh)rE}rF(h2X7/packages/ti/drv /icss_emac/firmware/icss_dualemacrGh3jAhhh@}rH(hB]hC]hD]hE]hH]uhJKohL]rIhUX7/packages/ti/drv /icss_emac/firmware/icss_dualemacrJrK}rL(h2jGh3jEubaubah>hubh)rM}rN(h2Uh@}rO(hB]hC]hD]hE]hH]uh3j1hL]rPh)rQ}rR(h2X dual_emac firmware specific coderSh3jMhhh@}rT(hB]hC]hD]hE]hH]uhJKohL]rUhUX dual_emac firmware specific coderVrW}rX(h2jSh3jQubaubah>hubeh>hubh)rY}rZ(h2Uh@}r[(hB]hC]hD]hE]hH]uh3jhL]r\(h)r]}r^(h2Uh@}r_(hB]hC]hD]hE]hH]uh3jYhL]r`h)ra}rb(h2XSWITCHrch3j]hhh@}rd(hB]hC]hD]hE]hH]uhJKrhL]rehUXSWITCHrfrg}rh(h2jch3jaubaubah>hubh)ri}rj(h2Uh@}rk(hB]hC]hD]hE]hH]uh3jYhL]rlh)rm}rn(h2X5/packages/ti/drv /icss_emac/firmware/icss_switchroh3jihhh@}rp(hB]hC]hD]hE]hH]uhJKrhL]rqhUX5/packages/ti/drv /icss_emac/firmware/icss_switchrrrs}rt(h2joh3jmubaubah>hubh)ru}rv(h2Uh@}rw(hB]hC]hD]hE]hH]uh3jYhL]rxh)ry}rz(h2Xswitch firmware specific coder{h3juhhh@}r|(hB]hC]hD]hE]hH]uhJKrhL]r}hUXswitch firmware specific coder~r}r(h2j{h3jyubaubah>hubeh>hubeh>jubeh>j ubaubhx)r}r(h2Uh3jhh{h@}r(hB]hC]hD]hE]hH]uhJKvhKhhL]rh~)r}r(h2UhKh3jhhJh@}r(hB]hC]hD]hE]hH]uhJKhKhhL]ubaubeubh8h4)r}r(h2Uh7Kh3h:hh?h@}r(hB]rXsupported evmsrahC]hD]hE]rUsupported-evmsrahH]uhJKhKhhL]r(hN)r}r(h2XSupported EVMsrh3jhhRh@}r(hB]hC]hD]hE]hH]uhJKhKhhL]rhUXSupported EVMsrr}r(h2jh3jubaubh)r}r(h2XUThe following is a list of EVMS supported and the PRU-ICSS ethernet ports to be used:rh3jhhh@}r(hB]hC]hD]hE]hH]uhJKhKhhL]rhUXUThe following is a list of EVMS supported and the PRU-ICSS ethernet ports to be used:rr}r(h2jh3jubaubh)r}r(h2Uh3jhhh@}r(hB]hC]hD]hE]hH]uhJNhKhhL]rh)r}r(h2Uh@}r(hE]hD]hB]hC]hH]UcolsKuh3jhL]r(h)r}r(h2Uh@}r(hE]hD]hB]hC]hH]UcolwidthKuh3jhL]h>hubh)r}r(h2Uh@}r(hE]hD]hB]hC]hH]UcolwidthKuh3jhL]h>hubh)r}r(h2Uh@}r(hE]hD]hB]hC]hH]UcolwidthKuh3jhL]h>hubh)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]r(h)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]r(h)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]rh)r}r(h2XEVM Namerh3jhhh@}r(hB]hC]hD]hE]hH]uhJKhL]rhUXEVM Namerr}r(h2jh3jubaubah>hubh)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]rh)r}r(h2XPRU-ICSS Instancerh3jhhh@}r(hB]hC]hD]hE]hH]uhJKhL]rhUXPRU-ICSS Instancerr}r(h2jh3jubaubah>hubh)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]rh)r}r(h2X Supported PRU ICSS core revisionrh3jhhh@}r(hB]hC]hD]hE]hH]uhJKhL]rhUX Supported PRU ICSS core revisionrr}r(h2jh3jubaubah>hubeh>hubh)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]r(h)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]rh)r}r(h2X icev2AM335xrh3jhhh@}r(hB]hC]hD]hE]hH]uhJKhL]rhUX icev2AM335xrr}r(h2jh3jubaubah>hubh)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]rh)r}r(h2XPRU-ICSS instance 1rh3jhhh@}r(hB]hC]hD]hE]hH]uhJKhL]rhUXPRU-ICSS instance 1rr}r(h2jh3jubaubah>hubh)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]rh)r}r(h2XREV1rh3jhhh@}r(hB]hC]hD]hE]hH]uhJKhL]rhUXREV1rr}r(h2jh3jubaubah>hubeh>hubh)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]r(h)r }r (h2Uh@}r (hB]hC]hD]hE]hH]uh3jhL]r h)r }r(h2X idkAM437xrh3j hhh@}r(hB]hC]hD]hE]hH]uhJKhL]rhUX idkAM437xrr}r(h2jh3j ubaubah>hubh)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]rh)r}r(h2XPRU-ICSS instance 2rh3jhhh@}r(hB]hC]hD]hE]hH]uhJKhL]rhUXPRU-ICSS instance 2rr}r (h2jh3jubaubah>hubh)r!}r"(h2Uh@}r#(hB]hC]hD]hE]hH]uh3jhL]r$h)r%}r&(h2XREV1r'h3j!hhh@}r((hB]hC]hD]hE]hH]uhJKhL]r)hUXREV1r*r+}r,(h2j'h3j%ubaubah>hubeh>hubh)r-}r.(h2Uh@}r/(hB]hC]hD]hE]hH]uh3jhL]r0(h)r1}r2(h2Uh@}r3(hB]hC]hD]hE]hH]uh3j-hL]r4h)r5}r6(h2X idkAM571xr7h3j1hhh@}r8(hB]hC]hD]hE]hH]uhJKhL]r9hUX idkAM571xr:r;}r<(h2j7h3j5ubaubah>hubh)r=}r>(h2Uh@}r?(hB]hC]hD]hE]hH]uh3j-hL]r@h)rA}rB(h2XPRU-ICSS instance 2rCh3j=hhh@}rD(hB]hC]hD]hE]hH]uhJKhL]rEhUXPRU-ICSS instance 2rFrG}rH(h2jCh3jAubaubah>hubh)rI}rJ(h2Uh@}rK(hB]hC]hD]hE]hH]uh3j-hL]rLh)rM}rN(h2XREV2rOh3jIhhh@}rP(hB]hC]hD]hE]hH]uhJKhL]rQhUXREV2rRrS}rT(h2jOh3jMubaubah>hubeh>hubh)rU}rV(h2Uh@}rW(hB]hC]hD]hE]hH]uh3jhL]rX(h)rY}rZ(h2Uh@}r[(hB]hC]hD]hE]hH]uh3jUhL]r\h)r]}r^(h2X idkAM572xr_h3jYhhh@}r`(hB]hC]hD]hE]hH]uhJKhL]rahUX idkAM572xrbrc}rd(h2j_h3j]ubaubah>hubh)re}rf(h2Uh@}rg(hB]hC]hD]hE]hH]uh3jUhL]rhh)ri}rj(h2XPRU-ICSS instance 2rkh3jehhh@}rl(hB]hC]hD]hE]hH]uhJKhL]rmhUXPRU-ICSS instance 2rnro}rp(h2jkh3jiubaubah>hubh)rq}rr(h2Uh@}rs(hB]hC]hD]hE]hH]uh3jUhL]rth)ru}rv(h2X]REV1 & REV2 (Earlier version of AM572x soc had REV1 pru cores while later had REV2 pru cores)rwh3jqhhh@}rx(hB]hC]hD]hE]hH]uhJKhL]ryhUX]REV1 & REV2 (Earlier version of AM572x soc had REV1 pru cores while later had REV2 pru cores)rzr{}r|(h2jwh3juubaubah>hubeh>hubh)r}}r~(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]r(h)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3j}hL]rh)r}r(h2XiceK2Grh3jhhh@}r(hB]hC]hD]hE]hH]uhJKhL]rhUXiceK2Grr}r(h2jh3jubaubah>hubh)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3j}hL]rh)r}r(h2XPRU-ICSS instance 2rh3jhhh@}r(hB]hC]hD]hE]hH]uhJKhL]rhUXPRU-ICSS instance 2rr}r(h2jh3jubaubah>hubh)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3j}hL]rh)r}r(h2XREV2rh3jhhh@}r(hB]hC]hD]hE]hH]uhJKhL]rhUXREV2rr}r(h2jh3jubaubah>hubeh>hubeh>jubeh>j ubaubhx)r}r(h2Uh3jhh{h@}r(hB]hC]hD]hE]hH]uhJKhKhhL]rh~)r}r(h2UhKh3jhhJh@}r(hB]hC]hD]hE]hH]uhJKhKhhL]ubaubeubh4)r}r(h2Uh3h:hh?h@}r(hB]hC]hD]hE]rU#running-icss-emac-firmwares-examplerahH]rh#auhJKhKhhL]r(hN)r}r(h2X#Running ICSS-EMAC FIRMWARES Examplerh3jhhRh@}r(hB]hC]hD]hE]hH]uhJKhKhhL]rhUX#Running ICSS-EMAC FIRMWARES Examplerr}r(h2jh3jubaubh)r}r(h2XPlease go through the following page for example demonstrating the use of the firmware via icss-emac driver. `[1] `__h3jhhh@}r(hB]hC]hD]hE]hH]uhJKhKhhL]r(hUXmPlease go through the following page for example demonstrating the use of the firmware via icss-emac driver. rr}r(h2XmPlease go through the following page for example demonstrating the use of the firmware via icss-emac driver. h3jubcdocutils.nodes reference r)r}r(h2X)`[1] `__h@}r(UnameX[1]UrefurirXindex_device_drv.html#icss-emachE]hD]hB]hC]hH]uh3jhL]rhUX[1]rr}r(h2Uh3jubah>U referencerubeubhx)r}r(h2Uh3jhh{h@}r(hB]hC]hD]hE]hH]uhJKhKhhL]rh~)r}r(h2UhKh3jhhJh@}r(hB]hC]hD]hE]hH]uhJKhKhhL]ubaubcdocutils.nodes rubric r)r}r(h2XFirmware Design Guiderh7Kh3jhUrubricrh@}r(hE]rUfirmware-design-guiderahD]hB]rXfirmware-design-guiderahC]hH]uhJNhKhhL]rhUXFirmware Design Guiderr}r(h2jh3jubaubh)r}r(h2Uh3jhhh@}r(hB]hC]hD]hE]hH]uhJNhKhhL]rh)r}r(h2Uh@}r(hE]hD]hB]hC]hH]UcolsKuh3jhL]r(h)r}r(h2Uh@}r(hE]hD]hB]hC]hH]UcolwidthK#uh3jhL]h>hubh)r}r(h2Uh@}r(hE]hD]hB]hC]hH]UcolwidthK#uh3jhL]h>hubh)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]r(h)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]r(h)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]rh)r}r(h2X **Document**rh3jhhh@}r(hB]hC]hD]hE]hH]uhJKhL]rh)r}r(h2jh@}r(hB]hC]hD]hE]hH]uh3jhL]rhUXDocumentrr}r(h2Uh3jubah>hubaubah>hubh)r}r(h2Uh@}r (hB]hC]hD]hE]hH]uh3jhL]r h)r }r (h2X **Location**r h3jhhh@}r(hB]hC]hD]hE]hH]uhJKhL]rh)r}r(h2j h@}r(hB]hC]hD]hE]hH]uh3j hL]rhUXLocationrr}r(h2Uh3jubah>hubaubah>hubeh>hubh)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]r(h)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]rh)r}r (h2X$ICSS DUAL EMAC FIRMWARE Design Guider!h3jhhh@}r"(hB]hC]hD]hE]hH]uhJKhL]r#hUX$ICSS DUAL EMAC FIRMWARE Design Guider$r%}r&(h2j!h3jubaubah>hubh)r'}r((h2Uh@}r)(hB]hC]hD]hE]hH]uh3jhL]r*h)r+}r,(h2Xg/packages/ti/drv/icss_emac/f irmware/icss_dualemac/docs/ICSS_D UAL_EMAC_Firmware_Design_Guide.pd fr-h3j'hhh@}r.(hB]hC]hD]hE]hH]uhJKhL]r/hUXg/packages/ti/drv/icss_emac/f irmware/icss_dualemac/docs/ICSS_D UAL_EMAC_Firmware_Design_Guide.pd fr0r1}r2(h2j-h3j+ubaubah>hubeh>hubh)r3}r4(h2Uh@}r5(hB]hC]hD]hE]hH]uh3jhL]r6(h)r7}r8(h2Uh@}r9(hB]hC]hD]hE]hH]uh3j3hL]r:h)r;}r<(h2X!ICSS SWITCH FIRMWARE Design Guider=h3j7hhh@}r>(hB]hC]hD]hE]hH]uhJKhL]r?hUX!ICSS SWITCH FIRMWARE Design Guider@rA}rB(h2j=h3j;ubaubah>hubh)rC}rD(h2Uh@}rE(hB]hC]hD]hE]hH]uh3j3hL]rFh)rG}rH(h2Xa/packages/ti/drv/icss_emac/f irmware/icss_switch/docs/ICSS_SWI TCH_Firmware_Design_Guide.pdfrIh3jChhh@}rJ(hB]hC]hD]hE]hH]uhJKhL]rKhUXa/packages/ti/drv/icss_emac/f irmware/icss_switch/docs/ICSS_SWI TCH_Firmware_Design_Guide.pdfrLrM}rN(h2jIh3jGubaubah>hubeh>hubeh>jubeh>j ubaubh)rO}rP(h2X**NOTE: For normal use case, there is no need to refer this document. Unless you wish to go through the internal working for firmware and/or wanted to modify it.**rQh3jhhh@}rR(hB]hC]hD]hE]hH]uhJKhKhhL]rSh)rT}rU(h2jQh@}rV(hB]hC]hD]hE]hH]uh3jOhL]rWhUXNOTE: For normal use case, there is no need to refer this document. Unless you wish to go through the internal working for firmware and/or wanted to modify it.rXrY}rZ(h2Uh3jTubah>hubaubhx)r[}r\(h2Uh3jhh{h@}r](hB]hC]hD]hE]hH]uhJKhKhhL]r^h~)r_}r`(h2UhKh3j[hhJh@}ra(hB]hC]hD]hE]hH]uhJKhKhhL]ubaubeubeubhh?h@}rb(hB]rcXfirmware build instructionrdahC]hD]hE]reUfirmware-build-instructionrfahH]uhJKyhKhhL]rg(hN)rh}ri(h2XFirmware Build Instructionrjh3h8hhRh@}rk(hB]hC]hD]hE]hH]uhJKyhKhhL]rlhUXFirmware Build Instructionrmrn}ro(h2jjh3jhubaubh5h4)rp}rq(h2Uh3h8hh?h@}rr(hB]hC]hD]hE]rsUbuild-instruction-from-gitrtahH]ruhauhJKhKhhL]rv(hN)rw}rx(h2XBuild instruction from GITryh3jphhRh@}rz(hB]hC]hD]hE]hH]uhJKhKhhL]r{hUXBuild instruction from GITr|r}}r~(h2jyh3jwubaubh)r}r(h2XbFollowing are the steps for building firmware from any external environment outside PROC SDK RTOS.rh3jphhh@}r(hB]hC]hD]hE]hH]uhJKhKhhL]rhUXbFollowing are the steps for building firmware from any external environment outside PROC SDK RTOS.rr}r(h2jh3jubaubcdocutils.nodes bullet_list r)r}r(h2Uh3jphU bullet_listrh@}r(UbulletrX-hE]hD]hB]hC]hH]uhJKhKhhL]r(cdocutils.nodes list_item r)r}r(h2XCreation of directories - Create a working directory e.g. - Create a new directory named ti inside working directory. i.e. - Create a new directory called drv inside ti. i.e. h3jhU list_itemrh@}r(hB]hC]hD]hE]hH]uhJNhKhhL]r(h)r}r(h2XCreation of directoriesrh3jhhh@}r(hB]hC]hD]hE]hH]uhJKhL]rhUXCreation of directoriesrr}r(h2jh3jubaubj)r}r(h2Uh@}r(jX-hE]hD]hB]hC]hH]uh3jhL]r(j)r}r(h2X*Create a working directory e.g. rh@}r(hB]hC]hD]hE]hH]uh3jhL]rh)r}r(h2jh3jhhh@}r(hB]hC]hD]hE]hH]uhJKhL]rhUX*Create a working directory e.g. rr}r(h2jh3jubaubah>jubj)r}r(h2XLCreate a new directory named ti inside working directory. i.e. h@}r(hB]hC]hD]hE]hH]uh3jhL]rh)r}r(h2XLCreate a new directory named ti inside working directory. i.e. rh3jhhh@}r(hB]hC]hD]hE]hH]uhJKhL]rhUXLCreate a new directory named ti inside working directory. i.e. rr}r(h2jh3jubaubah>jubj)r}r(h2XDCreate a new directory called drv inside ti. i.e. h@}r(hB]hC]hD]hE]hH]uh3jhL]rh)r}r(h2XCCreate a new directory called drv inside ti. i.e. rh3jhhh@}r(hB]hC]hD]hE]hH]uhJKhL]rhUXCCreate a new directory called drv inside ti. i.e. rr}r(h2jh3jubaubah>jubeh>jubeubj)r}r(h2XClone of Repos - Git clone pdk build repo into ti directory. i.e. - Git clone icss_emac repo into ti/drv directory. i.e. h3jhjh@}r(hB]hC]hD]hE]hH]uhJNhKhhL]r(h)r}r(h2XClone of Reposrh3jhhh@}r(hB]hC]hD]hE]hH]uhJKhL]rhUXClone of Reposrr}r(h2jh3jubaubj)r}r(h2Uh@}r(jX-hE]hD]hB]hC]hH]uh3jhL]r(j)r}r(h2XDGit clone pdk build repo into ti directory. i.e. h@}r(hB]hC]hD]hE]hH]uh3jhL]rh)r}r(h2XDGit clone pdk build repo into ti directory. i.e. rh3jhhh@}r(hB]hC]hD]hE]hH]uhJKhL]rhUXDGit clone pdk build repo into ti directory. i.e. rr}r(h2jh3jubaubah>jubj)r}r(h2XQGit clone icss_emac repo into ti/drv directory. i.e. h@}r(hB]hC]hD]hE]hH]uh3jhL]rh)r}r(h2XPGit clone icss_emac repo into ti/drv directory. i.e. rh3jhhh@}r(hB]hC]hD]hE]hH]uhJKhL]rhUXPGit clone icss_emac repo into ti/drv directory. i.e. rr}r(h2jh3jubaubah>jubeh>jubeubj)r}r(h2XSetting Environment Variables - Export CLPRU install path. i.e. export CL_PRU_INSTALL_PATH=clpru toolchain directory - Export pdk install path. i.e. export PDK_INSTALL_PATH= - Export LIMIT_SOCS Variable i.e. LIMIT_SOCS= [Optional for limiting to some SOCs] h3jhjh@}r(hB]hC]hD]hE]hH]uhJNhKhhL]r(h)r}r(h2XSetting Environment Variablesrh3jhhh@}r(hB]hC]hD]hE]hH]uhJKhL]rhUXSetting Environment Variablesrr}r(h2jh3jubaubj)r}r(h2Uh@}r(jX-hE]hD]hB]hC]hH]uh3jhL]r(j)r}r(h2XTExport CLPRU install path. i.e. export CL_PRU_INSTALL_PATH=clpru toolchain directoryh@}r(hB]hC]hD]hE]hH]uh3jhL]rh)r}r(h2XTExport CLPRU install path. i.e. export CL_PRU_INSTALL_PATH=clpru toolchain directoryrh3jhhh@}r(hB]hC]hD]hE]hH]uhJKhL]rhUXTExport CLPRU install path. i.e. export CL_PRU_INSTALL_PATH=clpru toolchain directoryrr}r(h2jh3jubaubah>jubj)r}r (h2X@Export pdk install path. i.e. export PDK_INSTALL_PATH=r h@}r (hB]hC]hD]hE]hH]uh3jhL]r h)r }r(h2j h3jhhh@}r(hB]hC]hD]hE]hH]uhJKhL]rhUX@Export pdk install path. i.e. export PDK_INSTALL_PATH=rr}r(h2j h3j ubaubah>jubj)r}r(h2XVExport LIMIT_SOCS Variable i.e. LIMIT_SOCS= [Optional for limiting to some SOCs] h@}r(hB]hC]hD]hE]hH]uh3jhL]rh)r}r(h2XUExport LIMIT_SOCS Variable i.e. LIMIT_SOCS= [Optional for limiting to some SOCs]rh3jhhh@}r(hB]hC]hD]hE]hH]uhJKhL]rhUXUExport LIMIT_SOCS Variable i.e. LIMIT_SOCS= [Optional for limiting to some SOCs]rr}r(h2jh3jubaubah>jubeh>jubeubj)r }r!(h2XBuild command - Run make firm/firm_clean to build/clean firmware from icss_emac directory i.e. h3jhjh@}r"(hB]hC]hD]hE]hH]uhJNhKhhL]r#(h)r$}r%(h2X Build commandr&h3j hhh@}r'(hB]hC]hD]hE]hH]uhJKhL]r(hUX Build commandr)r*}r+(h2j&h3j$ubaubj)r,}r-(h2Uh@}r.(jX-hE]hD]hB]hC]hH]uh3j hL]r/j)r0}r1(h2XkRun make firm/firm_clean to build/clean firmware from icss_emac directory i.e. h@}r2(hB]hC]hD]hE]hH]uh3j,hL]r3h)r4}r5(h2XjRun make firm/firm_clean to build/clean firmware from icss_emac directory i.e. r6h3j0hhh@}r7(hB]hC]hD]hE]hH]uhJKhL]r8hUXjRun make firm/firm_clean to build/clean firmware from icss_emac directory i.e. r9r:}r;(h2j6h3j4ubaubah>jubah>jubeubj)r<}r=(h2XGenerated binaries - the firmware binaries which will be located in /bin///> h3jhjh@}r>(hB]hC]hD]hE]hH]uhJNhKhhL]r?(h)r@}rA(h2XGenerated binariesrBh3j<hhh@}rC(hB]hC]hD]hE]hH]uhJKhL]rDhUXGenerated binariesrErF}rG(h2jBh3j@ubaubj)rH}rI(h2Uh@}rJ(jX-hE]hD]hB]hC]hH]uh3j<hL]rKj)rL}rM(h2Xthe firmware binaries which will be located in /bin///> h@}rN(hB]hC]hD]hE]hH]uh3jHhL]rOh)rP}rQ(h2Xthe firmware binaries which will be located in /bin///>rRh3jLhhh@}rS(hB]hC]hD]hE]hH]uhJKhL]rThUXthe firmware binaries which will be located in /bin///>rUrV}rW(h2jRh3jPubaubah>jubah>jubeubeubhx)rX}rY(h2Uh3jphh{h@}rZ(hB]hC]hD]hE]hH]uhJKhKhhL]r[h~)r\}r](h2UhKh3jXhhJh@}r^(hB]hC]hD]hE]hH]uhJKhKhhL]ubaubeubeubhh?h@}r_(hB]r`X4build instruction from processor sdk release packageraahC]hD]hE]rbU4build-instruction-from-processor-sdk-release-packagercahH]uhJK|hKhhL]rd(hN)re}rf(h2X4Build instruction from Processor SDK Release packagergh3h5hhRh@}rh(hB]hC]hD]hE]hH]uhJK|hKhhL]rihUX4Build instruction from Processor SDK Release packagerjrk}rl(h2jgh3jeubaubj)rm}rn(h2XPre-requisites to Buildingroh7Kh3h5hjh@}rp(hE]rqUpre-requisites-to-buildingrrahD]hB]rsXpre-requisites-to-buildingrtahC]hH]uhJNhKhhL]ruhUXPre-requisites to Buildingrvrw}rx(h2joh3jmubaubcdocutils.nodes literal_block ry)rz}r{(h2X^Refer to the Processor SDK RTOS Building page for information on setting up build environment.h3h5hU literal_blockr|h@}r}(hbhchE]hD]hB]hC]hH]uhJKhKhhL]r~hUX^Refer to the Processor SDK RTOS Building page for information on setting up build environment.rr}r(h2Uh3jzubaubj)r}r(h2XCompiling ICSS-EMAC FIRMWARESrh3h5hjh@}r(hE]rUcompiling-icss-emac-firmwaresrahD]hB]hC]hH]rhauhJNhKhhL]rhUXCompiling ICSS-EMAC FIRMWARESrr}r(h2jh3jubaubj)r}r(h2Uh3h5hjh@}r(jX-hE]hD]hB]hC]hH]uhJKhKhhL]r(j)r}r(h2X"cd /packages/ti/drv/icss_emacrh3jhjh@}r(hB]hC]hD]hE]hH]uhJNhKhhL]rh)r}r(h2jh3jhhh@}r(hB]hC]hD]hE]hH]uhJKhL]rhUX"cd /packages/ti/drv/icss_emacrr}r(h2jh3jubaubaubj)r}r(h2X make firm h3jhjh@}r(hB]hC]hD]hE]hH]uhJNhKhhL]rh)r}r(h2X make firmrh3jhhh@}r(hB]hC]hD]hE]hH]uhJKhL]rhUX make firmrr}r(h2jh3jubaubaubeubh)r}r(h2X=Firmware binaries at the end of the build will be located at:rh3h5hhh@}r(hB]hC]hD]hE]hH]uhJKhKhhL]rhUX=Firmware binaries at the end of the build will be located at:rr}r(h2jh3jubaubj)r}r(h2Uh3h5hjh@}r(jX-hE]hD]hB]hC]hH]uhJKhKhhL]r(j)r}r(h2XZ/packages/ti/drv/icss_emac/firmware//bin/// h3jhjh@}r(hB]hC]hD]hE]hH]uhJNhKhhL]rh)r}r(h2XY/packages/ti/drv/icss_emac/firmware//bin///rh3jhhh@}r(hB]hC]hD]hE]hH]uhJKhL]rhUXY/packages/ti/drv/icss_emac/firmware//bin///rr}r(h2jh3jubaubaubj)r}r(h2Xg indicates the firmware type i.e. icss_dualemac for DUAL_EMAC or icss_switch for SWITCH h3jhjh@}r(hB]hC]hD]hE]hH]uhJNhKhhL]rh)r}r(h2Xf indicates the firmware type i.e. icss_dualemac for DUAL_EMAC or icss_switch for SWITCHrh3jhhh@}r(hB]hC]hD]hE]hH]uhJKhL]rhUXf indicates the firmware type i.e. icss_dualemac for DUAL_EMAC or icss_switch for SWITCHrr}r(h2jh3jubaubaubj)r}r(h2X indicates the SOC type. h3jhjh@}r(hB]hC]hD]hE]hH]uhJNhKhhL]rh)r}r(h2X indicates the SOC type.rh3jhhh@}r(hB]hC]hD]hE]hH]uhJKhL]rhUX indicates the SOC type.rr}r(h2jh3jubaubaubj)r}r(h2XR indicates the Host core type on which the built binary can be loaded. h3jhjh@}r(hB]hC]hD]hE]hH]uhJNhKhhL]rh)r}r(h2XQ indicates the Host core type on which the built binary can be loaded.rh3jhhh@}r(hB]hC]hD]hE]hH]uhJKhL]rhUXQ indicates the Host core type on which the built binary can be loaded.rr}r(h2jh3jubaubaubj)r}r(h2Xp indicates the revision of the firmware binary based on core. (There are 2 revision of PRU ICSS core) h3jhjh@}r(hB]hC]hD]hE]hH]uhJNhKhhL]rh)r}r(h2Xo indicates the revision of the firmware binary based on core. (There are 2 revision of PRU ICSS core)rh3jhhh@}r(hB]hC]hD]hE]hH]uhJKhL]rhUXo indicates the revision of the firmware binary based on core. (There are 2 revision of PRU ICSS core)rr}r(h2jh3jubaubaubeubhx)r}r(h2Uh3h5hh{h@}r(hB]hC]hD]hE]hH]uhJKhKhhL]rh~)r}r(h2UhKh3jhhJh@}r(hB]hC]hD]hE]hH]uhJKhKhhL]ubaubeubhUsystem_messagerh@}r(hB]UlevelKhE]hD]Usourceh^hC]hH]UlineK|UtypeUWARNINGruhJK|hKhhL]r(h)r}r(h2XTitle underline too short.h@}r(hB]hC]hD]hE]hH]uh3h0hL]rhUXTitle underline too short.rr}r(h2Uh3jubah>hubjy)r}r(h2XhBuild instruction from Processor SDK Release package ---------------------------------------------------h@}r(hbhchE]hD]hB]hC]hH]uh3h0hL]rhUXhBuild instruction from Processor SDK Release package ---------------------------------------------------rr}r (h2Uh3jubah>j|ubeubh/)r }r (h2Uh3jhjh@}r (hB]UlevelKhE]hD]Usourceh^hC]hH]UlineKUtypeUERRORruhJMhKhhL]r(h)r}r(h2X;Content block expected for the "raw" directive; none found.h@}r(hB]hC]hD]hE]hH]uh3j hL]rhUX;Content block expected for the "raw" directive; none found.rr}r(h2Uh3jubah>hubjy)r}r(h2X.. raw:: html h@}r(hbhchE]hD]hB]hC]hH]uh3j hL]rhUX.. raw:: html rr}r(h2Uh3jubah>j|ubeubh/)r}r(h2Uh3h4)r }r!(h2Uh7Kh3h4)r"}r#(h2Uh3hhh?h@}r$(hB]hC]hD]hE]r%Uicss-g-dual-emacr&ahH]r'h$auhJKhKhhL]r((hN)r)}r*(h2XICSS-G Dual EMACr+h3j"hhRh@}r,(hB]hC]hD]hE]hH]uhJKhKhhL]r-hUXICSS-G Dual EMACr.r/}r0(h2j+h3j)ubaubhY)r1}r2(h2XPhttp://processors.wiki.ti.com/index.php/Processor_SDK_RTOS_ICSS-G-EMAC_FIRMWARESh3j"hh`h@}r6(hbhchE]hD]hB]hC]hH]uhJKhKhhL]r7hUXPhttp://processors.wiki.ti.com/index.php/Processor_SDK_RTOS_ICSS-G-EMAC_FIRMWARESr8r9}r:(h2Uh3j1ubaubj h4)r;}r<(h2Uh7Kh3j"hh?h@}r=(hB]r>hahC]hD]hE]r?Uid2r@ahH]uhJK hKhhL]rA(hN)rB}rC(h2X DUAL_EMACrDh3j;hhRh@}rE(hB]hC]hD]hE]hH]uhJK hKhhL]rFhUX DUAL_EMACrGrH}rI(h2jDh3jBubaubh)rJ}rK(h2XICSS DUAL EMAC FIRMWARE is a single port Ethernet MAC (Media Access Control) i.e. Layer 2 of OSI Model. It implements a 2 port Ethernet mac supporting 100Mbps and 1Gbps. DUAL MAC FIRMWARE is standardized to IEEE 802.1 Ethernet Standards. Primary use case of the protocol is to demonstrate basic Ethernet functionality via both PRU/RTU cores. ICSS-G DUAL EMAC FIRMWARE can be used independently on two PRUs to implement two independent MACs with two different MAC addresses and two different IP addresses.rLh3j;hhh@}rM(hB]hC]hD]hE]hH]uhJK hKhhL]rNhUXICSS DUAL EMAC FIRMWARE is a single port Ethernet MAC (Media Access Control) i.e. Layer 2 of OSI Model. It implements a 2 port Ethernet mac supporting 100Mbps and 1Gbps. DUAL MAC FIRMWARE is standardized to IEEE 802.1 Ethernet Standards. Primary use case of the protocol is to demonstrate basic Ethernet functionality via both PRU/RTU cores. ICSS-G DUAL EMAC FIRMWARE can be used independently on two PRUs to implement two independent MACs with two different MAC addresses and two different IP addresses.rOrP}rQ(h2jLh3jJubaubh)rR}rS(h2X"Following are high level features:rTh3j;hhh@}rU(hB]hC]hD]hE]hH]uhJKhKhhL]rVhUX"Following are high level features:rWrX}rY(h2jTh3jRubaubh)rZ}r[(h2Uh3j;hhh@}r\(hB]hC]hD]hE]hH]uhJNhKhhL]r]h)r^}r_(h2Uh@}r`(hE]hD]hB]hC]hH]UcolsKuh3jZhL]ra(h)rb}rc(h2Uh@}rd(hE]hD]hB]hC]hH]UcolwidthK#uh3j^hL]h>hubh)re}rf(h2Uh@}rg(hE]hD]hB]hC]hH]UcolwidthK#uh3j^hL]h>hubh)rh}ri(h2Uh@}rj(hB]hC]hD]hE]hH]uh3j^hL]rk(h)rl}rm(h2Uh@}rn(hB]hC]hD]hE]hH]uh3jhhL]ro(h)rp}rq(h2Uh@}rr(hB]hC]hD]hE]hH]uh3jlhL]rsh)rt}ru(h2X**Requirements**rvh3jphhh@}rw(hB]hC]hD]hE]hH]uhJKhL]rxh)ry}rz(h2jvh@}r{(hB]hC]hD]hE]hH]uh3jthL]r|hUX Requirementsr}r~}r(h2Uh3jyubah>hubaubah>hubh)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jlhL]rh)r}r(h2X **Remarks**rh3jhhh@}r(hB]hC]hD]hE]hH]uhJKhL]rh)r}r(h2jh@}r(hB]hC]hD]hE]hH]uh3jhL]rhUXRemarksrr}r(h2Uh3jubah>hubaubah>hubeh>hubh)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhhL]r(h)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]rh)r}r(h2X4 egress DMA threads per portrh3jhhh@}r(hB]hC]hD]hE]hH]uhJKhL]rhUX4 egress DMA threads per portrr}r(h2jh3jubaubah>hubh)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]rh)r}r(h2X Supportedrh3jhhh@}r(hB]hC]hD]hE]hH]uhJKhL]rhUX Supportedrr}r(h2jh3jubaubah>hubeh>hubh)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhhL]r(h)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]rh)r}r(h2X 4 ingress “buckets” per portrh3jhhh@}r(hB]hC]hD]hE]hH]uhJKhL]rhUX 4 ingress “buckets” per portrr}r(h2jh3jubaubah>hubh)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]rh)r}r(h2X Supportedrh3jhhh@}r(hB]hC]hD]hE]hH]uhJKhL]rhUX Supportedrr}r(h2jh3jubaubah>hubeh>hubh)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhhL]r(h)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]rh)r}r(h2X Statisticsrh3jhhh@}r(hB]hC]hD]hE]hH]uhJKhL]rhUX Statisticsrr}r(h2jh3jubaubah>hubh)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]rh)r}r(h2X Supportedrh3jhhh@}r(hB]hC]hD]hE]hH]uhJKhL]rhUX Supportedrr}r(h2jh3jubaubah>hubeh>hubh)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhhL]r(h)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]rh)r}r(h2XStorm Preventionrh3jhhh@}r(hB]hC]hD]hE]hH]uhJK!hL]rhUXStorm Preventionrr}r(h2jh3jubaubah>hubh)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]rh)r}r(h2XFuturerh3jhhh@}r(hB]hC]hD]hE]hH]uhJK!hL]rhUXFuturerr}r(h2jh3jubaubah>hubeh>hubh)r }r (h2Uh@}r (hB]hC]hD]hE]hH]uh3jhhL]r (h)r }r (h2Uh@}r (hB]hC]hD]hE]hH]uh3j hL]r h)r }r (h2XPromiscuous Moder h3j hhh@}r (hB]hC]hD]hE]hH]uhJK#hL]r hUXPromiscuous Moder r }r (h2j h3j ubaubah>hubh)r }r (h2Uh@}r (hB]hC]hD]hE]hH]uh3j hL]r h)r }r (h2X Supportedr h3j hhh@}r (hB]hC]hD]hE]hH]uhJK#hL]r hUX Supportedr r }r (h2j h3j ubaubah>hubeh>hubh)r }r (h2Uh@}r (hB]hC]hD]hE]hH]uh3jhhL]r (h)r }r! (h2Uh@}r" (hB]hC]hD]hE]hH]uh3j hL]r# h)r$ }r% (h2XTTS (Time Triggered Send)r& h3j hhh@}r' (hB]hC]hD]hE]hH]uhJK%hL]r( hUXTTS (Time Triggered Send)r) r* }r+ (h2j& h3j$ ubaubah>hubh)r, }r- (h2Uh@}r. (hB]hC]hD]hE]hH]uh3j hL]r/ h)r0 }r1 (h2XFuturer2 h3j, hhh@}r3 (hB]hC]hD]hE]hH]uhJK%hL]r4 hUXFuturer5 r6 }r7 (h2j2 h3j0 ubaubah>hubeh>hubh)r8 }r9 (h2Uh@}r: (hB]hC]hD]hE]hH]uh3jhhL]r; (h)r< }r= (h2Uh@}r> (hB]hC]hD]hE]hH]uh3j8 hL]r? h)r@ }rA (h2XError HandlingrB h3j< hhh@}rC (hB]hC]hD]hE]hH]uhJK'hL]rD hUXError HandlingrE rF }rG (h2jB h3j@ ubaubah>hubh)rH }rI (h2Uh@}rJ (hB]hC]hD]hE]hH]uh3j8 hL]rK h)rL }rM (h2X SupportedrN h3jH hhh@}rO (hB]hC]hD]hE]hH]uhJK'hL]rP hUX SupportedrQ rR }rS (h2jN h3jL ubaubah>hubeh>hubh)rT }rU (h2Uh@}rV (hB]hC]hD]hE]hH]uh3jhhL]rW (h)rX }rY (h2Uh@}rZ (hB]hC]hD]hE]hH]uh3jT hL]r[ h)r\ }r] (h2XMulticast filteringr^ h3jX hhh@}r_ (hB]hC]hD]hE]hH]uhJK)hL]r` hUXMulticast filteringra rb }rc (h2j^ h3j\ ubaubah>hubh)rd }re (h2Uh@}rf (hB]hC]hD]hE]hH]uh3jT hL]rg h)rh }ri (h2X Supportedrj h3jd hhh@}rk (hB]hC]hD]hE]hH]uhJK)hL]rl hUX Supportedrm rn }ro (h2jj h3jh ubaubah>hubeh>hubh)rp }rq (h2Uh@}rr (hB]hC]hD]hE]hH]uh3jhhL]rs (h)rt }ru (h2Uh@}rv (hB]hC]hD]hE]hH]uh3jp hL]rw h)rx }ry (h2XVLAN filteringrz h3jt hhh@}r{ (hB]hC]hD]hE]hH]uhJK+hL]r| hUXVLAN filteringr} r~ }r (h2jz h3jx ubaubah>hubh)r }r (h2Uh@}r (hB]hC]hD]hE]hH]uh3jp hL]r h)r }r (h2XFuturer h3j hhh@}r (hB]hC]hD]hE]hH]uhJK+hL]r hUXFuturer r }r (h2j h3j ubaubah>hubeh>hubh)r }r (h2Uh@}r (hB]hC]hD]hE]hH]uh3jhhL]r (h)r }r (h2Uh@}r (hB]hC]hD]hE]hH]uh3j hL]r h)r }r (h2X PTP Handlingr h3j hhh@}r (hB]hC]hD]hE]hH]uhJK-hL]r hUX PTP Handlingr r }r (h2j h3j ubaubah>hubh)r }r (h2Uh@}r (hB]hC]hD]hE]hH]uh3j hL]r h)r }r (h2X Supportedr h3j hhh@}r (hB]hC]hD]hE]hH]uhJK-hL]r hUX Supportedr r }r (h2j h3j ubaubah>hubeh>hubeh>jubeh>j ubaubhx)r }r (h2Uh3j;hh{h@}r (hB]hC]hD]hE]hH]uhJK0hKhhL]r h~)r }r (h2UhKh3j hhJh@}r (hB]hC]hD]hE]hH]uhJKhKhhL]ubaubeubh4)r }r (h2Uh3j"hh?h@}r (hB]hC]hD]hE]r U,firmware-code-location-and-build-instructionr ahH]r hauhJK4hKhhL]r (hN)r }r (h2X,Firmware Code Location and Build Instructionr h3j hhRh@}r (hB]hC]hD]hE]hH]uhJK4hKhhL]r hUX,Firmware Code Location and Build Instructionr r }r (h2j h3j ubaubh)r }r (h2XQFirmware is located at packages/ti/drv/emac/firmware/icss_eth/src directory.r h3j hhh@}r (hB]hC]hD]hE]hH]uhJK6hKhhL]r hUXQFirmware is located at packages/ti/drv/emac/firmware/icss_eth/src directory.r r }r (h2j h3j ubaubh)r }r (h2XThe CLPRU toolchain has to be used to build the firmware. The toolchain can be downloaded from h3j hhh@}r (hB]hC]hD]hE]hH]uhJK8hKhhL]r (hUX`The CLPRU toolchain has to be used to build the firmware. The toolchain can be downloaded from jubhUX>r }r (h2X>h3j ubeubh)r }r (h2XTo build the firmware:r h3j hhh@}r (hB]hC]hD]hE]hH]uhJK;hKhhL]r hUXTo build the firmware:r r }r (h2j h3j ubaubj)r }r (h2Uh3j hjh@}r (jX-hE]hD]hB]hC]hH]uhJK=hKhhL]r (j)r }r (h2X@cd to packages/ti/drv/emac/firmware/icss_eth/src directory h3j hjh@}r (hB]hC]hD]hE]hH]uhJNhKhhL]r h)r }r (h2X?cd to packages/ti/drv/emac/firmware/icss_eth/src directoryr h3j hhh@}r (hB]hC]hD]hE]hH]uhJK=hL]r hUX?cd to packages/ti/drv/emac/firmware/icss_eth/src directoryr r }r (h2j h3j ubaubaubj)r }r (h2X=make CLPRU_INSTALL_PATH=. h3j hjh@}r (hB]hC]hD]hE]hH]uhJNhKhhL]r h)r }r (h2X<make CLPRU_INSTALL_PATH=.r h3j hhh@}r (hB]hC]hD]hE]hH]uhJK?hL]r hUX<make CLPRU_INSTALL_PATH=.r r }r (h2j h3j ubaubaubeubh)r }r (h2XaThe firmware will be located in the packages/ti/drv/emac/firmware/icss_eth/src/dm directory.r h3j hhh@}r (hB]hC]hD]hE]hH]uhJKAhKhhL]r hUXaThe firmware will be located in the packages/ti/drv/emac/firmware/icss_eth/src/dm directory.r r }r (h2j h3j ubaubhx)r }r (h2Uh3j hh{h@}r (hB]hC]hD]hE]hH]uhJKChKhhL]r h~)r }r (h2UhKh3j hhJh@}r (hB]hC]hD]hE]hH]uhJKhKhhL]ubaubeubeubhh?h@}r (hB]r hlahC]hD]hE]r Uid1r ahH]uhJKhKhhL]r (hN)r }r (h2X Introductionr h3j hhRh@}r (hB]hC]hD]hE]hH]uhJKhKhhL]r hUX Introductionr r }r (h2j h3j ubaubhx)r }r (h2Uh3j hh{h@}r (hB]hC]hD]hE]hH]uhJKhKhhL]r h~)r }r (h2XThe ICSS-G FIRMWARE serves as example to implement various network functionalities. Package includes source release for DUAL EMACr hKh3j hhJh@}r (hB]hC]hD]hE]hH]uhJKhKhhL]r hUXThe ICSS-G FIRMWARE serves as example to implement various network functionalities. Package includes source release for DUAL EMACr r! }r" (h2j h3j ubaubaubhx)r# }r$ (h2Uh3j hh{h@}r% (hB]hC]hD]hE]hH]uhJKhKhhL]r& h~)r' }r( (h2UhKh3j# hhJh@}r) (hB]hC]hD]hE]hH]uhJKhKhhL]ubaubeubhjh@}r* (hB]UlevelKhE]hD]r+ j aUsourcej4hC]hH]UlineKUtypeUINFOr, uhJKhKhhL]r- h)r. }r/ (h2X/Duplicate implicit target name: "introduction".h@}r0 (hB]hC]hD]hE]hH]uh3jhL]r1 hUX/Duplicate implicit target name: "introduction".r2 r3 }r4 (h2Uh3j. ubah>hubaubh/)r5 }r6 (h2Uh3j;hjh@}r7 (hB]UlevelKhE]hD]r8 j@aUsourcej4hC]hH]UlineK Utypej, uhJK hKhhL]r9 h)r: }r; (h2X,Duplicate implicit target name: "dual_emac".h@}r< (hB]hC]hD]hE]hH]uh3j5 hL]r= hUX,Duplicate implicit target name: "dual_emac".r> r? }r@ (h2Uh3j: ubah>hubaubh/)rA }rB (h2Uh3j hjh@}rD (hB]UlevelKhE]hD]Usourcej4hC]hH]UlineKEUtypejuhJKGhKhhL]rE (h)rF }rG (h2X;Content block expected for the "raw" directive; none found.h@}rH (hB]hC]hD]hE]hH]uh3jA hL]rI hUX;Content block expected for the "raw" directive; none found.rJ rK }rL (h2Uh3jF ubah>hubjy)rM }rN (h2X.. raw:: html h@}rO (hbhchE]hD]hB]hC]hH]uh3jA hL]rP hUX.. raw:: html rQ rR }rS (h2Uh3jM ubah>j|ubeubh/)rT }rU (h2Uh3h4)rV }rW (h2Uh7Kh3h4)rX }rY (h2Uh3hhh?h@}rZ (hB]hC]hD]hE]r[ Upru-icss-sorter\ ahH]r] h!auhJK hKhhL]r^ (hN)r_ }r` (h2XPRU-ICSS SORTEra h3jX hhRh@}rb (hB]hC]hD]hE]hH]uhJK hKhhL]rc hUXPRU-ICSS SORTErd re }rf (h2ja h3j_ ubaubjV h4)rg }rh (h2Uh3jX hh?h@}rl (hB]hC]hD]hE]rm Uprotocol-overviewrn ahH]ro h"auhJKhKhhL]rp (hN)rq }rr (h2XProtocol Overviewrs h3jg hhRh@}rt (hB]hC]hD]hE]hH]uhJKhKhhL]ru hUXProtocol Overviewrv rw }rx (h2js h3jq ubaubh)ry }rz (h2XThe SORTE protocol is a TI-developed industrial Ethernet protocol that supports 4-µs cycle time. The SORTE protocol operates on the PRU-ICSS, which is an industrial peripheral within Sitara and KeyStone processors from Texas Instruments. SORTE protocol operates exclusively on the PRU-ICSS; therefore, the ARM Cortex-A8, A9 or A15 processors – depending on the device family – are available for industrial applications. The SORTE protocol differentiate between two network components: the master and one or more slave devices. For in depth details of the protocol please refer to the the design documents as listed in the References section below.r{ h3jg hhh@}r| (hB]hC]hD]hE]hH]uhJKhKhhL]r} hUXThe SORTE protocol is a TI-developed industrial Ethernet protocol that supports 4-µs cycle time. The SORTE protocol operates on the PRU-ICSS, which is an industrial peripheral within Sitara and KeyStone processors from Texas Instruments. SORTE protocol operates exclusively on the PRU-ICSS; therefore, the ARM Cortex-A8, A9 or A15 processors – depending on the device family – are available for industrial applications. The SORTE protocol differentiate between two network components: the master and one or more slave devices. For in depth details of the protocol please refer to the the design documents as listed in the References section below.r~ r }r (h2j{ h3jy ubaubeubh4)r }r (h2Uh7Kh3jX hh?h@}r (hB]r jahC]hD]hE]r Uid4r ahH]uhJK hKhhL]r (hN)r }r (h2XCode Organizationr h3j hhRh@}r (hB]hC]hD]hE]hH]uhJK hKhhL]r hUXCode Organizationr r }r (h2j h3j ubaubh)r }r (h2X\THE SORTE ARM application and firmware sources can be found under the following directory :r h3j hhh@}r (hB]hC]hD]hE]hH]uhJK"hKhhL]r hUX\THE SORTE ARM application and firmware sources can be found under the following directory :r r }r (h2j h3j ubaubh)r }r (h2X3**/packages/ti/drv/pruss/example/apps/sorte/**r h3j hhh@}r (hB]hC]hD]hE]hH]uhJK%hKhhL]r h)r }r (h2j h@}r (hB]hC]hD]hE]hH]uh3j hL]r hUX//packages/ti/drv/pruss/example/apps/sorte/r r }r (h2Uh3j ubah>hubaubh)r }r (h2XJRefer to the README.txt in this directory for details of directory layout.r h3j hhh@}r (hB]hC]hD]hE]hH]uhJK'hKhhL]r hUXJRefer to the README.txt in this directory for details of directory layout.r r }r (h2j h3j ubaubh)r }r (h2XIn addition, there is a README.txt which provides high-level over of how the protocol is implmented for master and slave device network compoments which can be found at:r h3j hhh@}r (hB]hC]hD]hE]hH]uhJK*hKhhL]r hUXIn addition, there is a README.txt which provides high-level over of how the protocol is implmented for master and slave device network compoments which can be found at:r r }r (h2j h3j ubaubh)r }r (h2XQ**/packages/ti/drv/pruss/example/apps/sorte/firmware/src/master/README.txt**r h3j hhh@}r (hB]hC]hD]hE]hH]uhJK.hKhhL]r h)r }r (h2j h@}r (hB]hC]hD]hE]hH]uh3j hL]r hUXM/packages/ti/drv/pruss/example/apps/sorte/firmware/src/master/README.txtr r }r (h2Uh3j ubah>hubaubh)r }r (h2XP**/packages/ti/drv/pruss/example/apps/sorte/firmware/src/slave/README.txt**r h3j hhh@}r (hB]hC]hD]hE]hH]uhJK0hKhhL]r h)r }r (h2j h@}r (hB]hC]hD]hE]hH]uh3j hL]r hUXL/packages/ti/drv/pruss/example/apps/sorte/firmware/src/slave/README.txtr r }r (h2Uh3j ubah>hubaubhx)r }r (h2Uh3j hh{h@}r (hB]hC]hD]hE]hH]uhJK2hKhhL]r h~)r }r (h2UhKh3j hhJh@}r (hB]hC]hD]hE]hH]uhJKhKhhL]ubaubeubh4)r }r (h2Uh3jX hh?h@}r (hB]hC]hD]hE]r Ubuilding-the-examplesr ahH]r h'auhJK5hKhhL]r (hN)r }r (h2XBuilding the Examplesr h3j hhRh@}r (hB]hC]hD]hE]hH]uhJK5hKhhL]r hUXBuilding the Examplesr r }r (h2j h3j ubaubh4)r }r (h2Uh3j hh?h@}r (hB]hC]hD]hE]r Uid5r ahH]r hauhJK8hKhhL]r (hN)r }r (h2XPre-requisites to Buildingr h3j hhRh@}r (hB]hC]hD]hE]hH]uhJK8hKhhL]r hUXPre-requisites to Buildingr r }r (h2j h3j ubaubcdocutils.nodes enumerated_list r )r }r (h2Uh3j hUenumerated_listr h@}r (Usuffixr U.hE]hD]hB]Uprefixr UhC]hH]Uenumtyper Uarabicr uhJK:hKhhL]r j)r }r (h2X4Set your environment using pdksetupenv.sh. Building the Firmware binaries and ARM application uses the same environment variables as the pruss driver library build. Refer to the `Processor SDK RTOS Building `__ page for information on setting up your build environment. h3j hjh@}r (hB]hC]hD]hE]hH]uhJNhKhhL]r h)r }r (h2X3Set your environment using pdksetupenv.sh. Building the Firmware binaries and ARM application uses the same environment variables as the pruss driver library build. Refer to the `Processor SDK RTOS Building `__ page for information on setting up your build environment.h3j hhh@}r (hB]hC]hD]hE]hH]uhJK:hL]r (hUXSet your environment using pdksetupenv.sh. Building the Firmware binaries and ARM application uses the same environment variables as the pruss driver library build. Refer to the r r }r (h2XSet your environment using pdksetupenv.sh. Building the Firmware binaries and ARM application uses the same environment variables as the pruss driver library build. Refer to the h3j ubj)r }r (h2XF`Processor SDK RTOS Building `__h@}r (UnameXProcessor SDK RTOS BuildingjX$index_overview.html#building-the-sdkhE]hD]hB]hC]hH]uh3j hL]r hUXProcessor SDK RTOS Buildingr r }r (h2Uh3j ubah>jubhUX; page for information on setting up your build environment.r r }r (h2X; page for information on setting up your build environment.h3j ubeubaubaubeubh4)r }r (h2Uh3j hh?h@}r (hB]hC]hD]hE]r U"compiling-the-pruss-sorte-firmwarer ahH]r hauhJKAhKhhL]r (hN)r }r (h2X"Compiling the PRUSS SORTE Firmwarer h3j hhRh@}r (hB]hC]hD]hE]hH]uhJKAhKhhL]r hUX"Compiling the PRUSS SORTE Firmwarer r }r (h2j h3j ubaubh)r }r (h2X%To build the SORTE firmware binaries:r! h3j hhh@}r" (hB]hC]hD]hE]hH]uhJKChKhhL]r# hUX%To build the SORTE firmware binaries:r$ r% }r& (h2j! h3j ubaubj )r' }r( (h2Uh3j hj h@}r) (j U.hE]hD]hB]j UhC]hH]j j uhJKEhKhhL]r* (j)r+ }r, (h2X"**cd /packages/ti/drv/pruss**r- h3j' hjh@}r. (hB]hC]hD]hE]hH]uhJNhKhhL]r/ h)r0 }r1 (h2j- h3j+ hhh@}r2 (hB]hC]hD]hE]hH]uhJKEhL]r3 h)r4 }r5 (h2j- h@}r6 (hB]hC]hD]hE]hH]uh3j0 hL]r7 hUXcd /packages/ti/drv/prussr8 r9 }r: (h2Uh3j4 ubah>hubaubaubj)r; }r< (h2X**make firm** h3j' hjh@}r= (hB]hC]hD]hE]hH]uhJNhKhhL]r> h)r? }r@ (h2X **make firm**rA h3j; hhh@}rB (hB]hC]hD]hE]hH]uhJKFhL]rC h)rD }rE (h2jA h@}rF (hB]hC]hD]hE]hH]uh3j? hL]rG hUX make firmrH rI }rJ (h2Uh3jD ubah>hubaubaubeubh)rK }rL (h2X>This will make the firmware binaries which will be located in:rM h3j hhh@}rN (hB]hC]hD]hE]hH]uhJKHhKhhL]rO hUX>This will make the firmware binaries which will be located in:rP rQ }rR (h2jM h3jK ubaubh)rS }rT (h2XG**/packages/ti/drv/pruss/example/apps/sorte/firmware/bin/**rU h3j hhh@}rV (hB]hC]hD]hE]hH]uhJKJhKhhL]rW h)rX }rY (h2jU h@}rZ (hB]hC]hD]hE]hH]uh3jS hL]r[ hUXC/packages/ti/drv/pruss/example/apps/sorte/firmware/bin/r\ r] }r^ (h2Uh3jX ubah>hubaubhx)r_ }r` (h2Uh3j hh{h@}ra (hB]hC]hD]hE]hH]uhJKLhKhhL]rb h~)rc }rd (h2UhKh3j_ hhJh@}re (hB]hC]hD]hE]hH]uhJKhKhhL]ubaubeubh4)rf }rg (h2Uh3j hh?h@}rh (hB]hC]hD]hE]ri U%compiling-the-pruss-sorte-applicationrj ahH]rk hauhJKOhKhhL]rl (hN)rm }rn (h2X%Compiling the PRUSS SORTE Applicationro h3jf hhRh@}rp (hB]hC]hD]hE]hH]uhJKOhKhhL]rq hUX%Compiling the PRUSS SORTE Applicationrr rs }rt (h2jo h3jm ubaubh)ru }rv (h2X$To build the SORTE ARM applications:rw h3jf hhh@}rx (hB]hC]hD]hE]hH]uhJKQhKhhL]ry hUX$To build the SORTE ARM applications:rz r{ }r| (h2jw h3ju ubaubj )r} }r~ (h2Uh3jf hj h@}r (j U.hE]hD]hB]j UhC]hH]j j uhJKShKhhL]r (j)r }r (h2X"**cd /packages/ti/drv/pruss**r h3j} hjh@}r (hB]hC]hD]hE]hH]uhJNhKhhL]r h)r }r (h2j h3j hhh@}r (hB]hC]hD]hE]hH]uhJKShL]r h)r }r (h2j h@}r (hB]hC]hD]hE]hH]uh3j hL]r hUXcd /packages/ti/drv/prussr r }r (h2Uh3j ubah>hubaubaubj)r }r (h2X**make apps** h3j} hjh@}r (hB]hC]hD]hE]hH]uhJNhKhhL]r h)r }r (h2X **make apps**r h3j hhh@}r (hB]hC]hD]hE]hH]uhJKThL]r h)r }r (h2j h@}r (hB]hC]hD]hE]hH]uh3j hL]r hUX make appsr r }r (h2Uh3j ubah>hubaubaubeubh)r }r (h2X^This will make the ARM applications for both master and slave device which will be located in:r h3jf hhh@}r (hB]hC]hD]hE]hH]uhJKVhKhhL]r hUX^This will make the ARM applications for both master and slave device which will be located in:r r }r (h2j h3j ubaubh)r }r (h2X?**/packages/ti/drv/pruss/example/apps/sorte/slave**r h3jf hhh@}r (hB]hC]hD]hE]hH]uhJKYhKhhL]r h)r }r (h2j h@}r (hB]hC]hD]hE]hH]uh3j hL]r hUX;/packages/ti/drv/pruss/example/apps/sorte/slaver r }r (h2Uh3j ubah>hubaubh)r }r (h2X@**/packages/ti/drv/pruss/example/apps/sorte/master**r h3jf hhh@}r (hB]hC]hD]hE]hH]uhJK[hKhhL]r h)r }r (h2j h@}r (hB]hC]hD]hE]hH]uh3j hL]r hUX</packages/ti/drv/pruss/example/apps/sorte/masterr r }r (h2Uh3j ubah>hubaubhx)r }r (h2Uh3jf hh{h@}r (hB]hC]hD]hE]hH]uhJK]hKhhL]r h~)r }r (h2UhKh3j hhJh@}r (hB]hC]hD]hE]hH]uhJKhKhhL]ubaubeubeubh4)r }r (h2Uh7Kh3jX hh?h@}r (hB]r jahC]hD]hE]r Uid6r ahH]uhJK`hKhhL]r (hN)r }r (h2XSupported EVMsr h3j hhRh@}r (hB]hC]hD]hE]hH]uhJK`hKhhL]r hUXSupported EVMsr r }r (h2j h3j ubaubh)r }r (h2XUThe following is a list of EVMS supported and the PRU-ICSS ethernet ports to be used:r h3j hhh@}r (hB]hC]hD]hE]hH]uhJKbhKhhL]r hUXUThe following is a list of EVMS supported and the PRU-ICSS ethernet ports to be used:r r }r (h2j h3j ubaubh)r }r (h2Uh3j hhh@}r (hB]hC]hD]hE]hH]uhJNhKhhL]r h)r }r (h2Uh@}r (hE]hD]hB]hC]hH]UcolsKuh3j hL]r (h)r }r (h2Uh@}r (hE]hD]hB]hC]hH]UcolwidthKuh3j hL]h>hubh)r }r (h2Uh@}r (hE]hD]hB]hC]hH]UcolwidthKuh3j hL]h>hubh)r }r (h2Uh@}r (hE]hD]hB]hC]hH]UcolwidthK uh3j hL]h>hubh)r }r (h2Uh@}r (hE]hD]hB]hC]hH]UcolwidthK uh3j hL]h>hubh)r }r (h2Uh@}r (hB]hC]hD]hE]hH]uh3j hL]r (h)r }r (h2Uh@}r (hB]hC]hD]hE]hH]uh3j hL]r (h)r }r (h2Uh@}r (hB]hC]hD]hE]hH]uh3j hL]r h)r }r (h2X **EVM Name**r h3j hhh@}r (hB]hC]hD]hE]hH]uhJKfhL]r h)r }r (h2j h@}r (hB]hC]hD]hE]hH]uh3j hL]r hUXEVM Namer r }r (h2Uh3j ubah>hubaubah>hubh)r }r (h2Uh@}r (hB]hC]hD]hE]hH]uh3j hL]r h)r }r (h2X**PRU-ICSS Instance**r h3j hhh@}r (hB]hC]hD]hE]hH]uhJKfhL]r h)r }r (h2j h@}r (hB]hC]hD]hE]hH]uh3j hL]r hUXPRU-ICSS Instancer r }r (h2Uh3j ubah>hubaubah>hubh)r }r (h2Uh@}r (hB]hC]hD]hE]hH]uh3j hL]r h)r }r (h2X **Port0**r! h3j hhh@}r" (hB]hC]hD]hE]hH]uhJKfhL]r# h)r$ }r% (h2j! h@}r& (hB]hC]hD]hE]hH]uh3j hL]r' hUXPort0r( r) }r* (h2Uh3j$ ubah>hubaubah>hubh)r+ }r, (h2Uh@}r- (hB]hC]hD]hE]hH]uh3j hL]r. h)r/ }r0 (h2X **Port1**r1 h3j+ hhh@}r2 (hB]hC]hD]hE]hH]uhJKfhL]r3 h)r4 }r5 (h2j1 h@}r6 (hB]hC]hD]hE]hH]uh3j/ hL]r7 hUXPort1r8 r9 }r: (h2Uh3j4 ubah>hubaubah>hubeh>hubh)r; }r< (h2Uh@}r= (hB]hC]hD]hE]hH]uh3j hL]r> (h)r? }r@ (h2Uh@}rA (hB]hC]hD]hE]hH]uh3j; hL]rB h)rC }rD (h2X icev2AM335xrE h3j? hhh@}rF (hB]hC]hD]hE]hH]uhJKhhL]rG hUX icev2AM335xrH rI }rJ (h2jE h3jC ubaubah>hubh)rK }rL (h2Uh@}rM (hB]hC]hD]hE]hH]uh3j; hL]rN h)rO }rP (h2XPRU-ICSS instance 1rQ h3jK hhh@}rR (hB]hC]hD]hE]hH]uhJKhhL]rS hUXPRU-ICSS instance 1rT rU }rV (h2jQ h3jO ubaubah>hubh)rW }rX (h2Uh@}rY (hB]hC]hD]hE]hH]uh3j; hL]rZ h)r[ }r\ (h2XJ2r] h3jW hhh@}r^ (hB]hC]hD]hE]hH]uhJKhhL]r_ hUXJ2r` ra }rb (h2j] h3j[ ubaubah>hubh)rc }rd (h2Uh@}re (hB]hC]hD]hE]hH]uh3j; hL]rf h)rg }rh (h2XJ1ri h3jc hhh@}rj (hB]hC]hD]hE]hH]uhJKhhL]rk hUXJ1rl rm }rn (h2ji h3jg ubaubah>hubeh>hubh)ro }rp (h2Uh@}rq (hB]hC]hD]hE]hH]uh3j hL]rr (h)rs }rt (h2Uh@}ru (hB]hC]hD]hE]hH]uh3jo hL]rv h)rw }rx (h2X idkAM437xry h3js hhh@}rz (hB]hC]hD]hE]hH]uhJKjhL]r{ hUX idkAM437xr| r} }r~ (h2jy h3jw ubaubah>hubh)r }r (h2Uh@}r (hB]hC]hD]hE]hH]uh3jo hL]r h)r }r (h2XPRU-ICSS instance 2r h3j hhh@}r (hB]hC]hD]hE]hH]uhJKjhL]r hUXPRU-ICSS instance 2r r }r (h2j h3j ubaubah>hubh)r }r (h2Uh@}r (hB]hC]hD]hE]hH]uh3jo hL]r h)r }r (h2XJ6r h3j hhh@}r (hB]hC]hD]hE]hH]uhJKjhL]r hUXJ6r r }r (h2j h3j ubaubah>hubh)r }r (h2Uh@}r (hB]hC]hD]hE]hH]uh3jo hL]r h)r }r (h2XJ9r h3j hhh@}r (hB]hC]hD]hE]hH]uhJKjhL]r hUXJ9r r }r (h2j h3j ubaubah>hubeh>hubh)r }r (h2Uh@}r (hB]hC]hD]hE]hH]uh3j hL]r (h)r }r (h2Uh@}r (hB]hC]hD]hE]hH]uh3j hL]r h)r }r (h2X idkAM571xr h3j hhh@}r (hB]hC]hD]hE]hH]uhJKlhL]r hUX idkAM571xr r }r (h2j h3j ubaubah>hubh)r }r (h2Uh@}r (hB]hC]hD]hE]hH]uh3j hL]r h)r }r (h2XPRU-ICSS instance 2r h3j hhh@}r (hB]hC]hD]hE]hH]uhJKlhL]r hUXPRU-ICSS instance 2r r }r (h2j h3j ubaubah>hubh)r }r (h2Uh@}r (hB]hC]hD]hE]hH]uh3j hL]r h)r }r (h2XJ6r h3j hhh@}r (hB]hC]hD]hE]hH]uhJKlhL]r hUXJ6r r }r (h2j h3j ubaubah>hubh)r }r (h2Uh@}r (hB]hC]hD]hE]hH]uh3j hL]r h)r }r (h2XJ8r h3j hhh@}r (hB]hC]hD]hE]hH]uhJKlhL]r hUXJ8r r }r (h2j h3j ubaubah>hubeh>hubh)r }r (h2Uh@}r (hB]hC]hD]hE]hH]uh3j hL]r (h)r }r (h2Uh@}r (hB]hC]hD]hE]hH]uh3j hL]r h)r }r (h2X idkAM572xr h3j hhh@}r (hB]hC]hD]hE]hH]uhJKnhL]r hUX idkAM572xr r }r (h2j h3j ubaubah>hubh)r }r (h2Uh@}r (hB]hC]hD]hE]hH]uh3j hL]r h)r }r (h2XPRU-ICSS instance 2r h3j hhh@}r (hB]hC]hD]hE]hH]uhJKnhL]r hUXPRU-ICSS instance 2r r }r (h2j h3j ubaubah>hubh)r }r (h2Uh@}r (hB]hC]hD]hE]hH]uh3j hL]r h)r }r (h2XJ6r h3j hhh@}r (hB]hC]hD]hE]hH]uhJKnhL]r hUXJ6r r }r (h2j h3j ubaubah>hubh)r }r (h2Uh@}r (hB]hC]hD]hE]hH]uh3j hL]r h)r }r (h2XJ8r h3j hhh@}r (hB]hC]hD]hE]hH]uhJKnhL]r hUXJ8r r }r (h2j h3j ubaubah>hubeh>hubh)r }r (h2Uh@}r (hB]hC]hD]hE]hH]uh3j hL]r (h)r }r (h2Uh@}r (hB]hC]hD]hE]hH]uh3j hL]r h)r }r (h2XiceK2Gr h3j hhh@}r (hB]hC]hD]hE]hH]uhJKphL]r hUXiceK2Gr r }r (h2j h3j ubaubah>hubh)r }r (h2Uh@}r (hB]hC]hD]hE]hH]uh3j hL]r h)r }r (h2XPRU-ICSS instance 2r! h3j hhh@}r" (hB]hC]hD]hE]hH]uhJKphL]r# hUXPRU-ICSS instance 2r$ r% }r& (h2j! h3j ubaubah>hubh)r' }r( (h2Uh@}r) (hB]hC]hD]hE]hH]uh3j hL]r* h)r+ }r, (h2XJ8Ar- h3j' hhh@}r. (hB]hC]hD]hE]hH]uhJKphL]r/ hUXJ8Ar0 r1 }r2 (h2j- h3j+ ubaubah>hubh)r3 }r4 (h2Uh@}r5 (hB]hC]hD]hE]hH]uh3j hL]r6 h)r7 }r8 (h2XJ8Br9 h3j3 hhh@}r: (hB]hC]hD]hE]hH]uhJKphL]r; hUXJ8Br< r= }r> (h2j9 h3j7 ubaubah>hubeh>hubeh>jubeh>j ubaubhx)r? }r@ (h2Uh3j hh{h@}rA (hB]hC]hD]hE]hH]uhJKshKhhL]rB h~)rC }rD (h2UhKh3j? hhJh@}rE (hB]hC]hD]hE]hH]uhJKhKhhL]ubaubeubh4)rF }rG (h2Uh3jX hh?h@}rH (hB]hC]hD]hE]rI Urunning-the-pruss-sorte-examplerJ ahH]rK hauhJKvhKhhL]rL (hN)rM }rN (h2XRunning the PRUSS SORTE ExamplerO h3jF hhRh@}rP (hB]hC]hD]hE]hH]uhJKvhKhhL]rQ hUXRunning the PRUSS SORTE ExamplerR rS }rT (h2jO h3jM ubaubh)rU }rV (h2XIn order to run the SORTE applications, you will require 1 EVM running as master and 2 EVMs running as slave(slave1/slave2). Use CCS to load and run the master and slave applications respectively.rW h3jF hhh@}rX (hB]hC]hD]hE]hH]uhJKxhKhhL]rY hUXIn order to run the SORTE applications, you will require 1 EVM running as master and 2 EVMs running as slave(slave1/slave2). Use CCS to load and run the master and slave applications respectively.rZ r[ }r\ (h2jW h3jU ubaubh)r] }r^ (h2XJPrior to running the applications its best to connect the EVMS as follows:r_ h3jF hhh@}r` (hB]hC]hD]hE]hH]uhJK|hKhhL]ra hUXJPrior to running the applications its best to connect the EVMS as follows:rb rc }rd (h2j_ h3j] ubaubh)re }rf (h2XKConnect master Port0 to slave1 Port0. Connect slave1 Port1 to slave2 Port0.rg h3jF hhh@}rh (hB]hC]hD]hE]hH]uhJKhKhhL]ri hUXKConnect master Port0 to slave1 Port0. Connect slave1 Port1 to slave2 Port0.rj rk }rl (h2jg h3je ubaubh)rm }rn (h2XAfter loading the application binaries from CCS, run the master first, then run the slave2, finally run the slave1 with Port0 connecting to the the master Port 0.ro h3jF hhh@}rp (hB]hC]hD]hE]hH]uhJKhKhhL]rq hUXAfter loading the application binaries from CCS, run the master first, then run the slave2, finally run the slave1 with Port0 connecting to the the master Port 0.rr rs }rt (h2jo h3jm ubaubh)ru }rv (h2XNote that the master device will wait until it discovers 2 slave devices in the network. UART console on the master will print the following until 2 slave devices are detected:rw h3jF hhh@}rx (hB]hC]hD]hE]hH]uhJKhKhhL]ry hUXNote that the master device will wait until it discovers 2 slave devices in the network. UART console on the master will print the following until 2 slave devices are detected:rz r{ }r| (h2jw h3ju ubaubh)r} }r~ (h2X?**sorte master: waiting for atleast 2 SLAVE devices connected**r h3jF hhh@}r (hB]hC]hD]hE]hH]uhJKhKhhL]r h)r }r (h2j h@}r (hB]hC]hD]hE]hH]uh3j} hL]r hUX;sorte master: waiting for atleast 2 SLAVE devices connectedr r }r (h2Uh3j ubah>hubaubh)r }r (h2XOnce 2 slave devices are detected by the master, the following print will be seen on UART console and master will continue with state machine and protocol processing:r h3jF hhh@}r (hB]hC]hD]hE]hH]uhJKhKhhL]r hUXOnce 2 slave devices are detected by the master, the following print will be seen on UART console and master will continue with state machine and protocol processing:r r }r (h2j h3j ubaubh)r }r (h2X+**sorte master: 2 SLAVE devices connected**r h3jF hhh@}r (hB]hC]hD]hE]hH]uhJKhKhhL]r h)r }r (h2j h@}r (hB]hC]hD]hE]hH]uh3j hL]r hUX'sorte master: 2 SLAVE devices connectedr r }r (h2Uh3j ubah>hubaubh)r }r (h2XThe slave device via the UART console will continuosly display the number of packets its received during input output exchange state of the protocol until pass criteria is reached as follows(as an example):r h3jF hhh@}r (hB]hC]hD]hE]hH]uhJKhKhhL]r hUXThe slave device via the UART console will continuosly display the number of packets its received during input output exchange state of the protocol until pass criteria is reached as follows(as an example):r r }r (h2j h3j ubaubh)r }r (h2XF**sorte slave: test in progress: current receive packet count: 35000**r h3jF hhh@}r (hB]hC]hD]hE]hH]uhJKhKhhL]r h)r }r (h2j h@}r (hB]hC]hD]hE]hH]uh3j hL]r hUXBsorte slave: test in progress: current receive packet count: 35000r r }r (h2Uh3j ubah>hubaubh)r }r (h2XF**sorte slave: test in progress: current receive packet count: 40000**r h3jF hhh@}r (hB]hC]hD]hE]hH]uhJKhKhhL]r h)r }r (h2j h@}r (hB]hC]hD]hE]hH]uh3j hL]r hUXBsorte slave: test in progress: current receive packet count: 40000r r }r (h2Uh3j ubah>hubaubh)r }r (h2XoOnce pass criteria number of packets have been received, the following print will be displayed on UART console:r h3jF hhh@}r (hB]hC]hD]hE]hH]uhJKhKhhL]r hUXoOnce pass criteria number of packets have been received, the following print will be displayed on UART console:r r }r (h2j h3j ubaubh)r }r (h2X**All tests have passed**r h3jF hhh@}r (hB]hC]hD]hE]hH]uhJKhKhhL]r h)r }r (h2j h@}r (hB]hC]hD]hE]hH]uh3j hL]r hUXAll tests have passedr r }r (h2Uh3j ubah>hubaubhx)r }r (h2Uh3jF hh{h@}r (hB]hC]hD]hE]hH]uhJKhKhhL]r h~)r }r (h2UhKh3j hhJh@}r (hB]hC]hD]hE]hH]uhJKhKhhL]ubaubhx)r }r (h2Uh3jF hh{h@}r (hB]hC]hD]hE]hH]uhJKhKhhL]r h~)r }r (h2UhKh3j hhJh@}r (hB]hC]hD]hE]hH]uhJKhKhhL]ubaubeubh4)r }r (h2Uh3jX hh?h@}r (hB]hC]hD]hE]r Uadditional-referencer ahH]r h auhJKhKhhL]r (hN)r }r (h2XAdditional Referencer h3j hhRh@}r (hB]hC]hD]hE]hH]uhJKhKhhL]r hUXAdditional Referencer r }r (h2j h3j ubaubh)r }r (h2Uh3j hhh@}r (hB]hC]hD]hE]hH]uhJNhKhhL]r h)r }r (h2Uh@}r (hE]hD]hB]hC]hH]UcolsKuh3j hL]r (h)r }r (h2Uh@}r (hE]hD]hB]hC]hH]UcolwidthK#uh3j hL]h>hubh)r }r (h2Uh@}r (hE]hD]hB]hC]hH]UcolwidthK#uh3j hL]h>hubh)r }r (h2Uh@}r (hB]hC]hD]hE]hH]uh3j hL]r (h)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3j hL]r(h)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]rh)r}r (h2X **Document**r h3jhhh@}r (hB]hC]hD]hE]hH]uhJKhL]r h)r }r(h2j h@}r(hB]hC]hD]hE]hH]uh3jhL]rhUXDocumentrr}r(h2Uh3j ubah>hubaubah>hubh)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]rh)r}r(h2X **Location**rh3jhhh@}r(hB]hC]hD]hE]hH]uhJKhL]rh)r}r(h2jh@}r(hB]hC]hD]hE]hH]uh3jhL]r hUXLocationr!r"}r#(h2Uh3jubah>hubaubah>hubeh>hubh)r$}r%(h2Uh@}r&(hB]hC]hD]hE]hH]uh3j hL]r'(h)r(}r)(h2Uh@}r*(hB]hC]hD]hE]hH]uh3j$hL]r+h)r,}r-(h2X+SORTE Master with PRU-ICSS Reference Designr.h3j(hhh@}r/(hB]hC]hD]hE]hH]uhJKhL]r0hUX+SORTE Master with PRU-ICSS Reference Designr1r2}r3(h2j.h3j,ubaubah>hubh)r4}r5(h2Uh@}r6(hB]hC]hD]hE]hH]uh3j$hL]r7h)r8}r9(h2X!http://www.ti.com/tool/TIDEP-0085r:h3j4hhh@}r;(hB]hC]hD]hE]hH]uhJKhL]r<j)r=}r>(h2j:h@}r?(Urefurij:hE]hD]hB]hC]hH]uh3j8hL]r@hUX!http://www.ti.com/tool/TIDEP-0085rArB}rC(h2Uh3j=ubah>jubaubah>hubeh>hubh)rD}rE(h2Uh@}rF(hB]hC]hD]hE]hH]uh3j hL]rG(h)rH}rI(h2Uh@}rJ(hB]hC]hD]hE]hH]uh3jDhL]rKh)rL}rM(h2X1SORTE Slave Device with PRU-ICSS Reference DesignrNh3jHhhh@}rO(hB]hC]hD]hE]hH]uhJKhL]rPhUX1SORTE Slave Device with PRU-ICSS Reference DesignrQrR}rS(h2jNh3jLubaubah>hubh)rT}rU(h2Uh@}rV(hB]hC]hD]hE]hH]uh3jDhL]rWh)rX}rY(h2X!http://www.ti.com/tool/TIDEP-0086rZh3jThhh@}r[(hB]hC]hD]hE]hH]uhJKhL]r\j)r]}r^(h2jZh@}r_(UrefurijZhE]hD]hB]hC]hH]uh3jXhL]r`hUX!http://www.ti.com/tool/TIDEP-0086rarb}rc(h2Uh3j]ubah>jubaubah>hubeh>hubeh>jubeh>j ubaubhx)rd}re(h2Uh3j hh{h@}rf(hB]hC]hD]hE]hH]uhJKhKhhL]rgh~)rh}ri(h2UhKh3jdhhJh@}rj(hB]hC]hD]hE]hH]uhJKhKhhL]ubaubeubeubhh?h@}rk(hB]rlX introductionrmahC]hD]hE]rnUid3roahH]uhJKhKhhL]rp(hN)rq}rr(h2X Introductionrsh3jV hhRh@}rt(hB]hC]hD]hE]hH]uhJKhKhhL]ruhUX Introductionrvrw}rx(h2jsh3jqubaubhx)ry}rz(h2Uh3jV hh{h@}r{(hB]hC]hD]hE]hH]uhJKhKhhL]r|h~)r}}r~(h2XThe Simple Open Real-time Ethernet protocol (SORTE) serves as an example for Texas Instruments programmable approach to real-time communication for input/output (IO) networks with a maximum of 254 devices. This protocol is fully documented and released in source code. It is open to customers to learn, adapt and enhance the protocol for their application requirements. SORTE is not bound to a given communication standard and breaks some of the limits of existing standards such as minimum Ethernet frame size, addressing and error detection. The primary use case of the protocol is to connect different end-equipment using Ethernet physical layer devices and 100 Mbit Ethernet cable.rhKh3jyhhJh@}r(hB]hC]hD]hE]hH]uhJKhKhhL]rhUXThe Simple Open Real-time Ethernet protocol (SORTE) serves as an example for Texas Instruments programmable approach to real-time communication for input/output (IO) networks with a maximum of 254 devices. This protocol is fully documented and released in source code. It is open to customers to learn, adapt and enhance the protocol for their application requirements. SORTE is not bound to a given communication standard and breaks some of the limits of existing standards such as minimum Ethernet frame size, addressing and error detection. The primary use case of the protocol is to connect different end-equipment using Ethernet physical layer devices and 100 Mbit Ethernet cable.rr}r(h2jh3j}ubaubaubeubhjh@}r(hB]UlevelKhE]hD]rjoaUsourcejj hC]hH]UlineKUtypej, uhJKhKhhL]rh)r}r(h2X/Duplicate implicit target name: "introduction".h@}r(hB]hC]hD]hE]hH]uh3jT hL]rhUX/Duplicate implicit target name: "introduction".rr}r(h2Uh3jubah>hubaubh/)r}r(h2Uh3j hjh@}r(hB]UlevelKhE]hD]rj aUsourcejj hC]hH]UlineK Utypej, uhJK hKhhL]rh)r}r(h2X4Duplicate implicit target name: "code organization".h@}r(hB]hC]hD]hE]hH]uh3jhL]rhUX4Duplicate implicit target name: "code organization".rr}r(h2Uh3jubah>hubaubh/)r}r(h2Uh3j hjh@}r(hB]UlevelKhE]hD]rj aUsourcejj hC]hH]UlineK`Utypej, uhJK`hKhhL]rh)r}r(h2X1Duplicate implicit target name: "supported evms".h@}r(hB]hC]hD]hE]hH]uh3jhL]rhUX1Duplicate implicit target name: "supported evms".rr}r(h2Uh3jubah>hubaubh/)r}r(h2Uh3j hjh@}r(hB]UlevelKhE]hD]Usourcejj hC]hH]UlineKUtypejuhJKhKhhL]r(h)r}r(h2X;Content block expected for the "raw" directive; none found.h@}r(hB]hC]hD]hE]hH]uh3jhL]rhUX;Content block expected for the "raw" directive; none found.rr}r(h2Uh3jubah>hubjy)r}r(h2X.. raw:: html h@}r(hbhchE]hD]hB]hC]hH]uh3jhL]rhUX.. raw:: html rr}r(h2Uh3jubah>j|ubeubh/)r}r(h2Uh3h4)r}r(h2Uh7Kh3h4)r}r(h2Uh3hhh?h@}r(hB]hC]hD]hE]rU pru-icss-i2crahH]rhauhJKhKhhL]r(hN)r}r(h2X PRU-ICSS I2Crh3jhhRh@}r(hB]hC]hD]hE]hH]uhJKhKhhL]rhUX PRU-ICSS I2Crr}r(h2jh3jubaubcdocutils.nodes target r)r}r(h2X .. _PRU-ICSS-I2C-FIRMWARE-label:h3jhUtargetrh@}r(hB]hC]hD]hE]rUpru-icss-i2c-firmware-labelrahH]rhauhJMhKhhL]ubhY)r}r(h2XRhttp://ap-fpdsp-swapps.dal.design.ti.com/index.php/Processor_SDK_RTOS_I2C_FIRMWAREh3jhh`h@}r(hbhchE]hD]hB]hC]hH]uhJKhKhhL]rhUXRhttp://ap-fpdsp-swapps.dal.design.ti.com/index.php/Processor_SDK_RTOS_I2C_FIRMWARErr}r(h2Uh3jubaubjh4)r}r(h2Uh7Kh3jhh?h@}r(hB]rXfirmware featuresrahC]hD]hE]rUfirmware-featuresrahH]uhJKhKhhL]r(hN)r}r(h2XFIRMWARE FEATURESrh3jhhRh@}r(hB]hC]hD]hE]hH]uhJKhKhhL]rhUXFIRMWARE FEATURESrr}r(h2jh3jubaubh)r}r(h2XI2C FW supports the standard two pin I2C interface through three GPIO pins from the PRU-ICSS module. The I2C SCL pin is implemented using a single GPIO configured in GPO mode. The I2C SDA pin is implemented using two GPIO pins: one pin configured in GPI mode for sampling SDA, and a second pin configured in GPO mode for driving the SDA. Depending on the I2C clock speed, I2C FW can emulate multiple I2C instances from a single PRU core. Following are high-level I2C FW features:rh3jhhh@}r(hB]hC]hD]hE]hH]uhJKhKhhL]rhUXI2C FW supports the standard two pin I2C interface through three GPIO pins from the PRU-ICSS module. The I2C SCL pin is implemented using a single GPIO configured in GPO mode. The I2C SDA pin is implemented using two GPIO pins: one pin configured in GPI mode for sampling SDA, and a second pin configured in GPO mode for driving the SDA. Depending on the I2C clock speed, I2C FW can emulate multiple I2C instances from a single PRU core. Following are high-level I2C FW features:rr}r(h2jh3jubaubh)r}r(h2Uh3jhhh@}r(hB]hC]hD]hE]hH]uhJNhKhhL]rh)r}r(h2Uh@}r(hE]hD]hB]hC]hH]UcolsKuh3jhL]r(h)r}r(h2Uh@}r(hE]hD]hB]hC]hH]UcolwidthK#uh3jhL]h>hubh)r}r(h2Uh@}r(hE]hD]hB]hC]hH]UcolwidthK#uh3jhL]h>hubh)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]r(h)r }r (h2Uh@}r (hB]hC]hD]hE]hH]uh3jhL]r (h)r }r(h2Uh@}r(hB]hC]hD]hE]hH]uh3j hL]rh)r}r(h2X **Feature**rh3j hhh@}r(hB]hC]hD]hE]hH]uhJKhL]rh)r}r(h2jh@}r(hB]hC]hD]hE]hH]uh3jhL]rhUXFeaturerr}r(h2Uh3jubah>hubaubah>hubh)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3j hL]r h)r!}r"(h2X **Remarks**r#h3jhhh@}r$(hB]hC]hD]hE]hH]uhJKhL]r%h)r&}r'(h2j#h@}r((hB]hC]hD]hE]hH]uh3j!hL]r)hUXRemarksr*r+}r,(h2Uh3j&ubah>hubaubah>hubeh>hubh)r-}r.(h2Uh@}r/(hB]hC]hD]hE]hH]uh3jhL]r0(h)r1}r2(h2Uh@}r3(hB]hC]hD]hE]hH]uh3j-hL]r4h)r5}r6(h2XNo. of instancesr7h3j1hhh@}r8(hB]hC]hD]hE]hH]uhJKhL]r9hUXNo. of instancesr:r;}r<(h2j7h3j5ubaubah>hubh)r=}r>(h2Uh@}r?(hB]hC]hD]hE]hH]uh3j-hL]r@(h)rA}rB(h2X4 (Standard mode)rCh3j=hhh@}rD(hB]hC]hD]hE]hH]uhJKhL]rEhUX4 (Standard mode)rFrG}rH(h2jCh3jAubaubh)rI}rJ(h2X 1 (Fast mode)rKh3j=hhh@}rL(hB]hC]hD]hE]hH]uhJKhL]rMhUX 1 (Fast mode)rNrO}rP(h2jKh3jIubaubeh>hubeh>hubh)rQ}rR(h2Uh@}rS(hB]hC]hD]hE]hH]uh3jhL]rT(h)rU}rV(h2Uh@}rW(hB]hC]hD]hE]hH]uh3jQhL]rXh)rY}rZ(h2X SMBus supportr[h3jUhhh@}r\(hB]hC]hD]hE]hH]uhJKhL]r]hUX SMBus supportr^r_}r`(h2j[h3jYubaubah>hubh)ra}rb(h2Uh@}rc(hB]hC]hD]hE]hH]uh3jQhL]rdh)re}rf(h2X Supportedrgh3jahhh@}rh(hB]hC]hD]hE]hH]uhJKhL]rihUX Supportedrjrk}rl(h2jgh3jeubaubah>hubeh>hubh)rm}rn(h2Uh@}ro(hB]hC]hD]hE]hH]uh3jhL]rp(h)rq}rr(h2Uh@}rs(hB]hC]hD]hE]hH]uh3jmhL]rth)ru}rv(h2XAddressing modesrwh3jqhhh@}rx(hB]hC]hD]hE]hH]uhJK!hL]ryhUXAddressing modesrzr{}r|(h2jwh3juubaubah>hubh)r}}r~(h2Uh@}r(hB]hC]hD]hE]hH]uh3jmhL]rh)r}r(h2X7/10-bitrh3j}hhh@}r(hB]hC]hD]hE]hH]uhJK!hL]rhUX7/10-bitrr}r(h2jh3jubaubah>hubeh>hubh)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]r(h)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]rh)r}r(h2X Master moderh3jhhh@}r(hB]hC]hD]hE]hH]uhJK#hL]rhUX Master moderr}r(h2jh3jubaubah>hubh)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]rh)r}r(h2X Supportedrh3jhhh@}r(hB]hC]hD]hE]hH]uhJK#hL]rhUX Supportedrr}r(h2jh3jubaubah>hubeh>hubh)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]r(h)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]rh)r}r(h2X3I2C data transfer rate from 100 kbps up to 400 kbpsrh3jhhh@}r(hB]hC]hD]hE]hH]uhJK%hL]rhUX3I2C data transfer rate from 100 kbps up to 400 kbpsrr}r(h2jh3jubaubah>hubh)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]rh)r}r(h2X100 kHz / 400 kHzrh3jhhh@}r(hB]hC]hD]hE]hH]uhJK%hL]rhUX100 kHz / 400 kHzrr}r(h2jh3jubaubah>hubeh>hubh)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]r(h)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]rh)r}r(h2XBit format transferrh3jhhh@}r(hB]hC]hD]hE]hH]uhJK(hL]rhUXBit format transferrr}r(h2jh3jubaubah>hubh)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]rh)r}r(h2X8 bitrh3jhhh@}r(hB]hC]hD]hE]hH]uhJK(hL]rhUX8 bitrr}r(h2jh3jubaubah>hubeh>hubh)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]r(h)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]rh)r}r(h2XNumber of host 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Supportedrh3jhhh@}r(hB]hC]hD]hE]hH]uhJK=hL]rhUX Not Supportedrr}r(h2jh3jubaubah>hubeh>hubh)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]r(h)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]rh)r}r(h2X DMA supportrh3jhhh@}r(hB]hC]hD]hE]hH]uhJK@hL]rhUX DMA supportrr}r(h2jh3jubaubah>hubh)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]rh)r}r(h2X Not Supportedrh3jhhh@}r(hB]hC]hD]hE]hH]uhJK@hL]rhUX Not Supportedrr}r(h2jh3jubaubah>hubeh>hubh)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]r(h)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]rh)r}r(h2XProgrammable clock generationrh3jhhh@}r(hB]hC]hD]hE]hH]uhJKBhL]rhUXProgrammable clock generationrr}r(h2jh3jubaubah>hubh)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]rh)r}r(h2X Not Supportedr h3jhhh@}r (hB]hC]hD]hE]hH]uhJKBhL]r hUX Not Supportedr r }r(h2j h3jubaubah>hubeh>hubh)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]r(h)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]rh)r}r(h2X4Implement Auto Idle mechanism (SOC specific feature)rh3jhhh@}r(hB]hC]hD]hE]hH]uhJKDhL]rhUX4Implement Auto Idle mechanism (SOC specific feature)rr}r(h2jh3jubaubah>hubh)r}r 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Supportedr`ra}rb(h2j]h3j[ubaubah>hubeh>hubeh>jubeh>j ubaubeubh4)rc}rd(h2Uh7Kh3jhh?h@}re(hB]rfXfirmware organizationrgahC]hD]hE]rhUfirmware-organizationriahH]uhJKPhKhhL]rj(hN)rk}rl(h2XFirmware Organizationrmh3jchhRh@}rn(hB]hC]hD]hE]hH]uhJKPhKhhL]rohUXFirmware Organizationrprq}rr(h2jmh3jkubaubh)rs}rt(h2Uh3jchhh@}ru(hB]hC]hD]hE]hH]uhJNhKhhL]rvh)rw}rx(h2Uh@}ry(hE]hD]hB]hC]hH]UcolsKuh3jshL]rz(h)r{}r|(h2Uh@}r}(hE]hD]hB]hC]hH]UcolwidthKuh3jwhL]h>hubh)r~}r(h2Uh@}r(hE]hD]hB]hC]hH]UcolwidthK2uh3jwhL]h>hubh)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jwhL]r(h)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]r(h)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]rh)r}r(h2X **FW Item**rh3jhhh@}r(hB]hC]hD]hE]hH]uhJKShL]rh)r}r(h2jh@}r(hB]hC]hD]hE]hH]uh3jhL]rhUXFW Itemrr}r(h2Uh3jubah>hubaubah>hubh)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]rh)r}r(h2X **Directory**rh3jhhh@}r(hB]hC]hD]hE]hH]uhJKShL]rh)r}r(h2jh@}r(hB]hC]hD]hE]hH]uh3jhL]rhUX Directoryrr}r(h2Uh3jubah>hubaubah>hubeh>hubh)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]r(h)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]rh)r}r(h2X Source coderh3jhhh@}r(hB]hC]hD]hE]hH]uhJKUhL]rhUX Source coderr}r(h2jh3jubaubah>hubh)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]rh)r}r(h2X//packages/ti/drv/i2c/firmware/icss_i2c/srcrh3jhhh@}r(hB]hC]hD]hE]hH]uhJKUhL]rhUX//packages/ti/drv/i2c/firmware/icss_i2c/srcrr}r(h2jh3jubaubah>hubeh>hubh)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]r(h)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]rh)r}r(h2X Design Guiderh3jhhh@}r(hB]hC]hD]hE]hH]uhJKWhL]rhUX Design Guiderr}r(h2jh3jubaubah>hubh)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]rh)r}r(h2X0/packages/ti/drv/i2c/firmware/icss_i2c/docsrh3jhhh@}r(hB]hC]hD]hE]hH]uhJKWhL]rhUX0/packages/ti/drv/i2c/firmware/icss_i2c/docsrr}r(h2jh3jubaubah>hubeh>hubh)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]r(h)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]rh)r}r(h2XFirmware binariesrh3jhhh@}r(hB]hC]hD]hE]hH]uhJKYhL]rhUXFirmware binariesrr}r(h2jh3jubaubah>hubh)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]rh)r}r(h2X//packages/ti/drv/i2c/firmware/icss_i2c/binrh3jhhh@}r(hB]hC]hD]hE]hH]uhJKYhL]rhUX//packages/ti/drv/i2c/firmware/icss_i2c/binrr}r(h2jh3jubaubah>hubeh>hubeh>jubeh>j ubaubhx)r}r(h2Uh3jchh{h@}r(hB]hC]hD]hE]hH]uhJK\hKhhL]rh~)r}r(h2UhKh3jhhJh@}r(hB]hC]hD]hE]hH]uhJKhKhhL]ubaubeubh4)r}r(h2Uh7Kh3jhh?h@}r(hB]rjdahC]hD]hE]rUid8r ahH]uhJK_hKhhL]r (hN)r }r (h2XFirmware Build Instructionr h3jhhRh@}r(hB]hC]hD]hE]hH]uhJK_hKhhL]rhUXFirmware Build Instructionrr}r(h2j h3j ubaubh4)r}r(h2Uh7Kh3jhh?h@}r(hB]rjaahC]hD]hE]rUid9rahH]uhJKbhKhhL]r(hN)r}r(h2X4Build instruction from Processor SDK Release packagerh3jhhRh@}r(hB]hC]hD]hE]hH]uhJKbhKhhL]rhUX4Build instruction from Processor SDK Release packagerr }r!(h2jh3jubaubj)r"}r#(h2XPre-requisites to Buildingr$h7Kh3jhjh@}r%(hE]r&Uid10r'ahD]hB]r(jtahC]hH]uhJNhKhhL]r)hUXPre-requisites to Buildingr*r+}r,(h2j$h3j"ubaubh)r-}r.(h2XbRefer to the Processor SDK RTOS Building page for information on setting up the build environment.r/h3jhhh@}r0(hB]hC]hD]hE]hH]uhJKghKhhL]r1hUXbRefer to the Processor SDK RTOS Building page for information on setting up the build environment.r2r3}r4(h2j/h3j-ubaubj)r5}r6(h2XCompiling I2C FIRMWAREr7h3jhjh@}r8(hE]r9Ucompiling-i2c-firmwarer:ahD]hB]hC]hH]r;h*auhJNhKhhL]r<hUXCompiling I2C FIRMWAREr=r>}r?(h2j7h3j5ubaubj)r@}rA(h2Uh3jhjh@}rB(jX-hE]hD]hB]hC]hH]uhJKlhKhhL]rC(j)rD}rE(h2Xcd /packages/ti/drv/i2crFh3j@hjh@}rG(hB]hC]hD]hE]hH]uhJNhKhhL]rHh)rI}rJ(h2jFh3jDhhh@}rK(hB]hC]hD]hE]hH]uhJKlhL]rLhUXcd /packages/ti/drv/i2crMrN}rO(h2jFh3jIubaubaubj)rP}rQ(h2X make firm h3j@hjh@}rR(hB]hC]hD]hE]hH]uhJNhKhhL]rSh)rT}rU(h2X make firmrVh3jPhhh@}rW(hB]hC]hD]hE]hH]uhJKmhL]rXhUX make firmrYrZ}r[(h2jVh3jTubaubaubeubh)r\}r](h2X=Firmware binaries at the end of the build will be located at:r^h3jhhh@}r_(hB]hC]hD]hE]hH]uhJKohKhhL]r`hUX=Firmware binaries at the end of the build will be located at:rarb}rc(h2j^h3j\ubaubj)rd}re(h2Uh3jhjh@}rf(jX-hE]hD]hB]hC]hH]uhJKqhKhhL]rg(j)rh}ri(h2XT/packages/ti/drv/i2c/firmware//bin/// h3jdhjh@}rj(hB]hC]hD]hE]hH]uhJNhKhhL]rkh)rl}rm(h2XS/packages/ti/drv/i2c/firmware//bin///rnh3jhhhh@}ro(hB]hC]hD]hE]hH]uhJKqhL]rphUXS/packages/ti/drv/i2c/firmware//bin///rqrr}rs(h2jnh3jlubaubaubj)rt}ru(h2X: indicates the firmware type i.e. icss_i2c h3jdhjh@}rv(hB]hC]hD]hE]hH]uhJNhKhhL]rwh)rx}ry(h2X9 indicates the firmware type i.e. icss_i2crzh3jthhh@}r{(hB]hC]hD]hE]hH]uhJKshL]r|hUX9 indicates the firmware type i.e. icss_i2cr}r~}r(h2jzh3jxubaubaubj)r}r(h2X* indicates the SOC type, e.g. am437x h3jdhjh@}r(hB]hC]hD]hE]hH]uhJNhKhhL]rh)r}r(h2X) indicates the SOC type, e.g. am437xrh3jhhh@}r(hB]hC]hD]hE]hH]uhJKuhL]rhUX) indicates the SOC type, e.g. am437xrr}r(h2jh3jubaubaubj)r}r(h2X^ indicates the Host core type on which the built binary can be loaded, e.g. a9host h3jdhjh@}r(hB]hC]hD]hE]hH]uhJNhKhhL]rh)r}r(h2X] indicates the Host core type on which the built binary can be loaded, e.g. a9hostrh3jhhh@}r(hB]hC]hD]hE]hH]uhJKwhL]rhUX] indicates the Host core type on which the built binary can be loaded, e.g. a9hostrr}r(h2jh3jubaubaubj)r}r(h2X{ indicates the revision of the firmware binary based on core (there are 2 revision of PRU-ICSS core), e.g. REV1. h3jdhjh@}r(hB]hC]hD]hE]hH]uhJNhKhhL]rh)r}r(h2Xz indicates the revision of the firmware binary based on core (there are 2 revision of PRU-ICSS core), e.g. REV1.rh3jhhh@}r(hB]hC]hD]hE]hH]uhJKzhL]rhUXz indicates the revision of the firmware binary based on core (there are 2 revision of PRU-ICSS core), e.g. REV1.rr}r(h2jh3jubaubaubeubhx)r}r(h2Uh3jhh{h@}r(hB]hC]hD]hE]hH]uhJK}hKhhL]rh~)r}r(h2UhKh3jhhJh@}r(hB]hC]hD]hE]hH]uhJKhKhhL]ubaubeubh4)r}r(h2Uh7Kh3jhh?h@}r(hB]rXbuild instruction for gitrahC]hD]hE]rUbuild-instruction-for-gitrahH]uhJKhKhhL]r(hN)r}r(h2XBuild instruction for GITrh3jhhRh@}r(hB]hC]hD]hE]hH]uhJKhKhhL]rhUXBuild instruction for GITrr}r(h2jh3jubaubh)r}r(h2XoFollowing are the steps for building firmware from any external environment outside Processor SDK RTOS package.rh3jhhh@}r(hB]hC]hD]hE]hH]uhJKhKhhL]rhUXoFollowing are the steps for building firmware from any external environment outside Processor SDK RTOS package.rr}r(h2jh3jubaubj)r}r(h2Uh3jhjh@}r(jX-hE]hD]hB]hC]hH]uhJKhKhhL]r(j)r}r(h2XCreation of directories - Create a working directory e.g. - Create a new directory named ti inside working directory. i.e. - Create a new directory called drv inside ti. i.e. h3jhjh@}r(hB]hC]hD]hE]hH]uhJNhKhhL]r(h)r}r(h2XCreation of directoriesrh3jhhh@}r(hB]hC]hD]hE]hH]uhJKhL]rhUXCreation of directoriesrr}r(h2jh3jubaubj)r}r(h2Uh@}r(jX-hE]hD]hB]hC]hH]uh3jhL]r(j)r}r(h2X*Create a working directory e.g. rh@}r(hB]hC]hD]hE]hH]uh3jhL]rh)r}r(h2jh3jhhh@}r(hB]hC]hD]hE]hH]uhJKhL]rhUX*Create a working directory e.g. rr}r(h2jh3jubaubah>jubj)r}r(h2XLCreate a new directory named ti inside working directory. i.e. h@}r(hB]hC]hD]hE]hH]uh3jhL]rh)r}r(h2XLCreate a new directory named ti inside working directory. i.e. rh3jhhh@}r(hB]hC]hD]hE]hH]uhJKhL]rhUXLCreate a new directory named ti inside working directory. i.e. rr}r(h2jh3jubaubah>jubj)r}r(h2XDCreate a new directory called drv inside ti. i.e. h@}r(hB]hC]hD]hE]hH]uh3jhL]rh)r}r(h2XCCreate a new directory called drv inside ti. i.e. rh3jhhh@}r(hB]hC]hD]hE]hH]uhJKhL]rhUXCCreate a new directory called drv inside ti. i.e. rr}r(h2jh3jubaubah>jubeh>jubeubj)r}r(h2XClone of Repos - Git clone pdk build repo into ti directory. i.e. - Git clone i2c repo into ti/drv directory. i.e. h3jhjh@}r(hB]hC]hD]hE]hH]uhJNhKhhL]r(h)r}r(h2XClone of Reposrh3jhhh@}r(hB]hC]hD]hE]hH]uhJKhL]rhUXClone of Reposrr}r(h2jh3jubaubj)r}r(h2Uh@}r (jX-hE]hD]hB]hC]hH]uh3jhL]r (j)r }r (h2XDGit clone pdk build repo into ti directory. i.e. h@}r (hB]hC]hD]hE]hH]uh3jhL]rh)r}r(h2XDGit clone pdk build repo into ti directory. i.e. rh3j hhh@}r(hB]hC]hD]hE]hH]uhJKhL]rhUXDGit clone pdk build repo into ti directory. i.e. rr}r(h2jh3jubaubah>jubj)r}r(h2XEGit clone i2c repo into ti/drv directory. i.e. h@}r(hB]hC]hD]hE]hH]uh3jhL]rh)r}r(h2XDGit clone i2c repo into ti/drv directory. i.e. rh3jhhh@}r(hB]hC]hD]hE]hH]uhJKhL]rhUXDGit clone i2c repo into ti/drv directory. i.e. r r!}r"(h2jh3jubaubah>jubeh>jubeubj)r#}r$(h2XSetting Environment Variables - Export CLPRU install path. i.e. export CL_PRU_INSTALL_PATH=clpru toolchain directory - Export pdk install path. i.e. export PDK_INSTALL_PATH= - Export LIMIT_SOCS Variable i.e. LIMIT_SOCS= [Optional for limiting to some SOCs] h3jhjh@}r%(hB]hC]hD]hE]hH]uhJNhKhhL]r&(h)r'}r((h2XSetting Environment Variablesr)h3j#hhh@}r*(hB]hC]hD]hE]hH]uhJKhL]r+hUXSetting Environment Variablesr,r-}r.(h2j)h3j'ubaubj)r/}r0(h2Uh@}r1(jX-hE]hD]hB]hC]hH]uh3j#hL]r2(j)r3}r4(h2XTExport CLPRU install path. i.e. export CL_PRU_INSTALL_PATH=clpru toolchain directoryh@}r5(hB]hC]hD]hE]hH]uh3j/hL]r6h)r7}r8(h2XTExport CLPRU install path. i.e. export CL_PRU_INSTALL_PATH=clpru toolchain directoryr9h3j3hhh@}r:(hB]hC]hD]hE]hH]uhJKhL]r;hUXTExport CLPRU install path. i.e. export CL_PRU_INSTALL_PATH=clpru toolchain directoryr<r=}r>(h2j9h3j7ubaubah>jubj)r?}r@(h2X@Export pdk install path. i.e. export PDK_INSTALL_PATH=rAh@}rB(hB]hC]hD]hE]hH]uh3j/hL]rCh)rD}rE(h2jAh3j?hhh@}rF(hB]hC]hD]hE]hH]uhJKhL]rGhUX@Export pdk install path. i.e. export PDK_INSTALL_PATH=rHrI}rJ(h2jAh3jDubaubah>jubj)rK}rL(h2XVExport LIMIT_SOCS Variable i.e. LIMIT_SOCS= [Optional for limiting to some SOCs] h@}rM(hB]hC]hD]hE]hH]uh3j/hL]rNh)rO}rP(h2XUExport LIMIT_SOCS Variable i.e. LIMIT_SOCS= [Optional for limiting to some SOCs]rQh3jKhhh@}rR(hB]hC]hD]hE]hH]uhJKhL]rShUXUExport LIMIT_SOCS Variable i.e. LIMIT_SOCS= [Optional for limiting to some SOCs]rTrU}rV(h2jQh3jOubaubah>jubeh>jubeubj)rW}rX(h2XtBuild command - Run make firm_clean/firm to clean/build firmware from i2c directory i.e. h3jhjh@}rY(hB]hC]hD]hE]hH]uhJNhKhhL]rZ(h)r[}r\(h2X Build commandr]h3jWhhh@}r^(hB]hC]hD]hE]hH]uhJKhL]r_hUX Build commandr`ra}rb(h2j]h3j[ubaubj)rc}rd(h2Uh@}re(jX-hE]hD]hB]hC]hH]uh3jWhL]rfj)rg}rh(h2X_Run make firm_clean/firm to clean/build firmware from i2c directory i.e. h@}ri(hB]hC]hD]hE]hH]uh3jchL]rjh)rk}rl(h2X^Run make firm_clean/firm to clean/build firmware from i2c directory i.e. rmh3jghhh@}rn(hB]hC]hD]hE]hH]uhJKhL]rohUX^Run make firm_clean/firm to clean/build firmware from i2c directory i.e. rprq}rr(h2jmh3jkubaubah>jubah>jubeubj)rs}rt(h2XGenerated binaries - the firmware binaries which will be located in /bin///> h3jhjh@}ru(hB]hC]hD]hE]hH]uhJNhKhhL]rv(h)rw}rx(h2XGenerated binariesryh3jshhh@}rz(hB]hC]hD]hE]hH]uhJKhL]r{hUXGenerated binariesr|r}}r~(h2jyh3jwubaubj)r}r(h2Uh@}r(jX-hE]hD]hB]hC]hH]uh3jshL]rj)r}r(h2Xthe firmware binaries which will be located in /bin///> h@}r(hB]hC]hD]hE]hH]uh3jhL]rh)r}r(h2X~the firmware binaries which will be located in /bin///>rh3jhhh@}r(hB]hC]hD]hE]hH]uhJKhL]rhUX~the firmware binaries which will be located in /bin///>rr}r(h2jh3jubaubah>jubah>jubeubeubhx)r}r(h2Uh3jhh{h@}r(hB]hC]hD]hE]hH]uhJKhKhhL]rh~)r}r(h2UhKh3jhhJh@}r(hB]hC]hD]hE]hH]uhJKhKhhL]ubaubeubeubh4)r}r(h2Uh7Kh3jhh?h@}r(hB]rXsupported evmsrahC]hD]hE]rUid11rahH]uhJKhKhhL]r(hN)r}r(h2XSupported EVMsrh3jhhRh@}r(hB]hC]hD]hE]hH]uhJKhKhhL]rhUXSupported EVMsrr}r(h2jh3jubaubh)r}r(h2XFSupported EVMs and pin configurations for these EVMs are listed below.rh3jhhh@}r(hB]hC]hD]hE]hH]uhJKhKhhL]rhUXFSupported EVMs and pin configurations for these EVMs are listed below.rr}r(h2jh3jubaubh)r}r(h2Uh3jhhh@}r(hB]hC]hD]hE]hH]uhJNhKhhL]rh)r}r(h2Uh@}r(hE]hD]hB]hC]hH]UcolsKuh3jhL]r(h)r}r(h2Uh@}r(hE]hD]hB]hC]hH]UcolwidthK uh3jhL]h>hubh)r}r(h2Uh@}r(hE]hD]hB]hC]hH]UcolwidthKuh3jhL]h>hubh)r}r(h2Uh@}r(hE]hD]hB]hC]hH]UcolwidthKuh3jhL]h>hubcdocutils.nodes thead r)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]rh)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]r(h)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]rh)r}r(h2XEVM Namerh3jhhh@}r(hB]hC]hD]hE]hH]uhJKhL]rhUXEVM Namerr}r(h2jh3jubaubah>hubh)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]rh)r}r(h2XPRU-ICSS Instancesrh3jhhh@}r(hB]hC]hD]hE]hH]uhJKhL]rhUXPRU-ICSS Instancesrr}r(h2jh3jubaubah>hubh)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]rh)r}r(h2XPRU-ICSS Revisionrh3jhhh@}r(hB]hC]hD]hE]hH]uhJKhL]rhUXPRU-ICSS Revisionrr}r(h2jh3jubaubah>hubeh>hubah>Utheadrubh)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]r(h)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]r(h)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]rh)r}r(h2X icev2AM335xrh3jhhh@}r(hB]hC]hD]hE]hH]uhJKhL]rhUX icev2AM335xrr}r(h2jh3jubaubah>hubh)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]rh)r}r(h2X1h3jhhh@}r(hB]hC]hD]hE]hH]uhJKhL]rhUX1r }r (h2X1h3jubaubah>hubh)r }r (h2Uh@}r (hB]hC]hD]hE]hH]uh3jhL]rh)r}r(h2XREV1rh3j hhh@}r(hB]hC]hD]hE]hH]uhJKhL]rhUXREV1rr}r(h2jh3jubaubah>hubeh>hubh)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]r(h)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]rh)r}r (h2X idkAM437xr!h3jhhh@}r"(hB]hC]hD]hE]hH]uhJKhL]r#hUX idkAM437xr$r%}r&(h2j!h3jubaubah>hubh)r'}r((h2Uh@}r)(hB]hC]hD]hE]hH]uh3jhL]r*h)r+}r,(h2X2h3j'hhh@}r-(hB]hC]hD]hE]hH]uhJKhL]r.hUX2r/}r0(h2X2h3j+ubaubah>hubh)r1}r2(h2Uh@}r3(hB]hC]hD]hE]hH]uh3jhL]r4h)r5}r6(h2XREV1r7h3j1hhh@}r8(hB]hC]hD]hE]hH]uhJKhL]r9hUXREV1r:r;}r<(h2j7h3j5ubaubah>hubeh>hubh)r=}r>(h2Uh@}r?(hB]hC]hD]hE]hH]uh3jhL]r@(h)rA}rB(h2Uh@}rC(hB]hC]hD]hE]hH]uh3j=hL]rDh)rE}rF(h2X idkAM574xrGh3jAhhh@}rH(hB]hC]hD]hE]hH]uhJKhL]rIhUX idkAM574xrJrK}rL(h2jGh3jEubaubah>hubh)rM}rN(h2Uh@}rO(hB]hC]hD]hE]hH]uh3j=hL]rPh)rQ}rR(h2X2h3jMhhh@}rS(hB]hC]hD]hE]hH]uhJKhL]rThUX2rU}rV(h2X2h3jQubaubah>hubh)rW}rX(h2Uh@}rY(hB]hC]hD]hE]hH]uh3j=hL]rZh)r[}r\(h2XREV2r]h3jWhhh@}r^(hB]hC]hD]hE]hH]uhJKhL]r_hUXREV2r`ra}rb(h2j]h3j[ubaubah>hubeh>hubh)rc}rd(h2Uh@}re(hB]hC]hD]hE]hH]uh3jhL]rf(h)rg}rh(h2Uh@}ri(hB]hC]hD]hE]hH]uh3jchL]rjh)rk}rl(h2X idkAM572xrmh3jghhh@}rn(hB]hC]hD]hE]hH]uhJKhL]rohUX idkAM572xrprq}rr(h2jmh3jkubaubah>hubh)rs}rt(h2Uh@}ru(hB]hC]hD]hE]hH]uh3jchL]rvh)rw}rx(h2X2h3jshhh@}ry(hB]hC]hD]hE]hH]uhJKhL]rzhUX2r{}r|(h2X2h3jwubaubah>hubh)r}}r~(h2Uh@}r(hB]hC]hD]hE]hH]uh3jchL]rh)r}r(h2XREV2rh3j}hhh@}r(hB]hC]hD]hE]hH]uhJKhL]rhUXREV2rr}r(h2jh3jubaubah>hubeh>hubeh>jubeh>j ubaubhx)r}r(h2Uh3jhh{h@}r(hB]hC]hD]hE]hH]uhJKhKhhL]rh~)r}r(h2UhKh3jhhJh@}r(hB]hC]hD]hE]hH]uhJKhKhhL]ubaubj)r}r(h2X icev2AM335xrh3jhjh@}r(hE]rU icev2am335xrahD]hB]hC]hH]rhauhJNhKhhL]rhUX icev2AM335xrr}r(h2jh3jubaubh)r}r(h2Uh3jhhh@}r(hB]hC]hD]hE]hH]uhJNhKhhL]rh)r}r(h2Uh@}r(hE]hD]hB]hC]hH]UcolsKuh3jhL]r(h)r}r(h2Uh@}r(hE]hD]hB]hC]hH]UcolwidthK uh3jhL]h>hubh)r}r(h2Uh@}r(hE]hD]hB]hC]hH]UcolwidthKuh3jhL]h>hubh)r}r(h2Uh@}r(hE]hD]hB]hC]hH]UcolwidthK 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I2C_socSetFwCfg(I2C_TEST_INSTANCE1, &i2c_cfg); ... Board_init(boardCfg); ... I2C_init(); handle = I2C_open(I2C_TEST_INSTANCE1, &i2cParams); ... /* Initiate I2C transfers */ I2C_transactionInit(&i2cTransaction); i2cTransaction.slaveAddress = I2C_EEPROM_ADDR; ... status = I2C_transfer(handle, &i2cTransaction); if (status!= I2C_STS_SUCCESS) { /* I2C transaction failed */ }h3j%hj|h@}r>(Ulinenosr?Ulanguager@XchbhchE]hD]hB]Uhighlight_argsrA}hC]hH]uhJKhKhhL]rBhUX/* Refer to I2C FW Example for details */ ... /* Initialize the I2C FW configuration */ I2C_socInitFwCfg(); /* Get the default I2C init configuration */ I2C_socGetFwCfg(I2C_TEST_INSTANCE1, &i2c_cfg); /* Modify the default I2C configurations if necessary */ /* Set the default I2C init configurations */ I2C_socSetFwCfg(I2C_TEST_INSTANCE1, &i2c_cfg); ... Board_init(boardCfg); ... I2C_init(); handle = I2C_open(I2C_TEST_INSTANCE1, &i2cParams); ... /* Initiate I2C transfers */ I2C_transactionInit(&i2cTransaction); i2cTransaction.slaveAddress = I2C_EEPROM_ADDR; ... status = I2C_transfer(handle, &i2cTransaction); if (status!= I2C_STS_SUCCESS) { /* I2C transaction failed */ }rCrD}rE(h2Uh3j<ubaubh)rF}rG(h2X"Sample code for SMBus transaction:rHh3j%hhh@}rI(hB]hC]hD]hE]hH]uhJMhKhhL]rJhUX"Sample code for SMBus transaction:rKrL}rM(h2jHh3jFubaubjy)rN}rO(h2Xn/* Refer to I2C FW Test for details */ ... testCmd.transferCmd = SMBUS_WRITE_BYTE_CMD; testCmd.cmdCode = WRITE_SMBUS_COMMAND_CODE; controlStatus = I2C_control(handle, I2C_CMD_SMBUS_TYPE, ((void*)&testCmd)); I2C_transactionInit(&i2cTransaction); ... status = I2C_transfer(handle, &i2cTransaction); if (status != I2C_STS_SUCCESS) { /* I2C transaction failed */ }h3j%hj|h@}rP(j?j@XchbhchE]hD]hB]jA}hC]hH]uhJM hKhhL]rQhUXn/* Refer to I2C FW Test for details */ ... testCmd.transferCmd = SMBUS_WRITE_BYTE_CMD; testCmd.cmdCode = WRITE_SMBUS_COMMAND_CODE; controlStatus = I2C_control(handle, I2C_CMD_SMBUS_TYPE, ((void*)&testCmd)); I2C_transactionInit(&i2cTransaction); ... status = I2C_transfer(handle, &i2cTransaction); if (status != I2C_STS_SUCCESS) { /* I2C transaction failed */ }rRrS}rT(h2Uh3jNubaubhx)rU}rV(h2Uh3j%hh{h@}rW(hB]hC]hD]hE]hH]uhJM0hKhhL]rXh~)rY}rZ(h2UhKh3jUhhJh@}r[(hB]hC]hD]hE]hH]uhJKhKhhL]ubaubj)r\}r](h2X Examples Listr^h3j%hjh@}r_(hE]r`U examples-listraahD]hB]hC]hH]rbhauhJNhKhhL]rchUX Examples Listrdre}rf(h2j^h3j\ubaubh)rg}rh(h2XTRefer to the Release Notes for details concerning I2C support across different EVMs.rih3j%hhh@}rj(hB]hC]hD]hE]hH]uhJM5hKhhL]rkhUXTRefer to the Release Notes for details concerning I2C support across different EVMs.rlrm}rn(h2jih3jgubaubh)ro}rp(h2Uh3j%hhh@}rq(hB]hC]hD]hE]hH]uhJNhKhhL]rrh)rs}rt(h2Uh@}ru(hE]hD]hB]hC]hH]UcolsKuh3johL]rv(h)rw}rx(h2Uh@}ry(hE]hD]hB]hC]hH]UcolwidthKuh3jshL]h>hubh)rz}r{(h2Uh@}r|(hE]hD]hB]hC]hH]UcolwidthKuh3jshL]h>hubh)r}}r~(h2Uh@}r(hE]hD]hB]hC]hH]UcolwidthKuh3jshL]h>hubj)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jshL]rh)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]r(h)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]rh)r}r(h2XNamerh3jhhh@}r(hB]hC]hD]hE]hH]uhJM8hL]rhUXNamerr}r(h2jh3jubaubah>hubh)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]rh)r}r(h2X Descriptionrh3jhhh@}r(hB]hC]hD]hE]hH]uhJM8hL]rhUX Descriptionrr}r(h2jh3jubaubah>hubh)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]rh)r}r(h2XExpected Resultsrh3jhhh@}r(hB]hC]hD]hE]hH]uhJM8hL]rhUXExpected Resultsrr}r(h2jh3jubaubah>hubeh>hubah>jubh)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jshL]rh)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]r(h)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]rh)r}r(h2X I2C_FwExamplerh3jhhh@}r(hB]hC]hD]hE]hH]uhJM:hL]rhUX I2C_FwExamplerr}r(h2jh3jubaubah>hubh)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]rh)r}r(h2X8Driver Firmware example application for I2C FW instancesrh3jhhh@}r(hB]hC]hD]hE]hH]uhJM:hL]rhUX8Driver Firmware example application for I2C FW instancesrr}r(h2jh3jubaubah>hubh)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]r(h)r}r(h2XOStatus messages will be displayed on console based based on pass/fail criteria:rh3jhhh@}r(hB]hC]hD]hE]hH]uhJM:hL]rhUXOStatus messages will be displayed on console based based on pass/fail criteria:rr}r(h2jh3jubaubh)r}r(h2X**Pass criteria:**rh3jhhh@}r(hB]hC]hD]hE]hH]uhJM?hL]rh)r}r(h2jh@}r(hB]hC]hD]hE]hH]uh3jhL]rhUXPass criteria:rr}r(h2Uh3jubah>hubaubh)r}r(h2X%I2C Test: Instance: Baud Rate 100KHz:rh3jhhh@}r(hB]hC]hD]hE]hH]uhJMAhL]rhUX%I2C Test: Instance: Baud Rate 100KHz:rr}r(h2jh3jubaubh)r}r(h2XAll tests have passed.rh3jhhh@}r(hB]hC]hD]hE]hH]uhJMDhL]rhUXAll tests have passed.rr}r(h2jh3jubaubeh>hubeh>hubah>jubeh>j ubaubhx)r}r(h2Uh3j%hh{h@}r(hB]hC]hD]hE]hH]uhJMHhKhhL]rh~)r}r(h2UhKh3jhhJh@}r(hB]hC]hD]hE]hH]uhJKhKhhL]ubaubj)r}r(h2XFirmware Design Guiderh7Kh3j%hjh@}r(hE]rUid12rahD]hB]rjahC]hH]uhJNhKhhL]rhUXFirmware Design Guiderr}r(h2jh3jubaubh)r}r(h2Uh3j%hhh@}r(hB]hC]hD]hE]hH]uhJNhKhhL]r h)r }r (h2Uh@}r (hE]hD]hB]hC]hH]UcolsKuh3jhL]r (h)r}r(h2Uh@}r(hE]hD]hB]hC]hH]UcolwidthK#uh3j hL]h>hubh)r}r(h2Uh@}r(hE]hD]hB]hC]hH]UcolwidthKJuh3j hL]h>hubh)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3j hL]r(h)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]r(h)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]rh)r }r!(h2X **Document**r"h3jhhh@}r#(hB]hC]hD]hE]hH]uhJMNhL]r$h)r%}r&(h2j"h@}r'(hB]hC]hD]hE]hH]uh3j hL]r(hUXDocumentr)r*}r+(h2Uh3j%ubah>hubaubah>hubh)r,}r-(h2Uh@}r.(hB]hC]hD]hE]hH]uh3jhL]r/h)r0}r1(h2X **Location**r2h3j,hhh@}r3(hB]hC]hD]hE]hH]uhJMNhL]r4h)r5}r6(h2j2h@}r7(hB]hC]hD]hE]hH]uh3j0hL]r8hUXLocationr9r:}r;(h2Uh3j5ubah>hubaubah>hubeh>hubh)r<}r=(h2Uh@}r>(hB]hC]hD]hE]hH]uh3jhL]r?(h)r@}rA(h2Uh@}rB(hB]hC]hD]hE]hH]uh3j<hL]rCh)rD}rE(h2XI2C FIRMWARE Design GuiderFh3j@hhh@}rG(hB]hC]hD]hE]hH]uhJMPhL]rHhUXI2C FIRMWARE Design GuiderIrJ}rK(h2jFh3jDubaubah>hubh)rL}rM(h2Uh@}rN(hB]hC]hD]hE]hH]uh3j<hL]rOh)rP}rQ(h2XH/packages/ti/drv/i2c/firmware/icss_i2c/docs/I2C_FW_DESIGN_GUIDE.pdfrRh3jLhhh@}rS(hB]hC]hD]hE]hH]uhJMPhL]rThUXH/packages/ti/drv/i2c/firmware/icss_i2c/docs/I2C_FW_DESIGN_GUIDE.pdfrUrV}rW(h2jRh3jPubaubah>hubeh>hubeh>jubeh>j ubaubh)rX}rY(h2X**NOTE: For normal use of I2C FW, there is no need to refer to the design guide. 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The Processor SDK package includes full source code for I2C FW.rr}r(h2jh3j}ubaubaubhx)r}r(h2Uh3jhh{h@}r(hB]hC]hD]hE]hH]uhJK hKhhL]rh~)r}r(h2UhKh3jhhJh@}r(hB]hC]hD]hE]hH]uhJKhKhhL]ubaubeubhjh@}r(hB]UlevelKhE]hD]rjoaUsourcejhC]hH]UlineKUtypej, uhJKhKhhL]rh)r}r(h2X/Duplicate implicit target name: "introduction".h@}r(hB]hC]hD]hE]hH]uh3jhL]rhUX/Duplicate implicit target name: "introduction".rr}r(h2Uh3jubah>hubaubh/)r}r(h2Uh3jhjh@}r(hB]UlevelKhE]hD]rj aUsourcejhC]hH]UlineK_Utypej, uhJK_hKhhL]rh)r}r(h2X=Duplicate implicit target name: "firmware build instruction".h@}r(hB]hC]hD]hE]hH]uh3jhL]rhUX=Duplicate implicit target name: "firmware build instruction".rr}r(h2Uh3jubah>hubaubh/)r}r(h2Uh3jhjh@}r(hB]UlevelKhE]hD]rjaUsourcejhC]hH]UlineKbUtypej, uhJKbhKhhL]rh)r}r(h2XWDuplicate implicit target name: "build instruction from processor sdk release package".h@}r(hB]hC]hD]hE]hH]uh3jhL]rhUXWDuplicate implicit target name: "build instruction from processor sdk release package".rr}r(h2Uh3jubah>hubaubh/)r}r(h2Uh@}r(hB]UlevelKhE]hD]rj'aUsourceh=hC]hH]UlineKUtypejuh3j"hL]rh)r}r(h2X=Duplicate explicit target name: "pre-requisites-to-building".h@}r(hB]hC]hD]hE]hH]uh3jhL]rhUX=Duplicate explicit target name: "pre-requisites-to-building".rr}r(h2Uh3jubah>hubah>jubh/)r}r(h2Uh3jhjh@}r(hB]UlevelKhE]hD]rjaUsourcejhC]hH]UlineKUtypej, uhJKhKhhL]rh)r}r(h2X1Duplicate implicit target name: "supported evms".h@}r(hB]hC]hD]hE]hH]uh3jhL]rhUX1Duplicate implicit target name: "supported evms".rr}r(h2Uh3jubah>hubaubh/)r}r(h2Uh@}r(hB]UlevelKhE]hD]rjaUsourceh=hC]hH]UlineKUtypejuh3jhL]rh)r}r(h2X8Duplicate explicit target name: "firmware-design-guide".h@}r(hB]hC]hD]hE]hH]uh3jhL]rhUX8Duplicate explicit target name: "firmware-design-guide".rr}r(h2Uh3jubah>hubah>jubh/)r}r(h2Uh3j%hjh@}r(hB]UlevelKhE]hD]UsourcejhC]hH]UlineMYUtypejuhJM[hKhhL]r(h)r}r(h2X;Content block expected for the "raw" directive; none found.h@}r(hB]hC]hD]hE]hH]uh3jhL]rhUX;Content block expected for the "raw" directive; none found.rr}r(h2Uh3jubah>hubjy)r}r(h2X.. raw:: html h@}r(hbhchE]hD]hB]hC]hH]uh3jhL]rhUX.. raw:: html rr}r(h2Uh3jubah>j|ubeubh/)r}r(h2Uh3h4)r}r(h2Uh7Kh3h4)r}r(h2Uh3hhh?h@}r(hB]hC]hD]hE]rUpru-icss-iolinkrahH]rh)auhJKhKhhL]r(hN)r}r(h2XPRU-ICSS IOLINKrh3jhhRh@}r(hB]hC]hD]hE]hH]uhJKhKhhL]rhUXPRU-ICSS IOLINKrr}r(h2jh3jubaubj)r}r(h2X#.. _PRU-ICSS-IOLINK-FIRMWARE-label:h3jhjh@}r(hB]hC]hD]hE]rUpru-icss-iolink-firmware-labelrahH]rhauhJMshKhhL]ubhY)r}r(h2XUhttp://ap-fpdsp-swapps.dal.design.ti.com/index.php/Processor_SDK_RTOS_IOLINK_FIRMWAREh3jhh`h@}r(hbhchE]hD]hB]hC]hH]uhJKhKhhL]rhUXUhttp://ap-fpdsp-swapps.dal.design.ti.com/index.php/Processor_SDK_RTOS_IOLINK_FIRMWARErr}r(h2Uh3jubaubjh4)r}r (h2Uh7Kh3jhh?h@}r (hB]r jahC]hD]hE]r Uid14r ahH]uhJK hKhhL]r(hN)r}r(h2XFIRMWARE FEATURESrh3jhhRh@}r(hB]hC]hD]hE]hH]uhJK hKhhL]rhUXFIRMWARE FEATURESrr}r(h2jh3jubaubh)r}r(h2XIOLINK FW supports 8 channels per IO-Link instance in a single PRU core. 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**Remarks**rSh3jMhhh@}rT(hB]hC]hD]hE]hH]uhJKhL]rUh)rV}rW(h2jSh@}rX(hB]hC]hD]hE]hH]uh3jQhL]rYhUXRemarksrZr[}r\(h2Uh3jVubah>hubaubah>hubeh>hubh)r]}r^(h2Uh@}r_(hB]hC]hD]hE]hH]uh3j5hL]r`(h)ra}rb(h2Uh@}rc(hB]hC]hD]hE]hH]uh3j]hL]rdh)re}rf(h2XNo. of instancesrgh3jahhh@}rh(hB]hC]hD]hE]hH]uhJKhL]rihUXNo. of instancesrjrk}rl(h2jgh3jeubaubah>hubh)rm}rn(h2Uh@}ro(hB]hC]hD]hE]hH]uh3j]hL]rph)rq}rr(h2X1h3jmhhh@}rs(hB]hC]hD]hE]hH]uhJKhL]rthUX1ru}rv(h2X1h3jqubaubah>hubeh>hubh)rw}rx(h2Uh@}ry(hB]hC]hD]hE]hH]uh3j5hL]rz(h)r{}r|(h2Uh@}r}(hB]hC]hD]hE]hH]uh3jwhL]r~h)r}r(h2XNo. of channels per instancerh3j{hhh@}r(hB]hC]hD]hE]hH]uhJKhL]rhUXNo. of channels per instancerr}r(h2jh3jubaubah>hubh)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jwhL]rh)r}r(h2X8h3jhhh@}r(hB]hC]hD]hE]hH]uhJKhL]rhUX8r}r(h2X8h3jubaubah>hubeh>hubh)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3j5hL]r(h)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]rh)r}r(h2X Baud Raterh3jhhh@}r(hB]hC]hD]hE]hH]uhJKhL]rhUX Baud Raterr}r(h2jh3jubaubah>hubh)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]rh)r}r(h2XCOM1/COM2/COM3rh3jhhh@}r(hB]hC]hD]hE]hH]uhJKhL]rhUXCOM1/COM2/COM3rr}r(h2jh3jubaubah>hubeh>hubh)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3j5hL]r(h)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]rh)r}r(h2XMinumum Cycle Timerh3jhhh@}r(hB]hC]hD]hE]hH]uhJKhL]rhUXMinumum Cycle Timerr}r(h2jh3jubaubah>hubh)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]rh)r}r(h2X400 µsrh3jhhh@}r(hB]hC]hD]hE]hH]uhJKhL]rhUX400 µsrr}r(h2jh3jubaubah>hubeh>hubh)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3j5hL]r(h)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]rh)r}r(h2XMaximum Cycle Timerh3jhhh@}r(hB]hC]hD]hE]hH]uhJK!hL]rhUXMaximum Cycle Timerr}r(h2jh3jubaubah>hubh)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]rh)r}r(h2X132 msrh3jhhh@}r(hB]hC]hD]hE]hH]uhJK!hL]rhUX132 msrr}r(h2jh3jubaubah>hubeh>hubh)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3j5hL]r(h)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]rh)r}r(h2XChannel Independent Cycle Timerh3jhhh@}r(hB]hC]hD]hE]hH]uhJK#hL]rhUXChannel Independent Cycle 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MonitoringrCh3j=hhh@}rD(hB]hC]hD]hE]hH]uhJK)hL]rEhUX/Channel Independent Time Control and MonitoringrFrG}rH(h2jCh3jAubaubah>hubh)rI}rJ(h2Uh@}rK(hB]hC]hD]hE]hH]uh3j9hL]rLh)rM}rN(h2X SupportedrOh3jIhhh@}rP(hB]hC]hD]hE]hH]uhJK)hL]rQhUX SupportedrRrS}rT(h2jOh3jMubaubah>hubeh>hubh)rU}rV(h2Uh@}rW(hB]hC]hD]hE]hH]uh3j5hL]rX(h)rY}rZ(h2Uh@}r[(hB]hC]hD]hE]hH]uh3jUhL]r\h)r]}r^(h2X)Receive Glitch Filter and 8x Oversamplingr_h3jYhhh@}r`(hB]hC]hD]hE]hH]uhJK,hL]rahUX)Receive Glitch Filter and 8x Oversamplingrbrc}rd(h2j_h3j]ubaubah>hubh)re}rf(h2Uh@}rg(hB]hC]hD]hE]hH]uh3jUhL]rhh)ri}rj(h2X Supportedrkh3jehhh@}rl(hB]hC]hD]hE]hH]uhJK,hL]rmhUX Supportedrnro}rp(h2jkh3jiubaubah>hubeh>hubh)rq}rr(h2Uh@}rs(hB]hC]hD]hE]hH]uh3j5hL]rt(h)ru}rv(h2Uh@}rw(hB]hC]hD]hE]hH]uh3jqhL]rxh)ry}rz(h2X!Receive Tolerance (per baud rate)r{h3juhhh@}r|(hB]hC]hD]hE]hH]uhJK/hL]r}hUX!Receive Tolerance (per baud rate)r~r}r(h2j{h3jyubaubah>hubh)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jqhL]rh)r}r(h2X3%rh3jhhh@}r(hB]hC]hD]hE]hH]uhJK/hL]rhUX3%rr}r(h2jh3jubaubah>hubeh>hubh)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3j5hL]r(h)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]rh)r}r(h2X!Programmable Max Response Time TArh3jhhh@}r(hB]hC]hD]hE]hH]uhJK1hL]rhUX!Programmable Max Response Time TArr}r(h2jh3jubaubah>hubh)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]rh)r}r(h2X Supportedrh3jhhh@}r(hB]hC]hD]hE]hH]uhJK1hL]rhUX Supportedrr}r(h2jh3jubaubah>hubeh>hubh)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3j5hL]r(h)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]rh)r}r(h2XStart/Restart/Stoprh3jhhh@}r(hB]hC]hD]hE]hH]uhJK3hL]rhUXStart/Restart/Stoprr}r(h2jh3jubaubah>hubh)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]rh)r}r(h2X Supportedrh3jhhh@}r(hB]hC]hD]hE]hH]uhJK3hL]rhUX Supportedrr}r(h2jh3jubaubah>hubeh>hubh)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3j5hL]r(h)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]rh)r}r(h2X Start Bitrh3jhhh@}r(hB]hC]hD]hE]hH]uhJK5hL]rhUX Start Bitrr}r(h2jh3jubaubah>hubh)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]rh)r}r(h2X1-bitrh3jhhh@}r(hB]hC]hD]hE]hH]uhJK5hL]rhUX1-bitrr}r(h2jh3jubaubah>hubeh>hubh)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3j5hL]r(h)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]rh)r}r(h2XStop Bitrh3jhhh@}r(hB]hC]hD]hE]hH]uhJK7hL]rhUXStop Bitrr}r(h2jh3jubaubah>hubh)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]rh)r}r(h2X1-bitrh3jhhh@}r(hB]hC]hD]hE]hH]uhJK7hL]rhUX1-bitrr}r(h2jh3jubaubah>hubeh>hubh)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3j5hL]r(h)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]rh)r}r(h2X Data Lengthrh3jhhh@}r(hB]hC]hD]hE]hH]uhJK9hL]r hUX Data Lengthr r }r (h2jh3jubaubah>hubh)r }r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]rh)r}r(h2X8-bitrh3j hhh@}r(hB]hC]hD]hE]hH]uhJK9hL]rhUX8-bitrr}r(h2jh3jubaubah>hubeh>hubh)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3j5hL]r(h)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]r h)r!}r"(h2X Parity Checkr#h3jhhh@}r$(hB]hC]hD]hE]hH]uhJK;hL]r%hUX Parity Checkr&r'}r((h2j#h3j!ubaubah>hubh)r)}r*(h2Uh@}r+(hB]hC]hD]hE]hH]uh3jhL]r,h)r-}r.(h2X Even Parityr/h3j)hhh@}r0(hB]hC]hD]hE]hH]uhJK;hL]r1hUX Even Parityr2r3}r4(h2j/h3j-ubaubah>hubeh>hubh)r5}r6(h2Uh@}r7(hB]hC]hD]hE]hH]uh3j5hL]r8(h)r9}r:(h2Uh@}r;(hB]hC]hD]hE]hH]uh3j5hL]r<h)r=}r>(h2XInterrupts that the CPU can user?h3j9hhh@}r@(hB]hC]hD]hE]hH]uhJK=hL]rAhUXInterrupts that the CPU can userBrC}rD(h2j?h3j=ubaubah>hubh)rE}rF(h2Uh@}rG(hB]hC]hD]hE]hH]uh3j5hL]rHh)rI}rJ(h2X1h3jEhhh@}rK(hB]hC]hD]hE]hH]uhJK=hL]rLhUX1rM}rN(h2X1h3jIubaubah>hubeh>hubeh>jubeh>j ubaubeubh4)rO}rP(h2Uh7Kh3jhh?h@}rQ(hB]rRjgahC]hD]hE]rSUid15rTahH]uhJKBhKhhL]rU(hN)rV}rW(h2XFirmware OrganizationrXh3jOhhRh@}rY(hB]hC]hD]hE]hH]uhJKBhKhhL]rZhUXFirmware Organizationr[r\}r](h2jXh3jVubaubh)r^}r_(h2Uh3jOhhh@}r`(hB]hC]hD]hE]hH]uhJNhKhhL]rah)rb}rc(h2Uh@}rd(hE]hD]hB]hC]hH]UcolsKuh3j^hL]re(h)rf}rg(h2Uh@}rh(hE]hD]hB]hC]hH]UcolwidthKuh3jbhL]h>hubh)ri}rj(h2Uh@}rk(hE]hD]hB]hC]hH]UcolwidthK8uh3jbhL]h>hubh)rl}rm(h2Uh@}rn(hB]hC]hD]hE]hH]uh3jbhL]ro(h)rp}rq(h2Uh@}rr(hB]hC]hD]hE]hH]uh3jlhL]rs(h)rt}ru(h2Uh@}rv(hB]hC]hD]hE]hH]uh3jphL]rwh)rx}ry(h2X **FW Item**rzh3jthhh@}r{(hB]hC]hD]hE]hH]uhJKEhL]r|h)r}}r~(h2jzh@}r(hB]hC]hD]hE]hH]uh3jxhL]rhUXFW Itemrr}r(h2Uh3j}ubah>hubaubah>hubh)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jphL]rh)r}r(h2X **Directory**rh3jhhh@}r(hB]hC]hD]hE]hH]uhJKEhL]rh)r}r(h2jh@}r(hB]hC]hD]hE]hH]uh3jhL]rhUX Directoryrr}r(h2Uh3jubah>hubaubah>hubeh>hubh)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jlhL]r(h)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]rh)r}r(h2X Source coderh3jhhh@}r(hB]hC]hD]hE]hH]uhJKGhL]rhUX Source coderr}r(h2jh3jubaubah>hubh)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]rh)r}r(h2X5/packages/ti/drv/iolink/firmware/icss_iolink/srcrh3jhhh@}r(hB]hC]hD]hE]hH]uhJKGhL]rhUX5/packages/ti/drv/iolink/firmware/icss_iolink/srcrr}r(h2jh3jubaubah>hubeh>hubh)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jlhL]r(h)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]rh)r}r(h2X Design Guiderh3jhhh@}r(hB]hC]hD]hE]hH]uhJKIhL]rhUX Design Guiderr}r(h2jh3jubaubah>hubh)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]rh)r}r(h2X!/packages/ti/drv/iolink/docsrh3jhhh@}r(hB]hC]hD]hE]hH]uhJKIhL]rhUX!/packages/ti/drv/iolink/docsrr}r(h2jh3jubaubah>hubeh>hubh)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jlhL]r(h)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]rh)r}r(h2XFirmware binariesrh3jhhh@}r(hB]hC]hD]hE]hH]uhJKKhL]rhUXFirmware binariesrr}r(h2jh3jubaubah>hubh)r}r(h2Uh@}r(hB]hC]hD]hE]hH]uh3jhL]rh)r}r(h2X5/packages/ti/drv/iolink/firmware/icss_iolink/binrh3jhhh@}r(hB]hC]hD]hE]hH]uhJKKhL]rhUX5/packages/ti/drv/iolink/firmware/icss_iolink/binrr}r(h2jh3jubaubah>hubeh>hubeh>jubeh>j ubaubhx)r}r(h2Uh3jOhh{h@}r(hB]hC]hD]hE]hH]uhJKNhKhhL]rh~)r}r(h2UhKh3jhhJh@}r(hB]hC]hD]hE]hH]uhJKhKhhL]ubaubeubh4)r}r(h2Uh7Kh3jhh?h@}r(hB]rXfirmware build instructionrahC]hD]hE]rUid16rahH]uhJKQhKhhL]r(hN)r}r(h2XFirmware Build Instructionrh3jhhRh@}r(hB]hC]hD]hE]hH]uhJKQhKhhL]rhUXFirmware Build Instructionrr}r(h2jh3jubaubh4)r}r(h2Uh7Kh3jhh?h@}r(hB]rX4build instruction from processor sdk release packagerahC]hD]hE]rUid17rahH]uhJKThKhhL]r(hN)r}r(h2X4Build instruction from Processor SDK Release packager h3jhhRh@}r (hB]hC]hD]hE]hH]uhJKThKhhL]r hUX4Build instruction from Processor SDK Release packager r }r(h2j h3jubaubj)r}r(h2XPre-requisites to Buildingrh7Kh3jhjh@}r(hE]rUid18rahD]hB]rXpre-requisites-to-buildingrahC]hH]uhJNhKhhL]rhUXPre-requisites to Buildingrr}r(h2jh3jubaubh)r}r(h2XbRefer to the Processor SDK RTOS Building page for information on setting up the build environment.rh3jhhh@}r(hB]hC]hD]hE]hH]uhJKYhKhhL]rhUXbRefer to the Processor SDK RTOS Building page for information on setting up the build environment.r r!}r"(h2jh3jubaubj)r#}r$(h2XCompiling IOLINK FIRMWAREr%h3jhjh@}r&(hE]r'Ucompiling-iolink-firmwarer(ahD]hB]hC]hH]r)h%auhJNhKhhL]r*hUXCompiling IOLINK FIRMWAREr+r,}r-(h2j%h3j#ubaubj)r.}r/(h2Uh3jhjh@}r0(jX-hE]hD]hB]hC]hH]uhJK^hKhhL]r1(j)r2}r3(h2Xcd /packages/ti/drv/iolinkr4h3j.hjh@}r5(hB]hC]hD]hE]hH]uhJNhKhhL]r6h)r7}r8(h2j4h3j2hhh@}r9(hB]hC]hD]hE]hH]uhJK^hL]r:hUXcd /packages/ti/drv/iolinkr;r<}r=(h2j4h3j7ubaubaubj)r>}r?(h2X make firm h3j.hjh@}r@(hB]hC]hD]hE]hH]uhJNhKhhL]rAh)rB}rC(h2X make firmrDh3j>hhh@}rE(hB]hC]hD]hE]hH]uhJK_hL]rFhUX make firmrGrH}rI(h2jDh3jBubaubaubeubh)rJ}rK(h2X=Firmware binaries at the end of the build will be located at:rLh3jhhh@}rM(hB]hC]hD]hE]hH]uhJKahKhhL]rNhUX=Firmware binaries at the end of the build will be located at:rOrP}rQ(h2jLh3jJubaubj)rR}rS(h2Uh3jhjh@}rT(jX-hE]hD]hB]hC]hH]uhJKchKhhL]rU(j)rV}rW(h2XW/packages/ti/drv/iolink/firmware//bin/// h3jRhjh@}rX(hB]hC]hD]hE]hH]uhJNhKhhL]rYh)rZ}r[(h2XV/packages/ti/drv/iolink/firmware//bin///r\h3jVhhh@}r](hB]hC]hD]hE]hH]uhJKchL]r^hUXV/packages/ti/drv/iolink/firmware//bin///r_r`}ra(h2j\h3jZubaubaubj)rb}rc(h2X= indicates the firmware type i.e. icss_iolink h3jRhjh@}rd(hB]hC]hD]hE]hH]uhJNhKhhL]reh)rf}rg(h2X< indicates the firmware type i.e. icss_iolinkrhh3jbhhh@}ri(hB]hC]hD]hE]hH]uhJKehL]rjhUX< indicates the firmware type i.e. icss_iolinkrkrl}rm(h2jhh3jfubaubaubj)rn}ro(h2X* indicates the SOC type, e.g. am437x h3jRhjh@}rp(hB]hC]hD]hE]hH]uhJNhKhhL]rqh)rr}rs(h2X) indicates the SOC type, e.g. am437xrth3jnhhh@}ru(hB]hC]hD]hE]hH]uhJKghL]rvhUX) indicates the SOC type, e.g. am437xrwrx}ry(h2jth3jrubaubaubj)rz}r{(h2X^ indicates the Host core type on which the built binary can be loaded, e.g. a9host h3jRhjh@}r|(hB]hC]hD]hE]hH]uhJNhKhhL]r}h)r~}r(h2X] indicates the Host core type on which the built binary can be loaded, e.g. a9hostrh3jzhhh@}r(hB]hC]hD]hE]hH]uhJKihL]rhUX] indicates the Host core type on which the built binary can be loaded, e.g. a9hostrr}r(h2jh3j~ubaubaubj)r}r(h2X{ indicates the revision of the firmware binary based on core (there are 2 revision of PRU-ICSS core), e.g. REV1. h3jRhjh@}r(hB]hC]hD]hE]hH]uhJNhKhhL]rh)r}r(h2Xz indicates the revision of the firmware binary based on core (there are 2 revision of PRU-ICSS core), e.g. REV1.rh3jhhh@}r(hB]hC]hD]hE]hH]uhJKlhL]rhUXz indicates the revision of the firmware binary based on core (there are 2 revision of PRU-ICSS core), e.g. REV1.rr}r(h2jh3jubaubaubeubhx)r}r(h2Uh3jhh{h@}r(hB]hC]hD]hE]hH]uhJKohKhhL]rh~)r}r(h2UhKh3jhhJh@}r(hB]hC]hD]hE]hH]uhJKhKhhL]ubaubeubh4)r}r(h2Uh7Kh3jhh?h@}r(hB]rjahC]hD]hE]rUid19rahH]uhJKrhKhhL]r(hN)r}r(h2XBuild instruction for GITrh3jhhRh@}r(hB]hC]hD]hE]hH]uhJKrhKhhL]rhUXBuild instruction for GITrr}r(h2jh3jubaubh)r}r(h2XoFollowing are the steps for building firmware from any external environment outside Processor SDK RTOS package.rh3jhhh@}r(hB]hC]hD]hE]hH]uhJKthKhhL]rhUXoFollowing are the steps for building firmware from any external environment outside Processor SDK RTOS package.rr}r(h2jh3jubaubj)r}r(h2Uh3jhjh@}r(jX-hE]hD]hB]hC]hH]uhJKwhKhhL]r(j)r}r(h2XCreation of directories - Create a working directory e.g. - Create a new directory named ti inside working directory. i.e. - Create a new directory called drv inside ti. i.e. h3jhjh@}r(hB]hC]hD]hE]hH]uhJNhKhhL]r(h)r}r(h2XCreation of directoriesrh3jhhh@}r(hB]hC]hD]hE]hH]uhJKwhL]rhUXCreation of directoriesrr}r(h2jh3jubaubj)r}r(h2Uh@}r(jX-hE]hD]hB]hC]hH]uh3jhL]r(j)r}r(h2X*Create a working directory e.g. rh@}r(hB]hC]hD]hE]hH]uh3jhL]rh)r}r(h2jh3jhhh@}r(hB]hC]hD]hE]hH]uhJKyhL]rhUX*Create a working directory e.g. rr}r(h2jh3jubaubah>jubj)r}r(h2XLCreate a new directory named ti inside working directory. i.e. h@}r(hB]hC]hD]hE]hH]uh3jhL]rh)r}r(h2XLCreate a new directory named ti inside working directory. i.e. rh3jhhh@}r(hB]hC]hD]hE]hH]uhJKzhL]rhUXLCreate a new directory named ti inside working directory. i.e. rr}r(h2jh3jubaubah>jubj)r}r(h2XDCreate a new directory called drv inside ti. i.e. h@}r(hB]hC]hD]hE]hH]uh3jhL]rh)r}r(h2XCCreate a new directory called drv inside ti. i.e. rh3jhhh@}r(hB]hC]hD]hE]hH]uhJK|hL]rhUXCCreate a new directory called drv inside ti. i.e. rr}r(h2jh3jubaubah>jubeh>jubeubj)r}r(h2XClone of Repos - Git clone pdk build repo into ti directory. i.e. - Git clone iolink repo into ti/drv directory. i.e. h3jhjh@}r(hB]hC]hD]hE]hH]uhJNhKhhL]r(h)r}r(h2XClone of Reposrh3jhhh@}r(hB]hC]hD]hE]hH]uhJKhL]rhUXClone of Reposrr}r(h2jh3jubaubj)r}r(h2Uh@}r(jX-hE]hD]hB]hC]hH]uh3jhL]r(j)r}r(h2XDGit clone pdk build repo into ti directory. i.e. h@}r(hB]hC]hD]hE]hH]uh3jhL]rh)r}r(h2XDGit clone pdk build repo into ti directory. i.e. rh3jhhh@}r(hB]hC]hD]hE]hH]uhJKhL]r hUXDGit clone pdk build repo into ti directory. i.e. r r }r (h2jh3jubaubah>jubj)r }r (h2XKGit clone iolink repo into ti/drv directory. i.e. h@}r (hB]hC]hD]hE]hH]uh3jhL]r h)r }r (h2XJGit clone iolink repo into ti/drv directory. i.e. r h3j hhh@}r (hB]hC]hD]hE]hH]uhJKhL]r hUXJGit clone iolink repo into ti/drv directory. i.e. r r }r (h2j h3j ubaubah>jubeh>jubeubj)r }r (h2XSetting Environment Variables - Export CLPRU install path. i.e. export CL_PRU_INSTALL_PATH=clpru toolchain directory - Export pdk install path. i.e. export PDK_INSTALL_PATH= - Export LIMIT_SOCS Variable i.e. LIMIT_SOCS= [Optional for limiting to some SOCs] h3jhjh@}r (hB]hC]hD]hE]hH]uhJNhKhhL]r (h)r }r (h2XSetting Environment Variablesr h3j hhh@}r (hB]hC]hD]hE]hH]uhJKhL]r hUXSetting Environment Variablesr r }r (h2j h3j ubaubj)r }r (h2Uh@}r (jX-hE]hD]hB]hC]hH]uh3j hL]r (j)r }r! (h2XTExport CLPRU install path. i.e. export CL_PRU_INSTALL_PATH=clpru toolchain directoryh@}r" (hB]hC]hD]hE]hH]uh3j hL]r# h)r$ }r% (h2XTExport CLPRU install path. i.e. export CL_PRU_INSTALL_PATH=clpru toolchain directoryr& h3j hhh@}r' (hB]hC]hD]hE]hH]uhJKhL]r( hUXTExport CLPRU install path. i.e. export CL_PRU_INSTALL_PATH=clpru toolchain directoryr) r* }r+ (h2j& h3j$ ubaubah>jubj)r, }r- (h2X@Export pdk install path. i.e. export PDK_INSTALL_PATH=r. h@}r/ (hB]hC]hD]hE]hH]uh3j hL]r0 h)r1 }r2 (h2j. h3j, hhh@}r3 (hB]hC]hD]hE]hH]uhJKhL]r4 hUX@Export pdk install path. i.e. export PDK_INSTALL_PATH=r5 r6 }r7 (h2j. h3j1 ubaubah>jubj)r8 }r9 (h2XVExport LIMIT_SOCS Variable i.e. LIMIT_SOCS= [Optional for limiting to some SOCs] h@}r: (hB]hC]hD]hE]hH]uh3j hL]r; h)r< }r= (h2XUExport LIMIT_SOCS Variable i.e. LIMIT_SOCS= [Optional for limiting to some SOCs]r> h3j8 hhh@}r? (hB]hC]hD]hE]hH]uhJKhL]r@ hUXUExport LIMIT_SOCS Variable i.e. LIMIT_SOCS= [Optional for limiting to some SOCs]rA rB }rC (h2j> h3j< ubaubah>jubeh>jubeubj)rD }rE (h2XzBuild command - Run make firm_clean/firm to clean/build firmware from iolink directory i.e. h3jhjh@}rF (hB]hC]hD]hE]hH]uhJNhKhhL]rG (h)rH }rI (h2X Build commandrJ h3jD hhh@}rK (hB]hC]hD]hE]hH]uhJKhL]rL hUX Build commandrM rN }rO (h2jJ h3jH ubaubj)rP }rQ (h2Uh@}rR (jX-hE]hD]hB]hC]hH]uh3jD hL]rS j)rT }rU (h2XeRun make firm_clean/firm to clean/build firmware from iolink directory i.e. h@}rV (hB]hC]hD]hE]hH]uh3jP hL]rW h)rX }rY (h2XdRun make firm_clean/firm to clean/build firmware from iolink directory i.e. rZ h3jT hhh@}r[ (hB]hC]hD]hE]hH]uhJKhL]r\ hUXdRun make firm_clean/firm to clean/build firmware from iolink directory i.e. r] r^ }r_ (h2jZ h3jX ubaubah>jubah>jubeubj)r` }ra (h2XGenerated binaries - the firmware binaries which will be located in /bin///> h3jhjh@}rb (hB]hC]hD]hE]hH]uhJNhKhhL]rc (h)rd }re (h2XGenerated binariesrf h3j` hhh@}rg (hB]hC]hD]hE]hH]uhJKhL]rh hUXGenerated binariesri rj }rk (h2jf h3jd ubaubj)rl }rm (h2Uh@}rn (jX-hE]hD]hB]hC]hH]uh3j` hL]ro j)rp }rq (h2Xthe firmware binaries which will be located in /bin///> h@}rr (hB]hC]hD]hE]hH]uh3jl hL]rs h)rt }ru (h2Xthe firmware binaries which will be located in /bin///>rv h3jp hhh@}rw (hB]hC]hD]hE]hH]uhJKhL]rx hUXthe firmware binaries which will be located in /bin///>ry rz }r{ (h2jv h3jt ubaubah>jubah>jubeubeubhx)r| }r} (h2Uh3jhh{h@}r~ (hB]hC]hD]hE]hH]uhJKhKhhL]r h~)r }r (h2UhKh3j| hhJh@}r (hB]hC]hD]hE]hH]uhJKhKhhL]ubaubeubeubh4)r }r (h2Uh7Kh3jhh?h@}r (hB]r Xsupported evmsr ahC]hD]hE]r Uid20r ahH]uhJKhKhhL]r (hN)r }r (h2XSupported EVMsr h3j hhRh@}r (hB]hC]hD]hE]hH]uhJKhKhhL]r hUXSupported EVMsr r }r (h2j h3j ubaubh)r }r (h2X Supported EVMs are listed below.r h3j hhh@}r (hB]hC]hD]hE]hH]uhJKhKhhL]r hUX Supported EVMs are listed below.r r }r (h2j h3j ubaubh)r }r (h2Uh3j hhh@}r (hB]hC]hD]hE]hH]uhJNhKhhL]r h)r }r (h2Uh@}r (hE]hD]hB]hC]hH]UcolsKuh3j hL]r (h)r }r (h2Uh@}r (hE]hD]hB]hC]hH]UcolwidthK uh3j hL]h>hubh)r }r (h2Uh@}r (hE]hD]hB]hC]hH]UcolwidthKuh3j hL]h>hubh)r }r (h2Uh@}r (hE]hD]hB]hC]hH]UcolwidthKuh3j hL]h>hubj)r }r (h2Uh@}r (hB]hC]hD]hE]hH]uh3j hL]r h)r }r (h2Uh@}r (hB]hC]hD]hE]hH]uh3j hL]r (h)r }r (h2Uh@}r (hB]hC]hD]hE]hH]uh3j hL]r h)r }r (h2XEVM Namer h3j hhh@}r (hB]hC]hD]hE]hH]uhJKhL]r hUXEVM Namer r }r (h2j h3j ubaubah>hubh)r }r (h2Uh@}r (hB]hC]hD]hE]hH]uh3j hL]r h)r }r (h2XPRU-ICSS Instancesr h3j hhh@}r (hB]hC]hD]hE]hH]uhJKhL]r hUXPRU-ICSS Instancesr r }r (h2j h3j ubaubah>hubh)r }r (h2Uh@}r (hB]hC]hD]hE]hH]uh3j hL]r h)r }r (h2XPRU-ICSS Revisionr h3j hhh@}r (hB]hC]hD]hE]hH]uhJKhL]r hUXPRU-ICSS Revisionr r }r (h2j h3j ubaubah>hubeh>hubah>jubh)r }r (h2Uh@}r (hB]hC]hD]hE]hH]uh3j hL]r h)r }r (h2Uh@}r (hB]hC]hD]hE]hH]uh3j hL]r (h)r }r (h2Uh@}r (hB]hC]hD]hE]hH]uh3j hL]r h)r }r (h2X idkAM437xr h3j hhh@}r (hB]hC]hD]hE]hH]uhJKhL]r hUX idkAM437xr r }r (h2j h3j ubaubah>hubh)r }r (h2Uh@}r (hB]hC]hD]hE]hH]uh3j hL]r h)r }r (h2XICSS0r h3j hhh@}r (hB]hC]hD]hE]hH]uhJKhL]r hUXICSS0r r }r (h2j h3j ubaubah>hubh)r }r (h2Uh@}r (hB]hC]hD]hE]hH]uh3j hL]r h)r }r (h2XREV1r h3j hhh@}r (hB]hC]hD]hE]hH]uhJKhL]r!hUXREV1r!r!}r!(h2j h3j ubaubah>hubeh>hubah>jubeh>j ubaubhx)r!}r!(h2Uh3j hh{h@}r!(hB]hC]hD]hE]hH]uhJKhKhhL]r!h~)r!}r !(h2UhKh3j!hhJh@}r !(hB]hC]hD]hE]hH]uhJKhKhhL]ubaubj)r !}r !(h2XFirmware Design Guider !h7Kh3j hjh@}r!(hE]r!Uid21r!ahD]hB]r!Xfirmware-design-guider!ahC]hH]uhJNhKhhL]r!hUXFirmware Design Guider!r!}r!(h2j !h3j !ubaubh)r!}r!(h2Uh3j hhh@}r!(hB]hC]hD]hE]hH]uhJNhKhhL]r!h)r!}r!(h2Uh@}r!(hE]hD]hB]hC]hH]UcolsKuh3j!hL]r!(h)r!}r !(h2Uh@}r!!(hE]hD]hB]hC]hH]UcolwidthK#uh3j!hL]h>hubh)r"!}r#!(h2Uh@}r$!(hE]hD]hB]hC]hH]UcolwidthKJuh3j!hL]h>hubh)r%!}r&!(h2Uh@}r'!(hB]hC]hD]hE]hH]uh3j!hL]r(!(h)r)!}r*!(h2Uh@}r+!(hB]hC]hD]hE]hH]uh3j%!hL]r,!(h)r-!}r.!(h2Uh@}r/!(hB]hC]hD]hE]hH]uh3j)!hL]r0!h)r1!}r2!(h2X **Document**r3!h3j-!hhh@}r4!(hB]hC]hD]hE]hH]uhJKhL]r5!h)r6!}r7!(h2j3!h@}r8!(hB]hC]hD]hE]hH]uh3j1!hL]r9!hUXDocumentr:!r;!}rhubaubah>hubh)r=!}r>!(h2Uh@}r?!(hB]hC]hD]hE]hH]uh3j)!hL]r@!h)rA!}rB!(h2X **Location**rC!h3j=!hhh@}rD!(hB]hC]hD]hE]hH]uhJKhL]rE!h)rF!}rG!(h2jC!h@}rH!(hB]hC]hD]hE]hH]uh3jA!hL]rI!hUXLocationrJ!rK!}rL!(h2Uh3jF!ubah>hubaubah>hubeh>hubh)rM!}rN!(h2Uh@}rO!(hB]hC]hD]hE]hH]uh3j%!hL]rP!(h)rQ!}rR!(h2Uh@}rS!(hB]hC]hD]hE]hH]uh3jM!hL]rT!h)rU!}rV!(h2XIOLINK FIRMWARE Design GuiderW!h3jQ!hhh@}rX!(hB]hC]hD]hE]hH]uhJKhL]rY!hUXIOLINK FIRMWARE Design GuiderZ!r[!}r\!(h2jW!h3jU!ubaubah>hubh)r]!}r^!(h2Uh@}r_!(hB]hC]hD]hE]hH]uh3jM!hL]r`!h)ra!}rb!(h2X</packages/ti/drv/iolink/docs/IOLINK_FW_DESIGN_GUIDE.pdfrc!h3j]!hhh@}rd!(hB]hC]hD]hE]hH]uhJKhL]re!hUX</packages/ti/drv/iolink/docs/IOLINK_FW_DESIGN_GUIDE.pdfrf!rg!}rh!(h2jc!h3ja!ubaubah>hubeh>hubeh>jubeh>j ubaubh)ri!}rj!(h2X**NOTE: For normal use of IOLINK FW, there is no need to refer to the design guide. This document can be cosulted in case of interest in details of internal firmware operation, or a desire to modify the firmware.**rk!h3j hhh@}rl!(hB]hC]hD]hE]hH]uhJKhKhhL]rm!h)rn!}ro!(h2jk!h@}rp!(hB]hC]hD]hE]hH]uh3ji!hL]rq!hUXNOTE: For normal use of IOLINK FW, there is no need to refer to the design guide. This document can be cosulted in case of interest in details of internal firmware operation, or a desire to modify the firmware.rr!rs!}rt!(h2Uh3jn!ubah>hubaubhx)ru!}rv!(h2Uh3j hh{h@}rw!(hB]hC]hD]hE]hH]uhJKhKhhL]rx!h~)ry!}rz!(h2UhKh3ju!hhJh@}r{!(hB]hC]hD]hE]hH]uhJKhKhhL]ubaubeubeubhh?h@}r|!(hB]r}!X introductionr~!ahC]hD]hE]r!Uid13r!ahH]uhJKhKhhL]r!(hN)r!}r!(h2X Introductionr!h3jhhRh@}r!(hB]hC]hD]hE]hH]uhJKhKhhL]r!hUX Introductionr!r!}r!(h2j!h3j!ubaubhx)r!}r!(h2Uh3jhh{h@}r!(hB]hC]hD]hE]hH]uhJKhKhhL]r!h~)r!}r!(h2XPRU-ICSS IOLINK serves as an example for firmware-based IOLINK Master Frame Handler support. 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