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k2g,k2hk,k2l,k2e,k2l c6657,c6678 omapl137,omapl138rjjj j.jj\j}r(j]j]j]j]j]ujKj]rj%XUAM335x,AM437x,AM571x AM572x,AM574X k2g,k2hk,k2l,k2e,k2l c6657,c6678 omapl137,omapl138rr}r(jjjjubaubajjubj)r}r(jUj}r(j]j]j]j]j]ujjj]rjX)r}r (jX CCS projectr jjj j.jj\j}r (j]j]j]j]j]ujKj]r j%X CCS projectr r}r(jj jjubaubajjubejjubj)r}r(jUj}r(j]j]j]j]j]ujjj]r(j)r}r(jUj}r(j]j]j]j]j]ujjj]rjX)r}r(jX am65xx,j721erjjj j.jj\j}r(j]j]j]j]j]ujKj]rj%X am65xx,j721err}r(jjjjubaubajjubj)r }r!(jUj}r"(j]j]j]j]j]ujjj]r#jX)r$}r%(jXmakefiler&jj j j.jj\j}r'(j]j]j]j]j]ujKj]r(j%Xmakefiler)r*}r+(jj&jj$ubaubajjubejjubj)r,}r-(jUj}r.(j]j]j]j]j]ujjj]r/(j)r0}r1(jUj}r2(j]j]j]j]UmorerowsKj]ujj,j]r3jX)r4}r5(jXUART_SMP_TestApplicationr6jj0j j.jj\j}r7(j]j]j]j]j]ujKj]r8j%XUART_SMP_TestApplicationr9r:}r;(jj6jj4ubaubajjubj)r<}r=(jUj}r>(j]j]j]j]UmorerowsKj]ujj,j]r?jX)r@}rA(jXFUnit Test application to test all APIs in SMP mode *(A15 & A53 cores)*jj<j j.jj\j}rB(j]j]j]j]j]ujKj]rC(j%X3Unit Test application to test all APIs in SMP mode rDrE}rF(jX3Unit Test application to test all APIs in SMP mode jj@ubj<)rG}rH(jX*(A15 & A53 cores)*j}rI(j]j]j]j]j]ujj@j]rJj%X(A15 & A53 cores)rKrL}rM(jUjjGubajjDubeubajjubj)rN}rO(jUj}rP(j]j]j]j]UmorerowsKj]ujj,j]rQjX)rR}rS(jXOUser can enter up to 16 characters using serial console.Application echoes backrTjjNj j.jj\j}rU(j]j]j]j]j]ujKj]rVj%XOUser can enter up to 16 characters using serial console.Application echoes backrWrX}rY(jjTjjRubaubajjubj)rZ}r[(jUj}r\(j]j]j]j]j]ujj,j]r]jX)r^}r_(jX AM572x-EVMr`jjZj j.jj\j}ra(j]j]j]j]j]ujKj]rbj%X AM572x-EVMrcrd}re(jj`jj^ubaubajjubj)rf}rg(jUj}rh(j]j]j]j]j]ujj,j]rijX)rj}rk(jX CCS projectrljjfj j.jj\j}rm(j]j]j]j]j]ujKj]rnj%X CCS projectrorp}rq(jjljjjubaubajjubejjubj)rr}rs(jUj}rt(j]j]j]j]j]ujjj]ru(j)rv}rw(jUj}rx(j]j]j]j]j]ujjrj]ryjX)rz}r{(jX am65xx,j721er|jjvj j.jj\j}r}(j]j]j]j]j]ujKj]r~j%X am65xx,j721err}r(jj|jjzubaubajjubj)r}r(jUj}r(j]j]j]j]j]ujjrj]rjX)r}r(jXmakefilerjjj j.jj\j}r(j]j]j]j]j]ujKj]rj%Xmakefilerr}r(jjjjubaubajjubejjubj)r}r(jUj}r(j]j]j]j]j]ujjj]r(j)r}r(jUj}r(j]j]j]j]UmorerowsKj]ujjj]rjX)r}r(jXUART_SMP_DMATestApplica tionrjjj j.jj\j}r(j]j]j]j]j]ujKj]rj%XUART_SMP_DMATestApplica tionrr}r(jjjjubaubajjubj)r}r(jUj}r(j]j]j]j]UmorerowsKj]ujjj]rjX)r}r(jXFUnit Test application in SMP mode with DMA enabled *(A15 & A53 cores)*jjj j.jj\j}r(j]j]j]j]j]ujKj]r(j%X3Unit Test application in SMP mode with DMA enabled rr}r(jX3Unit Test application in SMP mode with DMA enabled jjubj<)r}r(jX*(A15 & A53 cores)*j}r(j]j]j]j]j]ujjj]rj%X(A15 & A53 cores)rr}r(jUjjubajjDubeubajjubj)r}r(jUj}r(j]j]j]j]UmorerowsKj]ujjj]rjX)r}r(jXOUser can enter up to 16 characters using serial console.Application echoes backrjjj j.jj\j}r(j]j]j]j]j]ujKj]rj%XOUser can enter up to 16 characters using serial console.Application echoes backrr}r(jjjjubaubajjubj)r}r(jUj}r(j]j]j]j]j]ujjj]rjX)r}r(jX AM572x-EVMrjjj j.jj\j}r(j]j]j]j]j]ujKj]rj%X AM572x-EVMrr}r(jjjjubaubajjubj)r}r(jUj}r(j]j]j]j]j]ujjj]rjX)r}r(jX CCS projectrjjj j.jj\j}r(j]j]j]j]j]ujKj]rj%X CCS projectrr}r(jjjjubaubajjubejjubj)r}r(jUj}r(j]j]j]j]j]ujjj]r(j)r}r(jUj}r(j]j]j]j]j]ujjj]rjX)r}r(jX am65xx,j721erjjj j.jj\j}r(j]j]j]j]j]ujKj]rj%X am65xx,j721err}r(jjjjubaubajjubj)r}r(jUj}r(j]j]j]j]j]ujjj]rjX)r}r(jXmakefilerjjj j.jj\j}r(j]j]j]j]j]ujKj]rj%Xmakefilerr}r(jjjjubaubajjubejjubejUtbodyrubejUtgrouprubaubeubeubj)r}r(jUjj j j.jjj}r(j]j]j]j]rUbuilding-uart-examplesraj]rhaujKjhj]r(j)r}r(jXBuilding UART examplesrjjj j.jj"j}r(j]j]j]j]j]ujKjhj]rj%XBuilding UART examplesrr}r(jjjjubaubcdocutils.nodes bullet_list r)r}r(jUjjj j.jU bullet_listrj}r(UbulletrX-j]j]j]j]j]ujKjhj]rcdocutils.nodes list_item r)r }r (jXMMakefile based examples and dependent libraries can be built from the top level or module level UART makefile, refer to the `Processor SDK RTOS Getting Started Guide `__ for details of how to setup the build environment. Once you have setup the build environment, issue the following commands:r jjj j.jU list_itemr j}r (j]j]j]j]j]ujNjhj]rjX)r}r(jj jj j j.jj\j}r(j]j]j]j]j]ujKj]r(j%X|Makefile based examples and dependent libraries can be built from the top level or module level UART makefile, refer to the rr}r(jX|Makefile based examples and dependent libraries can be built from the top level or module level UART makefile, refer to the jjubcdocutils.nodes reference r)r}r(jXT`Processor SDK RTOS Getting Started Guide `__j}r(UnameX(Processor SDK RTOS Getting Started GuideUrefurirX%index_overview.html#setup-environmentj]j]j]j]j]ujjj]rj%X(Processor SDK RTOS Getting Started Guiderr}r(jUjjubajU referencerubj%X} for details of how to setup the build environment. Once you have setup the build environment, issue the following commands:r r!}r"(jX} for details of how to setup the build environment. Once you have setup the build environment, issue the following commands:jjubeubaubaubcdocutils.nodes literal_block r#)r$}r%(jXTo build and clean libs/apps from top-level makefile: cd /packages make uart make uart_clean To build and clean libs/apps from module-level makefile: cd /packages/ti/drv/uart make all make cleanjjj j.jU literal_blockr&j}r'(j2j3j]j]j]j]j]ujMjhj]r(j%XTo build and clean libs/apps from top-level makefile: cd /packages make uart make uart_clean To build and clean libs/apps from module-level makefile: cd /packages/ti/drv/uart make all make cleanr)r*}r+(jUjj$ubaubj)r,}r-(jUjjj j.jjj}r.(jX-j]j]j]j]j]ujMjhj]r/j)r0}r1(jX2RTSC CCS project based examples are built from CCSr2jj,j j.jj j}r3(j]j]j]j]j]ujNjhj]r4jX)r5}r6(jj2jj0j j.jj\j}r7(j]j]j]j]j]ujMj]r8j%X2RTSC CCS project based examples are built from CCSr9r:}r;(jj2jj5ubaubaubaubj#)r<}r=(jXcd /packages ./pdkProjectCreate.sh [soc] [board] [endian] uart [project type] [processor] [SECUREMODE=] Import and build CCS Project from /packages/MyExampleProjects/jjj j.jj&j}r>(j2j3j]j]j]j]j]ujMjhj]r?j%Xcd /packages ./pdkProjectCreate.sh [soc] [board] [endian] uart [project type] [processor] [SECUREMODE=] Import and build CCS Project from /packages/MyExampleProjects/r@rA}rB(jUjj<ubaubeubj)rC}rD(jUjKjj j j.jjj}rE(j]rFXadditional referencesrGaj]j]j]rHUadditional-referencesrIaj]ujM jhj]rJ(j)rK}rL(jXAdditional ReferencesrMjjCj j.jj"j}rN(j]j]j]j]j]ujM jhj]rOj%XAdditional ReferencesrPrQ}rR(jjMjjKubaubj)rS}rT(jUjjCj j.jjj}rU(j]j]j]j]j]ujNjhj]rVj)rW}rX(jUj}rY(j]j]j]j]j]UcolsKujjSj]rZ(j)r[}r\(jUj}r](j]j]j]j]j]UcolwidthKujjWj]jjubj)r^}r_(jUj}r`(j]j]j]j]j]UcolwidthK#ujjWj]jjubj)ra}rb(jUj}rc(j]j]j]j]j]ujjWj]rd(j)re}rf(jUj}rg(j]j]j]j]j]ujjaj]rh(j)ri}rj(jUj}rk(j]j]j]j]j]ujjej]rljX)rm}rn(jX **Document**rojjij j.jj\j}rp(j]j]j]j]j]ujMj]rqj|)rr}rs(jjoj}rt(j]j]j]j]j]ujjmj]ruj%XDocumentrvrw}rx(jUjjrubajjubaubajjubj)ry}rz(jUj}r{(j]j]j]j]j]ujjej]r|jX)r}}r~(jX **Location**rjjyj j.jj\j}r(j]j]j]j]j]ujMj]rj|)r}r(jjj}r(j]j]j]j]j]ujj}j]rj%XLocationrr}r(jUjjubajjubaubajjubejjubj)r}r(jUj}r(j]j]j]j]j]ujjaj]r(j)r}r(jUj}r(j]j]j]j]j]ujjj]rjX)r}r(jXAPI Reference Manualrjjj j.jj\j}r(j]j]j]j]j]ujMj]rj%XAPI Reference Manualrr}r(jjjjubaubajjubj)r}r(jUj}r(j]j]j]j]j]ujjj]rjX)r}r(jXI$(TI_PDK_INSTALL_DIR)/packages/ti /drv/gpio/docs/doxygen/html/index .htmlrjjj j.jj\j}r(j]j]j]j]j]ujMj]rj%XI$(TI_PDK_INSTALL_DIR)/packages/ti /drv/gpio/docs/doxygen/html/index .htmlrr}r(jjjjubaubajjubejjubj)r}r(jUj}r(j]j]j]j]j]ujjaj]r(j)r}r(jUj}r(j]j]j]j]j]ujjj]rjX)r}r(jX Release Notesrjjj j.jj\j}r(j]j]j]j]j]ujMj]rj%X Release Notesrr}r(jjjjubaubajjubj)r}r(jUj}r(j]j]j]j]j]ujjj]rjX)r}r(jXK$(TI_PDK_INSTALL_DIR)/packages/ti /drv/gpio/docs/ReleaseNotes_UART _LLD.pdfrjjj j.jj\j}r(j]j]j]j]j]ujMj]rj%XK$(TI_PDK_INSTALL_DIR)/packages/ti /drv/gpio/docs/ReleaseNotes_UART _LLD.pdfrr}r(jjjjubaubajjubejjubejjubejjubaubcdocutils.nodes line_block r)r}r(jUjjCj j.jU line_blockrj}r(j]j]j]j]j]ujMjhj]rcdocutils.nodes line r)r}r(jUUindentrKjjj j.jjj}r(j]j]j]j]j]ujKjhj]ubaubeubeubj j.jjj}r(j]rXuser interfaceraj]j]j]rUuser-interfaceraj]ujKjhj]r(j)r}r(jXUser Interfacerjjj j.jj"j}r(j]j]j]j]j]ujKjhj]rj%XUser Interfacerr}r(jjjjubaubj)r}r(jUjKjjj j.jjj}r(j]rXdriver configurationraj]j]j]rUdriver-configurationraj]ujK!jhj]r(j)r}r(jXDriver Configurationrjjj j.jj"j}r(j]j]j]j]j]ujK!jhj]rj%XDriver Configurationrr}r(jjjjubaubjb)r}r(jX **Board Specific Configuration**rjKjjj j.jjfj}r(j]rUboard-specific-configurationraj]j]rXboard-specific-configurationraj]j]ujNjhj]rj|)r}r(jjj}r(j]j]j]j]j]ujjj]rj%XBoard Specific Configurationrr}r(jUjjubajjubaubjX)r}r(jXAll board specific configurations eg:enabling clock and pin-mux for UART pins are required before calling any driver APIs.By default Board_Init() API supports all initialization sequence for TI supported EVMs. In addition it initializes UART instance for Console/STDIO.Refer `Processor SDK RTOS Board Support `__ for additional details.Once board specific configuration is complete UART_init() API can be called to initialize driver.jjj j.jj\j}r(j]j]j]j]j]ujK&jhj]r(j%XAll board specific configurations eg:enabling clock and pin-mux for UART pins are required before calling any driver APIs.By default Board_Init() API supports all initialization sequence for TI supported EVMs. In addition it initializes UART instance for Console/STDIO.Refer rr}r(jXAll board specific configurations eg:enabling clock and pin-mux for UART pins are required before calling any driver APIs.By default Board_Init() API supports all initialization sequence for TI supported EVMs. In addition it initializes UART instance for Console/STDIO.Refer jjubj)r}r(jXE`Processor SDK RTOS Board Support `__j}r(UnameX Processor SDK RTOS Board SupportjXindex_board.html#board-supportj]j]j]j]j]ujjj]rj%X Processor SDK RTOS Board Supportrr}r(jUjjubajjubj%Xz for additional details.Once board specific configuration is complete UART_init() API can be called to initialize driver.rr }r (jXz for additional details.Once board specific configuration is complete UART_init() API can be called to initialize driver.jjubeubjb)r }r (jX **UART Configuration Structure**r jjj j.jjfj}r(j]rUuart-configuration-structureraj]j]j]j]rhaujNjhj]rj|)r}r(jj j}r(j]j]j]j]j]ujj j]rj%XUART Configuration Structurerr}r(jUjjubajjubaubjX)r}r(jXThe UART_soc.c file binds driver with hardware attributes on the board through UART_config structure. This structure must be provided to UART driver. It must be initialized before the UART_init() function is called and cannot be changed afterwards. For details about individual fields of this structure, see the Doxygen help by opening PDK_INSTALL_DIR\packages\ti\drv\uart\docs\doxygen\html\index.html.jjj j.jj\j}r(j]j]j]j]j]ujK1jhj]rj%XThe UART_soc.c file binds driver with hardware attributes on the board through UART_config structure. This structure must be provided to UART driver. It must be initialized before the UART_init() function is called and cannot be changed afterwards. For details about individual fields of this structure, see the Doxygen help by opening PDK_INSTALL_DIRpackagestidrvuartdocsdoxygenhtmlindex.html.rr}r (jXThe UART_soc.c file binds driver with hardware attributes on the board through UART_config structure. This structure must be provided to UART driver. It must be initialized before the UART_init() function is called and cannot be changed afterwards. For details about individual fields of this structure, see the Doxygen help by opening PDK_INSTALL_DIR\packages\ti\drv\uart\docs\doxygen\html\index.html.jjubaubeubjeubj j.jjj}r!(j]r"Xapisr#aj]j]j]r$Uapisr%aj]ujK9jhj]r&(j)r'}r((jXAPIsr)jjj j.jj"j}r*(j]j]j]j]j]ujK9jhj]r+j%XAPIsr,r-}r.(jj)jj'ubaubjX)r/}r0(jXAPI reference for application:r1jjj j.jj\j}r2(j]j]j]j]j]ujK;jhj]r3j%XAPI reference for application:r4r5}r6(jj1jj/ubaubj#)r7}r8(jX#include jjj j.jj&j}r9(j2j3j]j]j]j]j]ujMjhj]r:j%X#include r;r<}r=(jUjj7ubaubjX)r>}r?(jX$STDIO API reference for application:r@jjj j.jj\j}rA(j]j]j]j]j]ujKAjhj]rBj%X$STDIO API reference for application:rCrD}rE(jj@jj>ubaubj#)rF}rG(jX##include jjj j.jj&j}rH(j2j3j]j]j]j]j]ujMjhj]rIj%X##include rJrK}rL(jUjjFubaubjb)rM}rN(jX Open UARTrOjjj j.jjfj}rP(j]rQU open-uartrRaj]j]j]j]rSh|aujNjhj]rTj%X Open UARTrUrV}rW(jjOjjMubaubjX)rX}rY(jX-There are three ways to open a UART instance:rZjjj j.jj\j}r[(j]j]j]j]j]ujKJjhj]r\j%X-There are three ways to open a UART instance:r]r^}r_(jjZjjXubaubcdocutils.nodes enumerated_list r`)ra}rb(jUjjj j.jUenumerated_listrcj}rd(UsuffixreU.j]j]j]UprefixrfUj]j]UenumtypergUarabicrhujKLjhj]rij)rj}rk(jX UART_open() jjaj j.jj j}rl(j]j]j]j]j]ujNjhj]rmjX)rn}ro(jX UART_open()rpjjjj j.jj\j}rq(j]j]j]j]j]ujKLj]rrj%X UART_open()rsrt}ru(jjpjjnubaubaubaubj#)rv}rw(jX... Board_init(boardCfg); ... UART_socGetInitCfg(UART_INSTANCE, &uart_cfg); ... UART_socSetInitCfg(UART_INSTANCE, &uart_cfg); ... UART_Params_init(¶ms); ... handle = UART_open(UART_INSTANCE, ¶ms);jjj j.jj&j}rx(j2j3j]j]j]j]j]ujMjhj]ryj%X... Board_init(boardCfg); ... UART_socGetInitCfg(UART_INSTANCE, &uart_cfg); ... UART_socSetInitCfg(UART_INSTANCE, &uart_cfg); ... UART_Params_init(¶ms); ... handle = UART_open(UART_INSTANCE, ¶ms);rzr{}r|(jUjjvubaubjX)r}}r~(jXAt this point UART driver is ready for data transfer on specific instance identified by handle. Application can call UART_read/write API for read/write operationrjjj j.jj\j}r(j]j]j]j]j]ujK[jhj]rj%XAt this point UART driver is ready for data transfer on specific instance identified by handle. Application can call UART_read/write API for read/write operationrr}r(jjjj}ubaubj`)r}r(jUjjj j.jjcj}r(jeU.UstartrKj]j]j]jfUj]j]jgjhujK_jhj]rj)r}r(jX3UART_stdioInit() using the default UART parameters jjj j.jj j}r(j]j]j]j]j]ujNjhj]rjX)r}r(jX2UART_stdioInit() using the default UART parametersrjjj j.jj\j}r(j]j]j]j]j]ujK_j]rj%X2UART_stdioInit() using the default UART parametersrr}r(jjjjubaubaubaubj#)r}r(jX... Board_init(boardCfg); ... UART_socGetInitCfg(UART_INSTANCE, &uart_cfg); ... UART_socSetInitCfg(UART_INSTANCE, &uart_cfg); ... UART_stdioInit(UART_INSTANCE);jjj j.jj&j}r(j2j3j]j]j]j]j]ujM%jhj]rj%X... Board_init(boardCfg); ... UART_socGetInitCfg(UART_INSTANCE, &uart_cfg); ... UART_socSetInitCfg(UART_INSTANCE, &uart_cfg); ... UART_stdioInit(UART_INSTANCE);rr}r(jUjjubaubjX)r}r(jXAt this point UART driver is ready for data transfer on specific instance. Application can call UART_printf/scanFmt API for read/write operationrjjj j.jj\j}r(j]j]j]j]j]ujKljhj]rj%XAt this point UART driver is ready for data transfer on specific instance. Application can call UART_printf/scanFmt API for read/write operationrr}r(jjjjubaubj`)r}r(jUjjj j.jjcj}r(jeU.jKj]j]j]jfUj]j]jgjhujKpjhj]rj)r}r(jX>UART_stdioInit2() using Application specified UART parameters jjj j.jj j}r(j]j]j]j]j]ujNjhj]rjX)r}r(jX=UART_stdioInit2() using Application specified UART parametersrjjj j.jj\j}r(j]j]j]j]j]ujKpj]rj%X=UART_stdioInit2() using Application specified UART parametersrr}r(jjjjubaubaubaubj#)r}r(jX... Board_init(boardCfg); ... UART_socGetInitCfg(UART_INSTANCE, &uart_cfg); ... UART_socSetInitCfg(UART_INSTANCE, &uart_cfg); ... UART_Params_init(¶ms); ... UART_stdioInit2(UART_INSTANCE, ¶ms);jjj j.jj&j}r(j2j3j]j]j]j]j]ujM6jhj]rj%X... Board_init(boardCfg); ... UART_socGetInitCfg(UART_INSTANCE, &uart_cfg); ... UART_socSetInitCfg(UART_INSTANCE, &uart_cfg); ... UART_Params_init(¶ms); ... UART_stdioInit2(UART_INSTANCE, ¶ms);rr}r(jUjjubaubjX)r}r(jXAt this point UART driver is ready for data transfer on specific instance. Application can call UART_printf/scanFmt API for read/write operationrjjj j.jj\j}r(j]j]j]j]j]ujKjhj]rj%XAt this point UART driver is ready for data transfer on specific instance. Application can call UART_printf/scanFmt API for read/write operationrr}r(jjjjubaubjb)r}r(jXRead/Write APIsrjjj j.jjfj}r(j]rUreadwrite-apisraj]j]j]j]rhaujNjhj]rj%XRead/Write APIsrr}r(jjjjubaubjX)r}r(jX**Interrupt**:rjjj j.jj\j}r(j]j]j]j]j]ujKjhj]r(j|)r}r(jX **Interrupt**j}r(j]j]j]j]j]ujjj]rj%X Interruptrr}r(jUjjubajjubj%X:r}r(jX:jjubeubj#)r}r(jXUART_read(handle,scanPrompt, sizeof(scanPrompt));/* Read API */ ... UART_write(handle, bufferPrompt, sizeof(bufferPrompt));/* Write API */ Or UART_transactionInit(&transaction); transaction.buf = (void *)scanPrompt; transaction.count = sizeof(scanPrompt); UART_read2(uart, &transaction); ... UART_transactionInit(&transaction); transaction.buf = (void *)bufferPrompt; transaction.count = sizeof(bufferPrompt); UART_write2(uart, &transaction);jjj j.jj&j}r(j2j3j]j]j]j]j]ujMLjhj]rj%XUART_read(handle,scanPrompt, sizeof(scanPrompt));/* Read API */ ... UART_write(handle, bufferPrompt, sizeof(bufferPrompt));/* Write API */ Or UART_transactionInit(&transaction); transaction.buf = (void *)scanPrompt; transaction.count = sizeof(scanPrompt); UART_read2(uart, &transaction); ... UART_transactionInit(&transaction); transaction.buf = (void *)bufferPrompt; transaction.count = sizeof(bufferPrompt); UART_write2(uart, &transaction);rr}r(jUjjubaubjX)r}r(jX **Polling**:rjjj j.jj\j}r(j]j]j]j]j]ujKjhj]r(j|)r}r(jX **Polling**j}r(j]j]j]j]j]ujjj]rj%XPollingrr}r(jUjjubajjubj%X:r}r(jX:jjubeubj#)r}r(jXUART_readPolling(handle,scanPrompt, sizeof(scanPrompt));/* Read Polling mode API */ ... UART_writePolling(handle, bufferPrompt, sizeof(bufferPrompt));/* Write Polling API */jjj j.jj&j}r(j2j3j]j]j]j]j]ujM`jhj]rj%XUART_readPolling(handle,scanPrompt, sizeof(scanPrompt));/* Read Polling mode API */ ... UART_writePolling(handle, bufferPrompt, sizeof(bufferPrompt));/* Write Polling API */rr}r(jUjjubaubjb)r}r(jX DMA Usage :rjjj j.jjfj}r(j]rU dma-usageraj]j]j]j]rhTaujNjhj]rj%X DMA Usage :rr}r(jjjjubaubjX)r}r(jX<UART driver supports DMA operations to transfer data betweenrjjj j.jj\j}r(j]j]j]j]j]ujKjhj]rj%X<UART driver supports DMA operations to transfer data betweenr r }r (jjjjubaubj)r }r (jUjjj j.jjj}r(jX-j]j]j]j]j]ujKjhj]r(j)r}r(jX$Memory and RX FIFO for read transferrjj j j.jj j}r(j]j]j]j]j]ujNjhj]rjX)r}r(jjjjj j.jj\j}r(j]j]j]j]j]ujKj]rj%X$Memory and RX FIFO for read transferrr}r(jjjjubaubaubj)r}r(jX'Memory and TX FIFO for write transfer. jj j j.jj j}r(j]j]j]j]j]ujNjhj]rjX)r }r!(jX&Memory and TX FIFO for write transfer.r"jjj j.jj\j}r#(j]j]j]j]j]ujKj]r$j%X&Memory and TX FIFO for write transfer.r%r&}r'(jj"jj ubaubaubeubjX)r(}r)(jXDMA Driver is DMA family IP (EDMA and UDMA) and UART IP (V0 and V1) specific. Refer soc/dma/v#/UART_dma.c for these operations. Application need to create DMA handle and update the configuration before UART_init() API.r*jjj j.jj\j}r+(j]j]j]j]j]ujKjhj]r,j%XDMA Driver is DMA family IP (EDMA and UDMA) and UART IP (V0 and V1) specific. Refer soc/dma/v#/UART_dma.c for these operations. Application need to create DMA handle and update the configuration before UART_init() API.r-r.}r/(jj*jj(ubaubj#)r0}r1(jXuartInitCfg[UART_INSTANCE].edmaHandle = UartApp_edmaInit();/* For AM/K1/K2 devices */ or uartInitCfg[UART_INSTANCE].udmaHandle = UartApp_udmaInit();/* For K3 devices */ UART_init();jjj j.jj&j}r2(j2j3j]j]j]j]j]ujMrjhj]r3j%XuartInitCfg[UART_INSTANCE].edmaHandle = UartApp_edmaInit();/* For AM/K1/K2 devices */ or uartInitCfg[UART_INSTANCE].udmaHandle = UartApp_udmaInit();/* For K3 devices */ UART_init();r4r5}r6(jUjj0ubaubjX)r7}r8(jXRefer “UART_BasicExample_[SOC]_[cpu]DMATestproject” or "UART_DMA_[evm]_[cpu]TestApp" for additional reference. Refer SDK Release Note for supported EVMs.r9jjj j.jj\j}r:(j]j]j]j]j]ujKjhj]r;j%XRefer “UART_BasicExample_[SOC]_[cpu]DMATestproject” or "UART_DMA_[evm]_[cpu]TestApp" for additional reference. Refer SDK Release Note for supported EVMs.r<r=}r>(jj9jj7ubaubeubj j.jUsystem_messager?j}r@(j]UlevelKj]j]Usourcej j]j]UlineK UtypeUINFOrAujK_jhj]rBjX)rC}rD(jX:Enumerated list start value not ordinal-1: "2" (ordinal 2)j}rE(j]j]j]j]j]ujjj]rFj%X:Enumerated list start value not ordinal-1: "2" (ordinal 2)rGrH}rI(jUjjCubajj\ubaubh)rJ}rK(jUjjj j.jj?j}rL(j]UlevelKj]j]Usourcej j]j]UlineK UtypejAujKpjhj]rMjX)rN}rO(jX:Enumerated list start value not ordinal-1: "3" (ordinal 3)j}rP(j]j]j]j]j]ujjJj]rQj%X:Enumerated list start value not ordinal-1: "3" (ordinal 3)rRrS}rT(jUjjNubajj\ubaubh)rU}rV(jUjjj j.jj?j}rW(j]UlevelKj]j]Usourcej.j]j]UlineKUtypeUWARNINGrXujKjhj]rYjX)rZ}r[(jX;Bullet list ends without a blank line; unexpected unindent.j}r\(j]j]j]j]j]ujjUj]r]j%X;Bullet list ends without a blank line; unexpected unindent.r^r_}r`(jUjjZubajj\ubaubh)ra}rb(jUjjj j.jj?j}rc(j]UlevelKj]j]Usourcej.j]j]UlineMUtypejXujMjhj]rdjX)re}rf(jX;Bullet list ends without a blank line; unexpected unindent.j}rg(j]j]j]j]j]ujjaj]rhj%X;Bullet list ends without a blank line; unexpected unindent.rirj}rk(jUjjeubajj\ubaubh)rl}rm(jUjj)rn}ro(jUjKjj)rp}rq(jUjhj j jjj}rr(j]j]j]j]rsUusbrtaj]ruhaujKjhj]rv(j)rw}rx(jXUSBryjjpj j jj"j}rz(j]j]j]j]j]ujKjhj]r{j%XUSBr|r}}r~(jjyjjwubaubj))r}r(jX>http://processors.wiki.ti.com/index.php/Processor_SDK_RTOS_USBjjpj j,X<source/rtos/PDK_Platform_Software/Device_Drivers/USB.rst.incrr}rbjj0j}r(j2j3j]j]j]j]j]ujKjhj]rj%X>http://processors.wiki.ti.com/index.php/Processor_SDK_RTOS_USBrr}r(jUjjubaubjnj)r}r(jUjKjjpj jjjj}r(j]rjaj]j]j]rUid3raj]ujKjhj]r(j)r}r(jXUser Interfacerjjj jjj"j}r(j]j]j]j]j]ujKjhj]rj%XUser Interfacerr}r(jjjjubaubj)r}r(jUjKjjj jjjj}r(j]rjaj]j]j]rUid4raj]ujKjhj]r(j)r}r(jXDriver Configurationrjjj jjj"j}r(j]j]j]j]j]ujKjhj]rj%XDriver Configurationrr}r(jjjjubaubj)r}r(jUjjj jjjj}r(jX-j]j]j]j]j]ujKjhj]rj)r}r(jX**Data Structures**: - **tUSBDMSCDevice**: Defined in usbdmsc.h. It is used in USB device mode application. This structure must be filled with the intended vendor and product ID as well as other product information and also the function pointers to functions that handle the disk functions (open/read/write/close, etc.). These product information will show up in the device and interface USB descriptors that are used during device enumeration. This device MSC class data is then assigned to the field usbClassData of the USB_Params bellow. - **USB params**: USB_Params structure is declared in usb_drv.h. This structure must be provided to the USB driver. It must be initialized before the USB_open() function is called. - **USB APIs**: main USB LLD and USB MSC API’s are declared in usb_drv.h and usbdmsc.h and usbhmsc.h provided in the root USB LLD directory. jjj Njj j}r(j]j]j]j]j]ujNjhj]r(jX)r}r(jX**Data Structures**:jjj jjj\j}r(j]j]j]j]j]ujKj]r(j|)r}r(jX**Data Structures**j}r(j]j]j]j]j]ujjj]rj%XData Structuresrr}r(jUjjubajjubj%X:r}r(jX:jjubeubj)r}r(jUj}r(jX-j]j]j]j]j]ujjj]r(j)r}r(jX**tUSBDMSCDevice**: Defined in usbdmsc.h. It is used in USB device mode application. This structure must be filled with the intended vendor and product ID as well as other product information and also the function pointers to functions that handle the disk functions (open/read/write/close, etc.). These product information will show up in the device and interface USB descriptors that are used during device enumeration. This device MSC class data is then assigned to the field usbClassData of the USB_Params bellow.j}r(j]j]j]j]j]ujjj]rjX)r}r(jX**tUSBDMSCDevice**: Defined in usbdmsc.h. It is used in USB device mode application. This structure must be filled with the intended vendor and product ID as well as other product information and also the function pointers to functions that handle the disk functions (open/read/write/close, etc.). These product information will show up in the device and interface USB descriptors that are used during device enumeration. This device MSC class data is then assigned to the field usbClassData of the USB_Params bellow.jjj jjj\j}r(j]j]j]j]j]ujKj]r(j|)r}r(jX**tUSBDMSCDevice**j}r(j]j]j]j]j]ujjj]rj%XtUSBDMSCDevicerr}r(jUjjubajjubj%X: Defined in usbdmsc.h. It is used in USB device mode application. This structure must be filled with the intended vendor and product ID as well as other product information and also the function pointers to functions that handle the disk functions (open/read/write/close, etc.). These product information will show up in the device and interface USB descriptors that are used during device enumeration. This device MSC class data is then assigned to the field usbClassData of the USB_Params bellow.rr}r(jX: Defined in usbdmsc.h. It is used in USB device mode application. This structure must be filled with the intended vendor and product ID as well as other product information and also the function pointers to functions that handle the disk functions (open/read/write/close, etc.). These product information will show up in the device and interface USB descriptors that are used during device enumeration. This device MSC class data is then assigned to the field usbClassData of the USB_Params bellow.jjubeubajj ubj)r}r(jX**USB params**: USB_Params structure is declared in usb_drv.h. This structure must be provided to the USB driver. It must be initialized before the USB_open() function is called.j}r(j]j]j]j]j]ujjj]rjX)r}r(jX**USB params**: USB_Params structure is declared in usb_drv.h. This structure must be provided to the USB driver. It must be initialized before the USB_open() function is called.jjj jjj\j}r(j]j]j]j]j]ujKj]r(j|)r}r(jX**USB params**j}r(j]j]j]j]j]ujjj]rj%X USB paramsrr}r(jUjjubajjubj%X: USB_Params structure is declared in usb_drv.h. This structure must be provided to the USB driver. It must be initialized before the USB_open() function is called.rr}r(jX: USB_Params structure is declared in usb_drv.h. This structure must be provided to the USB driver. It must be initialized before the USB_open() function is called.jjubeubajj ubj)r}r(jX**USB APIs**: main USB LLD and USB MSC API’s are declared in usb_drv.h and usbdmsc.h and usbhmsc.h provided in the root USB LLD directory. j}r(j]j]j]j]j]ujjj]rjX)r}r(jX**USB APIs**: main USB LLD and USB MSC API’s are declared in usb_drv.h and usbdmsc.h and usbhmsc.h provided in the root USB LLD directory.jjj jjj\j}r(j]j]j]j]j]ujKj]r(j|)r}r(jX **USB APIs**j}r(j]j]j]j]j]ujjj]rj%XUSB APIsrr}r(jUjjubajjubj%X: main USB LLD and USB MSC API’s are declared in usb_drv.h and usbdmsc.h and usbhmsc.h provided in the root USB LLD directory.rr}r(jX: main USB LLD and USB MSC API’s are declared in usb_drv.h and usbdmsc.h and usbhmsc.h provided in the root USB LLD directory.jjubeubajj ubejjubeubaubj)r}r(jUjjj jjjj}r(j]j]j]j]j]ujKjhj]rj)r}r(jUjKjjj jjjj}r(j]j]j]j]j]ujKjhj]ubaubj)r}r(jUjjj jjjj}r(jX-j]j]j]j]j]ujKjhj]rj)r}r(jX"**General USB LLD expectations**: jjj jjj j}r(j]j]j]j]j]ujNjhj]rjX)r}r(jX!**General USB LLD expectations**:jjj jjj\j}r(j]j]j]j]j]ujKj]r(j|)r }r (jX **General USB LLD expectations**j}r (j]j]j]j]j]ujjj]r j%XGeneral USB LLD expectationsr r}r(jUjj ubajjubj%X:r}r(jX:jjubeubaubaubjX)r}r(jXThe USB LLD will setup appropriate USB clock and power domains for the particular SOC being in used as part of its “device specific peripheral” functions.rjjj jjj\j}r(j]j]j]j]j]ujKjhj]rj%XThe USB LLD will setup appropriate USB clock and power domains for the particular SOC being in used as part of its “device specific peripheral” functions.rr}r(jjjjubaubjX)r}r(jXAfter the USB_open() is called, the driver expects the application code to sets up USB interrupts with the interrupt handler being the USB LLD provided interrupt handler. Then the application have to call the USB LLD provided API USB_irqConfig() which enables USB module’s interrupts. In device mode, both USB core and USB misc interrupts are used in the USB device MSC application. In host mode, the USB host MSC only uses USB core interrupts.rjjj jjj\j}r(j]j]j]j]j]ujKjhj]rj%XAfter the USB_open() is called, the driver expects the application code to sets up USB interrupts with the interrupt handler being the USB LLD provided interrupt handler. Then the application have to call the USB LLD provided API USB_irqConfig() which enables USB module’s interrupts. In device mode, both USB core and USB misc interrupts are used in the USB device MSC application. In host mode, the USB host MSC only uses USB core interrupts.rr }r!(jjjjubaubjX)r"}r#(jXAfter these steps, application code then can expect to have USB enumeration done and start USB transfer through the provided APIs.r$jjj jjj\j}r%(j]j]j]j]j]ujKjhj]r&j%XAfter these steps, application code then can expect to have USB enumeration done and start USB transfer through the provided APIs.r'r(}r)(jj$jj"ubaubeubj)r*}r+(jUjKjjj jjjj}r,(j]r-X api call flowr.aj]j]j]r/U api-call-flowr0aj]ujKjhj]r1(j)r2}r3(jX API Call Flowr4jj*j jjj"j}r5(j]j]j]j]j]ujKjhj]r6j%X API Call Flowr7r8}r9(jj4jj2ubaubj)r:}r;(jUjj*j jjjj}r<(jX-j]j]j]j]j]ujKjhj]r=j)r>}r?(jX**USB Device MSC** jj:j jjj j}r@(j]j]j]j]j]ujNjhj]rAjX)rB}rC(jX**USB Device MSC**rDjj>j jjj\j}rE(j]j]j]j]j]ujKj]rFj|)rG}rH(jjDj}rI(j]j]j]j]j]ujjBj]rJj%XUSB Device MSCrKrL}rM(jUjjGubajjubaubaubaubjX)rN}rO(jXNThe example application code uses the USB library, configures it as a USB device with MSC function. The example also provides functional codes that access a RAM disk (included from the Utils library in the included Starterware). The LLD calls these MSC back-ends functions to access the RAM disk. User can replace these functions with other functions that access other types of media or devices (MMCSD for example). The RAM disk image provided in the example demo application is not currently formatted. Thus the once enumerated, the PC will require the USB disc to be formatted before use.rPjj*j jjj\j}rQ(j]j]j]j]j]ujKjhj]rRj%XNThe example application code uses the USB library, configures it as a USB device with MSC function. The example also provides functional codes that access a RAM disk (included from the Utils library in the included Starterware). The LLD calls these MSC back-ends functions to access the RAM disk. User can replace these functions with other functions that access other types of media or devices (MMCSD for example). The RAM disk image provided in the example demo application is not currently formatted. Thus the once enumerated, the PC will require the USB disc to be formatted before use.rSrT}rU(jjPjjNubaubjX)rV}rW(jXBelow diagram is the sequence of API calls that starts the USB device MSC application. All USB events are handled internally in the LLD and in the interrupt context.rXjj*j jjj\j}rY(j]j]j]j]j]ujKjhj]rZj%XBelow diagram is the sequence of API calls that starts the USB device MSC application. All USB events are handled internally in the LLD and in the interrupt context.r[r\}r](jjXjjVubaubcdocutils.nodes image r^)r_}r`(jX1.. Image:: ../images/USB_MSC_device_API_flow.PNG jj*j jjUimageraj}rb(UuriX*rtos/../images/USB_MSC_device_API_flow.PNGrcj]j]j]j]U candidatesrd}reU*jcsj]ujKjhj]ubjX)rf}rg(jXUser provided disk functions will be called from the LLD to handle the actual physical disk access. The overview of USB Device MSC example application:rhjj*j jjj\j}ri(j]j]j]j]j]ujKjhj]rjj%XUser provided disk functions will be called from the LLD to handle the actual physical disk access. The overview of USB Device MSC example application:rkrl}rm(jjhjjfubaubj^)rn}ro(jX7.. Image:: ../images/USB_MSC_device_example_blocks.PNG jj*j jjjaj}rp(UuriX0rtos/../images/USB_MSC_device_example_blocks.PNGrqj]j]j]j]jd}rrU*jqsj]ujKjhj]ubjX)rs}rt(jX}The content of the file: usb_msc_structs.c can be replaced with customer USB device information (PID/VID, device names, etc.)rujj*j jjj\j}rv(j]j]j]j]j]ujKjhj]rwj%X}The content of the file: usb_msc_structs.c can be replaced with customer USB device information (PID/VID, device names, etc.)rxry}rz(jjujjsubaubj)r{}r|(jUjj*j jjjj}r}(jX-j]j]j]j]j]ujKjhj]r~j)r}r(jX**USB Host MSC** jj{j jjj j}r(j]j]j]j]j]ujNjhj]rjX)r}r(jX**USB Host MSC**rjjj jjj\j}r(j]j]j]j]j]ujKj]rj|)r}r(jjj}r(j]j]j]j]j]ujjj]rj%X USB Host MSCrr}r(jUjjubajjubaubaubaubjX)r}r(jXThe LLD also provides a USB host MSC example. The USB LLD is acting as a USB host, waiting for a USB thumb drive/memory stick to be plugged in. A console with a simple shell command is also provided so that the demo example can display and manipulate content of the USB device.rjj*j jjj\j}r(j]j]j]j]j]ujKjhj]rj%XThe LLD also provides a USB host MSC example. The USB LLD is acting as a USB host, waiting for a USB thumb drive/memory stick to be plugged in. A console with a simple shell command is also provided so that the demo example can display and manipulate content of the USB device.rr}r(jjjjubaubjX)r}r(jX@The following is how the USB host MSC example demo is organized:rjj*j jjj\j}r(j]j]j]j]j]ujKjhj]rj%X@The following is how the USB host MSC example demo is organized:rr}r(jjjjubaubj^)r}r(jX5.. Image:: ../images/USB_MSC_host_example_blocks.PNG jj*j jjjaj}r(UuriX.rtos/../images/USB_MSC_host_example_blocks.PNGrj]j]j]j]jd}rU*jsj]ujKjhj]ubjX)r}r(jX9The following is the sequence of the APIs that were used:rjj*j jjj\j}r(j]j]j]j]j]ujKjhj]rj%X9The following is the sequence of the APIs that were used:rr}r(jjjjubaubj^)r}r(jX/.. Image:: ../images/USB_MSC_host_API_flow.PNG jj*j jjjaj}r(UuriX(rtos/../images/USB_MSC_host_API_flow.PNGrj]j]j]j]jd}rU*jsj]ujKjhj]ubj)r}r(jUjj*j jjjj}r(j]j]j]j]j]ujKjhj]rj)r}r(jUjKjjj jjjj}r(j]j]j]j]j]ujKjhj]ubaubj)r}r(jUjj*j jjjj}r(jX-j]j]j]j]j]ujKjhj]rj)r}r(jX**USB Device Audio** jjj jjj j}r(j]j]j]j]j]ujNjhj]rjX)r}r(jX**USB Device Audio**rjjj jjj\j}r(j]j]j]j]j]ujKj]rj|)r}r(jjj}r(j]j]j]j]j]ujjj]rj%XUSB Device Audiorr}r(jUjjubajjubaubaubaubjX)r}r(jX(The example application code uses the USB library, configures it as a USB device with Audio class function. USB LLD along with the application enumerates as the USB audio class device and allows accessing the audio ports on the EVM from USB host. It supports audio playback and record operations.rjj*j jjj\j}r(j]j]j]j]j]ujKjhj]rj%X(The example application code uses the USB library, configures it as a USB device with Audio class function. USB LLD along with the application enumerates as the USB audio class device and allows accessing the audio ports on the EVM from USB host. It supports audio playback and record operations.rr}r(jjjjubaubjX)r}r(jXBelow diagram is the sequence of API calls that starts the USB device audio application. All USB events are handled internally in the LLD and in the interrupt context.rjj*j jjj\j}r(j]j]j]j]j]ujKjhj]rj%XBelow diagram is the sequence of API calls that starts the USB device audio application. All USB events are handled internally in the LLD and in the interrupt context.rr}r(jjjjubaubj^)r}r(jX4.. Image:: ../images/USB_Audio_class_flowchart.jpg jj*j jjjaj}r(UuriX,rtos/../images/USB_Audio_class_flowchart.jpgrj]j]j]j]jd}rU*jsj]ujMjhj]ubj)r}r(jUjj*j jjjj}r(j]j]j]j]j]ujMjhj]rj)r}r(jUjKjjj jjjj}r(j]j]j]j]j]ujKjhj]ubaubj)r}r(jUjj*j jjjj}r(jX-j]j]j]j]j]ujMjhj]rj)r}r(jX**USB Device Bulk** jjj jjj j}r(j]j]j]j]j]ujNjhj]rjX)r}r(jX**USB Device Bulk**rjjj jjj\j}r(j]j]j]j]j]ujMj]rj|)r}r(jjj}r(j]j]j]j]j]ujjj]rj%XUSB Device Bulkrr}r(jUjjubajjubaubaubaubjX)r}r(jX]Sequence of API calls as long as what the example application looks like are described bellowrjj*j jjj\j}r(j]j]j]j]j]ujM jhj]rj%X]Sequence of API calls as long as what the example application looks like are described bellowrr}r(jjjjubaubj^)r}r(jXE.. Image:: ../images/usb_device_generic_bulk_example_application.png jj*j jjjaj}r(UuriX>rtos/../images/usb_device_generic_bulk_example_application.pngrj]j]j]j]jd}rU*jsj]ujM jhj]ubj)r }r (jUjj*j jjjj}r (jX-j]j]j]j]j]ujMjhj]r j)r }r(jXoMain APIs that are used to read/write from and to the USB bulk device are USBD_bulkRead() and USBD_bulkWrite().rjj j jjj j}r(j]j]j]j]j]ujNjhj]rjX)r}r(jjjj j jjj\j}r(j]j]j]j]j]ujMj]rj%XoMain APIs that are used to read/write from and to the USB bulk device are USBD_bulkRead() and USBD_bulkWrite().rr}r(jjjjubaubaubaubjX)r}r(jXLThese two functions will block the caller until they finish their operation.rjj*j jjj\j}r(j]j]j]j]j]ujMjhj]rj%XLThese two functions will block the caller until they finish their operation.rr}r (jjjjubaubj)r!}r"(jUjj*j jjjj}r#(jX-j]j]j]j]j]ujMjhj]r$j)r%}r&(jXThe main application should wait for about 500ms after the USB host sends the SetConfig request to make sure that the enumeration is completely finished before calling USBD_bulkRead/Write functions jj!j jjj j}r'(j]j]j]j]j]ujNjhj]r(jX)r)}r*(jXThe main application should wait for about 500ms after the USB host sends the SetConfig request to make sure that the enumeration is completely finished before calling USBD_bulkRead/Write functionsr+jj%j jjj\j}r,(j]j]j]j]j]ujMj]r-j%XThe main application should wait for about 500ms after the USB host sends the SetConfig request to make sure that the enumeration is completely finished before calling USBD_bulkRead/Write functionsr.r/}r0(jj+jj)ubaubaubaubeubeubj)r1}r2(jUjKjjpj jjjj}r3(j]r4jaj]j]j]r5Uid5r6aj]ujMjhj]r7(j)r8}r9(jX Applicationr:jj1j jjj"j}r;(j]j]j]j]j]ujMjhj]r<j%X Applicationr=r>}r?(jj:jj8ubaubj)r@}rA(jUjKjj1j jjjj}rB(j]rCjaj]j]j]rDUid6rEaj]ujMjhj]rF(j)rG}rH(jXExamplesrIjj@j jjj"j}rJ(j]j]j]j]j]ujMjhj]rKj%XExamplesrLrM}rN(jjIjjGubaubjX)rO}rP(jXExamples are CCS projects. Generated with pdkProjectCreate scripts. Please refer `Processor SDK RTOS Getting Started Guide `__ for how to create and build examples projectsjj@j jjj\j}rQ(j]j]j]j]j]ujMjhj]rR(j%XRExamples are CCS projects. Generated with pdkProjectCreate scripts. Please refer rSrT}rU(jXRExamples are CCS projects. Generated with pdkProjectCreate scripts. Please refer jjOubj)rV}rW(jXh`Processor SDK RTOS Getting Started Guide `__j}rX(UnameX(Processor SDK RTOS Getting Started GuidejX9index_overview.html#pdk-example-and-test-project-creationj]j]j]j]j]ujjOj]rYj%X(Processor SDK RTOS Getting Started GuiderZr[}r\(jUjjVubajjubj%X. for how to create and build examples projectsr]r^}r_(jX. for how to create and build examples projectsjjOubeubj)r`}ra(jUjj@j jjjj}rb(j]j]j]j]j]ujNjhj]rcj)rd}re(jUj}rf(j]j]j]j]j]UcolsKujj`j]rg(j)rh}ri(jUj}rj(j]j]j]j]j]UcolwidthKujjdj]jjubj)rk}rl(jUj}rm(j]j]j]j]j]UcolwidthKujjdj]jjubj)rn}ro(jUj}rp(j]j]j]j]j]UcolwidthKujjdj]jjubj)rq}rr(jUj}rs(j]j]j]j]j]ujjdj]rtj)ru}rv(jUj}rw(j]j]j]j]j]ujjqj]rx(j)ry}rz(jUj}r{(j]j]j]j]j]ujjuj]r|jX)r}}r~(jX Example Namerjjyj jjj\j}r(j]j]j]j]j]ujMj]rj%X Example Namerr}r(jjjj}ubaubajjubj)r}r(jUj}r(j]j]j]j]j]ujjuj]rjX)r}r(jXEVM's supportedrjjj jjj\j}r(j]j]j]j]j]ujMj]rj%XEVM's supportedrr}r(jjjjubaubajjubj)r}r(jUj}r(j]j]j]j]j]ujjuj]rjX)r}r(jXNotesrjjj jjj\j}r(j]j]j]j]j]ujM j]rj%XNotesrr}r(jjjjubaubajjubejjubajjubj)r}r(jUj}r(j]j]j]j]j]ujjdj]r(j)r}r(jUj}r(j]j]j]j]j]ujjj]r(j)r}r(jUj}r(j]j]j]j]j]ujjj]rjX)r}r(jX**USB_DevMsc_mmcsd**rjjj jjj\j}r(j]j]j]j]j]ujM"j]rj|)r}r(jjj}r(j]j]j]j]j]ujjj]rj%XUSB_DevMsc_mmcsdrr}r(jUjjubajjubaubajjubj)r}r(jUj}r(j]j]j]j]j]ujjj]rjX)r}r(jX'AM335GP EVM, BeagleBoneBlack, AM572 EVMrjjj jjj\j}r(j]j]j]j]j]ujM"j]rj%X'AM335GP EVM, BeagleBoneBlack, AM572 EVMrr}r(jjjjubaubajjubj)r}r(jUj}r(j]j]j]j]j]ujjj]rjX)r}r(jXeMMC is used on AM572 and BealgeBoneBlack examples This example can be used to format eMMC, just like any other USB storage devicerjjj jjj\j}r(j]j]j]j]j]ujM"j]rj%XeMMC is used on AM572 and BealgeBoneBlack examples This example can be used to format eMMC, just like any other USB storage devicerr}r(jjjjubaubajjubejjubj)r}r(jUj}r(j]j]j]j]j]ujjj]r(j)r}r(jUj}r(j]j]j]j]j]ujjj]rjX)r}r(jX**USB_DevMsc**rjjj jjj\j}r(j]j]j]j]j]ujM*j]rj|)r}r(jjj}r(j]j]j]j]j]ujjj]rj%X USB_DevMscrr}r(jUjjubajjubaubajjubj)r}r(jUj}r(j]j]j]j]j]ujjj]rjX)r}r(jXdAM335GP, AM437xGP, OMAP137EVM, OMAPL138LCDK, AM57xIDK, AM572 EVM, K2G EVM, DRA7xx EVM, AM65x EVM/IDKrjjj jjj\j}r(j]j]j]j]j]ujM*j]rj%XdAM335GP, AM437xGP, OMAP137EVM, OMAPL138LCDK, AM57xIDK, AM572 EVM, K2G EVM, DRA7xx EVM, AM65x EVM/IDKrr}r(jjjjubaubajjubj)r}r(jUj}r(j]j]j]j]j]ujjj]rjX)r}r(jX>OMAPL13 LCDK host and device examples share the same USB port.rjjj jjj\j}r(j]j]j]j]j]ujM*j]rj%X>OMAPL13 LCDK host and device examples share the same USB port.rr}r(jjjjubaubajjubejjubj)r}r(jUj}r(j]j]j]j]j]ujjj]r(j)r}r(jUj}r(j]j]j]j]j]ujjj]r jX)r }r (jX**USB_HostMsc**r jjj jjj\j}r (j]j]j]j]j]ujM2j]r j|)r }r (jj j}r (j]j]j]j]j]ujj j]r j%X USB_HostMscr r }r (jUjj ubajjubaubajjubj)r }r (jUj}r (j]j]j]j]j]ujjj]r jX)r }r (jXYAM335GP, AM437xGP, OMAP136EVM, OMAPL137LCDK, AM57xIDK, K2G EVM, DRA7xx EVM, AM65x EVM/IDKr jj j jjj\j}r (j]j]j]j]j]ujM2j]r j%XYAM335GP, AM437xGP, OMAP136EVM, OMAPL137LCDK, AM57xIDK, K2G EVM, DRA7xx EVM, AM65x EVM/IDKr r }r (jj jj ubaubajjubj)r }r (jUj}r (j]j]j]j]j]ujjj]r (jX)r }r (jXyOMAPL13 LCDK host and device examples share the same USB port. Need OTG cable for EVM with OTG port to work in host mode.r jj j jjj\j}r (j]j]j]j]j]ujM2j]r! j%XyOMAPL13 LCDK host and device examples share the same USB port. Need OTG cable for EVM with OTG port to work in host mode.r" r# }r$ (jj jj ubaubjX)r% }r& (jX"USB3.0 host supported on AM572IDK.r' jj j jjj\j}r( (j]j]j]j]j]ujM9j]r) j%X"USB3.0 host supported on AM572IDK.r* r+ }r, (jj' jj% ubaubejjubejjubj)r- }r. (jUj}r/ (j]j]j]j]j]ujjj]r0 (j)r1 }r2 (jUj}r3 (j]j]j]j]j]ujj- j]r4 jX)r5 }r6 (jX**USB_DevAudio**r7 jj1 j jjj\j}r8 (j]j]j]j]j]ujM<j]r9 j|)r: }r; (jj7 j}r< (j]j]j]j]j]ujj5 j]r= j%X USB_DevAudior> r? }r@ (jUjj: ubajjubaubajjubj)rA }rB (jUj}rC (j]j]j]j]j]ujj- j]rD jX)rE }rF (jX#AM335xGP,OMAPL137 EVM,OMAPL138 LCDKrG jjA j jjj\j}rH (j]j]j]j]j]ujM<j]rI j%X#AM335xGP,OMAPL137 EVM,OMAPL138 LCDKrJ rK }rL (jjG jjE ubaubajjubj)rM }rN (jUj}rO (j]j]j]j]j]ujj- j]rP jX)rQ }rR (jX>Refer to Hardware Setup and How to Run the Demo sections belowrS jjM j jjj\j}rT (j]j]j]j]j]ujM<j]rU j%X>Refer to Hardware Setup and How to Run the Demo sections belowrV rW }rX (jjS jjQ ubaubajjubejjubj)rY }rZ (jUj}r[ (j]j]j]j]j]ujjj]r\ (j)r] }r^ (jUj}r_ (j]j]j]j]j]ujjY j]r` jX)ra }rb (jX**USB_DevBulk**rc jj] j jjj\j}rd (j]j]j]j]j]ujMAj]re j|)rf }rg (jjc j}rh (j]j]j]j]j]ujja j]ri j%X USB_DevBulkrj rk }rl (jUjjf ubajjubaubajjubj)rm }rn (jUj}ro (j]j]j]j]j]ujjY j]rp jX)rq }rr (jXeAM335xGP, AM437xGP, AM572xIDK, AM571xIDK, AM574xIDK, K2GEVM, OMAPL137EVM, OMAP138LCDK, AM654x EVM/IDKrs jjm j jjj\j}rt (j]j]j]j]j]ujMAj]ru j%XeAM335xGP, AM437xGP, AM572xIDK, AM571xIDK, AM574xIDK, K2GEVM, OMAPL137EVM, OMAP138LCDK, AM654x EVM/IDKrv rw }rx (jjs jjq ubaubajjubj)ry }rz (jUj}r{ (j]j]j]j]j]ujjY j]jjubejjubejjubejjubaubeubj)r| }r} (jUjj1j jjjj}r~ (j]j]j]j]r Utest-applicationr aj]r hDaujMMjhj]r (j)r }r (jXTest Applicationr jj| j jjj"j}r (j]j]j]j]j]ujMMjhj]r j%XTest Applicationr r }r (jj jj ubaubjX)r }r (jXUSB test applications are built using makefile. Some of the test application are RTOS/BIOS apps, other are bare metal apps. They are replica of the USB examples but built by makefile instead of CCS projects.r jj| j jjj\j}r (j]j]j]j]j]ujMOjhj]r j%XUSB test applications are built using makefile. Some of the test application are RTOS/BIOS apps, other are bare metal apps. They are replica of the USB examples but built by makefile instead of CCS projects.r r }r (jj jj ubaubjX)r }r (jXRefer to the `Processor SDK RTOS Getting Started Guide `__ for details of how to setup the build environment. Once you have setup the build environment, issue the following commands:jj| j jjj\j}r (j]j]j]j]j]ujMSjhj]r (j%X Refer to the r r }r (jX Refer to the jj ubj)r }r (jXT`Processor SDK RTOS Getting Started Guide `__j}r (UnameX(Processor SDK RTOS Getting Started GuidejX%index_overview.html#setup-environmentj]j]j]j]j]ujj j]r j%X(Processor SDK RTOS Getting Started Guider r }r (jUjj ubajjubj%X} for details of how to setup the build environment. Once you have setup the build environment, issue the following commands:r r }r (jX} for details of how to setup the build environment. Once you have setup the build environment, issue the following commands:jj ubeubcdocutils.nodes block_quote r )r }r (jUjj| j NjU block_quoter j}r (j]j]j]j]j]ujNjhj]r j)r }r (jUj}r (jX-j]j]j]j]j]ujj j]r (j)r }r (jXcd /packages/r j}r (j]j]j]j]j]ujj j]r jX)r }r (jj jj j jjj\j}r (j]j]j]j]j]ujMVj]r j%Xcd /packages/r r }r (jj jj ubaubajj ubj)r }r (jXTo build: make usbr j}r (j]j]j]j]j]ujj j]r jX)r }r (jj jj j jjj\j}r (j]j]j]j]j]ujMWj]r j%XTo build: make usbr r }r (jj jj ubaubajj ubj)r }r (jXTo clean: make usb_cleanr j}r (j]j]j]j]j]ujj j]r jX)r }r (jj jj j jjj\j}r (j]j]j]j]j]ujMXj]r j%XTo clean: make usb_cleanr r }r (jj jj ubaubajj ubj)r }r (jXJTest applications are then under (TI_PDK_INSTALL_DIR)/packages/ti/binary/ j}r (j]j]j]j]j]ujj j]r jX)r }r (jXITest applications are then under (TI_PDK_INSTALL_DIR)/packages/ti/binary/r jj j jjj\j}r (j]j]j]j]j]ujMYj]r j%XITest applications are then under (TI_PDK_INSTALL_DIR)/packages/ti/binary/r r }r (jj jj ubaubajj ubejjubaubj)r }r (jUjj| j jjjj}r (j]j]j]j]j]ujNjhj]r j)r }r (jUj}r (j]j]j]j]j]UcolsKujj j]r (j)r }r (jUj}r (j]j]j]j]j]UcolwidthK#ujj j]jjubj)r }r (jUj}r (j]j]j]j]j]UcolwidthKujj j]jjubj)r }r (jUj}r (j]j]j]j]j]UcolwidthKujj j]jjubj)r }r (jUj}r (j]j]j]j]j]UcolwidthK!ujj j]jjubj)r }r (jUj}r (j]j]j]j]j]ujj j]r j)r }r (jUj}r (j]j]j]j]j]ujj j]r (j)r }r (jUj}r (j]j]j]j]j]ujj j]r jX)r }r (jX Test App Namer jj j jjj\j}r (j]j]j]j]j]ujM\j]r j%X Test App Namer r }r (jj jj ubaubajjubj)r }r (jUj}r (j]j]j]j]j]ujj j]r jX)r }r (jXEVM's supportedr jj j jjj\j}r (j]j]j]j]j]ujM\j]r j%XEVM's supportedr r }r (jj jj ubaubajjubj)r }r (jUj}r (j]j]j]j]j]ujj j]r jX)r }r (jX Bare metalr jj j jjj\j}r (j]j]j]j]j]ujM\j]r j%X Bare metalr r }r (jj jj ubaubajjubj)r }r (jUj}r (j]j]j]j]j]ujj j]r! jX)r" }r# (jXNotesr$ jj j jjj\j}r% (j]j]j]j]j]ujM]j]r& j%XNotesr' r( }r) (jj$ jj" ubaubajjubejjubajjubj)r* }r+ (jUj}r, (j]j]j]j]j]ujj j]r- (j)r. }r/ (jUj}r0 (j]j]j]j]j]ujj* j]r1 (j)r2 }r3 (jUj}r4 (j]j]j]j]j]ujj. j]r5 jX)r6 }r7 (jX **USB_Baremetal_DevMsc_TestApp**r8 jj2 j jjj\j}r9 (j]j]j]j]j]ujM_j]r: j|)r; }r< (jj8 j}r= (j]j]j]j]j]ujj6 j]r> j%XUSB_Baremetal_DevMsc_TestAppr? r@ }rA (jUjj; ubajjubaubajjubj)rB }rC (jUj}rD (j]j]j]j]j]ujj. j]rE jX)rF }rG (jXAM65xx EVM/IDKrH jjB j jjj\j}rI (j]j]j]j]j]ujM_j]rJ j%XAM65xx EVM/IDKrK rL }rM (jjH jjF ubaubajjubj)rN }rO (jUj}rP (j]j]j]j]j]ujj. j]rQ jX)rR }rS (jXyesrT jjN j jjj\j}rU (j]j]j]j]j]ujM_j]rV j%XyesrW rX }rY (jjT jjR ubaubajjubj)rZ }r[ (jUj}r\ (j]j]j]j]j]ujj. j]r] jX)r^ }r_ (jXEquivalent to DevMsc exampler` jjZ j jjj\j}ra (j]j]j]j]j]ujM_j]rb j%XEquivalent to DevMsc examplerc rd }re (jj` jj^ ubaubajjubejjubj)rf }rg (jUj}rh (j]j]j]j]j]ujj* j]ri (j)rj }rk (jUj}rl (j]j]j]j]j]ujjf j]rm jX)rn }ro (jX!**USB_Baremetal_HostMsc_TestApp**rp jjj j jjj\j}rq (j]j]j]j]j]ujMaj]rr j|)rs }rt (jjp j}ru (j]j]j]j]j]ujjn j]rv j%XUSB_Baremetal_HostMsc_TestApprw rx }ry (jUjjs ubajjubaubajjubj)rz }r{ (jUj}r| (j]j]j]j]j]ujjf j]r} jX)r~ }r (jXAM654x EVM/IDKr jjz j jjj\j}r (j]j]j]j]j]ujMaj]r j%XAM654x EVM/IDKr r }r (jj jj~ ubaubajjubj)r }r (jUj}r (j]j]j]j]j]ujjf j]r jX)r }r (jXyesr jj j jjj\j}r (j]j]j]j]j]ujMaj]r j%Xyesr r }r (jj jj ubaubajjubj)r }r (jUj}r (j]j]j]j]j]ujjf j]r jX)r }r (jX Same function as HostMsc exampler jj j jjj\j}r (j]j]j]j]j]ujMaj]r j%X Same function as HostMsc exampler r }r (jj jj ubaubajjubejjubj)r }r (jUj}r (j]j]j]j]j]ujj* j]r (j)r }r (jUj}r (j]j]j]j]j]ujj j]r jX)r }r (jX**USB_HostMsc_TestApp**r jj j jjj\j}r (j]j]j]j]j]ujMcj]r j|)r }r (jj j}r (j]j]j]j]j]ujj j]r j%XUSB_HostMsc_TestAppr r }r (jUjj ubajjubaubajjubj)r }r (jUj}r (j]j]j]j]j]ujj j]r jX)r }r (jXAM654x EVM/IDKr jj j jjj\j}r (j]j]j]j]j]ujMcj]r j%XAM654x EVM/IDKr r }r (jj jj ubaubajjubj)r }r (jUj}r (j]j]j]j]j]ujj j]r jX)r }r (jXnor jj j jjj\j}r (j]j]j]j]j]ujMcj]r j%Xnor r }r (jj jj ubaubajjubj)r }r (jUj}r (j]j]j]j]j]ujj j]r jX)r }r (jXSame as HostMsc exampler jj j jjj\j}r (j]j]j]j]j]ujMcj]r j%XSame as HostMsc exampler r }r (jj jj ubaubajjubejjubj)r }r (jUj}r (j]j]j]j]j]ujj* j]r (j)r }r (jUj}r (j]j]j]j]j]ujj j]r jX)r }r (jX**USB_DevMsc_TestApp**r jj j jjj\j}r (j]j]j]j]j]ujMej]r j|)r }r (jj j}r (j]j]j]j]j]ujj j]r j%XUSB_DevMsc_TestAppr r }r (jUjj ubajjubaubajjubj)r }r (jUj}r (j]j]j]j]j]ujj j]r jX)r }r (jXAM654x EVM/IDKr jj j jjj\j}r (j]j]j]j]j]ujMej]r j%XAM654x EVM/IDKr r }r (jj jj ubaubajjubj)r }r (jUj}r (j]j]j]j]j]ujj j]r jX)r }r (jXnor jj j jjj\j}r (j]j]j]j]j]ujMej]r j%Xnor r }r (jj jj ubaubajjubj)r }r (jUj}r (j]j]j]j]j]ujj j]r jX)r }r (jXSame as DevMsc exampler jj j jjj\j}r (j]j]j]j]j]ujMej]r j%XSame as DevMsc exampler r }r (jj jj ubaubajjubejjubj)r }r (jUj}r (j]j]j]j]j]ujj* j]r (j)r }r (jUj}r (j]j]j]j]j]ujj j]r jX)r }r (jX**USB_DevBulk_TestApp**r jj j jjj\j}r (j]j]j]j]j]ujMgj]r j|)r }r (jj j}r (j]j]j]j]j]ujj j]r j%XUSB_DevBulk_TestAppr r }r! (jUjj ubajjubaubajjubj)r" }r# (jUj}r$ (j]j]j]j]j]ujj j]r% jX)r& }r' (jXAM654x EVM/IDKr( jj" j jjj\j}r) (j]j]j]j]j]ujMgj]r* j%XAM654x EVM/IDKr+ r, }r- (jj( jj& ubaubajjubj)r. }r/ (jUj}r0 (j]j]j]j]j]ujj j]r1 jX)r2 }r3 (jXnor4 jj. j jjj\j}r5 (j]j]j]j]j]ujMgj]r6 j%Xnor7 r8 }r9 (jj4 jj2 ubaubajjubj)r: }r; (jUj}r< (j]j]j]j]j]ujj j]r= jX)r> }r? (jXSame as DevBulk exampler@ jj: j jjj\j}rA (j]j]j]j]j]ujMgj]rB j%XSame as DevBulk examplerC rD }rE (jj@ jj> ubaubajjubejjubj)rF }rG (jUj}rH (j]j]j]j]j]ujj* j]rI (j)rJ }rK (jUj}rL (j]j]j]j]j]ujjF j]rM jX)rN }rO (jX**usb_d_msc_**rP jjJ j jjj\j}rQ (j]j]j]j]j]ujMkj]rR j|)rS }rT (jjP j}rU (j]j]j]j]j]ujjN j]rV j%Xusb_d_msc_rW rX }rY (jUjjS ubajjubaubajjubj)rZ }r[ (jUj}r\ (j]j]j]j]j]ujjF j]r] jX)r^ }r_ (jX-AM335xGP,AM437xEVM OMAPL137 EVM OMAPL138 LCDKr` jjZ j jjj\j}ra (j]j]j]j]j]ujMkj]rb j%X-AM335xGP,AM437xEVM OMAPL137 EVM OMAPL138 LCDKrc rd }re (jj` jj^ ubaubajjubj)rf }rg (jUj}rh (j]j]j]j]j]ujjF j]ri jX)rj }rk (jXyesrl jjf j jjj\j}rm (j]j]j]j]j]ujMlj]rn j%Xyesro rp }rq (jjl jjj ubaubajjubj)rr }rs (jUj}rt (j]j]j]j]j]ujjF j]ru (jX)rv }rw (jXSame as USB DevMsc example.rx jjr j jjj\j}ry (j]j]j]j]j]ujMij]rz j%XSame as USB DevMsc example.r{ r| }r} (jjx jjv ubaubjX)r~ }r (jX7Build by going to example/usb_dev/msc/ build/r jjr j jjj\j}r (j]j]j]j]j]ujMkj]r j%X7Build by going to example/usb_dev/msc/ build/r r }r (jj jj~ ubaubejjubejjubj)r }r (jUj}r (j]j]j]j]j]ujj* j]r (j)r }r (jUj}r (j]j]j]j]j]ujj j]r jX)r }r (jX**usb_h_msc_**r jj j jjj\j}r (j]j]j]j]j]ujMsj]r j|)r }r (jj j}r (j]j]j]j]j]ujj j]r j%Xusb_h_msc_r r }r (jUjj ubajjubaubajjubj)r }r (jUj}r (j]j]j]j]j]ujj j]r jX)r }r (jX-AM335xGP,AM437xEVM OMAPL137 EVM OMAPL138 LCDKr jj j jjj\j}r (j]j]j]j]j]ujMsj]r j%X-AM335xGP,AM437xEVM OMAPL137 EVM OMAPL138 LCDKr r }r (jj jj ubaubajjubj)r }r (jUj}r (j]j]j]j]j]ujj j]r jX)r }r (jXyesr jj j jjj\j}r (j]j]j]j]j]ujMtj]r j%Xyesr r }r (jj jj ubaubajjubj)r }r (jUj}r (j]j]j]j]j]ujj j]r (jX)r }r (jXSame as USB HostMsc exampler jj j jjj\j}r (j]j]j]j]j]ujMqj]r j%XSame as USB HostMsc exampler r }r (jj jj ubaubjX)r }r (jX7Build by going to example/usb_dev/msc/ build/r jj j jjj\j}r (j]j]j]j]j]ujMsj]r j%X7Build by going to example/usb_dev/msc/ build/r r }r (jj jj ubaubejjubejjubejjubejjubaubcdocutils.nodes definition_list r )r }r (jUjj| j jjUdefinition_listr j}r (j]j]j]j]j]ujNjhj]r cdocutils.nodes definition_list_item r )r }r (jXBoth examples and test applications can be loaded and run on their intended EVM via - CCS JTAG connector, or - Via SBL: the "app" file under CCS project's debug directory (/Debug>) is SBL loadable file of the built project. -- Project Memory layout must be considered and following SBL guideline so that examples can run safely via SBL. Please refer to `SBL Component `__ for more detail jj j jjUdefinition_list_itemr j}r (j]j]j]j]j]ujMj]r (cdocutils.nodes term r )r }r (jXSBoth examples and test applications can be loaded and run on their intended EVM viar jj j jjUtermr j}r (j]j]j]j]j]ujMj]r j%XSBoth examples and test applications can be loaded and run on their intended EVM viar r }r (jj jj ubaubcdocutils.nodes definition r )r }r (jUj}r (j]j]j]j]j]ujj j]r (j)r }r (jUj}r (jX-j]j]j]j]j]ujj j]r (j)r }r (jXCCS JTAG connector, orr j}r (j]j]j]j]j]ujj j]r jX)r }r (jj jj j jjj\j}r (j]j]j]j]j]ujM{j]r j%XCCS JTAG connector, orr r }r (jj jj ubaubajj ubj)r }r (jXVia SBL: the "app" file under CCS project's debug directory (/Debug>) is SBL loadable file of the built project.r j}r (j]j]j]j]j]ujj j]r jX)r }r (jj jj j jjj\j}r (j]j]j]j]j]ujM|j]r j%XVia SBL: the "app" file under CCS project's debug directory (/Debug>) is SBL loadable file of the built project.r r }r (jj jj ubaubajj ubejjubjX)r }r (jX-- Project Memory layout must be considered and following SBL guideline so that examples can run safely via SBL. Please refer to `SBL Component `__ for more detailjj j jjj\j}r (j]j]j]j]j]ujM}j]r (j%X-- Project Memory layout must be considered and following SBL guideline so that examples can run safely via SBL. Please refer to r r }r (jX-- Project Memory layout must be considered and following SBL guideline so that examples can run safely via SBL. Please refer to jj ubj)r }r (jX;`SBL Component `__j}r (UnameX SBL ComponentjX'index_Foundational_Components.html#bootj]j]j]j]j]ujj j]r j%X SBL Componentr r }r (jUjj ubajjubj%X for more detailr r }r (jX for more detailjj ubeubejU definitionr ubeubaubeubeubj)r }r (jUjjpj jjjj}r (j]j]j]j]r Ubenchmark-toolr aj]r h aujMjhj]r (j)r }r (jXBenchmark toolr jj j jjj"j}r (j]j]j]j]j]ujMjhj]r j%XBenchmark toolr r }r (jj jj ubaubj)r }r (jUjj j jjjj}r (j]j]j]j]r! U usb-host-mscr" aj]r# hpaujMjhj]r$ (j)r% }r& (jX USB host MSCr' jj j jjj"j}r( (j]j]j]j]j]ujMjhj]r) j%X USB host MSCr* r+ }r, (jj' jj% ubaubj )r- }r. (jUjj j Njj j}r/ (j]j]j]j]j]ujNjhj]r0 j)r1 }r2 (jUj}r3 (jX-j]j]j]j]j]ujj- j]r4 (j)r5 }r6 (jXyTo measure the USB host MSC throughput, a new command (bm) is added into the USB host mode example (or test application).r7 j}r8 (j]j]j]j]j]ujj1 j]r9 jX)r: }r; (jj7 jj5 j jjj\j}r< (j]j]j]j]j]ujMj]r= j%XyTo measure the USB host MSC throughput, a new command (bm) is added into the USB host mode example (or test application).r> r? }r@ (jj7 jj: ubaubajj ubj)rA }rB (jX\This command is to run with a good known fast USB thumb drive attached to the USB host port.rC j}rD (j]j]j]j]j]ujj1 j]rE jX)rF }rG (jjC jjA j jjj\j}rH (j]j]j]j]j]ujMj]rI j%X\This command is to run with a good known fast USB thumb drive attached to the USB host port.rJ rK }rL (jjC jjF ubaubajj ubj)rM }rN (jXwThe throughput measurement result varies greatly depends on which USB device is plugged in and which filesystem is usedrO j}rP (j]j]j]j]j]ujj1 j]rQ jX)rR }rS (jjO jjM j jjj\j}rT (j]j]j]j]j]ujMj]rU j%XwThe throughput measurement result varies greatly depends on which USB device is plugged in and which filesystem is usedrV rW }rX (jjO jjR ubaubajj ubj)rY }rZ (jXThe USB drive needs to be formated as FAT32 (since the USB host example only supports FAT filesystem) and has at least 100MB free space. Fast blank USB thumb drive is recomended.r[ j}r\ (j]j]j]j]j]ujj1 j]r] jX)r^ }r_ (jj[ jjY j jjj\j}r` (j]j]j]j]j]ujMj]ra j%XThe USB drive needs to be formated as FAT32 (since the USB host example only supports FAT filesystem) and has at least 100MB free space. Fast blank USB thumb drive is recomended.rb rc }rd (jj[ jj^ ubaubajj ubj)re }rf (jXThe command, when run, writes a 100MB file into the thumb drive and measures the time it takes to do so. It then reads back this 100MB file with time measurement to find the read throughput.rg j}rh (j]j]j]j]j]ujj1 j]ri jX)rj }rk (jjg jje j jjj\j}rl (j]j]j]j]j]ujMj]rm j%XThe command, when run, writes a 100MB file into the thumb drive and measures the time it takes to do so. It then reads back this 100MB file with time measurement to find the read throughput.rn ro }rp (jjg jjj ubaubajj ubj)rq }rr (jXThe write and read are done in block size of 100KB, 256KB, 1MB, and 5MB. It prints throughput measurements for each of these blocks.rs j}rt (j]j]j]j]j]ujj1 j]ru jX)rv }rw (jjs jjq j jjj\j}rx (j]j]j]j]j]ujMj]ry j%XThe write and read are done in block size of 100KB, 256KB, 1MB, and 5MB. It prints throughput measurements for each of these blocks.rz r{ }r| (jjs jjv ubaubajj ubj)r} }r~ (jX7This command is only supported in AM65xx at the moment.r j}r (j]j]j]j]j]ujj1 j]r jX)r }r (jj jj} j jjj\j}r (j]j]j]j]j]ujMj]r j%X7This command is only supported in AM65xx at the moment.r r }r (jj jj ubaubajj ubj)r }r (jXSyntax: j}r (j]j]j]j]j]ujj1 j]r jX)r }r (jXSyntax:r jj j jjj\j}r (j]j]j]j]j]ujMj]r j%XSyntax:r r }r (jj jj ubaubajj ubejjubaubj#)r }r (jXbm jj j jjj&j}r (j2j3j]j]j]j]j]ujMujhj]r j%Xbm r r }r (jUjj ubaubeubj)r }r (jUjj j jjjj}r (j]j]j]j]r Uusb-device-mscr aj]r haujMjhj]r (j)r }r (jXUSB device MSCr jj j jjj"j}r (j]j]j]j]j]ujMjhj]r j%XUSB device MSCr r }r (jj jj ubaubj )r }r (jUjj j Njj j}r (j]j]j]j]j]ujNjhj]r j)r }r (jUj}r (jX-j]j]j]j]j]ujj j]r (j)r }r (jXTo measure USB device MSC throughtput a simple linux shell script usb_dev_msc_perf.sh is provided in PDK/packages/ti/drv/usb/example/usb_dev/msc/r j}r (j]j]j]j]j]ujj j]r jX)r }r (jj jj j jjj\j}r (j]j]j]j]j]ujMj]r j%XTo measure USB device MSC throughtput a simple linux shell script usb_dev_msc_perf.sh is provided in PDK/packages/ti/drv/usb/example/usb_dev/msc/r r }r (jj jj ubaubajj ubj)r }r (jXThis script assumes the USB Dev MSC drive (PDK-USBDEV) is already mounted on the Linux host PC (under /media/$USER/PDK-USBDEV) when it runsr j}r (j]j]j]j]j]ujj j]r jX)r }r (jj jj j jjj\j}r (j]j]j]j]j]ujMj]r j%XThis script assumes the USB Dev MSC drive (PDK-USBDEV) is already mounted on the Linux host PC (under /media/$USER/PDK-USBDEV) when it runsr r }r (jj jj ubaubajj ubj)r }r (jX,It uses "dd" command to report the thoughputr j}r (j]j]j]j]j]ujj j]r jX)r }r (jj jj j jjj\j}r (j]j]j]j]j]ujMj]r j%X,It uses "dd" command to report the thoughputr r }r (jj jj ubaubajj ubj)r }r (jXTested on Ubuntu 16.04. Different version of Linux might mount the MSC drive at different place. Please adjust the script accordingly.r j}r (j]j]j]j]j]ujj j]r jX)r }r (jj jj j jjj\j}r (j]j]j]j]j]ujMj]r j%XTested on Ubuntu 16.04. Different version of Linux might mount the MSC drive at different place. Please adjust the script accordingly.r r }r (jj jj ubaubajj ubj)r }r (jXThe script writes a file to the PDK-USBDEV drive with a number of blocksize. By default it creates a 15MB test file by writing 150 blocks of 100K each (which would fit inside the 16MB RAM disk provided by the USB Dev MSC.)r j}r (j]j]j]j]j]ujj j]r jX)r }r (jj jj j jjj\j}r (j]j]j]j]j]ujMj]r j%XThe script writes a file to the PDK-USBDEV drive with a number of blocksize. By default it creates a 15MB test file by writing 150 blocks of 100K each (which would fit inside the 16MB RAM disk provided by the USB Dev MSC.)r r }r (jj jj ubaubajj ubj)r }r (jXUser is free to change the block size and number of blocks for the test. However it doens't check if the end result file would fit the PDK-USBDEV drive or not.r j}r (j]j]j]j]j]ujj j]r jX)r }r (jj jj j jjj\j}r (j]j]j]j]j]ujMj]r j%XUser is free to change the block size and number of blocks for the test. However it doens't check if the end result file would fit the PDK-USBDEV drive or not.r r }r (jj jj ubaubajj ubj)r }r (jXSyntax: j}r (j]j]j]j]j]ujj j]r jX)r }r (jXSyntax:r jj j jjj\j}r (j]j]j]j]j]ujMj]r j%XSyntax:r r }r (jj jj ubaubajj ubejjubaubj#)r }r (jX)usb_dev_msc_perf.sh [ ]jj j jjj&j}r (j2j3j]j]j]j]j]ujMjhj]r j%X)usb_dev_msc_perf.sh [ ]r r }r (jUjj ubaubeubeubj)r }r (jUjjpj jjjj}r (j]j]j]j]r Uhardware-setupr aj]r haujMjhj]r (j)r }r (jXHardware Setupr jj j jjj"j}r (j]j]j]j]j]ujMjhj]r j%XHardware Setupr r }r (jj jj ubaubjX)r }r (jXMThis section provides the specific HW setup required to run the USB examples.r jj j jjj\j}r (j]j]j]j]j]ujMjhj]r! j%XMThis section provides the specific HW setup required to run the USB examples.r" r# }r$ (jj jj ubaubj)r% }r& (jUjj j jjjj}r' (j]j]j]j]j]ujMjhj]r( j)r) }r* (jUjKjj% j jjjj}r+ (j]j]j]j]j]ujKjhj]ubaubj)r, }r- (jUjj j jjjj}r. (jX-j]j]j]j]j]ujMjhj]r/ j)r0 }r1 (jX**USB Device Audio** jj, j jjj j}r2 (j]j]j]j]j]ujNjhj]r3 jX)r4 }r5 (jX**USB Device Audio**r6 jj0 j jjj\j}r7 (j]j]j]j]j]ujMj]r8 j|)r9 }r: (jj6 j}r; (j]j]j]j]j]ujj4 j]r< j%XUSB Device Audior= r> }r? (jUjj9 ubajjubaubaubaubjX)r@ }rA (jXUSB audio class demo requires additional setup for running playback and record operations. Below sections provide the setup details for each platform supported.rB jj j jjj\j}rC (j]j]j]j]j]ujMjhj]rD j%XUSB audio class demo requires additional setup for running playback and record operations. Below sections provide the setup details for each platform supported.rE rF }rG (jjB jj@ ubaubj)rH }rI (jUjj j jjjj}rJ (j]j]j]j]j]ujMjhj]rK j)rL }rM (jUjKjjH j jjjj}rN (j]j]j]j]j]ujKjhj]ubaubjX)rO }rP (jX**AM335x GP EVM**rQ jj j jjj\j}rR (j]j]j]j]j]ujMjhj]rS j|)rT }rU (jjQ j}rV (j]j]j]j]j]ujjO j]rW j%X AM335x GP EVMrX rY }rZ (jUjjT ubajjubaubj^)r[ }r\ (jX-.. Image:: ../images/Am335x_usb_ac_setup.jpg jj j jjjaj}r] (UuriX&rtos/../images/Am335x_usb_ac_setup.jpgr^ j]j]j]j]jd}r_ U*j^ sj]ujMjhj]ubjX)r` }ra (jX**OMAPL137 EVM**rb jj j jjj\j}rc (j]j]j]j]j]ujMjhj]rd j|)re }rf (jjb j}rg (j]j]j]j]j]ujj` j]rh j%X OMAPL137 EVMri rj }rk (jUjje ubajjubaubj^)rl }rm (jX... Image:: ../images/Omapl137_usb_ac_setup.jpgrn jj j jjjaj}ro (UuriX(rtos/../images/Omapl137_usb_ac_setup.jpgrp j]j]j]j]jd}rq U*jp sj]ujMjhj]ubjX)rr }rs (jX**OMAPL138 LCDK**rt jj j jjj\j}ru (j]j]j]j]j]ujMjhj]rv j|)rw }rx (jjt j}ry (j]j]j]j]j]ujjr j]rz j%X OMAPL138 LCDKr{ r| }r} (jUjjw ubajjubaubj^)r~ }r (jX/.. Image:: ../images/Omapl138_usb_ac_setup.jpg jj j jjjaj}r (UuriX(rtos/../images/Omapl138_usb_ac_setup.jpgr j]j]j]j]jd}r U*j sj]ujMjhj]ubjX)r }r (jX**How to Run the Demo**r jj j jjj\j}r (j]j]j]j]j]ujMjhj]r j|)r }r (jj j}r (j]j]j]j]j]ujj j]r j%XHow to Run the Demor r }r (jUjj ubajjubaubj)r }r (jUjj j jjjj}r (jX-j]j]j]j]j]ujMjhj]r (j)r }r (jXFollow this link `Processor SDK RTOS Setup CCS `__ to get target configuration setup correctly.jj j jjj j}r (j]j]j]j]j]ujNjhj]r jX)r }r (jXFollow this link `Processor SDK RTOS Setup CCS `__ to get target configuration setup correctly.jj j jjj\j}r (j]j]j]j]j]ujMj]r (j%XFollow this link r r }r (jXFollow this link jj ubj)r }r (jX^`Processor SDK RTOS Setup CCS `__j}r (UnameXProcessor SDK RTOS Setup CCSjX;How_to_Guides.html#setup-ccs-for-evm-and-processor-sdk-rtosj]j]j]j]j]ujj j]r j%XProcessor SDK RTOS Setup CCSr r }r (jUjj ubajjubj%X- to get target configuration setup correctly.r r }r (jX- to get target configuration setup correctly.jj ubeubaubj)r }r (jXzUse CCS to import the USB_DevAudio__ExampleProject under pdk__/packages/MyExampleProjects.jj j jjj j}r (j]j]j]j]j]ujNjhj]r jX)r }r (jXzUse CCS to import the USB_DevAudio__ExampleProject under pdk__/packages/MyExampleProjects.r jj j jjj\j}r (j]j]j]j]j]ujMj]r j%XzUse CCS to import the USB_DevAudio__ExampleProject under pdk__/packages/MyExampleProjects.r r }r (jj jj ubaubaubj)r }r (jXBuild the imported project. the OUT file will be at pdk__/packages/MyExampleProjects/USB_DevAudio__ExampleProject/Debug.jj j jjj j}r (j]j]j]j]j]ujNjhj]r jX)r }r (jXBuild the imported project. the OUT file will be at pdk__/packages/MyExampleProjects/USB_DevAudio__ExampleProject/Debug.r jj j jjj\j}r (j]j]j]j]j]ujMj]r j%XBuild the imported project. the OUT file will be at pdk__/packages/MyExampleProjects/USB_DevAudio__ExampleProject/Debug.r r }r (jj jj ubaubaubj)r }r (jXeMake the HW connections as shown in `Hardware Setup `__ sectionjj j jjj j}r (j]j]j]j]j]ujNjhj]r jX)r }r (jXeMake the HW connections as shown in `Hardware Setup `__ sectionjj j jjj\j}r (j]j]j]j]j]ujMj]r (j%X$Make the HW connections as shown in r r }r (jX$Make the HW connections as shown in jj ubj)r }r (jX9`Hardware Setup `__j}r (UnameXHardware SetupjX$index_device_drv.html#hardware-setupj]j]j]j]j]ujj j]r j%XHardware Setupr r }r (jUjj ubajjubj%X sectionr r }r (jX sectionjj ubeubaubj)r }r (jX9Launch the target configuration for the EVM from CCS 7.x.r jj j jjj j}r (j]j]j]j]j]ujNjhj]r jX)r }r (jj jj j jjj\j}r (j]j]j]j]j]ujMj]r j%X9Launch the target configuration for the EVM from CCS 7.x.r r }r (jj jj ubaubaubj)r }r (jX)Connect to ARM or DSP core as applicable.r jj j jjj j}r (j]j]j]j]j]ujNjhj]r jX)r }r (jj jj j jjj\j}r (j]j]j]j]j]ujMj]r j%X)Connect to ARM or DSP core as applicable.r r }r (jj jj ubaubaubj)r }r (jXLoad the pdk__/packages/MyExampleProjects/USB_DevAudio__ExampleProject/Debug/USB_DevAudio__armExampleProject.out.jj j jjj j}r (j]j]j]j]j]ujNjhj]r jX)r }r (jXLoad the pdk__/packages/MyExampleProjects/USB_DevAudio__ExampleProject/Debug/USB_DevAudio__armExampleProject.out.r jj j jjj\j}r (j]j]j]j]j]ujMj]r j%XLoad the pdk__/packages/MyExampleProjects/USB_DevAudio__ExampleProject/Debug/USB_DevAudio__armExampleProject.out.r r }r (jj jj ubaubaubj)r }r (jX2Run the program (loaded previously) by pressing F8r jj j jjj j}r (j]j]j]j]j]ujNjhj]r jX)r }r (jj jj j jjj\j}r(j]j]j]j]j]ujMj]rj%X2Run the program (loaded previously) by pressing F8rr}r(jj jj ubaubaubj)r}r(jX.The CCS ConsoleIO will display the following: jj j jjj j}r(j]j]j]j]j]ujNjhj]rjX)r }r (jX-The CCS ConsoleIO will display the following:r jjj jjj\j}r (j]j]j]j]j]ujMj]r j%X-The CCS ConsoleIO will display the following:rr}r(jj jj ubaubaubeubj^)r}r(jX,.. Image:: ../images/CCS_console_output.png jj j jjjaj}r(UuriX%rtos/../images/CCS_console_output.pngrj]j]j]j]jd}rU*jsj]ujMjhj]ubj)r}r(jUjj j jjjj}r(jX-j]j]j]j]j]ujMjhj]r(j)r}r(jXmRight click on the "Speaker Icon" on the USB Host (right side of the toolbar), then select "Playback devices"jjj jjj j}r(j]j]j]j]j]ujNjhj]rjX)r}r(jXmRight click on the "Speaker Icon" on the USB Host (right side of the toolbar), then select "Playback devices"r jjj jjj\j}r!(j]j]j]j]j]ujMj]r"j%XmRight click on the "Speaker Icon" on the USB Host (right side of the toolbar), then select "Playback devices"r#r$}r%(jj jjubaubaubj)r&}r'(jXJWait until the "Speakers USB Audio Device" shows up in the "Sound" dialog jjj jjj j}r((j]j]j]j]j]ujNjhj]r)jX)r*}r+(jXIWait until the "Speakers USB Audio Device" shows up in the "Sound" dialogr,jj&j jjj\j}r-(j]j]j]j]j]ujMj]r.j%XIWait until the "Speakers USB Audio Device" shows up in the "Sound" dialogr/r0}r1(jj,jj*ubaubaubeubj^)r2}r3(jX.. Image:: ../images/Sound.png jj j jjjaj}r4(UuriXrtos/../images/Sound.pngr5j]j]j]j]jd}r6U*j5sj]ujMjhj]ubj)r7}r8(jUjj j jjjj}r9(jX-j]j]j]j]j]ujMjhj]r:j)r;}r<(jXXSelect the "Speakers USB Audio Device" in the "Sound" dialog, then click the "Configure"jj7j jjj j}r=(j]j]j]j]j]ujNjhj]r>jX)r?}r@(jXXSelect the "Speakers USB Audio Device" in the "Sound" dialog, then click the "Configure"rAjj;j jjj\j}rB(j]j]j]j]j]ujMj]rCj%XXSelect the "Speakers USB Audio Device" in the "Sound" dialog, then click the "Configure"rDrE}rF(jjAjj?ubaubaubaubj^)rG}rH(jX'.. Image:: ../images/Speaker_setup.png jj j jjjaj}rI(UuriX rtos/../images/Speaker_setup.pngrJj]j]j]j]jd}rKU*jJsj]ujMjhj]ubj)rL}rM(jUjj j jjjj}rN(jX-j]j]j]j]j]ujMjhj]rOj)rP}rQ(jXlClick the "Test" in "Speaker Setup", you should hear the testing tone in the headphone connected to the EVM jjLj jjj j}rR(j]j]j]j]j]ujNjhj]rSjX)rT}rU(jXkClick the "Test" in "Speaker Setup", you should hear the testing tone in the headphone connected to the EVMrVjjPj jjj\j}rW(j]j]j]j]j]ujMj]rXj%XkClick the "Test" in "Speaker Setup", you should hear the testing tone in the headphone connected to the EVMrYrZ}r[(jjVjjTubaubaubaubcdocutils.nodes note r\)r]}r^(jXQ'board' can be evmAM335x, evmOMAPL137 or lcdkOMAPL138 'core' can be arm or c674xjj j jjUnoter_j}r`(j]j]j]j]j]ujNjhj]ra(jX)rb}rc(jX5'board' can be evmAM335x, evmOMAPL137 or lcdkOMAPL138rdjj]j jjj\j}re(j]j]j]j]j]ujMj]rfj%X5'board' can be evmAM335x, evmOMAPL137 or lcdkOMAPL138rgrh}ri(jjdjjbubaubjX)rj}rk(jX'core' can be arm or c674xrljj]j jjj\j}rm(j]j]j]j]j]ujMj]rnj%X'core' can be arm or c674xrorp}rq(jjljjjubaubeubeubeubj jjjj}rr(j]rsj<aj]j]j]rtUid1ruaj]ujKjhj]rv(j)rw}rx(jXOverviewryjjnj jjj"j}rz(j]j]j]j]j]ujKjhj]r{j%XOverviewr|r}}r~(jjyjjwubaubj)r}r(jUjKjjnj jjjj}r(j]rXdriver overviewraj]j]j]rUdriver-overviewraj]ujKjhj]r(j)r}r(jXDriver Overviewrjjj jjj"j}r(j]j]j]j]j]ujKjhj]rj%XDriver Overviewrr}r(jjjjubaubjX)r}r(jXPDK USB driver (USB LLD) provides the following USB class/functions while isolating application from the complexity of low level USB and USB class protocols:rjjj jjj\j}r(j]j]j]j]j]ujK jhj]rj%XPDK USB driver (USB LLD) provides the following USB class/functions while isolating application from the complexity of low level USB and USB class protocols:rr}r(jjjjubaubj)r}r(jUjjj jjjj}r(jX-j]j]j]j]j]ujK jhj]r(j)r}r(jXUSB device Mass Storage Classrjjj jjj j}r(j]j]j]j]j]ujNjhj]rjX)r}r(jjjjj jjj\j}r(j]j]j]j]j]ujK j]rj%XUSB device Mass Storage Classrr}r(jjjjubaubaubj)r}r(jXUSB host Mass Storage Classrjjj jjj j}r(j]j]j]j]j]ujNjhj]rjX)r}r(jjjjj jjj\j}r(j]j]j]j]j]ujKj]rj%XUSB host Mass Storage Classrr}r(jjjjubaubaubj)r}r(jXUSB device Audio Classrjjj jjj j}r(j]j]j]j]j]ujNjhj]rjX)r}r(jjjjj jjj\j}r(j]j]j]j]j]ujKj]rj%XUSB device Audio Classrr}r(jjjjubaubaubj)r}r(jXUSB generic bulk device class jjj jjj j}r(j]j]j]j]j]ujNjhj]rjX)r}r(jXUSB generic bulk device classrjjj jjj\j}r(j]j]j]j]j]ujKj]rj%XUSB generic bulk device classrr}r(jjjjubaubaubeubjX)r}r(jXIn rest of the page AM437x EVM is being refered as an example. Please check Release Notes for list of supported EVMs for driver.rjjj jjj\j}r(j]j]j]j]j]ujKjhj]rj%XIn rest of the page AM437x EVM is being refered as an example. Please check Release Notes for list of supported EVMs for driver.rr}r(jjjjubaubjb)r}r(jXModes of OperationrjKjjj jjjfj}r(j]rUid2raj]j]rjkaj]j]ujNjhj]rj%XModes of Operationrr}r(jjjjubaubj)r}r(jUjjj jjjj}r(jX-j]j]j]j]j]ujKjhj]rj)r}r(jXV**USB device Mass Storage Class** - **USB device Mass Storage Class with RAM DISK** jjj Njj j}r(j]j]j]j]j]ujNjhj]r(jX)r}r(jX!**USB device Mass Storage Class**rjjj jjj\j}r(j]j]j]j]j]ujKj]rj|)r}r(jjj}r(j]j]j]j]j]ujjj]rj%XUSB device Mass Storage Classrr}r(jUjjubajjubaubj)r}r(jUj}r(jX-j]j]j]j]j]ujjj]rj)r}r(jX0**USB device Mass Storage Class with RAM DISK** j}r(j]j]j]j]j]ujjj]rjX)r}r(jX/**USB device Mass Storage Class with RAM DISK**rjjj jjj\j}r(j]j]j]j]j]ujKj]rj|)r}r(jjj}r(j]j]j]j]j]ujjj]rj%X+USB device Mass Storage Class with RAM DISKrr}r(jUjjubajjubaubajj ubajjubeubaubjX)r}r(jXIn this mode, a user-selected USB instance of the EVM will be working in device mode and will behave like a USB thumb drive. It uses part of the EVM DDR memory and exposes it as a physical storage for another USB host application. After the host PC enumerates this EVM-thumb drive, the PC will see a USB storage device. This EVM-thumb drive is not yet formatted with any file system and requires user to format it before use.rjjj jjj\j}r (j]j]j]j]j]ujKjhj]r j%XIn this mode, a user-selected USB instance of the EVM will be working in device mode and will behave like a USB thumb drive. It uses part of the EVM DDR memory and exposes it as a physical storage for another USB host application. After the host PC enumerates this EVM-thumb drive, the PC will see a USB storage device. This EVM-thumb drive is not yet formatted with any file system and requires user to format it before use.r r }r (jjjjubaubj^)r}r(jX(.. Image:: ../images/USB_MSC_device.PNG jjj jjjaj}r(UuriX!rtos/../images/USB_MSC_device.PNGrj]j]j]j]jd}rU*jsj]ujK$jhj]ubjX)r}r(jXThe following screen shots show what one would expect when running the device mode demo application and plugging in a USB cable from the EVM USB port #0 to a PC running Windowsrjjj jjj\j}r(j]j]j]j]j]ujK%jhj]rj%XThe following screen shots show what one would expect when running the device mode demo application and plugging in a USB cable from the EVM USB port #0 to a PC running Windowsrr}r(jjjjubaubjX)r}r(jXPrintout from demo application:rjjj jjj\j}r(j]j]j]j]j]ujK)jhj]rj%XPrintout from demo application:r r!}r"(jjjjubaubj^)r#}r$(jX... Image:: ../images/Device_mode_printout.png jjj jjjaj}r%(UuriX'rtos/../images/Device_mode_printout.pngr&j]j]j]j]jd}r'U*j&sj]ujK,jhj]ubjX)r(}r)(jXThe MSC device is detected in Windows, and a FAT formatted USB drive named "PDK-USBDEV" should be seen in the "Window Explorer". The content of the drive is just a readme.txt file. This USB drive can be manipulated like any other removable USB drive.r*jjj jjj\j}r+(j]j]j]j]j]ujK-jhj]r,j%XThe MSC device is detected in Windows, and a FAT formatted USB drive named "PDK-USBDEV" should be seen in the "Window Explorer". The content of the drive is just a readme.txt file. This USB drive can be manipulated like any other removable USB drive.r-r.}r/(jj*jj(ubaubj^)r0}r1(jX).. Image:: ../images/Windows_pdk_usb.png jjj jjjaj}r2(UuriX"rtos/../images/Windows_pdk_usb.pngr3j]j]j]j]jd}r4U*j3sj]ujK3jhj]ubjX)r5}r6(jX}Windows might show a message saying it should be scanned and fixed. We can just ignore it and just continue without scanning.r7jjj jjj\j}r8(j]j]j]j]j]ujK4jhj]r9j%X}Windows might show a message saying it should be scanned and fixed. We can just ignore it and just continue without scanning.r:r;}r<(jj7jj5ubaubj)r=}r>(jUjjj jjjj}r?(j]j]j]j]j]ujK7jhj]r@j)rA}rB(jUjKjj=j jjjj}rC(j]j]j]j]j]ujKjhj]ubaubj )rD}rE(jUjjj Njj j}rF(j]j]j]j]j]ujNjhj]rGj)rH}rI(jUj}rJ(jX-j]j]j]j]j]ujjDj]rKj)rL}rM(jX2**USB device Mass Storage Class with MMCSD card** j}rN(j]j]j]j]j]ujjHj]rOjX)rP}rQ(jX1**USB device Mass Storage Class with MMCSD card**rRjjLj jjj\j}rS(j]j]j]j]j]ujK9j]rTj|)rU}rV(jjRj}rW(j]j]j]j]j]ujjPj]rXj%X-USB device Mass Storage Class with MMCSD cardrYrZ}r[(jUjjUubajjubaubajj ubajjubaubjX)r\}r](jXThis example acts like a USB - MMCSD card reader. The example exposes the EVM's MMCSD card to the Host PC via USB MSC. The Host PC can manipulate files on the attached MMCSD card on the EVM. This example is currently supported on AM335GP EVM. This is how it looks. Its code is similar to that of the USB device MSC example but with the call back functions calling MMCSD API's instead of RamDisk APIsr^jjj jjj\j}r_(j]j]j]j]j]ujK;jhj]r`j%XThis example acts like a USB - MMCSD card reader. The example exposes the EVM's MMCSD card to the Host PC via USB MSC. The Host PC can manipulate files on the attached MMCSD card on the EVM. This example is currently supported on AM335GP EVM. This is how it looks. Its code is similar to that of the USB device MSC example but with the call back functions calling MMCSD API's instead of RamDisk APIsrarb}rc(jj^jj\ubaubj^)rd}re(jX*.. Image:: ../images/Usb_device_mmcsd.PNG jjj jjjaj}rf(UuriX#rtos/../images/Usb_device_mmcsd.PNGrgj]j]j]j]jd}rhU*jgsj]ujKCjhj]ubj)ri}rj(jUjjj jjjj}rk(j]j]j]j]j]ujKDjhj]rlj)rm}rn(jUjKjjij jjjj}ro(j]j]j]j]j]ujKjhj]ubaubj)rp}rq(jUjjj jjjj}rr(jX-j]j]j]j]j]ujKFjhj]rsj)rt}ru(jX **USB host Mass Storage Class** jjpj jjj j}rv(j]j]j]j]j]ujNjhj]rwjX)rx}ry(jX**USB host Mass Storage Class**rzjjtj jjj\j}r{(j]j]j]j]j]ujKFj]r|j|)r}}r~(jjzj}r(j]j]j]j]j]ujjxj]rj%XUSB host Mass Storage Classrr}r(jUjj}ubajjubaubaubaubjX)r}r(jXuIn this mode, the USB instance will act as a USB host communicating with a USB device that supports Mass Storage Class function (USB thumb drive or a small USB hard drive). The demo example code utilizes a shell interface via the EVM via UART for interaction with the example. The shell provides some basic commands to manipulate the content of the attached USB disk drive.rjjj jjj\j}r(j]j]j]j]j]ujKHjhj]rj%XuIn this mode, the USB instance will act as a USB host communicating with a USB device that supports Mass Storage Class function (USB thumb drive or a small USB hard drive). The demo example code utilizes a shell interface via the EVM via UART for interaction with the example. The shell provides some basic commands to manipulate the content of the attached USB disk drive.rr}r(jjjjubaubj^)r}r(jX&.. Image:: ../images/USB_MSC_host.PNG jjj jjjaj}r(UuriXrtos/../images/USB_MSC_host.PNGrj]j]j]j]jd}rU*jsj]ujKPjhj]ubj)r}r(jUjjj jjjj}r(j]j]j]j]j]ujKQjhj]rj)r}r(jUjKjjj jjjj}r(j]j]j]j]j]ujKjhj]ubaubjX)r}r(jXjScreenshot of a MSC host mode example running in RTOS after plugging in a USB thumb drive into USB port #1rjjj jjj\j}r(j]j]j]j]j]ujKSjhj]rj%XjScreenshot of a MSC host mode example running in RTOS after plugging in a USB thumb drive into USB port #1rr}r(jjjjubaubj^)r}r(jX0.. Image:: ../images/Host_shell_screen_shot.png jjj jjjaj}r(UuriX)rtos/../images/Host_shell_screen_shot.pngrj]j]j]j]jd}rU*jsj]ujKWjhj]ubj)r}r(jUjjj jjjj}r(j]j]j]j]j]ujKXjhj]rj)r}r(jUjKjjj jjjj}r(j]j]j]j]j]ujKjhj]ubaubj)r}r(jUjjj jjjj}r(jX-j]j]j]j]j]ujKZjhj]rj)r}r(jX**USB device Audio Class** jjj jjj j}r(j]j]j]j]j]ujNjhj]rjX)r}r(jX**USB device Audio Class**rjjj jjj\j}r(j]j]j]j]j]ujKZj]rj|)r}r(jjj}r(j]j]j]j]j]ujjj]rj%XUSB device Audio Classrr}r(jUjjubajjubaubaubaubjX)r}r(jXRIn this mode, USB instance of the EVM will be working in device mode and will behave like a USB headset with MIC. It uses audio codec on the EVM for running playback and record initiated by the USB host. McASP module will be used to transfer the data between USB device and audio codec on the board. EVM will appear as a new USB audio device on the host PC. Changing the default audio device on the host PC to EVM USB device will allow the playback and record operations between EVM and USB host. This mode of operation is currently supported on AM335X GP EVM, OMAP-L137 EVM and OMAP-L138 LCDK.rjjj jjj\j}r(j]j]j]j]j]ujK\jhj]rj%XRIn this mode, USB instance of the EVM will be working in device mode and will behave like a USB headset with MIC. It uses audio codec on the EVM for running playback and record initiated by the USB host. McASP module will be used to transfer the data between USB device and audio codec on the board. EVM will appear as a new USB audio device on the host PC. Changing the default audio device on the host PC to EVM USB device will allow the playback and record operations between EVM and USB host. This mode of operation is currently supported on AM335X GP EVM, OMAP-L137 EVM and OMAP-L138 LCDK.rr}r(jjjjubaubj)r}r(jUjjj jjjj}r(j]j]j]j]j]ujKfjhj]rj)r}r(jUjKjjj jjjj}r(j]j]j]j]j]ujKjhj]ubaubj^)r}r(jX*.. Image:: ../images/Am335x_usb_ac_bd.jpg jjj jjjaj}r(UuriX#rtos/../images/Am335x_usb_ac_bd.jpgrj]j]j]j]jd}rU*jsj]ujKhjhj]ubj)r}r(jUjjj jjjj}r(j]j]j]j]j]ujKijhj]rj)r}r(jUjKjjj jjjj}r(j]j]j]j]j]ujKjhj]ubaubj)r}r(jUjjj jjjj}r(jX-j]j]j]j]j]ujKkjhj]rj)r}r(jX"**USB generic bulk device class** jjj jjj j}r(j]j]j]j]j]ujNjhj]rjX)r}r(jX!**USB generic bulk device class**rjjj jjj\j}r(j]j]j]j]j]ujKkj]rj|)r}r(jjj}r(j]j]j]j]j]ujjj]rj%XUSB generic bulk device classrr}r(jUjjubajjubaubaubaubjX)r}r(jX7In this mode, a user-selected USB instance of the EVM will be working in device mode. The mentioned USB device will show up in the host PC as a generic USB bulk device with one single interface containing a bulk IN and a bulk OUT endpoints. The configuration and interface descriptors published by the device contain vendor-specific class identifiers, so an application on the host will have to communicate with the device using either a custom driver or a subsystem such as WinUSB or libusb-win32 on Windows (or just libusb on Linux) to read and write to the device.rjjj jjj\j}r(j]j]j]j]j]ujKmjhj]rj%X7In this mode, a user-selected USB instance of the EVM will be working in device mode. The mentioned USB device will show up in the host PC as a generic USB bulk device with one single interface containing a bulk IN and a bulk OUT endpoints. The configuration and interface descriptors published by the device contain vendor-specific class identifiers, so an application on the host will have to communicate with the device using either a custom driver or a subsystem such as WinUSB or libusb-win32 on Windows (or just libusb on Linux) to read and write to the device.rr}r(jjjjubaubj )r}r(jUjjj Njj j}r(j]j]j]j]j]ujNjhj]rj)r}r(jUj}r(jX-j]j]j]j]j]ujjj]rj)r}r(jX-**Running USB bulk device demo application** j}r(j]j]j]j]j]ujjj]rjX)r}r(jX,**Running USB bulk device demo application**rjjj jjj\j}r(j]j]j]j]j]ujKwj]rj|)r}r (jjj}r (j]j]j]j]j]ujjj]r j%X(Running USB bulk device demo applicationr r }r(jUjjubajjubaubajj ubajjubaubjX)r}r(jXThe bulk demo application requires a host PC with USB host plugged to the USB device port on the EVM. Depending on the platform, the USB device port might be USB port #0 or #1.rjjj jjj\j}r(j]j]j]j]j]ujKyjhj]rj%XThe bulk demo application requires a host PC with USB host plugged to the USB device port on the EVM. Depending on the platform, the USB device port might be USB port #0 or #1.rr}r(jjjjubaubj^)r}r(jX(.. Image:: ../images/USB_MSC_device.PNG jjj jjjaj}r(UuriX!rtos/../images/USB_MSC_device.PNGrj]j]j]j]jd}rU*jsj]ujK~jhj]ubjX)r}r(jXPlease refer to PDK user guide for how to generate USB example projects. Once the demo application is loaded and run, the EVM UART console shows the following:rjjj jjj\j}r(j]j]j]j]j]ujKjhj]r j%XPlease refer to PDK user guide for how to generate USB example projects. Once the demo application is loaded and run, the EVM UART console shows the following:r!r"}r#(jjjjubaubj^)r$}r%(jX... Image:: ../images/usb_dev_bulk_console.png jjj jjjaj}r&(UuriX'rtos/../images/usb_dev_bulk_console.pngr'j]j]j]j]jd}r(U*j'sj]ujKjhj]ubjX)r)}r*(jXtA Python host PC example application is provided in ti/drv/usb/example/usb_dev/bulk/usb_dev_bulk_host_application.pyr+jjj jjj\j}r,(j]j]j]j]j]ujKjhj]r-j%XtA Python host PC example application is provided in ti/drv/usb/example/usb_dev/bulk/usb_dev_bulk_host_application.pyr.r/}r0(jj+jj)ubaubj)r1}r2(jUjjj jjjj}r3(j]j]j]j]j]ujKjhj]r4j)r5}r6(jUjKjj1j jjjj}r7(j]j]j]j]j]ujKjhj]ubaubjX)r8}r9(jXpThe example Python script requires PyUSB to run. On Linux host, proper UDEV rule is also required in order to access the USB bulk device as non-sudo user. The script itself also lists the requirements to run it as well as what command options available. The example UDEV rule is also placed in the same place where the Python script is located. It does the following:r:jjj jjj\j}r;(j]j]j]j]j]ujKjhj]r<j%XpThe example Python script requires PyUSB to run. On Linux host, proper UDEV rule is also required in order to access the USB bulk device as non-sudo user. The script itself also lists the requirements to run it as well as what command options available. The example UDEV rule is also placed in the same place where the Python script is located. It does the following:r=r>}r?(jj:jj8ubaubj)r@}rA(jUjjj jjjj}rB(jX-j]j]j]j]j]ujKjhj]rC(j)rD}rE(jXDThe Python script looks for the USB device with the example PID:VID,rFjj@j jjj j}rG(j]j]j]j]j]ujNjhj]rHjX)rI}rJ(jjFjjDj jjj\j}rK(j]j]j]j]j]ujKj]rLj%XDThe Python script looks for the USB device with the example PID:VID,rMrN}rO(jjFjjIubaubaubj)rP}rQ(jXNSends an ASCII text string to the USB bulk demo application running on the EVMrRjj@j jjj j}rS(j]j]j]j]j]ujNjhj]rTjX)rU}rV(jjRjjPj jjj\j}rW(j]j]j]j]j]ujKj]rXj%XNSends an ASCII text string to the USB bulk demo application running on the EVMrYrZ}r[(jjRjjUubaubaubj)r\}r](jXNExpects the same text string with reversed case letter returned back, and alsor^jj@j jjj j}r_(j]j]j]j]j]ujNjhj]r`jX)ra}rb(jj^jj\j jjj\j}rc(j]j]j]j]j]ujKj]rdj%XNExpects the same text string with reversed case letter returned back, and alsorerf}rg(jj^jjaubaubaubj)rh}ri(jXVVerifies the received data with the data that it has sent and report the test result. jj@j jjj j}rj(j]j]j]j]j]ujNjhj]rkjX)rl}rm(jXUVerifies the received data with the data that it has sent and report the test result.rnjjhj jjj\j}ro(j]j]j]j]j]ujKj]rpj%XUVerifies the received data with the data that it has sent and report the test result.rqrr}rs(jjnjjlubaubaubeubjX)rt}ru(jX4A screen shot of what the Python test script outputsrvjjj jjj\j}rw(j]j]j]j]j]ujKjhj]rxj%X4A screen shot of what the Python test script outputsryrz}r{(jjvjjtubaubj^)r|}r}(jX7.. Image:: ../images/usb_dev_bulk_host_tool_output.png jjj jjjaj}r~(UuriX0rtos/../images/usb_dev_bulk_host_tool_output.pngrj]j]j]j]jd}rU*jsj]ujKjhj]ubjX)r}r(jXiThe USB bulk demo application configures the USB endpoints as high speed endpoints with 512B packet size.rjjj jjj\j}r(j]j]j]j]j]ujKjhj]rj%XiThe USB bulk demo application configures the USB endpoints as high speed endpoints with 512B packet size.rr}r(jjjjubaubj)r}r(jUjjj jjjj}r(j]j]j]j]j]ujKjhj]r(j)r}r(jUjKjjj jjjj}r(j]j]j]j]j]ujKjhj]ubj)r}r(jUjKjjj jjjj}r(j]j]j]j]j]ujKjhj]ubeubeubeubj jjj?j}r(j]UlevelKj]j]rjuaUsourcejj]j]UlineKUtypejAujKjhj]rjX)r}r(jX+Duplicate implicit target name: "overview".j}r(j]j]j]j]j]ujjlj]rj%X+Duplicate implicit target name: "overview".rr}r(jUjjubajj\ubaubh)r}r(jUj}r(j]UlevelKj]j]rjaUsourcej j]j]UlineKUtypejXujjj]rjX)r}r(jX5Duplicate explicit target name: "modes-of-operation".j}r(j]j]j]j]j]ujjj]rj%X5Duplicate explicit target name: "modes-of-operation".rr}r(jUjjubajj\ubajj?ubh)r}r(jUjjj jjj?j}r(j]UlevelKj]j]Usourcejj]j]UlineKgUtypejXujKfjhj]rjX)r}r(jX%Line block ends without a blank line.j}r(j]j]j]j]j]ujjj]rj%X%Line block ends without a blank line.rr}r(jUjjubajj\ubaubh)r}r(jUjjj jjj?j}r(j]UlevelKj]j]rjaUsourcejj]j]UlineKUtypejAujKjhj]rjX)r}r(jX1Duplicate implicit target name: "user interface".j}r(j]j]j]j]j]ujjj]rj%X1Duplicate implicit target name: "user interface".rr}r(jUjjubajj\ubaubh)r}r(jUjjj jjj?j}r(j]UlevelKj]j]rjaUsourcejj]j]UlineKUtypejAujKjhj]rjX)r}r(jX7Duplicate implicit target name: "driver configuration".j}r(j]j]j]j]j]ujjj]rj%X7Duplicate implicit target name: "driver configuration".rr}r(jUjjubajj\ubaubh)r}r(jUjj*j jjj?j}r(j]UlevelKj]j]Usourcejj]j]UlineMUtypejXujMjhj]rjX)r}r(jX;Bullet list ends without a blank line; unexpected unindent.j}r(j]j]j]j]j]ujjj]rj%X;Bullet list ends without a blank line; unexpected unindent.rr}r(jUjjubajj\ubaubh)r}r(jUjj1j jjj?j}r(j]UlevelKj]j]rj6aUsourcejj]j]UlineMUtypejAujMjhj]rjX)r}r(jX.Duplicate implicit target name: "application".j}r(j]j]j]j]j]ujjj]rj%X.Duplicate implicit target name: "application".rr}r(jUjjubajj\ubaubh)r}r(jUjj@j jjj?j}r(j]UlevelKj]j]rjEaUsourcejj]j]UlineMUtypejAujMjhj]rjX)r}r(jX+Duplicate implicit target name: "examples".j}r(j]j]j]j]j]ujjj]rj%X+Duplicate implicit target name: "examples".rr}r(jUjjubajj\ubaubh)r}r(jUjj| j jjj?j}r(j]UlevelKj]j]Usourcejj]j]UlineMVUtypeUERRORrujMUjhj]rjX)r}r(jXUnexpected indentation.j}r(j]j]j]j]j]ujjj]rj%XUnexpected indentation.rr}r(jUjjubajj\ubaubh)r}r(jUj}r(j]UlevelKj]j]Usourcejj]j]UlineM}UtypejXujj j]rjX)r}r(jX;Bullet list ends without a blank line; unexpected unindent.j}r(j]j]j]j]j]ujjj]rj%X;Bullet list ends without a blank line; unexpected unindent.rr}r(jUjjubajj\ubajj?ubh)r}r(jUjj j jjj?j}r(j]UlevelKj]j]Usourcejj]j]UlineMUtypejXujMjhj]r jX)r }r (jX?Explicit markup ends without a blank line; unexpected unindent.j}r (j]j]j]j]j]ujjj]r j%X?Explicit markup ends without a blank line; unexpected unindent.rr}r(jUjj ubajj\ubaubh)r}r(jUjj j jjj?j}r(j]UlevelKj]j]Usourcejj]j]UlineMUtypejXujMjhj]rjX)r}r(jX;Bullet list ends without a blank line; unexpected unindent.j}r(j]j]j]j]j]ujjj]rj%X;Bullet list ends without a blank line; unexpected unindent.rr}r(jUjjubajj\ubaubh)r}r(jUjj)r}r(jUjKjj)r }r!(jUjhj j jjj}r"(j]j]j]j]r#Upcier$aj]r%hvaujKjhj]r&(j)r'}r((jXPCIer)jj j j jj"j}r*(j]j]j]j]j]ujKjhj]r+j%XPCIer,r-}r.(jj)jj'ubaubj))r/}r0(jX?http://processors.wiki.ti.com/index.php/Processor_SDK_RTOS_PCIejj j j,X=source/rtos/PDK_Platform_Software/Device_Drivers/PCIe.rst.incr1r2}r3bjj0j}r4(j2j3j]j]j]j]j]ujKjhj]r5j%X?http://processors.wiki.ti.com/index.php/Processor_SDK_RTOS_PCIer6r7}r8(jUjj/ubaubjj)r9}r:(jUjKjj j j2jjj}r;(j]r<Xuser interfacer=aj]j]j]r>Uid9r?aj]ujKJjhj]r@(j)rA}rB(jXUser InterfacerCjj9j j2jj"j}rD(j]j]j]j]j]ujKJjhj]rEj%XUser InterfacerFrG}rH(jjCjjAubaubj)rI}rJ(jUjKjj9j j2jjj}rK(j]rLXdriver configurationrMaj]j]j]rNUid10rOaj]ujKMjhj]rP(j)rQ}rR(jXDriver ConfigurationrSjjIj j2jj"j}rT(j]j]j]j]j]ujKMjhj]rUj%XDriver ConfigurationrVrW}rX(jjSjjQubaubjb)rY}rZ(jXBoard-specific configurationr[jKjjIj j2jjfj}r\(j]r]Uid11r^aj]j]r_jaj]j]ujNjhj]r`j%XBoard-specific configurationrarb}rc(jj[jjYubaubjX)rd}re(jXPCIe's board specific configuration is in the example in PDK_INSTALL_DIR/packages/ti/drv/pcie/example/sample/am57x/src/pcie_sample_board.c. Calling sequence is in example and repeated below.rfjjIj j2jj\j}rg(j]j]j]j]j]ujKRjhj]rhj%XPCIe's board specific configuration is in the example in PDK_INSTALL_DIR/packages/ti/drv/pcie/example/sample/am57x/src/pcie_sample_board.c. Calling sequence is in example and repeated below.rirj}rk(jjfjjdubaubjb)rl}rm(jXPCIe configuration structurernjjIj j2jjfj}ro(j]rpUpcie-configuration-structurerqaj]j]j]j]rrhaujNjhj]rsj%XPCIe configuration structurertru}rv(jjnjjlubaubjX)rw}rx(jXwThe pcie_soc.c binds the driver to the hardware on the board. It is passed into the driver via the call to Pcie_init().ryjjIj j2jj\j}rz(j]j]j]j]j]ujKYjhj]r{j%XwThe pcie_soc.c binds the driver to the hardware on the board. It is passed into the driver via the call to Pcie_init().r|r}}r~(jjyjjwubaubeubj)r}r(jUjKjj9j j2jjj}r(j]rj.aj]j]j]rUid12raj]ujK]jhj]r(j)r}r(jX API Call Flowrjjj j2jj"j}r(j]j]j]j]j]ujK]jhj]rj%X API Call Flowrr}r(jjjjubaubjX)r}r(jX.The API call flow is covered in pcie_sample.c.rjjj j2jj\j}r(j]j]j]j]j]ujK_jhj]rj%X.The API call flow is covered in pcie_sample.c.rr}r(jjjjubaubjX)r}r(jXThe overall components are:rjjj j2jj\j}r(j]j]j]j]j]ujKajhj]rj%XThe overall components are:rr}r(jjjjubaubj`)r}r(jUjjj j2jjcj}r(jeU.j]j]j]jfUj]j]jgjhujKcjhj]r(j)r}r(jXInitialize the driverrjjj j2jj j}r(j]j]j]j]j]ujNjhj]rjX)r}r(jjjjj j2jj\j}r(j]j]j]j]j]ujKcj]rj%XInitialize the driverrr}r(jjjjubaubaubj)r}r(jX[Initialize the SERDES and Power the peripheral (see example code for order for each device)jjj j2jj j}r(j]j]j]j]j]ujNjhj]rjX)r}r(jX[Initialize the SERDES and Power the peripheral (see example code for order for each device)rjjj j2jj\j}r(j]j]j]j]j]ujKdj]rj%X[Initialize the SERDES and Power the peripheral (see example code for order for each device)rr}r(jjjjubaubaubj)r}r(jXBConfigure RC or EP symmetrically to talk to another similar devicerjjj j2jj j}r(j]j]j]j]j]ujNjhj]rjX)r}r(jjjjj j2jj\j}r(j]j]j]j]j]ujKfj]rj%XBConfigure RC or EP symmetrically to talk to another similar devicerr}r(jjjjubaubaubj)r}r(jXPerform data IO and interrupt. jjj j2jj j}r(j]j]j]j]j]ujNjhj]rjX)r}r(jXPerform data IO and interrupt.rjjj j2jj\j}r(j]j]j]j]j]ujKgj]rj%XPerform data IO and interrupt.rr}r(jjjjubaubaubeubeubeubj)r}r(jUjKjj j j2jjj}r(j]rX applicationraj]j]j]rUid13raj]ujKjjhj]r(j)r}r(jX Applicationrjjj j2jj"j}r(j]j]j]j]j]ujKjjhj]rj%X Applicationrr}r(jjjjubaubj)r}r(jUjKjjj j2jjj}r(j]rXexamplesraj]j]j]rUid14raj]ujKmjhj]r(j)r}r(jXExamplesrjjj j2jj"j}r(j]j]j]j]j]ujKmjhj]rj%XExamplesrr}r(jjjjubaubj)r}r(jUjjj j2jjj}r(j]j]j]j]j]ujNjhj]rj)r}r(jUj}r(j]j]j]j]j]UcolsKujjj]r(j)r}r(jUj}r(j]j]j]j]j]UcolwidthKujjj]jjubj)r}r(jUj}r(j]j]j]j]j]UcolwidthKujjj]jjubj)r}r(jUj}r(j]j]j]j]j]UcolwidthKujjj]jjubj)r}r(jUj}r(j]j]j]j]j]UcolwidthKujjj]jjubj)r}r(jUj}r(j]j]j]j]j]ujjj]r j)r }r (jUj}r (j]j]j]j]j]ujjj]r (j)r}r(jUj}r(j]j]j]j]j]ujj j]rjX)r}r(jXNamerjjj j2jj\j}r(j]j]j]j]j]ujKpj]rj%XNamerr}r(jjjjubaubajjubj)r}r(jUj}r(j]j]j]j]j]ujj j]rjX)r}r(jX Descriptionr jjj j2jj\j}r!(j]j]j]j]j]ujKpj]r"j%X Descriptionr#r$}r%(jj jjubaubajjubj)r&}r'(jUj}r((j]j]j]j]j]ujj j]r)jX)r*}r+(jXEVM Configurationr,jj&j j2jj\j}r-(j]j]j]j]j]ujKpj]r.j%XEVM Configurationr/r0}r1(jj,jj*ubaubajjubj)r2}r3(jUj}r4(j]j]j]j]j]ujj j]r5jX)r6}r7(jXExpected Resultsr8jj2j j2jj\j}r9(j]j]j]j]j]ujKpj]r:j%XExpected Resultsr;r<}r=(jj8jj6ubaubajjubejjubajjubj)r>}r?(jUj}r@(j]j]j]j]j]ujjj]rA(j)rB}rC(jUj}rD(j]j]j]j]j]ujj>j]rE(j)rF}rG(jUj}rH(j]j]j]j]j]ujjBj]rIjX)rJ}rK(jX%PCIE_idkAM57[1\ 24]x*ExamplePr\ ojectjjFj j2jj\j}rL(j]j]j]j]j]ujKsj]rMj%X!PCIE_idkAM57[124]x*ExampleProjectrNrO}rP(jX%PCIE_idkAM57[1\ 24]x*ExamplePr\ ojectjjJubaubajjubj)rQ}rR(jUj}rS(j]j]j]j]j]ujjBj]rTjX)rU}rV(jX2-device PCIe connectionrWjjQj j2jj\j}rX(j]j]j]j]j]ujKsj]rYj%X2-device PCIe connectionrZr[}r\(jjWjjUubaubajjubj)r]}r^(jUj}r_(j]j]j]j]j]ujjBj]r`(jX)ra}rb(jXa**IMPORTANT:** Cable must be `MODIFIED`_ in order to avoid damaging the clock drivers in the SoC!jj]j j2jj\j}rc(j]j]j]j]j]ujKsj]rd(j|)re}rf(jX**IMPORTANT:**j}rg(j]j]j]j]j]ujjaj]rhj%X IMPORTANT:rirj}rk(jUjjeubajjubj%X Cable must be rlrm}rn(jX Cable must be jjaubj)ro}rp(jX `MODIFIED`_UresolvedrqKjjajjj}rr(UnameXMODIFIEDjX5http://processors.wiki.ti.com/index.php/PCIe_CableModrsj]j]j]j]j]uj]rtj%XMODIFIEDrurv}rw(jUjjoubaubj%X9 in order to avoid damaging the clock drivers in the SoC!rxry}rz(jX9 in order to avoid damaging the clock drivers in the SoC!jjaubeubjX)r{}r|(jXConnect two like AM57xx IDK EVMs J22 `MODIFIED`_ male-male crossover PCIe x1 or x4 cable and optional straight-through extender. For AM572x/AM574x we used a one-lane cross cable; for AM571x we used a 4-lane cross cable. | Projects available for C66, A15, and M4.jj]j j2jj\j}r}(j]j]j]j]j]ujK}j]r~(j%X%Connect two like AM57xx IDK EVMs J22 rr}r(jX%Connect two like AM57xx IDK EVMs J22 jj{ubj)r}r(jX `MODIFIED`_jqKjj{jjj}r(UnameXMODIFIEDjjsj]j]j]j]j]uj]rj%XMODIFIEDrr}r(jUjjubaubj%X male-male crossover PCIe x1 or x4 cable and optional straight-through extender. For AM572x/AM574x we used a one-lane cross cable; for AM571x we used a 4-lane cross cable. | Projects available for C66, A15, and M4.rr}r(jX male-male crossover PCIe x1 or x4 cable and optional straight-through extender. For AM572x/AM574x we used a one-lane cross cable; for AM571x we used a 4-lane cross cable. | Projects available for C66, A15, and M4.jj{ubeubejjubj)r}r(jUj}r(j]j]j]j]j]ujjBj]rjX)r}r(jX**AM572x/AM574x or AM571x EVM** : One board is EP/other is RC; link is established and data/interrupts exchanged. All printed output goes to the serial console.jjj j2jj\j}r(j]j]j]j]j]ujKsj]r(j|)r}r(jX**AM572x/AM574x or AM571x EVM**j}r(j]j]j]j]j]ujjj]rj%XAM572x/AM574x or AM571x EVMrr}r(jUjjubajjubj%X : One board is EP/other is RC; link is established and data/interrupts exchanged. All printed output goes to the serial console.rr}r(jX : One board is EP/other is RC; link is established and data/interrupts exchanged. All printed output goes to the serial console.jjubeubajjubejjubj)r}r(jUj}r(j]j]j]j]j]ujj>j]r(j)r}r(jUj}r(j]j]j]j]j]ujjj]r(jX)r}r(jXPCIE_sample_Ex\ ampleProjectjjj j2jj\j}r(j]j]j]j]j]ujKj]rj%XPCIE_sample_ExampleProjectrr}r(jXPCIE_sample_Ex\ ampleProjectjjubaubjX)r}r(jX(for AM65xx IDK)rjjj j2jj\j}r(j]j]j]j]j]ujKj]rj%X(for AM65xx IDK)rr}r(jjjjubaubejjubj)r}r(jUj}r(j]j]j]j]j]ujjj]rjX)r}r(jX2-device PCIe connectionrjjj j2jj\j}r(j]j]j]j]j]ujKj]rj%X2-device PCIe connectionrr}r(jjjjubaubajjubj)r}r(jUj}r(j]j]j]j]j]ujjj]r(jX)r}r(jXa**IMPORTANT:** Cable must be `MODIFIED`_ in order to avoid damaging the clock drivers in the SoC!jjj j2jj\j}r(j]j]j]j]j]ujKj]r(j|)r}r(jX**IMPORTANT:**j}r(j]j]j]j]j]ujjj]rj%X IMPORTANT:rr}r(jUjjubajjubj%X Cable must be rr}r(jX Cable must be jjubj)r}r(jX `MODIFIED`_jqKjjjjj}r(UnameXMODIFIEDjjsj]j]j]j]j]uj]rj%XMODIFIEDrr}r(jUjjubaubj%X9 in order to avoid damaging the clock drivers in the SoC!rr}r(jX9 in order to avoid damaging the clock drivers in the SoC!jjubeubjX)r}r(jXConnect two like AM65xx IDK EVMs PCIe using a `MODIFIED`_ male-male crossover PCIe x1 or x4 cable and optional straight-through extender.jjj j2jj\j}r(j]j]j]j]j]ujKj]r(j%X.Connect two like AM65xx IDK EVMs PCIe using a rr}r(jX.Connect two like AM65xx IDK EVMs PCIe using a jjubj)r}r(jX `MODIFIED`_jqKjjjjj}r(UnameXMODIFIEDjjsj]j]j]j]j]uj]rj%XMODIFIEDrr}r(jUjjubaubj%XP male-male crossover PCIe x1 or x4 cable and optional straight-through extender.rr}r(jXP male-male crossover PCIe x1 or x4 cable and optional straight-through extender.jjubeubjX)r}r(jXWe used a one-lane cross cable.rjjj j2jj\j}r(j]j]j]j]j]ujKj]rj%XWe used a one-lane cross cable.rr}r(jjjjubaubjX)r}r(jX1Executables for A53 (mpu) and R5 (mcu) available.rjjj j2jj\j}r(j]j]j]j]j]ujKj]rj%X1Executables for A53 (mpu) and R5 (mcu) available.rr}r(jjjjubaubjX)r}r(jXNote: this is NOT a CCS project. It is built from running ``make pcie`` from $(TI_PDK\ _INSTALL_DIR)/\ packages. Result is in ti/binary.jjj j2jj\j}r(j]j]j]j]j]ujKj]r(j%X;Note: this is NOT a CCS project. It is built from running rr}r(jX;Note: this is NOT a CCS project. It is built from running jjubcdocutils.nodes literal r)r}r(jX ``make pcie``j}r(j]j]j]j]j]ujjj]r j%X make pcier r }r (jUjjubajUliteralr ubj%X= from $(TI_PDK_INSTALL_DIR)/packages. Result is in ti/binary.rr}r(jXA from $(TI_PDK\ _INSTALL_DIR)/\ packages. Result is in ti/binary.jjubeubejjubj)r}r(jUj}r(j]j]j]j]j]ujjj]rjX)r}r(jX**AM65xx IDK** One board is EP/ other is RC; link is established and data exchanged. All printed output goes to the serial console.jjj j2jj\j}r(j]j]j]j]j]ujKj]r(j|)r}r(jX**AM65xx IDK**j}r(j]j]j]j]j]ujjj]rj%X AM65xx IDKrr}r(jUjjubajjubj%Xu One board is EP/ other is RC; link is established and data exchanged. All printed output goes to the serial console.r r!}r"(jXu One board is EP/ other is RC; link is established and data exchanged. All printed output goes to the serial console.jjubeubajjubejjubj)r#}r$(jUj}r%(j]j]j]j]j]ujj>j]r&(j)r'}r((jUj}r)(j]j]j]j]j]ujj#j]r*jX)r+}r,(jXPCIE_evmK2G*Ex\ ampleProjectjj'j j2jj\j}r-(j]j]j]j]j]ujKj]r.j%XPCIE_evmK2G*ExampleProjectr/r0}r1(jXPCIE_evmK2G*Ex\ ampleProjectjj+ubaubajjubj)r2}r3(jUj}r4(j]j]j]j]j]ujj#j]r5jX)r6}r7(jX2-device PCIe connectionr8jj2j j2jj\j}r9(j]j]j]j]j]ujKj]r:j%X2-device PCIe connectionr;r<}r=(jj8jj6ubaubajjubj)r>}r?(jUj}r@(j]j]j]j]j]ujj#j]rA(jX)rB}rC(jXa**IMPORTANT:** Cable must be `MODIFIED`_ in order to avoid damaging the clock drivers in the SoC!jj>j j2jj\j}rD(j]j]j]j]j]ujKj]rE(j|)rF}rG(jX**IMPORTANT:**j}rH(j]j]j]j]j]ujjBj]rIj%X IMPORTANT:rJrK}rL(jUjjFubajjubj%X Cable must be rMrN}rO(jX Cable must be jjBubj)rP}rQ(jX `MODIFIED`_jqKjjBjjj}rR(UnameXMODIFIEDjjsj]j]j]j]j]uj]rSj%XMODIFIEDrTrU}rV(jUjjPubaubj%X9 in order to avoid damaging the clock drivers in the SoC!rWrX}rY(jX9 in order to avoid damaging the clock drivers in the SoC!jjBubeubjX)rZ}r[(jXConnect two K2G  EVMs J5 using a `MODIFIED`_ male-male crossover PCIe x1 cable and optional straight-through extender. We used a one-lane cross cable. Ensure that jumper J15 is positioned to the left hand two pins as viewed with "J15" silkscreen right side up (pin 0 isn't clearly marked). In the right hand position, the PCIe PLL will NOT get clock. Projects available for C66 and A15.jj>j j2jj\j}r\(j]j]j]j]j]ujKj]r](j%X"Connect two K2G  EVMs J5 using a r^r_}r`(jX"Connect two K2G  EVMs J5 using a jjZubj)ra}rb(jX `MODIFIED`_jqKjjZjjj}rc(UnameXMODIFIEDjjsj]j]j]j]j]uj]rdj%XMODIFIEDrerf}rg(jUjjaubaubj%XV male-male crossover PCIe x1 cable and optional straight-through extender. We used a one-lane cross cable. Ensure that jumper J15 is positioned to the left hand two pins as viewed with "J15" silkscreen right side up (pin 0 isn't clearly marked). In the right hand position, the PCIe PLL will NOT get clock. Projects available for C66 and A15.rhri}rj(jXV male-male crossover PCIe x1 cable and optional straight-through extender. We used a one-lane cross cable. Ensure that jumper J15 is positioned to the left hand two pins as viewed with "J15" silkscreen right side up (pin 0 isn't clearly marked). In the right hand position, the PCIe PLL will NOT get clock. Projects available for C66 and A15.jjZubeubejjubj)rk}rl(jUj}rm(j]j]j]j]j]ujj#j]rnjX)ro}rp(jX**K2G EVM** : One board is EP/other is RC; link is established and data is exchanged. All printed output goes to serial console.jjkj j2jj\j}rq(j]j]j]j]j]ujKj]rr(j|)rs}rt(jX **K2G EVM**j}ru(j]j]j]j]j]ujjoj]rvj%XK2G EVMrwrx}ry(jUjjsubajjubj%Xv : One board is EP/other is RC; link is established and data is exchanged. All printed output goes to serial console.rzr{}r|(jXv : One board is EP/other is RC; link is established and data is exchanged. All printed output goes to serial console.jjoubeubajjubejjubj)r}}r~(jUj}r(j]j]j]j]j]ujj>j]r(j)r}r(jUj}r(j]j]j]j]j]ujj}j]rjX)r}r(jXXPCIE_idkAM571x\ _*armEdmaPktEx\ ampleProject *(Available starting in Processor-SDK 3.1)*jjj j2jj\j}r(j]j]j]j]j]ujKj]r(j%X)PCIE_idkAM571x_*armEdmaPktExampleProject rr}r(jX-PCIE_idkAM571x\ _*armEdmaPktEx\ ampleProject jjubj<)r}r(jX+*(Available starting in Processor-SDK 3.1)*j}r(j]j]j]j]j]ujjj]rj%X)(Available starting in Processor-SDK 3.1)rr}r(jUjjubajjDubeubajjubj)r}r(jUj}r(j]j]j]j]j]ujj}j]rjX)r}r(jX#Packet Exchange over PCIe Benchmarkrjjj j2jj\j}r(j]j]j]j]j]ujKj]rj%X#Packet Exchange over PCIe Benchmarkrr}r(jjjjubaubajjubj)r}r(jUj}r(j]j]j]j]j]ujj}j]r(jX)r}r(jXa**IMPORTANT:** Cable must be `MODIFIED`_ in order to avoid damaging the clock drivers in the SoC!jjj j2jj\j}r(j]j]j]j]j]ujKj]r(j|)r}r(jX**IMPORTANT:**j}r(j]j]j]j]j]ujjj]rj%X IMPORTANT:rr}r(jUjjubajjubj%X Cable must be rr}r(jX Cable must be jjubj)r}r(jX `MODIFIED`_jqKjjjjj}r(UnameXMODIFIEDjjsj]j]j]j]j]uj]rj%XMODIFIEDrr}r(jUjjubaubj%X9 in order to avoid damaging the clock drivers in the SoC!rr}r(jX9 in order to avoid damaging the clock drivers in the SoC!jjubeubjX)r}r(jXConnect two like >=REV1.3A AM571x  IDK EVMs J22 using a `MODIFIED`_ male-male crossover PCIe x4 cable and optional straight-through extender. We used a 4-lane cross cable. Projects available for A15 only. >=REV1.3A EVM required (for x4 PCIe connectors).jjj j2jj\j}r(j]j]j]j]j]ujKj]r(j%X9Connect two like >=REV1.3A AM571x  IDK EVMs J22 using a rr}r(jX9Connect two like >=REV1.3A AM571x  IDK EVMs J22 using a jjubj)r}r(jX `MODIFIED`_jqKjjjjj}r(UnameXMODIFIEDjjsj]j]j]j]j]uj]rj%XMODIFIEDrr}r(jUjjubaubj%X male-male crossover PCIe x4 cable and optional straight-through extender. We used a 4-lane cross cable. Projects available for A15 only. >=REV1.3A EVM required (for x4 PCIe connectors).rr}r(jX male-male crossover PCIe x4 cable and optional straight-through extender. We used a 4-lane cross cable. Projects available for A15 only. >=REV1.3A EVM required (for x4 PCIe connectors).jjubeubejjubj)r}r(jUj}r(j]j]j]j]j]ujj}j]rjX)r}r(jX**AM571X >=REV1.3A IDK** : One board is EP/other is RC; link is established and data is exchanged. Produces same output as standard ExampleProject, except EP also prints packet exchange benchmark results.jjj j2jj\j}r(j]j]j]j]j]ujKj]r(j|)r}r(jX**AM571X >=REV1.3A IDK**j}r(j]j]j]j]j]ujjj]rj%XAM571X >=REV1.3A IDKrr}r(jUjjubajjubj%X : One board is EP/other is RC; link is established and data is exchanged. Produces same output as standard ExampleProject, except EP also prints packet exchange benchmark results.rr}r(jX : One board is EP/other is RC; link is established and data is exchanged. Produces same output as standard ExampleProject, except EP also prints packet exchange benchmark results.jjubeubajjubejjubj)r}r(jUj}r(j]j]j]j]j]ujj>j]r(j)r}r(jUj}r(j]j]j]j]j]ujjj]rjX)r}r(jX Remaining PCIE_*ExampleP\ rojectjjj j2jj\j}r(j]j]j]j]j]ujMj]rj%XRemaining PCIE_*ExampleProjectrr}r(jX Remaining PCIE_*ExampleP\ rojectjjubaubajjubj)r}r(jUj}r(j]j]j]j]j]ujjj]rjX)r}r(jX2-device PCIe connectionrjjj j2jj\j}r(j]j]j]j]j]ujMj]rj%X2-device PCIe connectionrr}r(jjjjubaubajjubj)r}r(jUj}r(j]j]j]j]j]ujjj]rjX)r}r(jXConnect two like C66x/K2x (except K2G, see previous row) EVMs using an AMC breakout card. For K2L, it is necessary to configure the mux via the BMC console with "interface_muxs el pcie" command. Projects available for A15 and/or C66 as present in each device.rjjj j2jj\j}r(j]j]j]j]j]ujMj]rj%XConnect two like C66x/K2x (except K2G, see previous row) EVMs using an AMC breakout card. For K2L, it is necessary to configure the mux via the BMC console with "interface_muxs el pcie" command. Projects available for A15 and/or C66 as present in each device.rr}r(jjjjubaubajjubj)r}r(jUj}r(j]j]j]j]j]ujjj]rjX)r }r (jX**6678, 6657, K2E, K2H, K2L** : One board is EP/other is RC; link is established and data exchanged. For A15 projects, all printed output goes to serial console. For C66 projects, all printed output goes to CCS console.jjj j2jj\j}r (j]j]j]j]j]ujMj]r (j|)r }r(jX**6678, 6657, K2E, K2H, K2L**j}r(j]j]j]j]j]ujj j]rj%X6678, 6657, K2E, K2H, K2Lrr}r(jUjj ubajjubj%X : One board is EP/other is RC; link is established and data exchanged. For A15 projects, all printed output goes to serial console. For C66 projects, all printed output goes to CCS console.rr}r(jX : One board is EP/other is RC; link is established and data exchanged. For A15 projects, all printed output goes to serial console. For C66 projects, all printed output goes to CCS console.jj ubeubajjubejjubj)r}r(jUj}r(j]j]j]j]j]ujj>j]r(j)r}r(jUj}r(j]j]j]j]j]ujjj]r(jX)r}r (jXPCIE_Qos_Examp\ leProjectjjj j2jj\j}r!(j]j]j]j]j]ujM)j]r"j%XPCIE_Qos_ExampleProjectr#r$}r%(jXPCIE_Qos_Examp\ leProjectjjubaubjX)r&}r'(jX(for AM65xx IDK)r(jjj j2jj\j}r)(j]j]j]j]j]ujM,j]r*j%X(for AM65xx IDK)r+r,}r-(jj(jj&ubaubejjubj)r.}r/(jUj}r0(j]j]j]j]j]ujjj]r1jX)r2}r3(jX2-device PCIe connectionr4jj.j j2jj\j}r5(j]j]j]j]j]ujM)j]r6j%X2-device PCIe connectionr7r8}r9(jj4jj2ubaubajjubj)r:}r;(jUj}r<(j]j]j]j]j]ujjj]r=(jX)r>}r?(jXa**IMPORTANT:** Cable must be `MODIFIED`_ in order to avoid damaging the clock drivers in the SoC!jj:j j2jj\j}r@(j]j]j]j]j]ujM)j]rA(j|)rB}rC(jX**IMPORTANT:**j}rD(j]j]j]j]j]ujj>j]rEj%X IMPORTANT:rFrG}rH(jUjjBubajjubj%X Cable must be rIrJ}rK(jX Cable must be jj>ubj)rL}rM(jX `MODIFIED`_jqKjj>jjj}rN(UnameXMODIFIEDjjsj]j]j]j]j]uj]rOj%XMODIFIEDrPrQ}rR(jUjjLubaubj%X9 in order to avoid damaging the clock drivers in the SoC!rSrT}rU(jX9 in order to avoid damaging the clock drivers in the SoC!jj>ubeubjX)rV}rW(jXConnect two like AM65xx IDK EVMs PCIe using a `MODIFIED`_ male-male crossover PCIe x1 or x4 cable and optional straight-through extender.jj:j j2jj\j}rX(j]j]j]j]j]ujM3j]rY(j%X.Connect two like AM65xx IDK EVMs PCIe using a rZr[}r\(jX.Connect two like AM65xx IDK EVMs PCIe using a jjVubj)r]}r^(jX `MODIFIED`_jqKjjVjjj}r_(UnameXMODIFIEDjjsj]j]j]j]j]uj]r`j%XMODIFIEDrarb}rc(jUjj]ubaubj%XP male-male crossover PCIe x1 or x4 cable and optional straight-through extender.rdre}rf(jXP male-male crossover PCIe x1 or x4 cable and optional straight-through extender.jjVubeubjX)rg}rh(jXWe used a one-lane cross cable.rijj:j j2jj\j}rj(j]j]j]j]j]ujM@j]rkj%XWe used a one-lane cross cable.rlrm}rn(jjijjgubaubjX)ro}rp(jX1Executables for A53 (mpu) and R5 (mcu) available.rqjj:j j2jj\j}rr(j]j]j]j]j]ujMDj]rsj%X1Executables for A53 (mpu) and R5 (mcu) available.rtru}rv(jjqjjoubaubjX)rw}rx(jXNote: this is NOT a CCS project. It is built from running ``make pcie`` from $(TI_PDK\ _INSTALL_DIR)/\ packages. Result is in ti/binary.jj:j j2jj\j}ry(j]j]j]j]j]ujMIj]rz(j%X;Note: this is NOT a CCS project. It is built from running r{r|}r}(jX;Note: this is NOT a CCS project. It is built from running jjwubj)r~}r(jX ``make pcie``j}r(j]j]j]j]j]ujjwj]rj%X make pcierr}r(jUjj~ubajj ubj%X= from $(TI_PDK_INSTALL_DIR)/packages. Result is in ti/binary.rr}r(jXA from $(TI_PDK\ _INSTALL_DIR)/\ packages. Result is in ti/binary.jjwubeubejjubj)r}r(jUj}r(j]j]j]j]j]ujjj]rjX)r}r(jX**AM65xx IDK** One board is EP/ other is RC; link is established and data exchanged with TC0/TC1/TC2(DDR) /TC3(MSMC). Then PCIE CPU read latency with TC3 is measured with background PCIE read traffic over TC0 using DMA. All printed output goes to serial console.jjj j2jj\j}r(j]j]j]j]j]ujM)j]r(j|)r}r(jX**AM65xx IDK**j}r(j]j]j]j]j]ujjj]rj%X AM65xx IDKrr}r(jUjjubajjubj%X One board is EP/ other is RC; link is established and data exchanged with TC0/TC1/TC2(DDR) /TC3(MSMC). Then PCIE CPU read latency with TC3 is measured with background PCIE read traffic over TC0 using DMA. All printed output goes to serial console.rr}r(jX One board is EP/ other is RC; link is established and data exchanged with TC0/TC1/TC2(DDR) /TC3(MSMC). Then PCIE CPU read latency with TC3 is measured with background PCIE read traffic over TC0 using DMA. All printed output goes to serial console.jjubeubajjubejjubejjubejjubaubcdocutils.nodes target r)r}r(jXC.. _MODIFIED: http://processors.wiki.ti.com/index.php/PCIe_CableModjKjjj j2jUtargetrj}r(jjsj]rUmodifiedraj]j]j]j]rhaujM(jhj]ubjb)r}r(jX"Quick setup of xds100 for two EVMsrjjj j2jjfj}r(j]rU"quick-setup-of-xds100-for-two-evmsraj]j]j]j]rhaujNjhj]rj%X"Quick setup of xds100 for two EVMsrr}r(jjjjubaubj`)r}r(jUjjj j2jjcj}r(jeU.j]j]j]jfUj]j]jgjhujM\jhj]r(j)r}r(jXYcreate new target configuration using XDS100v2 and AM572x (or AM571x) from the basic tab.jjj j2jj j}r(j]j]j]j]j]ujNjhj]rjX)r}r(jXYcreate new target configuration using XDS100v2 and AM572x (or AM571x) from the basic tab.rjjj j2jj\j}r(j]j]j]j]j]ujM\j]rj%XYcreate new target configuration using XDS100v2 and AM572x (or AM571x) from the basic tab.rr}r(jjjjubaubaubj)r}r(jXSelect Advanced tab.rjjj j2jj j}r(j]j]j]j]j]ujNjhj]rjX)r}r(jjjjj j2jj\j}r(j]j]j]j]j]ujM^j]rj%XSelect Advanced tab.rr}r(jjjjubaubaubj)r}r(jXKHighlight the XDS100v2, and click the "new" button and add second XDS100v2.jjj j2jj j}r(j]j]j]j]j]ujNjhj]rjX)r}r(jXKHighlight the XDS100v2, and click the "new" button and add second XDS100v2.rjjj j2jj\j}r(j]j]j]j]j]ujM_j]rj%XKHighlight the XDS100v2, and click the "new" button and add second XDS100v2.rr}r(jjjjubaubaubj)r}r(jXVHighlight the newly added XDS100v2, click the "add" button and select a second Am572x.jjj j2jj j}r(j]j]j]j]j]ujNjhj]rjX)r}r(jXVHighlight the newly added XDS100v2, click the "add" button and select a second Am572x.rjjj j2jj\j}r(j]j]j]j]j]ujMaj]rj%XVHighlight the newly added XDS100v2, click the "add" button and select a second Am572x.rr}r(jjjjubaubaubj)r}r(jX]open command prompt, and run ti\ccs_base\common\uscif\xds100serial to get your serial numbersjjj j2jj j}r(j]j]j]j]j]ujNjhj]rjX)r}r(jX]open command prompt, and run ti\ccs_base\common\uscif\xds100serial to get your serial numbersjjj j2jj\j}r(j]j]j]j]j]ujMcj]rj%XYopen command prompt, and run ticcs_basecommonuscifxds100serial to get your serial numbersrr}r(jX]open command prompt, and run ti\ccs_base\common\uscif\xds100serial to get your serial numbersjjubaubaubj)r}r(jX{Highlight first XDS100v2, select "Debug Probe Selection" to "Select by Serial number" and enter one of the 2 serial numbersjjj j2jj j}r(j]j]j]j]j]ujNjhj]rjX)r}r(jX{Highlight first XDS100v2, select "Debug Probe Selection" to "Select by Serial number" and enter one of the 2 serial numbersrjjj j2jj\j}r(j]j]j]j]j]ujMej]rj%X{Highlight first XDS100v2, select "Debug Probe Selection" to "Select by Serial number" and enter one of the 2 serial numbersrr}r(jjjjubaubaubj)r}r(jX@Repeat second XDS100v2, setting to to the second serial number. jjj j2jj j}r(j]j]j]j]j]ujNjhj]rjX)r}r(jX?Repeat second XDS100v2, setting to to the second serial number.rjjj j2jj\j}r(j]j]j]j]j]ujMgj]rj%X?Repeat second XDS100v2, setting to to the second serial number.rr}r(jjjjubaubaubeubjX)r}r(jXGeneral instructions for configuring multiple EVMs with any emulator type are available in `Debugging with Multiple Debug Probes `__jjj j2jj\j}r(j]j]j]j]j]ujMijhj]r(j%X[General instructions for configuring multiple EVMs with any emulator type are available in rr }r (jX[General instructions for configuring multiple EVMs with any emulator type are available in jjubj)r }r (jXv`Debugging with Multiple Debug Probes `__j}r (UnameX$Debugging with Multiple Debug ProbesjXKhttp://software-dl.ti.com/ccs/esd/documents/sdto_ccs_multi-probe-debug.htmlj]j]j]j]j]ujjj]rj%X$Debugging with Multiple Debug Probesrr}r(jUjj ubajjubeubjb)r}r(jX$Detailed instructions to run examplerjjj j2jjfj}r(j]rU$detailed-instructions-to-run-exampleraj]j]j]j]rh,aujNjhj]rj%X$Detailed instructions to run examplerr}r(jjjjubaubjX)r}r(jX|Ensure 2 Like EVMs are connected with a x1 PCIe male/male cross cable (for AM5XX) or a breakout card (for C667x, C665x, K2x)rjjj j2jj\j}r (j]j]j]j]j]ujMpjhj]r!j%X|Ensure 2 Like EVMs are connected with a x1 PCIe male/male cross cable (for AM5XX) or a breakout card (for C667x, C665x, K2x)r"r#}r$(jjjjubaubjX)r%}r&(jX~Build project(s) appropriate for your EVM. Projects for A15 and C66 are provided based on core types available on each device.r'jjj j2jj\j}r((j]j]j]j]j]ujMsjhj]r)j%X~Build project(s) appropriate for your EVM. Projects for A15 and C66 are provided based on core types available on each device.r*r+}r,(jj'jj%ubaubjX)r-}r.(jXLoad via jtag either the ARM or DSP projects (but don't mix and match) onto the first arm or dsp core of each the 2 EVMs. Same .out file supports both RC and EP. Use an "expressions" window to set PcieModeGbl to PCIE_RC_MODE on one EVM (it makes that EVM RC). Leave the second EVM alone (pcie_EP_MODE). Run the loaded cores. See table above to determine whether output is expected on serial console or CCS console.r/jjj j2jj\j}r0(j]j]j]j]j]ujMvjhj]r1j%XLoad via jtag either the ARM or DSP projects (but don't mix and match) onto the first arm or dsp core of each the 2 EVMs. Same .out file supports both RC and EP. Use an "expressions" window to set PcieModeGbl to PCIE_RC_MODE on one EVM (it makes that EVM RC). Leave the second EVM alone (pcie_EP_MODE). Run the loaded cores. See table above to determine whether output is expected on serial console or CCS console.r2r3}r4(jj/jj-ubaubjb)r5}r6(jXSample example outputr7jKjjj j2jjfj}r8(j]r9Usample-example-outputr:aj]j]r;Xsample-example-outputr<aj]j]ujNjhj]r=j%XSample example outputr>r?}r@(jj7jj5ubaubjX)rA}rB(jXNote that output will vary slightly based on device type. The following is from A57XX. The output from the RC and EP are interleaved since this is run from a 2*XDS1000 double config as described in `Quick setup of xds100 for two EVMs <#quick-setup-of-xds100-for-two-evms>`__jjj j2jj\j}rC(j]j]j]j]j]ujMjhj]rD(j%XNote that output will vary slightly based on device type. The following is from A57XX. The output from the RC and EP are interleaved since this is run from a 2*XDS1000 double config as described in rErF}rG(jXNote that output will vary slightly based on device type. The following is from A57XX. The output from the RC and EP are interleaved since this is run from a 2*XDS1000 double config as described in jjAubj)rH}rI(jXL`Quick setup of xds100 for two EVMs <#quick-setup-of-xds100-for-two-evms>`__j}rJ(UnameX"Quick setup of xds100 for two EVMsjX##quick-setup-of-xds100-for-two-evmsj]j]j]j]j]ujjAj]rKj%X"Quick setup of xds100 for two EVMsrLrM}rN(jUjjHubajjubeubj#)rO}rP(jXT********************************************** * PCIe Test Start * * RC mode * ********************************************** Version #: 0x02020003; string PCIE LLD Revision: 02.02.00.03:Dec 24 2015:17:38:37 PCIe Power Up. PLL configured. Successfully configured Inbound Translation! Successfully configured Outbound Translation! Starting link training... ********************************************** * PCIe Test Start * * EP mode * ********************************************** Version #: 0x02020003; string PCIE LLD Revision: 02.02.00.03:Dec 24 2015:17:38:37 PCIe Power Up. PLL configured. Successfully configured Inbound Translation! Successfully configured Outbound Translation! Starting link training... Link is up. Link is up. End Point received data. End Point sent data to Root Complex, completing the loopback. EP sending interrupts to RC Root Complex received data. RC waiting for 10 of each of 2 types of interrupts RC got all 20 interrupts Test passed. End of Test.jjj j2jj&j}rQ(j2j3j]j]j]j]j]ujMXjhj]rRj%XT********************************************** * PCIe Test Start * * RC mode * ********************************************** Version #: 0x02020003; string PCIE LLD Revision: 02.02.00.03:Dec 24 2015:17:38:37 PCIe Power Up. PLL configured. Successfully configured Inbound Translation! Successfully configured Outbound Translation! Starting link training... ********************************************** * PCIe Test Start * * EP mode * ********************************************** Version #: 0x02020003; string PCIE LLD Revision: 02.02.00.03:Dec 24 2015:17:38:37 PCIe Power Up. PLL configured. Successfully configured Inbound Translation! Successfully configured Outbound Translation! Starting link training... Link is up. Link is up. End Point received data. End Point sent data to Root Complex, completing the loopback. EP sending interrupts to RC Root Complex received data. RC waiting for 10 of each of 2 types of interrupts RC got all 20 interrupts Test passed. End of Test.rSrT}rU(jUjjOubaubj)rV}rW(jUjjj j2jjj}rX(j]j]j]j]j]ujMjhj]rYj)rZ}r[(jUjKjjVj j2jjj}r\(j]j]j]j]j]ujKjhj]ubaubeubeubj)r]}r^(jUjKjj j j2jjj}r_(j]r`X debug faqraaj]j]j]rbU debug-faqrcaj]ujMjhj]rd(j)re}rf(jX Debug FAQrgjj]j j2jj"j}rh(j]j]j]j]j]ujMjhj]rij%X Debug FAQrjrk}rl(jjgjjeubaubjX)rm}rn(jX#**If example fails to get link up**rojj]j j2jj\j}rp(j]j]j]j]j]ujMjhj]rqj|)rr}rs(jjoj}rt(j]j]j]j]j]ujjmj]ruj%XIf example fails to get link uprvrw}rx(jUjjrubajjubaubj )ry}rz(jUjj]j Njj j}r{(j]j]j]j]j]ujNjhj]r|j`)r}}r~(jUj}r(jeU.j]j]j]jfUj]j]jgjhujjyj]r(j)r}r(jXLConfirm that male/male cross cable or breakout board is correctly connected.j}r(j]j]j]j]j]ujj}j]rjX)r}r(jXLConfirm that male/male cross cable or breakout board is correctly connected.rjjj j2jj\j}r(j]j]j]j]j]ujMj]rj%XLConfirm that male/male cross cable or breakout board is correctly connected.rr}r(jjjjubaubajj ubj)r}r(jXIf running from ARM cores, confirm that immediately after reset/reload that both devices have PcieModeGbl=PCIE_EP_MODE. If the PCIE_RC_MODE seems to survive reset/reload, it seems to mean watch window failed to refresh. Click the "Refresh" button for the watch window and it should flip back to EP, where you can reset it to RC. Simply running will cause both sides to run as EP, which leads to test failure.j}r(j]j]j]j]j]ujj}j]rjX)r}r(jXIf running from ARM cores, confirm that immediately after reset/reload that both devices have PcieModeGbl=PCIE_EP_MODE. If the PCIE_RC_MODE seems to survive reset/reload, it seems to mean watch window failed to refresh. Click the "Refresh" button for the watch window and it should flip back to EP, where you can reset it to RC. Simply running will cause both sides to run as EP, which leads to test failure.rjjj j2jj\j}r(j]j]j]j]j]ujMj]rj%XIf running from ARM cores, confirm that immediately after reset/reload that both devices have PcieModeGbl=PCIE_EP_MODE. If the PCIE_RC_MODE seems to survive reset/reload, it seems to mean watch window failed to refresh. Click the "Refresh" button for the watch window and it should flip back to EP, where you can reset it to RC. Simply running will cause both sides to run as EP, which leads to test failure.rr}r(jjjjubaubajj ubj)r}r(jXEConfirm that one side of the example has PcieModeGbl=PCIE_RC_MODE and the other is PCIE_EP_MODE. .. note:: When changing to RC you must click somewhere outside the expression value to make the modification for RC to "take effect". Simply pressing F8 after modifying the value will run without actually modifying the variable! The modification will be done when the ARM or DSP is stopped, **so everything looks right, except that the log will show "PCIe test start EP mode" twice** instead of "PCIe test start EP mode" once and "PCIe test start RC mode" once. j}r(j]j]j]j]j]ujj}j]r(jX)r}r(jX`Confirm that one side of the example has PcieModeGbl=PCIE_RC_MODE and the other is PCIE_EP_MODE.rjjj j2jj\j}r(j]j]j]j]j]ujMj]rj%X`Confirm that one side of the example has PcieModeGbl=PCIE_RC_MODE and the other is PCIE_EP_MODE.rr}r(jjjjubaubj\)r}r(jXWhen changing to RC you must click somewhere outside the expression value to make the modification for RC to "take effect". Simply pressing F8 after modifying the value will run without actually modifying the variable! The modification will be done when the ARM or DSP is stopped, **so everything looks right, except that the log will show "PCIe test start EP mode" twice** instead of "PCIe test start EP mode" once and "PCIe test start RC mode" once.j}r(j]j]j]j]j]ujjj]rjX)r}r(jXWhen changing to RC you must click somewhere outside the expression value to make the modification for RC to "take effect". Simply pressing F8 after modifying the value will run without actually modifying the variable! The modification will be done when the ARM or DSP is stopped, **so everything looks right, except that the log will show "PCIe test start EP mode" twice** instead of "PCIe test start EP mode" once and "PCIe test start RC mode" once.jjj j2jj\j}r(j]j]j]j]j]ujMj]r(j%XWhen changing to RC you must click somewhere outside the expression value to make the modification for RC to "take effect". Simply pressing F8 after modifying the value will run without actually modifying the variable! The modification will be done when the ARM or DSP is stopped, rr}r(jXWhen changing to RC you must click somewhere outside the expression value to make the modification for RC to "take effect". Simply pressing F8 after modifying the value will run without actually modifying the variable! The modification will be done when the ARM or DSP is stopped, jjubj|)r}r(jX\**so everything looks right, except that the log will show "PCIe test start EP mode" twice**j}r(j]j]j]j]j]ujjj]rj%XXso everything looks right, except that the log will show "PCIe test start EP mode" twicerr}r(jUjjubajjubj%XN instead of "PCIe test start EP mode" once and "PCIe test start RC mode" once.rr}r(jXN instead of "PCIe test start EP mode" once and "PCIe test start RC mode" once.jjubeubajj_ubejj ubejjcubaubjX)r}r(jX#**How to debug common PCIe issues**rjj]j j2jj\j}r(j]j]j]j]j]ujMjhj]rj|)r}r(jjj}r(j]j]j]j]j]ujjj]rj%XHow to debug common PCIe issuesrr}r(jUjjubajjubaubjX)r}r(jXqPlease refer to `PCI Express (PCIe) FAQ `__ for Keystone devices.jj]j j2jj\j}r(j]j]j]j]j]ujMjhj]r(j%XPlease refer to rr}r(jXPlease refer to jjubj)r}r(jXK`PCI Express (PCIe) FAQ `__j}r(UnameXPCI Express (PCIe) FAQjX.http://www.ti.com/lit/an/sprac59a/sprac59a.pdfj]j]j]j]j]ujjj]rj%XPCI Express (PCIe) FAQrr}r(jUjjubajjubj%X for Keystone devices.rr}r(jX for Keystone devices.jjubeubeubj)r}r(jUjKjj j j2jjj}r(j]rjGaj]j]j]rUid15raj]ujMjhj]r(j)r}r(jXAdditional Referencesrjjj j2jj"j}r(j]j]j]j]j]ujMjhj]rj%XAdditional Referencesrr}r(jjjjubaubjX)r}r(jX)Additional documentation can be found in:rjjj j2jj\j}r(j]j]j]j]j]ujMjhj]rj%X)Additional documentation can be found in:rr}r(jjjjubaubj)r}r(jUjjj j2jjj}r(j]j]j]j]j]ujNjhj]rj)r}r(jUj}r(j]j]j]j]j]UcolsKujjj]r(j)r}r(jUj}r(j]j]j]j]j]UcolwidthK#ujjj]jjubj)r}r(jUj}r(j]j]j]j]j]UcolwidthK-ujjj]jjubj)r}r(jUj}r(j]j]j]j]j]ujjj]r(j)r}r(jUj}r(j]j]j]j]j]ujjj]r(j)r}r(jUj}r(j]j]j]j]j]ujjj]rjX)r}r (jX **Document**r jjj j2jj\j}r (j]j]j]j]j]ujMj]r j|)r }r(jj j}r(j]j]j]j]j]ujjj]rj%XDocumentrr}r(jUjj ubajjubaubajjubj)r}r(jUj}r(j]j]j]j]j]ujjj]rjX)r}r(jX **Location**rjjj j2jj\j}r(j]j]j]j]j]ujMj]rj|)r}r(jjj}r(j]j]j]j]j]ujjj]r j%XLocationr!r"}r#(jUjjubajjubaubajjubejjubj)r$}r%(jUj}r&(j]j]j]j]j]ujjj]r'(j)r(}r)(jUj}r*(j]j]j]j]j]ujj$j]r+jX)r,}r-(jXHardware Peripheral Users Guider.jj(j j2jj\j}r/(j]j]j]j]j]ujMj]r0j%XHardware Peripheral Users Guider1r2}r3(jj.jj,ubaubajjubj)r4}r5(jUj}r6(j]j]j]j]j]ujj$j]r7j)r8}r9(jUj}r:(jX-j]j]j]j]j]ujj4j]r;(j)r<}r=(jX9C66x/K2x: `User Guide `__ j}r>(j]j]j]j]j]ujj8j]r?jX)r@}rA(jX8C66x/K2x: `User Guide `__jj<j j2jj\j}rB(j]j]j]j]j]ujMj]rC(j%X C66x/K2x: rDrE}rF(jX C66x/K2x: jj@ubj)rG}rH(jX.`User Guide `__j}rI(UnameX User GuidejXhttp://www.ti.com/lit/sprugs6j]j]j]j]j]ujj@j]rJj%X User GuiderKrL}rM(jUjjGubajjubeubajj ubj)rN}rO(jX2AM57XX: TRM Chapter 24.9 titled "PCIe Controller" j}rP(j]j]j]j]j]ujj8j]rQjX)rR}rS(jX1AM57XX: TRM Chapter 24.9 titled "PCIe Controller"rTjjNj j2jj\j}rU(j]j]j]j]j]ujMj]rVj%X1AM57XX: TRM Chapter 24.9 titled "PCIe Controller"rWrX}rY(jjTjjRubaubajj ubj)rZ}r[(jXjAM65XX: TRM Chapter 12.2.2 titled "Peripheral Component Controller Interconnect Express (PCIe) Subsystem" j}r\(j]j]j]j]j]ujj8j]r]jX)r^}r_(jXiAM65XX: TRM Chapter 12.2.2 titled "Peripheral Component Controller Interconnect Express (PCIe) Subsystem"r`jjZj j2jj\j}ra(j]j]j]j]j]ujMj]rbj%XiAM65XX: TRM Chapter 12.2.2 titled "Peripheral Component Controller Interconnect Express (PCIe) Subsystem"rcrd}re(jj`jj^ubaubajj ubejjubajjubejjubj)rf}rg(jUj}rh(j]j]j]j]j]ujjj]ri(j)rj}rk(jUj}rl(j]j]j]j]j]ujjfj]rmjX)rn}ro(jXAPI Reference Manualrpjjjj j2jj\j}rq(j]j]j]j]j]ujMj]rrj%XAPI Reference Manualrsrt}ru(jjpjjnubaubajjubj)rv}rw(jUj}rx(j]j]j]j]j]ujjfj]ryjX)rz}r{(jXI$(TI_PDK_INSTALL_DIR)/packages/ti /drv/pcie/docs/doxygen/html/index .htmlr|jjvj j2jj\j}r}(j]j]j]j]j]ujMj]r~j%XI$(TI_PDK_INSTALL_DIR)/packages/ti /drv/pcie/docs/doxygen/html/index .htmlrr}r(jj|jjzubaubajjubejjubj)r}r(jUj}r(j]j]j]j]j]ujjj]r(j)r}r(jUj}r(j]j]j]j]j]ujjj]rjX)r}r(jX Release Notesrjjj j2jj\j}r(j]j]j]j]j]ujMj]rj%X Release Notesrr}r(jjjjubaubajjubj)r}r(jUj}r(j]j]j]j]j]ujjj]rjX)r}r(jXJ$(TI_PDK_INSTALL_DIR)/packages/ti /drv/pcie/docs/ReleaseNotes_PCIE_LLD.pdfrjjj j2jj\j}r(j]j]j]j]j]ujMj]rj%XJ$(TI_PDK_INSTALL_DIR)/packages/ti /drv/pcie/docs/ReleaseNotes_PCIE_LLD.pdfrr}r(jjjjubaubajjubejjubejjubejjubaubj)r}r(jUjjj j2jjj}r(j]j]j]j]j]ujMjhj]rj)r}r(jUjKjjj j2jjj}r(j]j]j]j]j]ujKjhj]ubaubeubeubj j2jjj}r(j]rXoverviewraj]j]j]rUid7raj]ujKjhj]r(j)r}r(jXOverviewrjjj j2jj"j}r(j]j]j]j]j]ujKjhj]rj%XOverviewrr}r(jjjjubaubjX)r}r(jX?PCIe module supports dual operation mode: End Point (EP or Type0) or Root Complex (RC or Type1). This driver focuses on EP mode but it also provides access to some basic RC configuration/functionality. For RC this is the lowest level; additional software is needed to perform generic enumeration of third party devices.rjjj j2jj\j}r(j]j]j]j]j]ujKjhj]rj%X?PCIe module supports dual operation mode: End Point (EP or Type0) or Root Complex (RC or Type1). This driver focuses on EP mode but it also provides access to some basic RC configuration/functionality. For RC this is the lowest level; additional software is needed to perform generic enumeration of third party devices.rr}r(jjjjubaubjX)r}r(jXThe PCIe subsystem has two address spaces. The first (Address Space 0) is dedicated for local application registers, local configuration accesses and remote configuration accesses. The second (Address Space 1) is dedicated for data transfer. This PCIe driver focuses on configuration of the interface and sending/receiving interrupts via Address Space 0. Data is transferred outside the scope of the LLD using CPU or EDMA through the data area.rjjj j2jj\j}r(j]j]j]j]j]ujK jhj]rj%XThe PCIe subsystem has two address spaces. The first (Address Space 0) is dedicated for local application registers, local configuration accesses and remote configuration accesses. The second (Address Space 1) is dedicated for data transfer. This PCIe driver focuses on configuration of the interface and sending/receiving interrupts via Address Space 0. Data is transferred outside the scope of the LLD using CPU or EDMA through the data area.rr}r(jjjjubaubjX)r}r(jXRThere are three revisions of the pcie hardware. The first, v0, in KeyStone devices (C66x, K2x). The second, v1, is in AM57xx devices. The third, v2, is in AM65xx devices. The LLD abstacts the configuration of standards-based PCIe registers (Type 0, Type 1 and Capabilities registers) so same user code can be used on both device types. However, there are different interfaces for the registers not based on PCIe standards (port logic and ti-conf which generally covers interrupts and address translation). That portion of user code needs to differ between C66x/K2x, AM57xx, and AM65xx devices.rjjj j2jj\j}r(j]j]j]j]j]ujKjhj]rj%XRThere are three revisions of the pcie hardware. The first, v0, in KeyStone devices (C66x, K2x). The second, v1, is in AM57xx devices. The third, v2, is in AM65xx devices. The LLD abstacts the configuration of standards-based PCIe registers (Type 0, Type 1 and Capabilities registers) so same user code can be used on both device types. However, there are different interfaces for the registers not based on PCIe standards (port logic and ti-conf which generally covers interrupts and address translation). That portion of user code needs to differ between C66x/K2x, AM57xx, and AM65xx devices.rr}r(jjjjubaubjX)r}r(jXUThe example includes configuration of one SoC as EP and a second as RC. It then performs a simple CPU-based memory transfer (EDMA can be used via the same addresses used by the CPU), and interrupt generation (from EP) and reception (to RC). It also shows differences in user code required to support both C66x/K2x, AM57xx and AM65xx devices.rjjj j2jj\j}r(j]j]j]j]j]ujKjhj]rj%XUThe example includes configuration of one SoC as EP and a second as RC. It then performs a simple CPU-based memory transfer (EDMA can be used via the same addresses used by the CPU), and interrupt generation (from EP) and reception (to RC). It also shows differences in user code required to support both C66x/K2x, AM57xx and AM65xx devices.rr}r(jjjjubaubjb)r}r(jX<Differences in Operation between C66x/K2x and AM57xx devicesrjjj j2jjfj}r(j]rU;differences-in-operation-between-c66xk2x-and-am57xx-devicesraj]j]j]j]rhaujNjhj]rj%X<Differences in Operation between C66x/K2x and AM57xx devicesrr}r(jjjjubaubjX)r}r(jXC66x/K2x, AM57xx, and AM65xx are functionally identical, except that interrupts are handled by example and lld only on AM57xx. Also older devices only support gen 1/2, while AM65xx supports gen 3.rjjj j2jj\j}r(j]j]j]j]j]ujK'jhj]rj%XC66x/K2x, AM57xx, and AM65xx are functionally identical, except that interrupts are handled by example and lld only on AM57xx. Also older devices only support gen 1/2, while AM65xx supports gen 3.rr}r(jjjjubaubjb)r}r(jXModes of OperationrjKjjj j2jjfj}r(j]rUid8raj]j]rXmodes-of-operationraj]j]ujNjhj]rj%XModes of Operationrr}r(jjjjubaubjX)r}r(jXgThe LLD is intended to bring up the PCIe peripheral, open memory mappings, and send/receive interrupts.rjjj j2jj\j}r(j]j]j]j]j]ujK.jhj]rj%XgThe LLD is intended to bring up the PCIe peripheral, open memory mappings, and send/receive interrupts.rr}r(jjjjubaubjb)r}r(jXRoot Complex (RC)rjjj j2jjfj}r(j]rUroot-complex-rcraj]j]j]j]rhaujNjhj]rj%XRoot Complex (RC)rr}r(jjjjubaubjX)r}r(jXoThe PCIe peripheral can be used as a root complex. One or more other endpoints can be connected (more than one requires a PCIe switch on the board). The LLD configures the peripheral in RC mode. It doesn't attempt to emulate the full enumeration capability of a Linux driver. Instead the user will need to supply code specific to each endpoint they intend to support.rjjj j2jj\j}r(j]j]j]j]j]ujK4jhj]r j%XoThe PCIe peripheral can be used as a root complex. One or more other endpoints can be connected (more than one requires a PCIe switch on the board). The LLD configures the peripheral in RC mode. It doesn't attempt to emulate the full enumeration capability of a Linux driver. Instead the user will need to supply code specific to each endpoint they intend to support.r r }r (jjjjubaubjb)r }r(jX Endpoint (EP)rjjj j2jjfj}r(j]rU endpoint-epraj]j]j]j]rhNaujNjhj]rj%X Endpoint (EP)rr}r(jjjj ubaubjX)r}r(jXThe PCIe peripheral can be used as an endpoint. This is the more intended usecase for the LLD. Once the link is initialized, the LLD can provide data addresses and send interrupts to the RC.rjjj j2jj\j}r(j]j]j]j]j]ujK>jhj]rj%XThe PCIe peripheral can be used as an endpoint. This is the more intended usecase for the LLD. Once the link is initialized, the LLD can provide data addresses and send interrupts to the RC.rr}r(jjjjubaubjb)r }r!(jX Interruptsr"jKjjj j2jjfj}r#(j]r$U interruptsr%aj]j]r&X interruptsr'aj]j]ujNjhj]r(j%X Interruptsr)r*}r+(jj"jj ubaubjX)r,}r-(jXThe example for AM57XX provides code to send interrupts from an endpoint, and the LLD/example together contain code to receive/demux the interrupts (both MSI and Legacy) on an RC.r.jjj j2jj\j}r/(j]j]j]j]j]ujKEjhj]r0j%XThe example for AM57XX provides code to send interrupts from an endpoint, and the LLD/example together contain code to receive/demux the interrupts (both MSI and Legacy) on an RC.r1r2}r3(jj.jj,ubaubeubj j2jj?j}r4(j]UlevelKj]j]r5jaUsourcej2j]j]UlineKUtypejAujKjhj]r6jX)r7}r8(jX+Duplicate implicit target name: "overview".j}r9(j]j]j]j]j]ujjj]r:j%X+Duplicate implicit target name: "overview".r;r<}r=(jUjj7ubajj\ubaubh)r>}r?(jUj}r@(j]UlevelKj]j]rAjaUsourcej j]j]UlineKUtypejXujjj]rBjX)rC}rD(jX5Duplicate explicit target name: "modes-of-operation".j}rE(j]j]j]j]j]ujj>j]rFj%X5Duplicate explicit target name: "modes-of-operation".rGrH}rI(jUjjCubajj\ubajj?ubh)rJ}rK(jUjj9j j2jj?j}rL(j]UlevelKj]j]rMj?aUsourcej2j]j]UlineKJUtypejAujKJjhj]rNjX)rO}rP(jX1Duplicate implicit target name: "user interface".j}rQ(j]j]j]j]j]ujjJj]rRj%X1Duplicate implicit target name: "user interface".rSrT}rU(jUjjOubajj\ubaubh)rV}rW(jUjjIj j2jj?j}rX(j]UlevelKj]j]rYjOaUsourcej2j]j]UlineKMUtypejAujKMjhj]rZjX)r[}r\(jX7Duplicate implicit target name: "driver configuration".j}r](j]j]j]j]j]ujjVj]r^j%X7Duplicate implicit target name: "driver configuration".r_r`}ra(jUjj[ubajj\ubaubh)rb}rc(jUj}rd(j]UlevelKj]j]rej^aUsourcej j]j]UlineKUtypejXujjYj]rfjX)rg}rh(jX?Duplicate explicit target name: "board-specific-configuration".j}ri(j]j]j]j]j]ujjbj]rjj%X?Duplicate explicit target name: "board-specific-configuration".rkrl}rm(jUjjgubajj\ubajj?ubh)rn}ro(jUjjj j2jj?j}rp(j]UlevelKj]j]rqjaUsourcej2j]j]UlineK]UtypejAujK]jhj]rrjX)rs}rt(jX0Duplicate implicit target name: "api call flow".j}ru(j]j]j]j]j]ujjnj]rvj%X0Duplicate implicit target name: "api call flow".rwrx}ry(jUjjsubajj\ubaubh)rz}r{(jUjjj j2jj?j}r|(j]UlevelKj]j]r}jaUsourcej2j]j]UlineKjUtypejAujKjjhj]r~jX)r}r(jX.Duplicate implicit target name: "application".j}r(j]j]j]j]j]ujjzj]rj%X.Duplicate implicit target name: "application".rr}r(jUjjubajj\ubaubh)r}r(jUjjj j2jj?j}r(j]UlevelKj]j]rjaUsourcej2j]j]UlineKmUtypejAujKmjhj]rjX)r}r(jX+Duplicate implicit target name: "examples".j}r(j]j]j]j]j]ujjj]rj%X+Duplicate implicit target name: "examples".rr}r(jUjjubajj\ubaubh)r}r(jUjjj j2jj?j}r(j]UlevelKj]j]rjaUsourcej2j]j]UlineMUtypejAujMjhj]rjX)r}r(jX8Duplicate implicit target name: "additional references".j}r(j]j]j]j]j]ujjj]rj%X8Duplicate implicit target name: "additional references".rr}r(jUjjubajj\ubaubh)r}r(jUjj)r}r(jUjKjj)r}r(jUjhj j jjj}r(j]j]j]j]rUgpioraj]rhOaujKjhj]r(j)r}r(jXGPIOrjjj j jj"j}r(j]j]j]j]j]ujKjhj]rj%XGPIOrr}r(jjjjubaubj))r}r(jX?http://processors.wiki.ti.com/index.php/Processor_SDK_RTOS_GPIOjjj j,X=source/rtos/PDK_Platform_Software/Device_Drivers/GPIO.rst.incrr}rbjj0j}r(j2j3j]j]j]j]j]ujKjhj]rj%X?http://processors.wiki.ti.com/index.php/Processor_SDK_RTOS_GPIOrr}r(jUjjubaubjj)r}r(jUjKjjj jjjj}r(j]rX applicationraj]j]j]rUid21raj]ujKPjhj]r(j)r}r(jX Applicationrjjj jjj"j}r(j]j]j]j]j]ujKPjhj]rj%X Applicationrr}r(jjjjubaubj)r}r(jUjKjjj jjjj}r(j]rXexamplesraj]j]j]rUid22raj]ujKSjhj]r(j)r}r(jXExamplesrjjj jjj"j}r(j]j]j]j]j]ujKSjhj]rj%XExamplesrr}r(jjjjubaubjX)r}r(jX>Refer SDK Release Note for GPIO support across different EVMs.rjjj jjj\j}r(j]j]j]j]j]ujKUjhj]rj%X>Refer SDK Release Note for GPIO support across different EVMs.rr}r(jjjjubaubj)r}r(jUjjj jjjj}r(j]j]j]j]j]ujNjhj]rj)r}r(jUj}r(j]j]j]j]j]UcolsKujjj]r(j)r}r(jUj}r(j]j]j]j]j]UcolwidthKujjj]jjubj)r}r(jUj}r(j]j]j]j]j]UcolwidthKujjj]jjubj)r}r(jUj}r(j]j]j]j]j]UcolwidthKujjj]jjubj)r}r(jUj}r(j]j]j]j]j]UcolwidthKujjj]jjubj)r}r(jUj}r(j]j]j]j]j]UcolwidthKujjj]jjubj)r}r(jUj}r(j]j]j]j]j]ujjj]rj)r}r(jUj}r(j]j]j]j]j]ujjj]r(j)r}r(jUj}r(j]j]j]j]j]ujjj]rjX)r}r(jXNamerjjj jjj\j}r (j]j]j]j]j]ujKXj]r j%XNamer r }r (jjjjubaubajjubj)r}r(jUj}r(j]j]j]j]j]ujjj]rjX)r}r(jX Descriptionrjjj jjj\j}r(j]j]j]j]j]ujKXj]rj%X Descriptionrr}r(jjjjubaubajjubj)r}r(jUj}r(j]j]j]j]j]ujjj]rj)r}r(jUj}r (j]j]j]j]j]ujjj]r!j)r"}r#(jXExpected Resultsr$jKjjj jjjj}r%(j]j]j]j]j]ujKj]r&j%XExpected Resultsr'r(}r)(jj$jj"ubaubajjubajjubj)r*}r+(jUj}r,(j]j]j]j]j]ujjj]r-jX)r.}r/(jX SoC Supportedr0jj*j jjj\j}r1(j]j]j]j]j]ujKXj]r2j%X SoC Supportedr3r4}r5(jj0jj.ubaubajjubj)r6}r7(jUj}r8(j]j]j]j]j]ujjj]r9jX)r:}r;(jX Build Typer<jj6j jjj\j}r=(j]j]j]j]j]ujKXj]r>j%X Build Typer?r@}rA(jj<jj:ubaubajjubejjubajjubj)rB}rC(jUj}rD(j]j]j]j]j]ujjj]rE(j)rF}rG(jUj}rH(j]j]j]j]j]ujjBj]rI(j)rJ}rK(jUj}rL(j]j]j]j]UmorerowsKj]ujjFj]rMjX)rN}rO(jX GPIO_LedBlinkrPjjJj jjj\j}rQ(j]j]j]j]j]ujKZj]rRj%X GPIO_LedBlinkrSrT}rU(jjPjjNubaubajjubj)rV}rW(jUj}rX(j]j]j]j]UmorerowsKj]ujjFj]rYjX)rZ}r[(jX)Simple example demonstrating LED Togglingr\jjVj jjj\j}r](j]j]j]j]j]ujKZj]r^j%X)Simple example demonstrating LED Togglingr_r`}ra(jj\jjZubaubajjubj)rb}rc(jUj}rd(j]j]j]j]UmorerowsKj]ujjFj]re(j)rf}rg(jUj}rh(j]j]j]j]j]ujjbj]rij)rj}rk(jX-Following LED blinks based on EVM being used.rljKjjfj jjjj}rm(j]j]j]j]j]ujKj]rnj%X-Following LED blinks based on EVM being used.rorp}rq(jjljjjubaubajjubj)rr}rs(jUj}rt(j]j]j]j]j]ujjbj]ruj)rv}rw(jX**AM335x ICEv2**: USER  LED 1jKjjrj jjjj}rx(j]j]j]j]j]ujKj]ry(j|)rz}r{(jX**AM335x ICEv2**j}r|(j]j]j]j]j]ujjvj]r}j%X AM335x ICEv2r~r}r(jUjjzubajjubj%X: USER  LED 1rr}r(jX: USER  LED 1jjvubeubajjubj)r}r(jUj}r(j]j]j]j]j]ujjbj]rj)r}r(jX**AM437x EVM**: USER  LED 1jKjjj jjjj}r(j]j]j]j]j]ujKj]r(j|)r}r(jX**AM437x EVM**j}r(j]j]j]j]j]ujjj]rj%X AM437x EVMrr}r(jUjjubajjubj%X: USER  LED 1rr}r(jX: USER  LED 1jjubeubajjubj)r}r(jUj}r(j]j]j]j]j]ujjbj]rj)r}r(jX**AM572x IDK** : STATUS LED 1 Yellow **AM572x GP EVM** : USER LED1 **AM574x IDK** : STATUS LED 1 Yellow **AM572x GP EVM** : USER LED1 **AM571x IDK** : Industrial LED 3 RedjKjjj jjjj}r(j]j]j]j]j]ujKj]r(j|)r}r(jX**AM572x IDK**j}r(j]j]j]j]j]ujjj]rj%X AM572x IDKrr}r(jUjjubajjubj%X : STATUS LED 1 Yellow rr}r(jX : STATUS LED 1 Yellow jjubj|)r}r(jX**AM572x GP EVM**j}r(j]j]j]j]j]ujjj]rj%X AM572x GP EVMrr}r(jUjjubajjubj%X : USER LED1 rr}r(jX : USER LED1 jjubj|)r}r(jX**AM574x IDK**j}r(j]j]j]j]j]ujjj]rj%X AM574x IDKrr}r(jUjjubajjubj%X : STATUS LED 1 Yellow rr}r(jX : STATUS LED 1 Yellow jjubj|)r}r(jX**AM572x GP EVM**j}r(j]j]j]j]j]ujjj]rj%X AM572x GP EVMrr}r(jUjjubajjubj%X : USER LED1 rr}r(jX : USER LED1 jjubj|)r}r(jX**AM571x IDK**j}r(j]j]j]j]j]ujjj]rj%X AM571x IDKrr}r(jUjjubajjubj%X : Industrial LED 3 Redrr}r(jX : Industrial LED 3 Redjjubeubajjubj)r}r(jUj}r(j]j]j]j]j]ujjbj]rj)r}r(jX**K2H EVM:** USER LED 2 BluejKjjj jjjj}r(j]j]j]j]j]ujKj]r(j|)r}r(jX **K2H EVM:**j}r(j]j]j]j]j]ujjj]rj%XK2H EVM:rr}r(jUjjubajjubj%X USER LED 2 Bluerr}r(jX USER LED 2 Bluejjubeubajjubj)r}r(jUj}r(j]j]j]j]j]ujjbj]rj)r}r(jX**K2E EVM:** USER LED 1 BluejKjjj jjjj}r(j]j]j]j]j]ujKj]r(j|)r}r(jX **K2E EVM:**j}r(j]j]j]j]j]ujjj]rj%XK2E EVM:rr}r(jUjjubajjubj%X USER LED 1 Bluerr}r(jX USER LED 1 Bluejjubeubajjubj)r}r(jUj}r(j]j]j]j]j]ujjbj]rj)r}r(jX**K2G EVM:** USER LED 1 YellowjKjjj jjjj}r(j]j]j]j]j]ujKj]r(j|)r}r(jX **K2G EVM:**j}r(j]j]j]j]j]ujjj]rj%XK2G EVM:rr}r(jUjjubajjubj%X USER LED 1 Yellowrr}r(jX USER LED 1 Yellowjjubeubajjubj)r}r(jUj}r(j]j]j]j]j]ujjbj]r j)r }r (jX**AM65xx EVM:** USER LD16, LD17jKjjj jjjj}r (j]j]j]j]j]ujKj]r (j|)r}r(jX**AM65xx EVM:**j}r(j]j]j]j]j]ujj j]rj%X AM65xx EVM:rr}r(jUjjubajjubj%X USER LD16, LD17rr}r(jX USER LD16, LD17jj ubeubajjubj)r}r(jUj}r(j]j]j]j]j]ujjbj]rj)r}r(jX**J721E EVM:** USER LED 1jKjjj jjjj}r(j]j]j]j]j]ujKj]r(j|)r }r!(jX**J721E EVM:**j}r"(j]j]j]j]j]ujjj]r#j%X J721E EVM:r$r%}r&(jUjj ubajjubj%X USER LED 1r'r(}r)(jX USER LED 1jjubeubajjubejjubj)r*}r+(jUj}r,(j]j]j]j]j]ujjFj]r-jX)r.}r/(jXTAM335x, AM437x, AM571x, AM572x, AM574x, k2g, k2hk, k2l, k2e, c6657, c6678, omapl137,r0jj*j jjj\j}r1(j]j]j]j]j]ujKZj]r2j%XTAM335x, AM437x, AM571x, AM572x, AM574x, k2g, k2hk, k2l, k2e, c6657, c6678, omapl137,r3r4}r5(jj0jj.ubaubajjubj)r6}r7(jUj}r8(j]j]j]j]j]ujjFj]r9jX)r:}r;(jX CCS projectr<jj6j jjj\j}r=(j]j]j]j]j]ujKZj]r>j%X CCS projectr?r@}rA(jj<jj:ubaubajjubejjubj)rB}rC(jUj}rD(j]j]j]j]j]ujjBj]rE(j)rF}rG(jUj}rH(j]j]j]j]j]ujjBj]rIjX)rJ}rK(jX am65xx j721erLjjFj jjj\j}rM(j]j]j]j]j]ujKhj]rNj%X am65xx j721erOrP}rQ(jjLjjJubaubajjubj)rR}rS(jUj}rT(j]j]j]j]j]ujjBj]rUjX)rV}rW(jXmakefilerXjjRj jjj\j}rY(j]j]j]j]j]ujKhj]rZj%Xmakefiler[r\}r](jjXjjVubaubajjubejjubejjubejjubaubj\)r^}r_(jXYThere are no user mode LEDs directly connected to GPIO pins on K2L, C6678 and C6657 EVMs.r`jjj jjj_j}ra(j]j]j]j]j]ujNjhj]rbjX)rc}rd(jj`jj^j jjj\j}re(j]j]j]j]j]ujKj]rfj%XYThere are no user mode LEDs directly connected to GPIO pins on K2L, C6678 and C6657 EVMs.rgrh}ri(jj`jjcubaubaubeubeubj)rj}rk(jUjjj jjjj}rl(j]j]j]j]rmUbuilding-gpio-examplesrnaj]rohaujKjhj]rp(j)rq}rr(jXBuilding GPIO examplesrsjjjj jjj"j}rt(j]j]j]j]j]ujKjhj]ruj%XBuilding GPIO examplesrvrw}rx(jjsjjqubaubj)ry}rz(jUjjjj jjjj}r{(jX-j]j]j]j]j]ujKjhj]r|j)r}}r~(jXMMakefile based examples and dependent libraries can be built from the top level or module level GPIO makefile, refer to the `Processor SDK RTOS Getting Started Guide `__ for details of how to setup the build environment. Once you have setup the build environment, issue the following commands:rjjyj jjj j}r(j]j]j]j]j]ujNjhj]rjX)r}r(jjjj}j jjj\j}r(j]j]j]j]j]ujKj]r(j%X|Makefile based examples and dependent libraries can be built from the top level or module level GPIO makefile, refer to the rr}r(jX|Makefile based examples and dependent libraries can be built from the top level or module level GPIO makefile, refer to the jjubj)r}r(jXT`Processor SDK RTOS Getting Started Guide `__j}r(UnameX(Processor SDK RTOS Getting Started GuidejX%index_overview.html#setup-environmentj]j]j]j]j]ujjj]rj%X(Processor SDK RTOS Getting Started Guiderr}r(jUjjubajjubj%X} for details of how to setup the build environment. Once you have setup the build environment, issue the following commands:rr}r(jX} for details of how to setup the build environment. Once you have setup the build environment, issue the following commands:jjubeubaubaubj#)r}r(jXTo build and clean libs/apps from top-level makefile: cd /packages make gpio make gpio_clean To build and clean libs/apps from module-level makefile: cd /packages/ti/drv/gpio make all make cleanjjjj jjj&j}r(j2j3j]j]j]j]j]ujMNjhj]rj%XTo build and clean libs/apps from top-level makefile: cd /packages make gpio make gpio_clean To build and clean libs/apps from module-level makefile: cd /packages/ti/drv/gpio make all make cleanrr}r(jUjjubaubj)r}r(jUjjjj jjjj}r(jX-j]j]j]j]j]ujKjhj]rj)r}r(jX2RTSC CCS project based examples are built from CCSrjjj jjj j}r(j]j]j]j]j]ujNjhj]rjX)r}r(jjjjj jjj\j}r(j]j]j]j]j]ujKj]rj%X2RTSC CCS project based examples are built from CCSrr}r(jjjjubaubaubaubj#)r}r(jXcd /packages ./pdkProjectCreate.sh [soc] [board] [endian] gpio [project type] [processor] [SECUREMODE=] Import and build CCS Project from /packages/MyExampleProjects/jjjj jjj&j}r(j2j3j]j]j]j]j]ujM\jhj]rj%Xcd /packages ./pdkProjectCreate.sh [soc] [board] [endian] gpio [project type] [processor] [SECUREMODE=] Import and build CCS Project from /packages/MyExampleProjects/rr}r(jUjjubaubeubj)r}r(jUjKjjj jjjj}r(j]rXfaqraj]j]j]rUfaqraj]ujKjhj]r(j)r}r(jXFAQrjjj jjj"j}r(j]j]j]j]j]ujKjhj]rj%XFAQrr}r(jjjjubaubjX)r}r(jX,**Is there any example using GPIO as input**rjjj jjj\j}r(j]j]j]j]j]ujKjhj]rj|)r}r(jjj}r(j]j]j]j]j]ujjj]rj%X(Is there any example using GPIO as inputrr}r(jUjjubajjubaubjX)r}r(jXPlease refer to `RTOS Customization: using an external input to trigger an interrupt on AM57x `_ for details.jjj jjj\j}r(j]j]j]j]j]ujKjhj]r(j%XPlease refer to rr}r(jXPlease refer to jjubj)r}r(jX`RTOS Customization: using an external input to trigger an interrupt on AM57x `_j}r(UnameXLRTOS Customization: using an external input to trigger an interrupt on AM57xjXdindex_how_to_guides.html#rtos-customization-using-an-external-input-to-trigger-an-interrupt-on-am57xrj]j]j]j]j]ujjj]rj%XLRTOS Customization: using an external input to trigger an interrupt on AM57xrr}r(jUjjubajjubj)r}r(jXg jKjjjjj}r(Urefurijj]rUKrtos-customization-using-an-external-input-to-trigger-an-interrupt-on-am57xraj]j]j]j]rhauj]ubj%X for details.rr}r(jX for details.jjubeubeubj)r}r(jUjKjjj jjjj}r(j]rXadditional referencesraj]j]j]rUid23raj]ujKjhj]r(j)r}r(jXAdditional Referencesrjjj jjj"j}r(j]j]j]j]j]ujKjhj]rj%XAdditional Referencesrr}r(jjjjubaubj)r}r(jUjjj jjjj}r(j]j]j]j]j]ujNjhj]rj)r}r(jUj}r(j]j]j]j]j]UcolsKujjj]r(j)r}r(jUj}r(j]j]j]j]j]UcolwidthKujjj]jjubj)r}r(jUj}r(j]j]j]j]j]UcolwidthK#ujjj]jjubj)r}r(jUj}r(j]j]j]j]j]ujjj]r(j)r}r(jUj}r (j]j]j]j]j]ujjj]r (j)r }r (jUj}r (j]j]j]j]j]ujjj]rjX)r}r(jX **Document**rjj j jjj\j}r(j]j]j]j]j]ujKj]rj|)r}r(jjj}r(j]j]j]j]j]ujjj]rj%XDocumentrr}r(jUjjubajjubaubajjubj)r}r(jUj}r(j]j]j]j]j]ujjj]rjX)r}r (jX **Location**r!jjj jjj\j}r"(j]j]j]j]j]ujKj]r#j|)r$}r%(jj!j}r&(j]j]j]j]j]ujjj]r'j%XLocationr(r)}r*(jUjj$ubajjubaubajjubejjubj)r+}r,(jUj}r-(j]j]j]j]j]ujjj]r.(j)r/}r0(jUj}r1(j]j]j]j]j]ujj+j]r2jX)r3}r4(jXAPI Reference Manualr5jj/j jjj\j}r6(j]j]j]j]j]ujKj]r7j%XAPI Reference Manualr8r9}r:(jj5jj3ubaubajjubj)r;}r<(jUj}r=(j]j]j]j]j]ujj+j]r>jX)r?}r@(jXI$(TI_PDK_INSTALL_DIR)/packages/ti /drv/gpio/docs/doxygen/html/index .htmlrAjj;j jjj\j}rB(j]j]j]j]j]ujKj]rCj%XI$(TI_PDK_INSTALL_DIR)/packages/ti /drv/gpio/docs/doxygen/html/index .htmlrDrE}rF(jjAjj?ubaubajjubejjubj)rG}rH(jUj}rI(j]j]j]j]j]ujjj]rJ(j)rK}rL(jUj}rM(j]j]j]j]j]ujjGj]rNjX)rO}rP(jX Release NotesrQjjKj jjj\j}rR(j]j]j]j]j]ujKj]rSj%X Release NotesrTrU}rV(jjQjjOubaubajjubj)rW}rX(jUj}rY(j]j]j]j]j]ujjGj]rZjX)r[}r\(jXK$(TI_PDK_INSTALL_DIR)/packages/ti /drv/gpio/docs/ReleaseNotes_GPIO _LLD.pdfr]jjWj jjj\j}r^(j]j]j]j]j]ujKj]r_j%XK$(TI_PDK_INSTALL_DIR)/packages/ti /drv/gpio/docs/ReleaseNotes_GPIO _LLD.pdfr`ra}rb(jj]jj[ubaubajjubejjubejjubejjubaubj)rc}rd(jUjjj jjjj}re(j]j]j]j]j]ujKjhj]rfj)rg}rh(jUjKjjcj jjjj}ri(j]j]j]j]j]ujKjhj]ubaubeubeubj jjjj}rj(j]rkXoverviewrlaj]j]j]rmUid16rnaj]ujKjhj]ro(j)rp}rq(jXOverviewrrjjj jjj"j}rs(j]j]j]j]j]ujKjhj]rtj%XOverviewrurv}rw(jjrjjpubaubj)rx}ry(jUjKjjj jjjj}rz(j]r{jLaj]j]j]r|Uid17r}aj]ujKjhj]r~(j)r}r(jX Introductionrjjxj jjj"j}r(j]j]j]j]j]ujKjhj]rj%X Introductionrr}r(jjjjubaubjX)r}r(jXGPIO module allows application to manage General Purpose I/O  instances and pins via simple portable APIs. Because of its simplicity, APIs are pin based and does not follow model of other drivers inside PDK which requires handle abstraction.rjjxj jjj\j}r(j]j]j]j]j]ujK jhj]rj%XGPIO module allows application to manage General Purpose I/O  instances and pins via simple portable APIs. Because of its simplicity, APIs are pin based and does not follow model of other drivers inside PDK which requires handle abstraction.rr}r(jjjjubaubjb)r}r(jXModes of OperationrjKjjxj jjjfj}r(j]rUid18raj]j]rXmodes-of-operationraj]j]ujNjhj]rj%XModes of Operationrr}r(jjjjubaubjX)r}r(jXFollowing modes of operations are supported **Input or Output** Each gpio pin can be configured as either input: GPIO_CFG_INPUT or output: GPIO_CFG_OUTPUT. If it is configured as an output then pin level can be additionally configuredjjxj jjj\j}r(j]j]j]j]j]ujKjhj]r(j%X,Following modes of operations are supported rr}r(jX,Following modes of operations are supported jjubj|)r}r(jX**Input or Output**j}r(j]j]j]j]j]ujjj]rj%XInput or Outputrr}r(jUjjubajjubj%X Each gpio pin can be configured as either input: GPIO_CFG_INPUT or output: GPIO_CFG_OUTPUT. If it is configured as an output then pin level can be additionally configuredrr}r(jX Each gpio pin can be configured as either input: GPIO_CFG_INPUT or output: GPIO_CFG_OUTPUT. If it is configured as an output then pin level can be additionally configuredjjubeubjX)r}r(jX**Interrupt support** Each gpio pin can be configured to generate interrupts based on event type GPIO_CFG_IN_INT_XXX configuration. To generate interrupt, gpio pin has to be configured as input pin.jjxj jjj\j}r(j]j]j]j]j]ujKjhj]r(j|)r}r(jX**Interrupt support**j}r(j]j]j]j]j]ujjj]rj%XInterrupt supportrr}r(jUjjubajjubj%X Each gpio pin can be configured to generate interrupts based on event type GPIO_CFG_IN_INT_XXX configuration. To generate interrupt, gpio pin has to be configured as input pin.rr}r(jX Each gpio pin can be configured to generate interrupts based on event type GPIO_CFG_IN_INT_XXX configuration. To generate interrupt, gpio pin has to be configured as input pin.jjubeubjb)r}r(jXDriver Configurationrjjxj jjjfj}r(j]rUdriver-configuration-gpioraj]j]j]j]rh]aujNjhj]rj%XDriver Configurationrr}r(jjjjubaubjb)r}r(jX **Board Specific Configuration**rjKjjxj jjjfj}r(j]rUid19raj]j]rXboard-specific-configurationraj]j]ujNjhj]rj|)r}r(jjj}r(j]j]j]j]j]ujjj]rj%XBoard Specific Configurationrr}r(jUjjubajjubaubjX)r}r(jXAll board specific configurations like enabling clock and pin-mux are required before calling any driver APIs. By default Board_Init() API available under board module supports all initialization sequence for TI supported EVMs. In addition it initializes UART instance for Console/STDIO. Refer `Processor SDK RTOS Board Support `__ for additional details.jjxj jjj\j}r(j]j]j]j]j]ujK"jhj]r(j%X&All board specific configurations like enabling clock and pin-mux are required before calling any driver APIs. By default Board_Init() API available under board module supports all initialization sequence for TI supported EVMs. In addition it initializes UART instance for Console/STDIO. Refer rr}r(jX&All board specific configurations like enabling clock and pin-mux are required before calling any driver APIs. By default Board_Init() API available under board module supports all initialization sequence for TI supported EVMs. In addition it initializes UART instance for Console/STDIO. Refer jjubj)r}r(jXE`Processor SDK RTOS Board Support `__j}r(UnameX Processor SDK RTOS Board SupportjXindex_board.html#board-supportj]j]j]j]j]ujjj]rj%X Processor SDK RTOS Board Supportrr}r(jUjjubajjubj%X for additional details.rr}r(jX for additional details.jjubeubjb)r}r(jX **GPIO Configuration Structure**rjjxj jjjfj}r(j]rUgpio-configuration-structureraj]j]j]j]rhPaujNjhj]rj|)r}r(jjj}r(j]j]j]j]j]ujjj]rj%XGPIO Configuration Structurerr}r(jUjjubajjubaubjX)r}r(jXGPIO_soc.c binds driver with hardware attributes on the board. Hardware attributes includes base address, interrupt number etc. GPIO pin behavior can be configured statically, or alternatively dynamically during runtime.rjjxj jjj\j}r(j]j]j]j]j]ujK-jhj]rj%XGPIO_soc.c binds driver with hardware attributes on the board. Hardware attributes includes base address, interrupt number etc. GPIO pin behavior can be configured statically, or alternatively dynamically during runtime.rr}r(jjjjubaubjX)r}r(jXGPIO_init () API triggers all static configuration information available through hardware attributes. Once initialization is complete additional APIs can be used to configure and access pins.rjjxj jjj\j}r(j]j]j]j]j]ujK2jhj]rj%XGPIO_init () API triggers all static configuration information available through hardware attributes. Once initialization is complete additional APIs can be used to configure and access pins.rr}r(jjjjubaubeubj)r}r(jUjKjjj jjjj}r(j]rj#aj]j]j]r Uid20r aj]ujK7jhj]r (j)r }r (jXAPIsrjjj jjj"j}r(j]j]j]j]j]ujK7jhj]rj%XAPIsrr}r(jjjj ubaubjX)r}r(jXAPI reference for Application:rjjj jjj\j}r(j]j]j]j]j]ujK9jhj]rj%XAPI reference for Application:rr}r(jjjjubaubj#)r}r(jX#include jjj jjj&j}r(UlinenosrUlanguager Xcj2j3j]j]j]Uhighlight_argsr!}j]j]ujK;jhj]r"j%X#include r#r$}r%(jUjjubaubjX)r&}r'(jXTBelow sequence indicates API calling sequence for a simple use case of LED togglingr(jjj jjj\j}r)(j]j]j]j]j]ujK?jhj]r*j%XTBelow sequence indicates API calling sequence for a simple use case of LED togglingr+r,}r-(jj(jj&ubaubj#)r.}r/(jX... Board_init(boardCfg); GPIO_init(); While(1) { GPIO_write(Board_LED1, GPIO_PIN_VAL_HIGH); Delay(); GPIO_write(Board_LED1, GPIO_PIN_VAL_LOW); Delay(); }jjj jjj&j}r0(jj Xcj2j3j]j]j]j!}j]j]ujKBjhj]r1j%X... Board_init(boardCfg); GPIO_init(); While(1) { GPIO_write(Board_LED1, GPIO_PIN_VAL_HIGH); Delay(); GPIO_write(Board_LED1, GPIO_PIN_VAL_LOW); Delay(); }r2r3}r4(jUjj.ubaubeubeubj jjj?j}r5(j]UlevelKj]j]r6jnaUsourcejj]j]UlineKUtypejAujKjhj]r7jX)r8}r9(jX+Duplicate implicit target name: "overview".j}r:(j]j]j]j]j]ujjj]r;j%X+Duplicate implicit target name: "overview".r<r=}r>(jUjj8ubajj\ubaubh)r?}r@(jUjjxj jjj?j}rA(j]UlevelKj]j]rBj}aUsourcejj]j]UlineKUtypejAujKjhj]rCjX)rD}rE(jX/Duplicate implicit target name: "introduction".j}rF(j]j]j]j]j]ujj?j]rGj%X/Duplicate implicit target name: "introduction".rHrI}rJ(jUjjDubajj\ubaubh)rK}rL(jUj}rM(j]UlevelKj]j]rNjaUsourcej j]j]UlineKUtypejXujjj]rOjX)rP}rQ(jX5Duplicate explicit target name: "modes-of-operation".j}rR(j]j]j]j]j]ujjKj]rSj%X5Duplicate explicit target name: "modes-of-operation".rTrU}rV(jUjjPubajj\ubajj?ubh)rW}rX(jUj}rY(j]UlevelKj]j]rZjaUsourcej j]j]UlineKUtypejXujjj]r[jX)r\}r](jX?Duplicate explicit target name: "board-specific-configuration".j}r^(j]j]j]j]j]ujjWj]r_j%X?Duplicate explicit target name: "board-specific-configuration".r`ra}rb(jUjj\ubajj\ubajj?ubh)rc}rd(jUjjj jjj?j}re(j]UlevelKj]j]rfj aUsourcejj]j]UlineK7UtypejAujK7jhj]rgjX)rh}ri(jX'Duplicate implicit target name: "apis".j}rj(j]j]j]j]j]ujjcj]rkj%X'Duplicate implicit target name: "apis".rlrm}rn(jUjjhubajj\ubaubh)ro}rp(jUjjj jjj?j}rq(j]UlevelKj]j]rrjaUsourcejj]j]UlineKPUtypejAujKPjhj]rsjX)rt}ru(jX.Duplicate implicit target name: "application".j}rv(j]j]j]j]j]ujjoj]rwj%X.Duplicate implicit target name: "application".rxry}rz(jUjjtubajj\ubaubh)r{}r|(jUjjj jjj?j}r}(j]UlevelKj]j]r~jaUsourcejj]j]UlineKSUtypejAujKSjhj]rjX)r}r(jX+Duplicate implicit target name: "examples".j}r(j]j]j]j]j]ujj{j]rj%X+Duplicate implicit target name: "examples".rr}r(jUjjubajj\ubaubh)r}r(jUjjjj jjj?j}r(j]UlevelKj]j]Usourcejj]j]UlineKUtypejXujKjhj]rjX)r}r(jX;Bullet list ends without a blank line; unexpected unindent.j}r(j]j]j]j]j]ujjj]rj%X;Bullet list ends without a blank line; unexpected unindent.rr}r(jUjjubajj\ubaubh)r}r(jUjjjj jjj?j}r(j]UlevelKj]j]Usourcejj]j]UlineKUtypejXujKjhj]rjX)r}r(jX;Bullet list ends without a blank line; unexpected unindent.j}r(j]j]j]j]j]ujjj]rj%X;Bullet list ends without a blank line; unexpected unindent.rr}r(jUjjubajj\ubaubh)r}r(jUjjj jjj?j}r(j]UlevelKj]j]rjaUsourcejj]j]UlineKUtypejAujKjhj]rjX)r}r(jX8Duplicate implicit target name: "additional references".j}r(j]j]j]j]j]ujjj]rj%X8Duplicate implicit target name: "additional references".rr}r(jUjjubajj\ubaubh)r}r(jUjj)r}r(jUjKjj)r}r(jUjhj j jjj}r(j]j]j]j]rUi2craj]rhaujK!jhj]r(j)r}r(jXI2Crjjj j jj"j}r(j]j]j]j]j]ujK!jhj]rj%XI2Crr}r(jjjjubaubj))r}r(jX>http://processors.wiki.ti.com/index.php/Processor_SDK_RTOS_I2Cjjj j,X<source/rtos/PDK_Platform_Software/Device_Drivers/I2C.rst.incrr}rbjj0j}r(j2j3j]j]j]j]j]ujKjhj]rj%X>http://processors.wiki.ti.com/index.php/Processor_SDK_RTOS_I2Crr}r(jUjjubaubjj)r}r(jUjKjjj jjjj}r(j]rXuser interfaceraj]j]j]rUid26raj]ujK5jhj]r(j)r}r(jXUser Interfacerjjj jjj"j}r(j]j]j]j]j]ujK5jhj]rj%XUser Interfacerr}r(jjjjubaubj)r}r(jUjKjjj jjjj}r(j]rXdriver configurationraj]j]j]rUid27raj]ujK8jhj]r(j)r}r(jXDriver Configurationrjjj jjj"j}r(j]j]j]j]j]ujK8jhj]rj%XDriver Configurationrr}r(jjjjubaubjb)r}r(jX **Board Specific Configuration**rjKjjj jjjfj}r(j]rUid28raj]j]rXboard-specific-configurationraj]j]ujNjhj]rj|)r}r(jjj}r(j]j]j]j]j]ujjj]rj%XBoard Specific Configurationrr}r(jUjjubajjubaubjX)r}r(jX7All the board specific configurations eg:enabling and pin-mux of I2C pins should be performed before calling any driver APIs.By default Board_Init() API supports all initialization sequence for TI supported EVMs.Refer `Processor SDK RTOS Board Support `__ for additional details.jjj jjj\j}r(j]j]j]j]j]ujK=jhj]r(j%XAll the board specific configurations eg:enabling and pin-mux of I2C pins should be performed before calling any driver APIs.By default Board_Init() API supports all initialization sequence for TI supported EVMs.Refer rr}r(jXAll the board specific configurations eg:enabling and pin-mux of I2C pins should be performed before calling any driver APIs.By default Board_Init() API supports all initialization sequence for TI supported EVMs.Refer jjubj)r}r(jXE`Processor SDK RTOS Board Support `__j}r(UnameX Processor SDK RTOS Board SupportjXindex_board.html#board-supportj]j]j]j]j]ujjj]rj%X Processor SDK RTOS Board Supportrr}r(jUjjubajjubj%X for additional details.rr}r(jX for additional details.jjubeubjX)r}r(jXjOnce the board specific configuration is complete driver API I2C_init() can be called to initialize driverr jjj jjj\j}r (j]j]j]j]j]ujKDjhj]r j%XjOnce the board specific configuration is complete driver API I2C_init() can be called to initialize driverr r }r(jj jjubaubjb)r}r(jX**I2C Configuration Structure**rjjj jjjfj}r(j]rUi2c-configuration-structureraj]j]j]j]rhaujNjhj]rj|)r}r(jjj}r(j]j]j]j]j]ujjj]rj%XI2C Configuration Structurerr}r(jUjjubajjubaubjX)r}r(jXI2C_soc.c file binds driver with hardware attributes on the board through I2C_config structure. This structure must be provided to I2C driver. It must be initialized before the I2C_init() function is called and cannot be changed afterwards. For details about the individual fields of this structure, see the Doxygen help by opening PDK_INSTALL_DIR\\packages\\ti\\drv\\i2c\\docs\\doxygen\\html\\index.html.jjj jjj\j}r (j]j]j]j]j]ujKJjhj]r!j%XI2C_soc.c file binds driver with hardware attributes on the board through I2C_config structure. This structure must be provided to I2C driver. It must be initialized before the I2C_init() function is called and cannot be changed afterwards. For details about the individual fields of this structure, see the Doxygen help by opening PDK_INSTALL_DIR\packages\ti\drv\i2c\docs\doxygen\html\index.html.r"r#}r$(jXI2C_soc.c file binds driver with hardware attributes on the board through I2C_config structure. This structure must be provided to I2C driver. It must be initialized before the I2C_init() function is called and cannot be changed afterwards. For details about the individual fields of this structure, see the Doxygen help by opening PDK_INSTALL_DIR\\packages\\ti\\drv\\i2c\\docs\\doxygen\\html\\index.html.jjubaubeubj)r%}r&(jUjKjjj jjjj}r'(j]r(Xapisr)aj]j]j]r*Uid29r+aj]ujKRjhj]r,(j)r-}r.(jXAPIsr/jj%j jjj"j}r0(j]j]j]j]j]ujKRjhj]r1j%XAPIsr2r3}r4(jj/jj-ubaubjX)r5}r6(jXAPI reference for application:r7jj%j jjj\j}r8(j]j]j]j]j]ujKTjhj]r9j%XAPI reference for application:r:r;}r<(jj7jj5ubaubj#)r=}r>(jX#include jj%j jjj&j}r?(j2j3j]j]j]j]j]ujMjhj]r@j%X#include rArB}rC(jUjj=ubaubjX)rD}rE(jX. Sample code for initiating I2C transaction:rFjj%j jjj\j}rG(j]j]j]j]j]ujKZjhj]rHj%X. Sample code for initiating I2C transaction:rIrJ}rK(jjFjjDubaubj#)rL}rM(jX... Board_init(boardCfg); ... I2C_socGetInitCfg(peripheralNum, &i2c_cfg); ... I2C_socSetInitCfg(peripheralNum, &i2c_cfg); ... i2c = I2C_open(peripheralNum, &i2cParams); ... ... /* Initiate I2C transfers. Refer Example for details */ I2C_transactionInit(&i2cTransaction); transaction.masterMode = true; ... ... transferOK = I2C_transfer(i2c, &i2cTransaction); if (transferOK != I2C_STS_SUCCESS) { /* I2C transaction failed */ }jj%j jjj&j}rN(j2j3j]j]j]j]j]ujMjhj]rOj%X... Board_init(boardCfg); ... I2C_socGetInitCfg(peripheralNum, &i2c_cfg); ... I2C_socSetInitCfg(peripheralNum, &i2c_cfg); ... i2c = I2C_open(peripheralNum, &i2cParams); ... ... /* Initiate I2C transfers. Refer Example for details */ I2C_transactionInit(&i2cTransaction); transaction.masterMode = true; ... ... transferOK = I2C_transfer(i2c, &i2cTransaction); if (transferOK != I2C_STS_SUCCESS) { /* I2C transaction failed */ }rPrQ}rR(jUjjLubaubeubeubj)rS}rT(jUjKjjj jjjj}rU(j]rVX applicationrWaj]j]j]rXUid30rYaj]ujKujhj]rZ(j)r[}r\(jX Applicationr]jjSj jjj"j}r^(j]j]j]j]j]ujKujhj]r_j%X Applicationr`ra}rb(jj]jj[ubaubj)rc}rd(jUjKjjSj jjjj}re(j]rfXexamplesrgaj]j]j]rhUid31riaj]ujKxjhj]rj(j)rk}rl(jXExamplesrmjjcj jjj"j}rn(j]j]j]j]j]ujKxjhj]roj%XExamplesrprq}rr(jjmjjkubaubjX)rs}rt(jX8Refer Release Note for I2C support across different EVMsrujjcj jjj\j}rv(j]j]j]j]j]ujKzjhj]rwj%X8Refer Release Note for I2C support across different EVMsrxry}rz(jjujjsubaubj)r{}r|(jUjjcj jjjj}r}(j]j]j]j]j]ujNjhj]r~j)r}r(jUj}r(j]j]j]j]j]UcolsKujj{j]r(j)r}r(jUj}r(j]j]j]j]j]UcolwidthKujjj]jjubj)r}r(jUj}r(j]j]j]j]j]UcolwidthKujjj]jjubj)r}r(jUj}r(j]j]j]j]j]UcolwidthKujjj]jjubj)r}r(jUj}r(j]j]j]j]j]UcolwidthKujjj]jjubj)r}r(jUj}r(j]j]j]j]j]UcolwidthKujjj]jjubj)r}r(jUj}r(j]j]j]j]j]ujjj]rj)r}r(jUj}r(j]j]j]j]j]ujjj]r(j)r}r(jUj}r(j]j]j]j]j]ujjj]rj)r}r(jUj}r(j]j]j]j]j]ujjj]rj)r}r(jXNamerjKjjj jjjj}r(j]j]j]j]j]ujKj]rj%XNamerr}r(jjjjubaubajjubajjubj)r}r(jUj}r(j]j]j]j]j]ujjj]rj)r}r(jUj}r(j]j]j]j]j]ujjj]rj)r}r(jX DescriptionrjKjjj jjjj}r(j]j]j]j]j]ujKj]rj%X Descriptionrr}r(jjjjubaubajjubajjubj)r}r(jUj}r(j]j]j]j]j]ujjj]rj)r}r(jUj}r(j]j]j]j]j]ujjj]rj)r}r(jXExpected ResultsrjKjjj jjjj}r(j]j]j]j]j]ujKj]rj%XExpected Resultsrr}r(jjjjubaubajjubajjubj)r}r(jUj}r(j]j]j]j]j]ujjj]rjX)r}r(jX SoC Supportedrjjj jjj\j}r(j]j]j]j]j]ujK}j]rj%X SoC Supportedrr}r(jjjjubaubajjubj)r}r(jUj}r(j]j]j]j]j]ujjj]rjX)r}r(jX Build Typerjjj jjj\j}r(j]j]j]j]j]ujK}j]rj%X Build Typerr}r(jjjjubaubajjubejjubajjubj)r}r(jUj}r(j]j]j]j]j]ujjj]r(j)r}r(jUj}r(j]j]j]j]j]ujjj]r(j)r}r(jUj}r(j]j]j]j]j]ujjj]rjX)r}r(jX"I2C_EepromRead Example applicationrjjj jjj\j}r(j]j]j]j]j]ujKj]rj%X"I2C_EepromRead Example applicationrr}r(jjjjubaubajjubj)r}r(jUj}r(j]j]j]j]j]ujjj]rj)r}r(jUj}r(j]j]j]j]j]ujjj]rj)r}r(jXeSimple example to read fixed number of bytes from EEPROM on board and compares it with expected data.rjKjjj jjjj}r(j]j]j]j]j]ujKj]rj%XeSimple example to read fixed number of bytes from EEPROM on board and compares it with expected data.rr}r(jjjjubaubajjubajjubj)r}r(jUj}r(j]j]j]j]j]ujjj]r j)r }r (jUj}r (j]j]j]j]j]ujjj]r (j)r}r(jXBFollowing prints will come on console based on pass/fail criteria:rjKjj j jjjj}r(j]j]j]j]j]ujKj]rj%XBFollowing prints will come on console based on pass/fail criteria:rr}r(jjjjubaubj)r}r(jUjKjj j jjjj}r(j]j]j]j]j]ujKj]ubj)r}r(jX**Pass criteria:**rjKjj j jjjj}r(j]j]j]j]j]ujKj]rj|)r}r(jjj}r (j]j]j]j]j]ujjj]r!j%XPass criteria:r"r#}r$(jUjjubajjubaubj)r%}r&(jUjKjj j jjjj}r'(j]j]j]j]j]ujKj]ubj)r(}r)(jX*EEPROM data matched All tests have passed.r*jKjj j jjjj}r+(j]j]j]j]j]ujKj]r,j%X*EEPROM data matched All tests have passed.r-r.}r/(jj*jj(ubaubejjubajjubj)r0}r1(jUj}r2(j]j]j]j]j]ujjj]r3jX)r4}r5(jXSAM335x, AM437x, AM571x, AM572x, AM574x, k2g, k2hk,k2l,k2e,k2l c6657,c6678 omapl137,r6jj0j jjj\j}r7(j]j]j]j]j]ujKj]r8j%XSAM335x, AM437x, AM571x, AM572x, AM574x, k2g, k2hk,k2l,k2e,k2l c6657,c6678 omapl137,r9r:}r;(jj6jj4ubaubajjubj)r<}r=(jUj}r>(j]j]j]j]j]ujjj]r?jX)r@}rA(jX CCS projectrBjj<j jjj\j}rC(j]j]j]j]j]ujKj]rDj%X CCS projectrErF}rG(jjBjj@ubaubajjubejjubj)rH}rI(jUj}rJ(j]j]j]j]j]ujjj]rK(j)rL}rM(jUj}rN(j]j]j]j]UmorerowsKj]ujjHj]rOjX)rP}rQ(jXI2C_TestApplicationrRjjLj jjj\j}rS(j]j]j]j]j]ujKj]rTj%XI2C_TestApplicationrUrV}rW(jjRjjPubaubajjubj)rX}rY(jUj}rZ(j]j]j]j]UmorerowsKj]ujjHj]r[j)r\}r](jUj}r^(j]j]j]j]j]ujjXj]r_j)r`}ra(jXFDriver Unit Test application for additional I2C speed and other testsrbjKjj\j jjjj}rc(j]j]j]j]j]ujKj]rdj%XFDriver Unit Test application for additional I2C speed and other testsrerf}rg(jjbjj`ubaubajjubajjubj)rh}ri(jUj}rj(j]j]j]j]UmorerowsKj]ujjHj]rkj)rl}rm(jUj}rn(j]j]j]j]j]ujjhj]ro(j)rp}rq(jXBFollowing prints will come on console based on pass/fail criteria:rrjKjjlj jjjj}rs(j]j]j]j]j]ujKj]rtj%XBFollowing prints will come on console based on pass/fail criteria:rurv}rw(jjrjjpubaubj)rx}ry(jUjKjjlj jjjj}rz(j]j]j]j]j]ujKj]ubj)r{}r|(jX**Pass criteria:**r}jKjjlj jjjj}r~(j]j]j]j]j]ujKj]rj|)r}r(jj}j}r(j]j]j]j]j]ujj{j]rj%XPass criteria:rr}r(jUjjubajjubaubj)r}r(jUjKjjlj jjjj}r(j]j]j]j]j]ujKj]ubj)r}r(jXI2C Test: 100Kbps: PASSrjKjjlj jjjj}r(j]j]j]j]j]ujKj]rj%XI2C Test: 100Kbps: PASSrr}r(jjjjubaubj)r}r(jUjKjjlj jjjj}r(j]j]j]j]j]ujKj]ubj)r}r(jXI2C Test: 400Kbps: PASSrjKjjlj jjjj}r(j]j]j]j]j]ujKj]rj%XI2C Test: 400Kbps: PASSrr}r(jjjjubaubj)r}r(jUjKjjlj jjjj}r(j]j]j]j]j]ujKj]ubj)r}r(jXI2C Test: timeout test passedrjKjjlj jjjj}r(j]j]j]j]j]ujKj]rj%XI2C Test: timeout test passedrr}r(jjjjubaubj)r}r(jUjKjjlj jjjj}r(j]j]j]j]j]ujKj]ubj)r}r(jXAll tests have passed.rjKjjlj jjjj}r(j]j]j]j]j]ujKj]rj%XAll tests have passed.rr}r(jjjjubaubejjubajjubj)r}r(jUj}r(j]j]j]j]j]ujjHj]rjX)r}r(jXTAM335x, AM437x, AM571x, AM572x, AM574x, k2g, k2hk, k2l, k2e, c6657, c6678, omapl137,rjjj jjj\j}r(j]j]j]j]j]ujKj]rj%XTAM335x, AM437x, AM571x, AM572x, AM574x, k2g, k2hk, k2l, k2e, c6657, c6678, omapl137,rr}r(jjjjubaubajjubj)r}r(jUj}r(j]j]j]j]j]ujjHj]rjX)r}r(jX CCS projectrjjj jjj\j}r(j]j]j]j]j]ujKj]rj%X CCS projectrr}r(jjjjubaubajjubejjubj)r}r(jUj}r(j]j]j]j]j]ujjj]r(j)r}r(jUj}r(j]j]j]j]j]ujjj]rjX)r}r(jX am65xx j721erjjj jjj\j}r(j]j]j]j]j]ujKj]rj%X am65xx j721err}r(jjjjubaubajjubj)r}r(jUj}r(j]j]j]j]j]ujjj]rjX)r}r(jXmakefilerjjj jjj\j}r(j]j]j]j]j]ujKj]rj%Xmakefilerr}r(jjjjubaubajjubejjubj)r}r(jUj}r(j]j]j]j]j]ujjj]r(j)r}r(jUj}r(j]j]j]j]UmorerowsKj]ujjj]rjX)r}r(jXI2C_SMP_Test Applicationrjjj jjj\j}r(j]j]j]j]j]ujKj]rj%XI2C_SMP_Test Applicationrr}r(jjjjubaubajjubj)r}r(jUj}r(j]j]j]j]UmorerowsKj]ujjj]rj)r}r(jUj}r(j]j]j]j]j]ujjj]rj)r}r(jXlDriver Unit Test application for additional I2C speed and other tests with SMP enabled. (A15 and A53 cores)rjKjjj jjjj}r(j]j]j]j]j]ujKj]rj%XlDriver Unit Test application for additional I2C speed and other tests with SMP enabled. (A15 and A53 cores)rr}r(jjjjubaubajjubajjubj)r}r(jUj}r (j]j]j]j]UmorerowsKj]ujjj]r j)r }r (jUj}r (j]j]j]j]j]ujjj]r(j)r}r(jXBFollowing prints will come on console based on pass/fail criteria:rjKjj j jjjj}r(j]j]j]j]j]ujKj]rj%XBFollowing prints will come on console based on pass/fail criteria:rr}r(jjjjubaubj)r}r(jUjKjj j jjjj}r(j]j]j]j]j]ujKj]ubj)r}r(jX**Pass criteria:**rjKjj j jjjj}r(j]j]j]j]j]ujKj]rj|)r}r (jjj}r!(j]j]j]j]j]ujjj]r"j%XPass criteria:r#r$}r%(jUjjubajjubaubj)r&}r'(jUjKjj j jjjj}r((j]j]j]j]j]ujKj]ubj)r)}r*(jXI2C Test: 100Kbps: PASSr+jKjj j jjjj}r,(j]j]j]j]j]ujKj]r-j%XI2C Test: 100Kbps: PASSr.r/}r0(jj+jj)ubaubj)r1}r2(jUjKjj j jjjj}r3(j]j]j]j]j]ujKj]ubj)r4}r5(jXI2C Test: 400Kbps: PASSr6jKjj j jjjj}r7(j]j]j]j]j]ujKj]r8j%XI2C Test: 400Kbps: PASSr9r:}r;(jj6jj4ubaubj)r<}r=(jUjKjj j jjjj}r>(j]j]j]j]j]ujKj]ubj)r?}r@(jXI2C Test: timeout test passedrAjKjj j jjjj}rB(j]j]j]j]j]ujKj]rCj%XI2C Test: timeout test passedrDrE}rF(jjAjj?ubaubj)rG}rH(jUjKjj j jjjj}rI(j]j]j]j]j]ujKj]ubj)rJ}rK(jXAll tests have passed.rLjKjj j jjjj}rM(j]j]j]j]j]ujKj]rNj%XAll tests have passed.rOrP}rQ(jjLjjJubaubejjubajjubj)rR}rS(jUj}rT(j]j]j]j]j]ujjj]rUjX)rV}rW(jX am572x-evmrXjjRj jjj\j}rY(j]j]j]j]j]ujKj]rZj%X am572x-evmr[r\}r](jjXjjVubaubajjubj)r^}r_(jUj}r`(j]j]j]j]j]ujjj]rajX)rb}rc(jX CCS projectrdjj^j jjj\j}re(j]j]j]j]j]ujKj]rfj%X CCS projectrgrh}ri(jjdjjbubaubajjubejjubj)rj}rk(jUj}rl(j]j]j]j]j]ujjj]rm(j)rn}ro(jUj}rp(j]j]j]j]j]ujjjj]rqjX)rr}rs(jX am65xx j721ertjjnj jjj\j}ru(j]j]j]j]j]ujKj]rvj%X am65xx j721erwrx}ry(jjtjjrubaubajjubj)rz}r{(jUj}r|(j]j]j]j]j]ujjjj]r}jX)r~}r(jXmakefilerjjzj jjj\j}r(j]j]j]j]j]ujKj]rj%Xmakefilerr}r(jjjj~ubaubajjubejjubj)r}r(jUj}r(j]j]j]j]j]ujjj]r(j)r}r(jUj}r(j]j]j]j]j]ujjj]rjX)r}r(jXI2C_TemperatureSensorrjjj jjj\j}r(j]j]j]j]j]ujKj]rj%XI2C_TemperatureSensorrr}r(jjjjubaubajjubj)r}r(jUj}r(j]j]j]j]j]ujjj]rj)r}r(jUj}r(j]j]j]j]j]ujjj]rj)r}r(jXdExample to get the temperature value from the temperature sensor and displays on the serial console.rjKjjj jjjj}r(j]j]j]j]j]ujKj]rj%XdExample to get the temperature value from the temperature sensor and displays on the serial console.rr}r(jjjjubaubajjubajjubj)r}r(jUj}r(j]j]j]j]j]ujjj]rj)r}r(jUj}r(j]j]j]j]j]ujjj]r(j)r}r(jXBFollowing prints will come on console based on pass/fail criteria:rjKjjj jjjj}r(j]j]j]j]j]ujKj]rj%XBFollowing prints will come on console based on pass/fail criteria:rr}r(jjjjubaubj)r}r(jUjKjjj jjjj}r(j]j]j]j]j]ujKj]ubj)r}r(jX**Pass criteria:**rjKjjj jjjj}r(j]j]j]j]j]ujKj]rj|)r}r(jjj}r(j]j]j]j]j]ujjj]rj%XPass criteria:rr}r(jUjjubajjubaubj)r}r(jUjKjjj jjjj}r(j]j]j]j]j]ujKj]ubj)r}r(jX=Temperature = "value in centigrades" C All tests have passed.rjKjjj jjjj}r(j]j]j]j]j]ujKj]rj%X=Temperature = "value in centigrades" C All tests have passed.rr}r(jjjjubaubejjubajjubj)r}r(jUj}r(j]j]j]j]j]ujjj]rjX)r}r(jXAM572x,rjjj jjj\j}r(j]j]j]j]j]ujKj]rj%XAM572x,rr}r(jjjjubaubajjubj)r}r(jUj}r(j]j]j]j]j]ujjj]rjX)r}r(jX CCS projectrjjj jjj\j}r(j]j]j]j]j]ujKj]rj%X CCS projectrr}r(jjjjubaubajjubejjubj)r}r(jUj}r(j]j]j]j]j]ujjj]r(j)r}r(jUj}r(j]j]j]j]j]ujjj]rjX)r}r(jXI2C_master/slaverjjj jjj\j}r(j]j]j]j]j]ujKj]rj%XI2C_master/slaverr}r(jjjjubaubajjubj)r}r(jUj}r(j]j]j]j]j]ujjj]r(j)r}r(jUj}r(j]j]j]j]j]ujjj]r(j)r}r(jXApplication demonstrates master/slave transfer of I2C. Application use case requires two EVMs. One acts as Master and the other as slave. I2C connections information and addtional details are as follows:rjKjjj jjjj}r(j]j]j]j]j]ujKj]rj%XApplication demonstrates master/slave transfer of I2C. Application use case requires two EVMs. One acts as Master and the other as slave. I2C connections information and addtional details are as follows:rr}r(jjjjubaubj)r}r (jUjKjjj jjjj}r (j]j]j]j]j]ujKj]ubj)r }r (jXFAM57xx boards I2C bus connection on J9 (master board <--> slave board)r jKjjj jjjj}r(j]j]j]j]j]ujKj]rj%XFAM57xx boards I2C bus connection on J9 (master board <--> slave board)rr}r(jj jj ubaubj)r}r(jUjKjjj jjjj}r(j]j]j]j]j]ujKj]ubj)r}r(jXpin22 (SCL)<--> pin22 (SCL)rjKjjj jjjj}r(j]j]j]j]j]ujKj]rj%Xpin22 (SCL)<--> pin22 (SCL)rr}r(jjjjubaubj)r}r(jUjKjjj jjjj}r (j]j]j]j]j]ujKj]ubj)r!}r"(jXpin24 (SDA)<--> pin24 (SDA)r#jKjjj jjjj}r$(j]j]j]j]j]ujKj]r%j%Xpin24 (SDA)<--> pin24 (SDA)r&r'}r((jj#jj!ubaubj)r)}r*(jUjKjjj jjjj}r+(j]j]j]j]j]ujKj]ubj)r,}r-(jXpin21 (GND)<--> pin21 (GND)r.jKjjj jjjj}r/(j]j]j]j]j]ujKj]r0j%Xpin21 (GND)<--> pin21 (GND)r1r2}r3(jj.jj,ubaubj)r4}r5(jUjKjjj jjjj}r6(j]j]j]j]j]ujKj]ubj)r7}r8(jXK2G boards I2C bus connection on J12 (master board <--> slave board) pin28 (SCL)<--> pin28 (SCL) pin30 (SDA)<--> pin30 (SDA) pin50 (GND)<--> pin50 (GND)r9jKjjj jjjj}r:(j]j]j]j]j]ujKj]r;j%XK2G boards I2C bus connection on J12 (master board <--> slave board) pin28 (SCL)<--> pin28 (SCL) pin30 (SDA)<--> pin30 (SDA) pin50 (GND)<--> pin50 (GND)r<r=}r>(jj9jj7ubaubj)r?}r@(jUjKjjj jjjj}rA(j]j]j]j]j]ujKj]ubejjubj)rB}rC(jUj}rD(j]j]j]j]j]ujjj]rE(j)rF}rG(jXOMAPL138/C6748 boards I2C bus connection on J15 (master board <--> slave board) pin13 (SCL)<--> pin13 (SCL) pin15 (SDA)<--> pin15 (SDA) pin35 (GND)<--> pin35 (GND)rHjKjjBj jjjj}rI(j]j]j]j]j]ujKj]rJj%XOMAPL138/C6748 boards I2C bus connection on J15 (master board <--> slave board) pin13 (SCL)<--> pin13 (SCL) pin15 (SDA)<--> pin15 (SDA) pin35 (GND)<--> pin35 (GND)rKrL}rM(jjHjjFubaubj)rN}rO(jUjKjjBj jjjj}rP(j]j]j]j]j]ujKj]ubj)rQ}rR(jXRun "I2C_Slave__Test Project" first on Slave EVM and then "I2C_Master__Tes tProject" on Master EVM.rSjKjjBj jjjj}rT(j]j]j]j]j]ujKj]rUj%XRun "I2C_Slave__Test Project" first on Slave EVM and then "I2C_Master__Tes tProject" on Master EVM.rVrW}rX(jjSjjQubaubejjubejjubj)rY}rZ(jUj}r[(j]j]j]j]j]ujjj]r\j)r]}r^(jUj}r_(j]j]j]j]j]ujjYj]r`(j)ra}rb(jXBFollowing prints will come on console based on pass/fail criteria:rcjKjj]j jjjj}rd(j]j]j]j]j]ujKj]rej%XBFollowing prints will come on console based on pass/fail criteria:rfrg}rh(jjcjjaubaubj)ri}rj(jUjKjj]j jjjj}rk(j]j]j]j]j]ujKj]ubj)rl}rm(jX**Pass criteria:**rnjKjj]j jjjj}ro(j]j]j]j]j]ujKj]rpj|)rq}rr(jjnj}rs(j]j]j]j]j]ujjlj]rtj%XPass criteria:rurv}rw(jUjjqubajjubaubj)rx}ry(jUjKjj]j jjjj}rz(j]j]j]j]j]ujKj]ubj)r{}r|(jXAll tests have passed.r}jKjj]j jjjj}r~(j]j]j]j]j]ujKj]rj%XAll tests have passed.rr}r(jj}jj{ubaubejjubajjubj)r}r(jUj}r(j]j]j]j]j]ujjj]rjX)r}r(jXAM572x, AM574x, k2g, omapl138,rjjj jjj\j}r(j]j]j]j]j]ujKj]rj%XAM572x, AM574x, k2g, omapl138,rr}r(jjjjubaubajjubj)r}r(jUj}r(j]j]j]j]j]ujjj]rjX)r}r(jX CCS projectrjjj jjj\j}r(j]j]j]j]j]ujKj]rj%X CCS projectrr}r(jjjjubaubajjubejjubejjubejjubaubj\)r}r(jXI2C_Test Application supports write test on Keystone II EVMs, by default write test is disabled, user can enable the write test by defining I2C_EEPROM_WRITE_ENABLE in test/eeprom_read/src/I2C_board.h. I2C_TemperatureSensor Application is supported only on AM572x GP EVM.jjcj jjj_j}r(j]j]j]j]j]ujNjhj]rjX)r}r(jXI2C_Test Application supports write test on Keystone II EVMs, by default write test is disabled, user can enable the write test by defining I2C_EEPROM_WRITE_ENABLE in test/eeprom_read/src/I2C_board.h. I2C_TemperatureSensor Application is supported only on AM572x GP EVM.rjjj jjj\j}r(j]j]j]j]j]ujKj]rj%XI2C_Test Application supports write test on Keystone II EVMs, by default write test is disabled, user can enable the write test by defining I2C_EEPROM_WRITE_ENABLE in test/eeprom_read/src/I2C_board.h. I2C_TemperatureSensor Application is supported only on AM572x GP EVM.rr}r(jjjjubaubaubeubeubj)r}r(jUjjj jjjj}r(j]j]j]j]rUbuilding-i2c-examplesraj]rhaujMjhj]r(j)r}r(jXBuilding I2C examplesrjjj jjj"j}r(j]j]j]j]j]ujMjhj]rj%XBuilding I2C examplesrr}r(jjjjubaubj)r}r(jUjjj jjjj}r(jX-j]j]j]j]j]ujMjhj]rj)r}r(jXLMakefile based examples and dependent libraries can be built from the top level or module level I2C makefile, refer to the `Processor SDK RTOS Getting Started Guide `__ for details of how to setup the build environment. Once you have setup the build environment, issue the following commands:rjjj jjj j}r(j]j]j]j]j]ujNjhj]rjX)r}r(jjjjj jjj\j}r(j]j]j]j]j]ujMj]r(j%X{Makefile based examples and dependent libraries can be built from the top level or module level I2C makefile, refer to the rr}r(jX{Makefile based examples and dependent libraries can be built from the top level or module level I2C makefile, refer to the jjubj)r}r(jXT`Processor SDK RTOS Getting Started Guide `__j}r(UnameX(Processor SDK RTOS Getting Started GuidejX%index_overview.html#setup-environmentj]j]j]j]j]ujjj]rj%X(Processor SDK RTOS Getting Started Guiderr}r(jUjjubajjubj%X} for details of how to setup the build environment. Once you have setup the build environment, issue the following commands:rr}r(jX} for details of how to setup the build environment. Once you have setup the build environment, issue the following commands:jjubeubaubaubj#)r}r(jXTo build and clean libs/apps from top-level makefile: cd /packages make i2c make i2c_clean To build and clean libs/apps from module-level makefile: cd /packages/ti/drv/i2c make all make cleanjjj jjj&j}r(j2j3j]j]j]j]j]ujMjhj]rj%XTo build and clean libs/apps from top-level makefile: cd /packages make i2c make i2c_clean To build and clean libs/apps from module-level makefile: cd /packages/ti/drv/i2c make all make cleanrr}r(jUjjubaubj)r}r(jUjjj jjjj}r(jX-j]j]j]j]j]ujMjhj]rj)r}r(jX2RTSC CCS project based examples are built from CCSrjjj jjj j}r(j]j]j]j]j]ujNjhj]rjX)r}r(jjjjj jjj\j}r(j]j]j]j]j]ujMj]rj%X2RTSC CCS project based examples are built from CCSrr}r(jjjjubaubaubaubj#)r}r(jXcd /packages ./pdkProjectCreate.sh [soc] [board] [endian] i2c [project type] [processor] [SECUREMODE=] Import and build CCS Project from /packages/MyExampleProjects/jjj jjj&j}r(j2j3j]j]j]j]j]ujMjhj]rj%Xcd /packages ./pdkProjectCreate.sh [soc] [board] [endian] i2c [project type] [processor] [SECUREMODE=] Import and build CCS Project from /packages/MyExampleProjects/rr}r(jUjjubaubeubj)r}r(jUjKjjj jjjj}r(j]rXadditional referencesraj]j]j]rUid32raj]ujMjhj]r(j)r}r(jXAdditional Referencesrjjj jjj"j}r(j]j]j]j]j]ujMjhj]rj%XAdditional Referencesrr}r(jjjjubaubj)r}r(jUjjj jjjj}r (j]j]j]j]j]ujNjhj]r j)r }r (jUj}r (j]j]j]j]j]UcolsKujjj]r (j)r }r (jUj}r (j]j]j]j]j]UcolwidthKujj j]jjubj)r }r (jUj}r (j]j]j]j]j]UcolwidthK*ujj j]jjubj)r }r (jUj}r (j]j]j]j]j]ujj j]r (j)r }r (jUj}r (j]j]j]j]j]ujj j]r (j)r }r (jUj}r (j]j]j]j]j]ujj j]r jX)r }r (jX **Document**r jj j jjj\j}r (j]j]j]j]j]ujM!j]r j|)r }r (jj j}r (j]j]j]j]j]ujj j]r j%XDocumentr! r" }r# (jUjj ubajjubaubajjubj)r$ }r% (jUj}r& (j]j]j]j]j]ujj j]r' jX)r( }r) (jX **Location**r* jj$ j jjj\j}r+ (j]j]j]j]j]ujM!j]r, j|)r- }r. (jj* j}r/ (j]j]j]j]j]ujj( j]r0 j%XLocationr1 r2 }r3 (jUjj- ubajjubaubajjubejjubj)r4 }r5 (jUj}r6 (j]j]j]j]j]ujj j]r7 (j)r8 }r9 (jUj}r: (j]j]j]j]j]ujj4 j]r; jX)r< }r= (jXAPI Reference Manualr> jj8 j jjj\j}r? (j]j]j]j]j]ujM#j]r@ j%XAPI Reference ManualrA rB }rC (jj> jj< ubaubajjubj)rD }rE (jUj}rF (j]j]j]j]j]ujj4 j]rG jX)rH }rI (jXP$(TI_PDK_INSTALL_DIR)\\packages\\ti \\drv\\i2c\\docs\\doxygen\\html\\index. htmljjD j jjj\j}rJ (j]j]j]j]j]ujM#j]rK j%XH$(TI_PDK_INSTALL_DIR)\packages\ti \drv\i2c\docs\doxygen\html\index. htmlrL rM }rN (jXP$(TI_PDK_INSTALL_DIR)\\packages\\ti \\drv\\i2c\\docs\\doxygen\\html\\index. htmljjH ubaubajjubejjubj)rO }rP (jUj}rQ (j]j]j]j]j]ujj j]rR (j)rS }rT (jUj}rU (j]j]j]j]j]ujjO j]rV jX)rW }rX (jX Release NotesrY jjS j jjj\j}rZ (j]j]j]j]j]ujM'j]r[ j%X Release Notesr\ r] }r^ (jjY jjW ubaubajjubj)r_ }r` (jUj}ra (j]j]j]j]j]ujjO j]rb jX)rc }rd (jXO$(TI_PDK_INSTALL_DIR)\\packages\\ti \\drv\\i2c\\docs\\ReleaseNotes_I2C_LL D.pdfjj_ j jjj\j}re (j]j]j]j]j]ujM'j]rf j%XI$(TI_PDK_INSTALL_DIR)\packages\ti \drv\i2c\docs\ReleaseNotes_I2C_LL D.pdfrg rh }ri (jXO$(TI_PDK_INSTALL_DIR)\\packages\\ti \\drv\\i2c\\docs\\ReleaseNotes_I2C_LL D.pdfjjc ubaubajjubejjubejjubejjubaubj)rj }rk (jUjjj jjjj}rl (j]j]j]j]j]ujM,jhj]rm j)rn }ro (jUjKjjj j jjjj}rp (j]j]j]j]j]ujKjhj]ubaubeubeubj jjjj}rq (j]rr Xoverviewrs aj]j]j]rt Uid24ru aj]ujKjhj]rv (j)rw }rx (jXOverviewry jjj jjj"j}rz (j]j]j]j]j]ujKjhj]r{ j%XOverviewr| r} }r~ (jjy jjw ubaubj)r }r (jUjKjjj jjjj}r (j]r X introductionr aj]j]j]r Uid25r aj]ujKjhj]r (j)r }r (jX Introductionr jj j jjj"j}r (j]j]j]j]j]ujKjhj]r j%X Introductionr r }r (jj jj ubaubjX)r }r (jX'I2C module provides an interface to any I2C-bus-compatible device accessible via I2C serial bus. External components attached to I2C bus can serially transmit/receive data to/from the CPU through two-wire interface. Driver supports three types of transfers in both I2C master mode and slave moder jj j jjj\j}r (j]j]j]j]j]ujK jhj]r j%X'I2C module provides an interface to any I2C-bus-compatible device accessible via I2C serial bus. External components attached to I2C bus can serially transmit/receive data to/from the CPU through two-wire interface. Driver supports three types of transfers in both I2C master mode and slave moder r }r (jj jj ubaubj)r }r (jUjj j jjjj}r (jX-j]j]j]j]j]ujKjhj]r (j)r }r (jXReadr jj j jjj j}r (j]j]j]j]j]ujNjhj]r jX)r }r (jj jj j jjj\j}r (j]j]j]j]j]ujKj]r j%XReadr r }r (jj jj ubaubaubj)r }r (jXWriter jj j jjj j}r (j]j]j]j]j]ujNjhj]r jX)r }r (jj jj j jjj\j}r (j]j]j]j]j]ujKj]r j%XWriter r }r (jj jj ubaubaubj)r }r (jXWrite followed by read jj j jjj j}r (j]j]j]j]j]ujNjhj]r jX)r }r (jXWrite followed by readr jj j jjj\j}r (j]j]j]j]j]ujKj]r j%XWrite followed by readr r }r (jj jj ubaubaubeubjX)r }r (jX9In addition driver supports following modes of operation:r jj j jjj\j}r (j]j]j]j]j]ujKjhj]r j%X9In addition driver supports following modes of operation:r r }r (jj jj ubaubj)r }r (jUjj j jjjj}r (jX-j]j]j]j]j]ujKjhj]r (j)r }r (jX**I2C_MODE_BLOCKING:** By default, driver operates in blocking mode. In blocking mode, a Task’s code execution is blocked until transaction is complete. This ensures only one transaction operates at a given time. Driver supports both interrupt or non-interrupt based blocking modes.jj j jjj j}r (j]j]j]j]j]ujNjhj]r jX)r }r (jX**I2C_MODE_BLOCKING:** By default, driver operates in blocking mode. In blocking mode, a Task’s code execution is blocked until transaction is complete. This ensures only one transaction operates at a given time. Driver supports both interrupt or non-interrupt based blocking modes.jj j jjj\j}r (j]j]j]j]j]ujKj]r (j|)r }r (jX**I2C_MODE_BLOCKING:**j}r (j]j]j]j]j]ujj j]r j%XI2C_MODE_BLOCKING:r r }r (jUjj ubajjubj%X By default, driver operates in blocking mode. In blocking mode, a Task’s code execution is blocked until transaction is complete. This ensures only one transaction operates at a given time. Driver supports both interrupt or non-interrupt based blocking modes.r r }r (jX By default, driver operates in blocking mode. In blocking mode, a Task’s code execution is blocked until transaction is complete. This ensures only one transaction operates at a given time. Driver supports both interrupt or non-interrupt based blocking modes.jj ubeubaubj)r }r (jX**I2C_MODE_CALLBACK** In callback mode, an I2C transaction functions asynchronously, which means that it does not block a Task’s code execution. After an I2C transaction is complete, I2C driver calls a user-provided hook function. Only interrupt based callback is supported. jj j jjj j}r (j]j]j]j]j]ujNjhj]r jX)r }r (jX**I2C_MODE_CALLBACK** In callback mode, an I2C transaction functions asynchronously, which means that it does not block a Task’s code execution. After an I2C transaction is complete, I2C driver calls a user-provided hook function. Only interrupt based callback is supported.jj j jjj\j}r (j]j]j]j]j]ujKj]r (j|)r }r (jX**I2C_MODE_CALLBACK**j}r (j]j]j]j]j]ujj j]r j%XI2C_MODE_CALLBACKr r }r (jUjj ubajjubj%X In callback mode, an I2C transaction functions asynchronously, which means that it does not block a Task’s code execution. After an I2C transaction is complete, I2C driver calls a user-provided hook function. Only interrupt based callback is supported.r r }r (jX In callback mode, an I2C transaction functions asynchronously, which means that it does not block a Task’s code execution. After an I2C transaction is complete, I2C driver calls a user-provided hook function. Only interrupt based callback is supported.jj ubeubaubeubj\)r }r (jXbIf I2C peripheral is in reset during a transfer, it can cause the I2C bus to hang. I2C V0 IP (Keystone SoCs) does not have hardware support to recover the I2C bus from hanging, user needs to power cycle the board as a workaround. For I2C V1 IP (AM3/4/5 SoCs), the application can call I2C_control() API and use I2C_CMD_RECOVER_BUS to recover the I2C bus.jj j jjj_j}r (j]j]j]j]j]ujNjhj]r jX)r }r (jXbIf I2C peripheral is in reset during a transfer, it can cause the I2C bus to hang. I2C V0 IP (Keystone SoCs) does not have hardware support to recover the I2C bus from hanging, user needs to power cycle the board as a workaround. For I2C V1 IP (AM3/4/5 SoCs), the application can call I2C_control() API and use I2C_CMD_RECOVER_BUS to recover the I2C bus.r jj j jjj\j}r (j]j]j]j]j]ujK"j]r j%XbIf I2C peripheral is in reset during a transfer, it can cause the I2C bus to hang. I2C V0 IP (Keystone SoCs) does not have hardware support to recover the I2C bus from hanging, user needs to power cycle the board as a workaround. For I2C V1 IP (AM3/4/5 SoCs), the application can call I2C_control() API and use I2C_CMD_RECOVER_BUS to recover the I2C bus.r r }r (jj jj ubaubaubjb)r }r (jXFirmwarer jKjj j jjjfj}r (j]r Ufirmwarer!aj]j]r!Xfirmwarer!aj]j]ujNjhj]r!j%XFirmwarer!r!}r!(jj jj ubaubjX)r!}r!(jXTI PRU-ICSS cores (Programmable Real-Time Unit Industrial Communication Subsystem) is firmware programmable and can take on various personalities. Processor SDK package includes I2C Firmware support. Refer `I2C FW `__ for additional details.jj j jjj\j}r !(j]j]j]j]j]ujK,jhj]r !(j%XTI PRU-ICSS cores (Programmable Real-Time Unit Industrial Communication Subsystem) is firmware programmable and can take on various personalities. Processor SDK package includes I2C Firmware support. Refer r !r !}r !(jXTI PRU-ICSS cores (Programmable Real-Time Unit Industrial Communication Subsystem) is firmware programmable and can take on various personalities. Processor SDK package includes I2C Firmware support. Refer jj!ubj)r!}r!(jX0`I2C FW `__j}r!(UnameXI2C FWjX#index_pru_icss_fw.html#pru-icss-i2cj]j]j]j]j]ujj!j]r!j%XI2C FWr!r!}r!(jUjj!ubajjubj%X for additional details.r!r!}r!(jX for additional details.jj!ubeubj)r!}r!(jUjj j jjjj}r!(j]j]j]j]j]ujK2jhj]r!j)r!}r!(jUjKjj!j jjjj}r!(j]j]j]j]j]ujKjhj]ubaubeubeubj jjj?j}r!(j]UlevelKj]j]r !ju aUsourcejj]j]UlineKUtypejAujKjhj]r!!jX)r"!}r#!(jX+Duplicate implicit target name: "overview".j}r$!(j]j]j]j]j]ujjj]r%!j%X+Duplicate implicit target name: "overview".r&!r'!}r(!(jUjj"!ubajj\ubaubh)r)!}r*!(jUjj j jjj?j}r+!(j]UlevelKj]j]r,!j aUsourcejj]j]UlineKUtypejAujKjhj]r-!jX)r.!}r/!(jX/Duplicate implicit target name: "introduction".j}r0!(j]j]j]j]j]ujj)!j]r1!j%X/Duplicate implicit target name: "introduction".r2!r3!}r4!(jUjj.!ubajj\ubaubh)r5!}r6!(jUjjj jjj?j}r7!(j]UlevelKj]j]r8!jaUsourcejj]j]UlineK5UtypejAujK5jhj]r9!jX)r:!}r;!(jX1Duplicate implicit target name: "user interface".j}r!r?!}r@!(jUjj:!ubajj\ubaubh)rA!}rB!(jUjjj jjj?j}rC!(j]UlevelKj]j]rD!jaUsourcejj]j]UlineK8UtypejAujK8jhj]rE!jX)rF!}rG!(jX7Duplicate implicit target name: "driver configuration".j}rH!(j]j]j]j]j]ujjA!j]rI!j%X7Duplicate implicit target name: "driver configuration".rJ!rK!}rL!(jUjjF!ubajj\ubaubh)rM!}rN!(jUj}rO!(j]UlevelKj]j]rP!jaUsourcej j]j]UlineK!UtypejXujjj]rQ!jX)rR!}rS!(jX?Duplicate explicit target name: "board-specific-configuration".j}rT!(j]j]j]j]j]ujjM!j]rU!j%X?Duplicate explicit target name: "board-specific-configuration".rV!rW!}rX!(jUjjR!ubajj\ubajj?ubh)rY!}rZ!(jUjj%j jjj?j}r[!(j]UlevelKj]j]r\!j+aUsourcejj]j]UlineKRUtypejAujKRjhj]r]!jX)r^!}r_!(jX'Duplicate implicit target name: "apis".j}r`!(j]j]j]j]j]ujjY!j]ra!j%X'Duplicate implicit target name: "apis".rb!rc!}rd!(jUjj^!ubajj\ubaubh)re!}rf!(jUjjSj jjj?j}rg!(j]UlevelKj]j]rh!jYaUsourcejj]j]UlineKuUtypejAujKujhj]ri!jX)rj!}rk!(jX.Duplicate implicit target name: "application".j}rl!(j]j]j]j]j]ujje!j]rm!j%X.Duplicate implicit target name: "application".rn!ro!}rp!(jUjjj!ubajj\ubaubh)rq!}rr!(jUjjcj jjj?j}rs!(j]UlevelKj]j]rt!jiaUsourcejj]j]UlineKxUtypejAujKxjhj]ru!jX)rv!}rw!(jX+Duplicate implicit target name: "examples".j}rx!(j]j]j]j]j]ujjq!j]ry!j%X+Duplicate implicit target name: "examples".rz!r{!}r|!(jUjjv!ubajj\ubaubh)r}!}r~!(jUjjj jjj?j}r!(j]UlevelKj]j]Usourcejj]j]UlineMUtypejXujMjhj]r!jX)r!}r!(jX;Bullet list ends without a blank line; unexpected unindent.j}r!(j]j]j]j]j]ujj}!j]r!j%X;Bullet list ends without a blank line; unexpected unindent.r!r!}r!(jUjj!ubajj\ubaubh)r!}r!(jUjjj jjj?j}r!(j]UlevelKj]j]Usourcejj]j]UlineMUtypejXujMjhj]r!jX)r!}r!(jX;Bullet list ends without a blank line; unexpected unindent.j}r!(j]j]j]j]j]ujj!j]r!j%X;Bullet list ends without a blank line; unexpected unindent.r!r!}r!(jUjj!ubajj\ubaubh)r!}r!(jUjjj jjj?j}r!(j]UlevelKj]j]r!jaUsourcejj]j]UlineMUtypejAujMjhj]r!jX)r!}r!(jX8Duplicate implicit target name: "additional references".j}r!(j]j]j]j]j]ujj!j]r!j%X8Duplicate implicit target name: "additional references".r!r!}r!(jUjj!ubajj\ubaubh)r!}r!(jUjj)r!}r!(jUjKjj)r!}r!(jUjhj j jjj}r!(j]j]j]j]r!U serdes-diagr!aj]r!h.aujK'jhj]r!(j)r!}r!(jX Serdes Diagr!jj!j j jj"j}r!(j]j]j]j]j]ujK'jhj]r!j%X Serdes Diagr!r!}r!(jj!jj!ubaubj!j)r!}r!(jUjKjj!j j,XDsource/rtos/PDK_Platform_Software/Device_Drivers/Serdes_Diag.rst.incr!r!}r!bjjj}r!(j]r!Xuser interfacer!aj]j]j]r!Uid35r!aj]ujK jhj]r!(j)r!}r!(jXUser Interfacer!jj!j j!jj"j}r!(j]j]j]j]j]ujK jhj]r!j%XUser Interfacer!r!}r!(jj!jj!ubaubj)r!}r!(jUjKjj!j j!jjj}r!(j]r!Xdriver configurationr!aj]j]j]r!Uid36r!aj]ujK#jhj]r!(j)r!}r!(jXDriver Configurationr!jj!j j!jj"j}r!(j]j]j]j]j]ujK#jhj]r!j%XDriver Configurationr!r!}r!(jj!jj!ubaubjb)r!}r!(jX'**Serdes Diag Configuration Structure**r!jj!j j!jjfj}r!(j]r!U#serdes-diag-configuration-structurer!aj]j]j]j]r!haujNjhj]r!j|)r!}r!(jj!j}r!(j]j]j]j]j]ujj!j]r!j%X#Serdes Diag Configuration Structurer!r!}r!(jUjj!ubajjubaubjX)r!}r!(jX serdes_diag_test_main.c contains the main function. It initializes all the serdes peripherals using the serdes_diag_test_init( ) API. The serdes_diag_test_phy_type should be specified in serdes_diag_platform.h in order to run the BER/EYE test for that specific SERDES.r!jj!j j!jj\j}r!(j]j]j]j]j]ujK(jhj]r!j%X serdes_diag_test_main.c contains the main function. It initializes all the serdes peripherals using the serdes_diag_test_init( ) API. The serdes_diag_test_phy_type should be specified in serdes_diag_platform.h in order to run the BER/EYE test for that specific SERDES.r!r!}r!(jj!jj!ubaubeubj)r!}r!(jUjKjj!j j!jjj}r!(j]r!Xapisr!aj]j]j]r!Uid37r!aj]ujK.jhj]r!(j)r!}r!(jXAPIsr!jj!j j!jj"j}r!(j]j]j]j]j]ujK.jhj]r!j%XAPIsr!r!}r!(jj!jj!ubaubjX)r!}r!(jXAPI reference for application:r!jj!j j!jj\j}r!(j]j]j]j]j]ujK0jhj]r"j%XAPI reference for application:r"r"}r"(jj!jj!ubaubj#)r"}r"(jX:#include jj!j j!jj&j}r"(j2j3j]j]j]j]j]ujMjhj]r"j%X:#include r"r "}r "(jUjj"ubaubjX)r "}r "(jX6 Sample code for initiating Serdes Diag transaction:r "jj!j j!jj\j}r"(j]j]j]j]j]ujK6jhj]r"j%X6 Sample code for initiating Serdes Diag transaction:r"r"}r"(jj "jj "ubaubj#)r"}r"(jX8... /* Initiatize the serdes using serdes_diag_platform.h */ serdes_diag_test_init(); ... /* BER Test Initialization Parameters can be edited inside this API */ Serdes_Example_BERTest(); OR /* On Die Scope/Eye Scan Test Initialization Parameters can be edited inside this API */ Serdes_Example_EYETest(); ... ...jj!j j!jj&j}r"(j2j3j]j]j]j]j]ujMjhj]r"j%X8... /* Initiatize the serdes using serdes_diag_platform.h */ serdes_diag_test_init(); ... /* BER Test Initialization Parameters can be edited inside this API */ Serdes_Example_BERTest(); OR /* On Die Scope/Eye Scan Test Initialization Parameters can be edited inside this API */ Serdes_Example_EYETest(); ... ...r"r"}r"(jUjj"ubaubeubeubj)r"}r"(jUjKjj!j j!jjj}r"(j]r"X applicationr"aj]j]j]r"Uid38r "aj]ujKLjhj]r!"(j)r""}r#"(jX Applicationr$"jj"j j!jj"j}r%"(j]j]j]j]j]ujKLjhj]r&"j%X Applicationr'"r("}r)"(jj$"jj""ubaubj)r*"}r+"(jUjKjj"j j!jjj}r,"(j]r-"Xexamplesr."aj]j]j]r/"Uid39r0"aj]ujKOjhj]r1"(j)r2"}r3"(jXExamplesr4"jj*"j j!jj"j}r5"(j]j]j]j]j]ujKOjhj]r6"j%XExamplesr7"r8"}r9"(jj4"jj2"ubaubjX)r:"}r;"(jX@Refer Release Note for Serdes Diag support across different EVMsr<"jj*"j j!jj\j}r="(j]j]j]j]j]ujKQjhj]r>"j%X@Refer Release Note for Serdes Diag support across different EVMsr?"r@"}rA"(jj<"jj:"ubaubj)rB"}rC"(jUjj*"j j!jjj}rD"(j]j]j]j]j]ujNjhj]rE"j)rF"}rG"(jUj}rH"(j]j]j]j]j]UcolsKujjB"j]rI"(j)rJ"}rK"(jUj}rL"(j]j]j]j]j]UcolwidthKujjF"j]jjubj)rM"}rN"(jUj}rO"(j]j]j]j]j]UcolwidthKujjF"j]jjubj)rP"}rQ"(jUj}rR"(j]j]j]j]j]UcolwidthKujjF"j]jjubj)rS"}rT"(jUj}rU"(j]j]j]j]j]UcolwidthKujjF"j]jjubj)rV"}rW"(jUj}rX"(j]j]j]j]j]UcolwidthKujjF"j]jjubj)rY"}rZ"(jUj}r["(j]j]j]j]j]ujjF"j]r\"j)r]"}r^"(jUj}r_"(j]j]j]j]j]ujjY"j]r`"(j)ra"}rb"(jUj}rc"(j]j]j]j]j]ujj]"j]rd"j)re"}rf"(jUj}rg"(j]j]j]j]j]ujja"j]rh"j)ri"}rj"(jXNamerk"jKjje"j j!jjj}rl"(j]j]j]j]j]ujKj]rm"j%XNamern"ro"}rp"(jjk"jji"ubaubajjubajjubj)rq"}rr"(jUj}rs"(j]j]j]j]j]ujj]"j]rt"j)ru"}rv"(jUj}rw"(j]j]j]j]j]ujjq"j]rx"j)ry"}rz"(jX Descriptionr{"jKjju"j j!jjj}r|"(j]j]j]j]j]ujKj]r}"j%X Descriptionr~"r"}r"(jj{"jjy"ubaubajjubajjubj)r"}r"(jUj}r"(j]j]j]j]j]ujj]"j]r"j)r"}r"(jUj}r"(j]j]j]j]j]ujj"j]r"j)r"}r"(jXExpected Resultsr"jKjj"j j!jjj}r"(j]j]j]j]j]ujKj]r"j%XExpected Resultsr"r"}r"(jj"jj"ubaubajjubajjubj)r"}r"(jUj}r"(j]j]j]j]j]ujj]"j]r"jX)r"}r"(jX SoC Supportedr"jj"j j!jj\j}r"(j]j]j]j]j]ujKTj]r"j%X SoC Supportedr"r"}r"(jj"jj"ubaubajjubj)r"}r"(jUj}r"(j]j]j]j]j]ujj]"j]r"jX)r"}r"(jX Build Typer"jj"j j!jj\j}r"(j]j]j]j]j]ujKTj]r"j%X Build Typer"r"}r"(jj"jj"ubaubajjubejjubajjubj)r"}r"(jUj}r"(j]j]j]j]j]ujjF"j]r"(j)r"}r"(jUj}r"(j]j]j]j]j]ujj"j]r"(j)r"}r"(jUj}r"(j]j]j]j]j]ujj"j]r"jX)r"}r"(jXserdes_diag_BER_appr"jj"j j!jj\j}r"(j]j]j]j]j]ujKVj]r"j%Xserdes_diag_BER_appr"r"}r"(jj"jj"ubaubajjubj)r"}r"(jUj}r"(j]j]j]j]j]ujj"j]r"j)r"}r"(jUj}r"(j]j]j]j]j]ujj"j]r"j)r"}r"(jX BER exampler"jKjj"j j!jjj}r"(j]j]j]j]j]ujKj]r"j%X BER exampler"r"}r"(jj"jj"ubaubajjubajjubj)r"}r"(jUj}r"(j]j]j]j]j]ujj"j]r"j)r"}r"(jUj}r"(j]j]j]j]j]ujj"j]r"(j)r"}r"(jXBFollowing prints will come on console based on pass/fail criteria:r"jKjj"j j!jjj}r"(j]j]j]j]j]ujKj]r"j%XBFollowing prints will come on console based on pass/fail criteria:r"r"}r"(jj"jj"ubaubj)r"}r"(jUjKjj"j j!jjj}r"(j]j]j]j]j]ujKj]ubj)r"}r"(jX**Pass criteria:**r"jKjj"j j!jjj}r"(j]j]j]j]j]ujKj]r"j|)r"}r"(jj"j}r"(j]j]j]j]j]ujj"j]r"j%XPass criteria:r"r"}r"(jUjj"ubajjubaubj)r"}r"(jUjKjj"j j!jjj}r"(j]j]j]j]j]ujKj]ubj)r"}r"(jX.The sweep results are printed into a text filer"jKjj"j j!jjj}r"(j]j]j]j]j]ujKj]r"j%X.The sweep results are printed into a text filer"r"}r"(jj"jj"ubaubejjubajjubj)r"}r"(jUj}r"(j]j]j]j]j]ujj"j]r"jX)r"}r"(jXam65xxr"jj"j j!jj\j}r"(j]j]j]j]j]ujKVj]r"j%Xam65xxr#r#}r#(jj"jj"ubaubajjubj)r#}r#(jUj}r#(j]j]j]j]j]ujj"j]r#jX)r#}r#(jXmakefiler #jj#j j!jj\j}r #(j]j]j]j]j]ujKVj]r #j%Xmakefiler #r #}r#(jj #jj#ubaubajjubejjubj)r#}r#(jUj}r#(j]j]j]j]j]ujj"j]r#(j)r#}r#(jUj}r#(j]j]j]j]j]ujj#j]r#jX)r#}r#(jXserdes_diag_EYE_appr#jj#j j!jj\j}r#(j]j]j]j]j]ujKaj]r#j%Xserdes_diag_EYE_appr#r#}r#(jj#jj#ubaubajjubj)r#}r #(jUj}r!#(j]j]j]j]j]ujj#j]r"#j)r##}r$#(jUj}r%#(j]j]j]j]j]ujj#j]r&#j)r'#}r(#(jX EYE exampler)#jKjj##j j!jjj}r*#(j]j]j]j]j]ujKj]r+#j%X EYE exampler,#r-#}r.#(jj)#jj'#ubaubajjubajjubj)r/#}r0#(jUj}r1#(j]j]j]j]j]ujj#j]r2#j)r3#}r4#(jUj}r5#(j]j]j]j]j]ujj/#j]r6#(j)r7#}r8#(jXBFollowing prints will come on console based on pass/fail criteria:r9#jKjj3#j j!jjj}r:#(j]j]j]j]j]ujKj]r;#j%XBFollowing prints will come on console based on pass/fail criteria:r<#r=#}r>#(jj9#jj7#ubaubj)r?#}r@#(jUjKjj3#j j!jjj}rA#(j]j]j]j]j]ujKj]ubj)rB#}rC#(jX**Pass criteria:**rD#jKjj3#j j!jjj}rE#(j]j]j]j]j]ujKj]rF#j|)rG#}rH#(jjD#j}rI#(j]j]j]j]j]ujjB#j]rJ#j%XPass criteria:rK#rL#}rM#(jUjjG#ubajjubaubj)rN#}rO#(jUjKjj3#j j!jjj}rP#(j]j]j]j]j]ujKj]ubj)rQ#}rR#(jXI2C Test: 100Kbps: PASSrS#jKjj3#j j!jjj}rT#(j]j]j]j]j]ujKj]rU#j%XI2C Test: 100Kbps: PASSrV#rW#}rX#(jjS#jjQ#ubaubj)rY#}rZ#(jUjKjj3#j j!jjj}r[#(j]j]j]j]j]ujKj]ubj)r\#}r]#(jXI2C Test: 400Kbps: PASSr^#jKjj3#j j!jjj}r_#(j]j]j]j]j]ujKj]r`#j%XI2C Test: 400Kbps: PASSra#rb#}rc#(jj^#jj\#ubaubj)rd#}re#(jUjKjj3#j j!jjj}rf#(j]j]j]j]j]ujKj]ubj)rg#}rh#(jXI2C Test: timeout test passedri#jKjj3#j j!jjj}rj#(j]j]j]j]j]ujKj]rk#j%XI2C Test: timeout test passedrl#rm#}rn#(jji#jjg#ubaubj)ro#}rp#(jUjKjj3#j j!jjj}rq#(j]j]j]j]j]ujKj]ubj)rr#}rs#(jXAll tests have passed.rt#jKjj3#j j!jjj}ru#(j]j]j]j]j]ujKj]rv#j%XAll tests have passed.rw#rx#}ry#(jjt#jjr#ubaubejjubajjubj)rz#}r{#(jUj}r|#(j]j]j]j]j]ujj#j]r}#jX)r~#}r#(jXam65xxr#jjz#j j!jj\j}r#(j]j]j]j]j]ujKaj]r#j%Xam65xxr#r#}r#(jj#jj~#ubaubajjubj)r#}r#(jUj}r#(j]j]j]j]j]ujj#j]r#jX)r#}r#(jXmakefiler#jj#j j!jj\j}r#(j]j]j]j]j]ujKaj]r#j%Xmakefiler#r#}r#(jj#jj#ubaubajjubejjubejjubejjubaubj\)r#}r#(jXACurrently only R5F platform is supported with the above examples.r#jj*"j j!jj_j}r#(j]j]j]j]j]ujNjhj]r#jX)r#}r#(jj#jj#j j!jj\j}r#(j]j]j]j]j]ujKwj]r#j%XACurrently only R5F platform is supported with the above examples.r#r#}r#(jj#jj#ubaubaubeubeubj)r#}r#(jUjj!j j!jjj}r#(j]j]j]j]r#Ubuilding-serdes-diag-examplesr#aj]r#hGaujKzjhj]r#(j)r#}r#(jXBuilding Serdes Diag examplesr#jj#j j!jj"j}r#(j]j]j]j]j]ujKzjhj]r#j%XBuilding Serdes Diag examplesr#r#}r#(jj#jj#ubaubj)r#}r#(jUjj#j j!jjj}r#(jX-j]j]j]j]j]ujK|jhj]r#j)r#}r#(jXTMakefile based examples and dependent libraries can be built from the top level or module level Serdes Diag makefile, refer to the `Processor SDK RTOS Getting Started Guide `__ for details of how to setup the build environment. Once you have setup the build environment, issue the following commands:r#jj#j j!jj j}r#(j]j]j]j]j]ujNjhj]r#jX)r#}r#(jj#jj#j j!jj\j}r#(j]j]j]j]j]ujK|j]r#(j%XMakefile based examples and dependent libraries can be built from the top level or module level Serdes Diag makefile, refer to the r#r#}r#(jXMakefile based examples and dependent libraries can be built from the top level or module level Serdes Diag makefile, refer to the jj#ubj)r#}r#(jXT`Processor SDK RTOS Getting Started Guide `__j}r#(UnameX(Processor SDK RTOS Getting Started GuidejX%index_overview.html#setup-environmentj]j]j]j]j]ujj#j]r#j%X(Processor SDK RTOS Getting Started Guider#r#}r#(jUjj#ubajjubj%X} for details of how to setup the build environment. Once you have setup the build environment, issue the following commands:r#r#}r#(jX} for details of how to setup the build environment. Once you have setup the build environment, issue the following commands:jj#ubeubaubaubj#)r#}r#(jXTo build and clean libs/apps from top-level makefile: cd /packages make serdes_diag make serdes_diag_clean To build and clean libs/apps from module-level makefile: cd /packages/ti/diag/serdes_diag make all make cleanjj#j j!jj&j}r#(j2j3j]j]j]j]j]ujM2jhj]r#j%XTo build and clean libs/apps from top-level makefile: cd /packages make serdes_diag make serdes_diag_clean To build and clean libs/apps from module-level makefile: cd /packages/ti/diag/serdes_diag make all make cleanr#r#}r#(jUjj#ubaubj)r#}r#(jUjj#j j!jjj}r#(jX-j]j]j]j]j]ujKjhj]r#j)r#}r#(jX-CCS project based examples are built from CCSr#jj#j j!jj j}r#(j]j]j]j]j]ujNjhj]r#jX)r#}r#(jj#jj#j j!jj\j}r#(j]j]j]j]j]ujKj]r#j%X-CCS project based examples are built from CCSr#r#}r#(jj#jj#ubaubaubaubj#)r#}r#(jXcd /packages ./pdkProjectCreate.sh [soc] [board] [endian] serdes_diag [project type] [processor] [SECUREMODE=] Import and build CCS Project from /packages/MyExampleProjects/jj#j j!jj&j}r#(j2j3j]j]j]j]j]ujM@jhj]r#j%Xcd /packages ./pdkProjectCreate.sh [soc] [board] [endian] serdes_diag [project type] [processor] [SECUREMODE=] Import and build CCS Project from /packages/MyExampleProjects/r#r#}r#(jUjj#ubaubeubj)r#}r#(jUjKjj!j j!jjj}r#(j]r#Xadditional referencesr#aj]j]j]r#Uid40r#aj]ujKjhj]r#(j)r#}r#(jXAdditional Referencesr#jj#j j!jj"j}r#(j]j]j]j]j]ujKjhj]r#j%XAdditional Referencesr#r#}r#(jj#jj#ubaubj)r#}r#(jUjj#j j!jjj}r#(j]j]j]j]j]ujNjhj]r#j)r#}r#(jUj}r#(j]j]j]j]j]UcolsKujj#j]r#(j)r#}r#(jUj}r#(j]j]j]j]j]UcolwidthKujj#j]jjubj)r$}r$(jUj}r$(j]j]j]j]j]UcolwidthK*ujj#j]jjubj)r$}r$(jUj}r$(j]j]j]j]j]ujj#j]r$(j)r$}r$(jUj}r $(j]j]j]j]j]ujj$j]r $(j)r $}r $(jUj}r $(j]j]j]j]j]ujj$j]r$jX)r$}r$(jX **Document**r$jj $j j!jj\j}r$(j]j]j]j]j]ujKj]r$j|)r$}r$(jj$j}r$(j]j]j]j]j]ujj$j]r$j%XDocumentr$r$}r$(jUjj$ubajjubaubajjubj)r$}r$(jUj}r$(j]j]j]j]j]ujj$j]r$jX)r$}r $(jX **Location**r!$jj$j j!jj\j}r"$(j]j]j]j]j]ujKj]r#$j|)r$$}r%$(jj!$j}r&$(j]j]j]j]j]ujj$j]r'$j%XLocationr($r)$}r*$(jUjj$$ubajjubaubajjubejjubj)r+$}r,$(jUj}r-$(j]j]j]j]j]ujj$j]r.$(j)r/$}r0$(jUj}r1$(j]j]j]j]j]ujj+$j]r2$jX)r3$}r4$(jXAPI Reference Manualr5$jj/$j j!jj\j}r6$(j]j]j]j]j]ujKj]r7$j%XAPI Reference Manualr8$r9$}r:$(jj5$jj3$ubaubajjubj)r;$}r<$(jUj}r=$(j]j]j]j]j]ujj+$j]r>$jX)r?$}r@$(jXY$(TI_PDK_INSTALL_DIR)\\packages\\ti \\diag\\serdes_diag\\docs\\doxygen\\html \\index.htmljj;$j j!jj\j}rA$(j]j]j]j]j]ujKj]rB$j%XQ$(TI_PDK_INSTALL_DIR)\packages\ti \diag\serdes_diag\docs\doxygen\html \index.htmlrC$rD$}rE$(jXY$(TI_PDK_INSTALL_DIR)\\packages\\ti \\diag\\serdes_diag\\docs\\doxygen\\html \\index.htmljj?$ubaubajjubejjubj)rF$}rG$(jUj}rH$(j]j]j]j]j]ujj$j]rI$(j)rJ$}rK$(jUj}rL$(j]j]j]j]j]ujjF$j]rM$jX)rN$}rO$(jX Release NotesrP$jjJ$j j!jj\j}rQ$(j]j]j]j]j]ujKj]rR$j%X Release NotesrS$rT$}rU$(jjP$jjN$ubaubajjubj)rV$}rW$(jUj}rX$(j]j]j]j]j]ujjF$j]rY$jX)rZ$}r[$(jX]$(TI_PDK_INSTALL_DIR)\\packages\\ti \\diag\\serdes_diag\\docs\\Serdes_Diag_ Release_Notes.pdfjjV$j j!jj\j}r\$(j]j]j]j]j]ujKj]r]$j%XW$(TI_PDK_INSTALL_DIR)\packages\ti \diag\serdes_diag\docs\Serdes_Diag_ Release_Notes.pdfr^$r_$}r`$(jX]$(TI_PDK_INSTALL_DIR)\\packages\\ti \\diag\\serdes_diag\\docs\\Serdes_Diag_ Release_Notes.pdfjjZ$ubaubajjubejjubejjubejjubaubj)ra$}rb$(jUjj#j j!jjj}rc$(j]j]j]j]j]ujKjhj]rd$j)re$}rf$(jUjKjja$j j!jjj}rg$(j]j]j]j]j]ujKjhj]ubaubeubeubj j!jjj}rh$(j]ri$Xoverviewrj$aj]j]j]rk$Uid33rl$aj]ujKjhj]rm$(j)rn$}ro$(jXOverviewrp$jj!j j!jj"j}rq$(j]j]j]j]j]ujKjhj]rr$j%XOverviewrs$rt$}ru$(jjp$jjn$ubaubj)rv$}rw$(jUjKjj!j j!jjj}rx$(j]ry$X introductionrz$aj]j]j]r{$Uid34r|$aj]ujKjhj]r}$(j)r~$}r$(jX Introductionr$jjv$j j!jj"j}r$(j]j]j]j]j]ujKjhj]r$j%X Introductionr$r$}r$(jj$jj~$ubaubjX)r$}r$(jXThis tool demonstrates how to configure and use the Serdes Diag APIs on KeyStone 3 device family. The DIAG APIs currently support R5F arch. There are 2 tests included in the package:r$jjv$j j!jj\j}r$(j]j]j]j]j]ujKjhj]r$j%XThis tool demonstrates how to configure and use the Serdes Diag APIs on KeyStone 3 device family. The DIAG APIs currently support R5F arch. There are 2 tests included in the package:r$r$}r$(jj$jj$ubaubj)r$}r$(jUjjv$j j!jjj}r$(jX-j]j]j]j]j]ujK jhj]r$(j)r$}r$(jXSerdes Diag BER Testr$jj$j j!jj j}r$(j]j]j]j]j]ujNjhj]r$jX)r$}r$(jj$jj$j j!jj\j}r$(j]j]j]j]j]ujK j]r$j%XSerdes Diag BER Testr$r$}r$(jj$jj$ubaubaubj)r$}r$(jXSerdes Diag EYE Test jj$j j!jj j}r$(j]j]j]j]j]ujNjhj]r$jX)r$}r$(jXSerdes Diag EYE Testr$jj$j j!jj\j}r$(j]j]j]j]j]ujK j]r$j%XSerdes Diag EYE Testr$r$}r$(jj$jj$ubaubaubj)r$}r$(jXt**Serdes Diag BER Test:** The example finds out the optimal TX coefficients (CM, C1, C2) by performing Bit Error Rate (BER) sweeps on the Serdes where the EVM sends the transmit pattern (for example PRBS 31) and the EVM also detects the receive sequence and performs BER calculations across the desired serdes using the CPU. The sweep results are printed into a text file.jj$j j!jj j}r$(j]j]j]j]j]ujNjhj]r$jX)r$}r$(jXt**Serdes Diag BER Test:** The example finds out the optimal TX coefficients (CM, C1, C2) by performing Bit Error Rate (BER) sweeps on the Serdes where the EVM sends the transmit pattern (for example PRBS 31) and the EVM also detects the receive sequence and performs BER calculations across the desired serdes using the CPU. The sweep results are printed into a text file.jj$j j!jj\j}r$(j]j]j]j]j]ujKj]r$(j|)r$}r$(jX**Serdes Diag BER Test:**j}r$(j]j]j]j]j]ujj$j]r$j%XSerdes Diag BER Test:r$r$}r$(jUjj$ubajjubj%X[ The example finds out the optimal TX coefficients (CM, C1, C2) by performing Bit Error Rate (BER) sweeps on the Serdes where the EVM sends the transmit pattern (for example PRBS 31) and the EVM also detects the receive sequence and performs BER calculations across the desired serdes using the CPU. The sweep results are printed into a text file.r$r$}r$(jX[ The example finds out the optimal TX coefficients (CM, C1, C2) by performing Bit Error Rate (BER) sweeps on the Serdes where the EVM sends the transmit pattern (for example PRBS 31) and the EVM also detects the receive sequence and performs BER calculations across the desired serdes using the CPU. The sweep results are printed into a text file.jj$ubeubaubj)r$}r$(jXZ**Serdes Diag EYE Test** The example performs on chip eye measurement allowing the user to see the eye opening of the receive data after equalization. The EVM sends the transmit pattern (for example PRBS 31) and detects the sequence and performs EYE measurements across the desired serdes using the CPU. The results are printed into a text file. jj$j j!jj j}r$(j]j]j]j]j]ujNjhj]r$jX)r$}r$(jXY**Serdes Diag EYE Test** The example performs on chip eye measurement allowing the user to see the eye opening of the receive data after equalization. The EVM sends the transmit pattern (for example PRBS 31) and detects the sequence and performs EYE measurements across the desired serdes using the CPU. The results are printed into a text file.jj$j j!jj\j}r$(j]j]j]j]j]ujKj]r$(j|)r$}r$(jX**Serdes Diag EYE Test**j}r$(j]j]j]j]j]ujj$j]r$j%XSerdes Diag EYE Testr$r$}r$(jUjj$ubajjubj%XA The example performs on chip eye measurement allowing the user to see the eye opening of the receive data after equalization. The EVM sends the transmit pattern (for example PRBS 31) and detects the sequence and performs EYE measurements across the desired serdes using the CPU. The results are printed into a text file.r$r$}r$(jXA The example performs on chip eye measurement allowing the user to see the eye opening of the receive data after equalization. The EVM sends the transmit pattern (for example PRBS 31) and detects the sequence and performs EYE measurements across the desired serdes using the CPU. The results are printed into a text file.jj$ubeubaubeubj\)r$}r$(jX9Currently only internal loopback is supported on the EVM.r$jjv$j j!jj_j}r$(j]j]j]j]j]ujNjhj]r$jX)r$}r$(jj$jj$j j!jj\j}r$(j]j]j]j]j]ujKj]r$j%X9Currently only internal loopback is supported on the EVM.r$r$}r$(jj$jj$ubaubaubj)r$}r$(jUjjv$j j!jjj}r$(j]j]j]j]j]ujKjhj]r$j)r$}r$(jUjKjj$j j!jjj}r$(j]j]j]j]j]ujKjhj]ubaubeubeubj j!jj?j}r$(j]UlevelKj]j]r$jl$aUsourcej!j]j]UlineKUtypejAujKjhj]r$jX)r$}r$(jX+Duplicate implicit target name: "overview".j}r$(j]j]j]j]j]ujj!j]r$j%X+Duplicate implicit target name: "overview".r$r$}r$(jUjj$ubajj\ubaubh)r$}r$(jUjjv$j j!jj?j}r$(j]UlevelKj]j]r$j|$aUsourcej!j]j]UlineKUtypejAujKjhj]r$jX)r$}r$(jX/Duplicate implicit target name: "introduction".j}r$(j]j]j]j]j]ujj$j]r$j%X/Duplicate implicit target name: "introduction".r$r$}r$(jUjj$ubajj\ubaubh)r$}r$(jUjj!j j!jj?j}r$(j]UlevelKj]j]r$j!aUsourcej!j]j]UlineK UtypejAujK jhj]r$jX)r$}r$(jX1Duplicate implicit target name: "user interface".j}r$(j]j]j]j]j]ujj$j]r$j%X1Duplicate implicit target name: "user interface".r%r%}r%(jUjj$ubajj\ubaubh)r%}r%(jUjj!j j!jj?j}r%(j]UlevelKj]j]r%j!aUsourcej!j]j]UlineK#UtypejAujK#jhj]r%jX)r%}r %(jX7Duplicate implicit target name: "driver configuration".j}r %(j]j]j]j]j]ujj%j]r %j%X7Duplicate implicit target name: "driver configuration".r %r %}r%(jUjj%ubajj\ubaubh)r%}r%(jUjj!j j!jj?j}r%(j]UlevelKj]j]r%j!aUsourcej!j]j]UlineK.UtypejAujK.jhj]r%jX)r%}r%(jX'Duplicate implicit target name: "apis".j}r%(j]j]j]j]j]ujj%j]r%j%X'Duplicate implicit target name: "apis".r%r%}r%(jUjj%ubajj\ubaubh)r%}r%(jUjj"j j!jj?j}r%(j]UlevelKj]j]r%j "aUsourcej!j]j]UlineKLUtypejAujKLjhj]r%jX)r %}r!%(jX.Duplicate implicit target name: "application".j}r"%(j]j]j]j]j]ujj%j]r#%j%X.Duplicate implicit target name: "application".r$%r%%}r&%(jUjj %ubajj\ubaubh)r'%}r(%(jUjj*"j j!jj?j}r)%(j]UlevelKj]j]r*%j0"aUsourcej!j]j]UlineKOUtypejAujKOjhj]r+%jX)r,%}r-%(jX+Duplicate implicit target name: "examples".j}r.%(j]j]j]j]j]ujj'%j]r/%j%X+Duplicate implicit target name: "examples".r0%r1%}r2%(jUjj,%ubajj\ubaubh)r3%}r4%(jUj}r5%(j]UlevelKj]j]Usourcej!j]j]UlineKzUtypejXuj]r6%(jX)r7%}r8%(jUj}r9%(j]j]j]j]j]ujj3%j]r:%j%XTitle underline too short.r;%r<%}r=%(jUjj7%ubajj\ubj#)r>%}r?%(jX4Building Serdes Diag examples ----------------------j}r@%(j2j3j]j]j]j]j]ujj3%j]rA%j%X4Building Serdes Diag examples ----------------------rB%rC%}rD%(jUjj>%ubajj&ubejj?ubh)rE%}rF%(jUjj#j j!jj?j}rG%(j]UlevelKj]j]Usourcej!j]j]UlineKzUtypejXujKzjhj]rH%(jX)rI%}rJ%(jXTitle underline too short.j}rK%(j]j]j]j]j]ujjE%j]rL%j%XTitle underline too short.rM%rN%}rO%(jUjjI%ubajj\ubj#)rP%}rQ%(jX4Building Serdes Diag examples ----------------------j}rR%(j2j3j]j]j]j]j]ujjE%j]rS%j%X4Building Serdes Diag examples ----------------------rT%rU%}rV%(jUjjP%ubajj&ubeubh)rW%}rX%(jUjj#j j!jj?j}rY%(j]UlevelKj]j]Usourcej!j]j]UlineK}UtypejXujK|jhj]rZ%jX)r[%}r\%(jX;Bullet list ends without a blank line; unexpected unindent.j}r]%(j]j]j]j]j]ujjW%j]r^%j%X;Bullet list ends without a blank line; unexpected unindent.r_%r`%}ra%(jUjj[%ubajj\ubaubh)rb%}rc%(jUjj#j j!jj?j}rd%(j]UlevelKj]j]Usourcej!j]j]UlineKUtypejXujKjhj]re%jX)rf%}rg%(jX;Bullet list ends without a blank line; unexpected unindent.j}rh%(j]j]j]j]j]ujjb%j]ri%j%X;Bullet list ends without a blank line; unexpected unindent.rj%rk%}rl%(jUjjf%ubajj\ubaubh)rm%}rn%(jUjj#j j!jj?j}ro%(j]UlevelKj]j]rp%j#aUsourcej!j]j]UlineKUtypejAujKjhj]rq%jX)rr%}rs%(jX8Duplicate implicit target name: "additional references".j}rt%(j]j]j]j]j]ujjm%j]ru%j%X8Duplicate implicit target name: "additional references".rv%rw%}rx%(jUjjr%ubajj\ubaubh)ry%}rz%(jUj}r{%(j]UlevelKj]j]Usourcej j]j]UlineK+UtypejXuj]r|%(jX)r}%}r~%(jUj}r%(j]j]j]j]j]ujjy%j]r%j%XTitle overline too short.r%r%}r%(jUjj}%ubajj\ubj#)r%}r%(jX'*********** McSPI-QSPI-OSPI ***********j}r%(j2j3j]j]j]j]j]ujjy%j]r%j%X'*********** McSPI-QSPI-OSPI ***********r%r%}r%(jUjj%ubajj&ubejj?ubh)r%}r%(jUjj)r%}r%(jUjhj j jjj}r%(j]j]j]j]r%Umcspi-qspi-ospir%aj]r%hdaujK-jhj]r%(j)r%}r%(jXMcSPI-QSPI-OSPIr%jj%j j jj"j}r%(j]j]j]j]j]ujK-jhj]r%j%XMcSPI-QSPI-OSPIr%r%}r%(jj%jj%ubaubj)r%}r%(jUjKjj%j j,XCsource/rtos/PDK_Platform_Software/Device_Drivers/QSPI_McSPI.rst.incr%r%}r%bjjj}r%(j]r%X introductionr%aj]j]j]r%Uid41r%aj]ujKjhj]r%(j)r%}r%(jX Introductionr%jj%j j%jj"j}r%(j]j]j]j]j]ujKjhj]r%j%X Introductionr%r%}r%(jj%jj%ubaubjX)r%}r%(jXSPI driver enables communication for general SPI, MCSPI (Multichannel SPI), QSPI (Quad SPI) and OSPI (Octal SPI) based peripherals on board through common API to application. MCSPI is a generic full-duplex interface supporting transmit and receive of data over SPI bus. QSPI/OSPI is a variant of SPI supports four receive data lanes. Driver supports configuration for either single, dual, quad or octal data linesr%jj%j j%jj\j}r%(j]j]j]j]j]ujKjhj]r%j%XSPI driver enables communication for general SPI, MCSPI (Multichannel SPI), QSPI (Quad SPI) and OSPI (Octal SPI) based peripherals on board through common API to application. MCSPI is a generic full-duplex interface supporting transmit and receive of data over SPI bus. QSPI/OSPI is a variant of SPI supports four receive data lanes. Driver supports configuration for either single, dual, quad or octal data linesr%r%}r%(jj%jj%ubaubeubj)r%}r%(jUjj%j j%jjj}r%(j]j]j]j]r%Uid42r%aj]r%h}aujK jhj]r%(j)r%}r%(jXModes of Operationr%jj%j j%jj"j}r%(j]j]j]j]j]ujK jhj]r%j%XModes of Operationr%r%}r%(jj%jj%ubaubjX)r%}r%(jX,Following modes of operations are supported:r%jj%j j%jj\j}r%(j]j]j]j]j]ujKjhj]r%j%X,Following modes of operations are supported:r%r%}r%(jj%jj%ubaubjX)r%}r%(jX**SPI_MODE_BLOCKING** *SPI_transfer()* API blocks code execution until transaction has completed. By default, SPI driver operates in blocking mode. This ensures only one SPI transaction operates at a given time. This mode is supported in both interrupt or non-interrupt configurations.jj%j j%jj\j}r%(j]j]j]j]j]ujKjhj]r%(j|)r%}r%(jX**SPI_MODE_BLOCKING**j}r%(j]j]j]j]j]ujj%j]r%j%XSPI_MODE_BLOCKINGr%r%}r%(jUjj%ubajjubj%X r%}r%(jX jj%ubj<)r%}r%(jX*SPI_transfer()*j}r%(j]j]j]j]j]ujj%j]r%j%XSPI_transfer()r%r%}r%(jUjj%ubajjDubj%X API blocks code execution until transaction has completed. By default, SPI driver operates in blocking mode. This ensures only one SPI transaction operates at a given time. This mode is supported in both interrupt or non-interrupt configurations.r%r%}r%(jX API blocks code execution until transaction has completed. By default, SPI driver operates in blocking mode. This ensures only one SPI transaction operates at a given time. This mode is supported in both interrupt or non-interrupt configurations.jj%ubeubjX)r%}r%(jX**SPI_MODE_CALLBACK** *SPI_transfer()* API returns without waiting for completion of transaction in this case. Callback function registered by application is invoked once transaction is complete.This mode is supported only in interrupt configuration.jj%j j%jj\j}r%(j]j]j]j]j]ujKjhj]r%(j|)r%}r%(jX**SPI_MODE_CALLBACK**j}r%(j]j]j]j]j]ujj%j]r%j%XSPI_MODE_CALLBACKr%r%}r%(jUjj%ubajjubj%X r%}r%(jX jj%ubj<)r%}r%(jX*SPI_transfer()*j}r%(j]j]j]j]j]ujj%j]r%j%XSPI_transfer()r%r%}r%(jUjj%ubajjDubj%X API returns without waiting for completion of transaction in this case. Callback function registered by application is invoked once transaction is complete.This mode is supported only in interrupt configuration.r%r%}r%(jX API returns without waiting for completion of transaction in this case. Callback function registered by application is invoked once transaction is complete.This mode is supported only in interrupt configuration.jj%ubeubeubj)r%}r%(jUjKjj%j j%jjj}r%(j]r%Xdriver configurationr&aj]j]j]r&Uid43r&aj]ujKjhj]r&(j)r&}r&(jXDriver Configurationr&jj%j j%jj"j}r&(j]j]j]j]j]ujKjhj]r&j%XDriver Configurationr &r &}r &(jj&jj&ubaubj)r &}r &(jUjKjj%j j%jjj}r&(j]r&Xboard specific configurationr&aj]j]j]r&Uid44r&aj]ujK!jhj]r&(j)r&}r&(jXBoard Specific Configurationr&jj &j j%jj"j}r&(j]j]j]j]j]ujK!jhj]r&j%XBoard Specific Configurationr&r&}r&(jj&jj&ubaubjX)r&}r&(jXAll board specific configurations eg:enabling clock and pin-mux for SPI pins are required before calling any driver APIs.By default Board_Init() API supports all initialization sequence for TI supported EVMs. In addition it initializes UART instance for Console/STDIO.Refer `Processor SDK RTOS Board Support `__ for additional details.Once board specific configuration is complete \ *SPI_init()* API should be called to initialize driver.jj &j j%jj\j}r&(j]j]j]j]j]ujK#jhj]r&(j%XAll board specific configurations eg:enabling clock and pin-mux for SPI pins are required before calling any driver APIs.By default Board_Init() API supports all initialization sequence for TI supported EVMs. In addition it initializes UART instance for Console/STDIO.Refer r &r!&}r"&(jXAll board specific configurations eg:enabling clock and pin-mux for SPI pins are required before calling any driver APIs.By default Board_Init() API supports all initialization sequence for TI supported EVMs. In addition it initializes UART instance for Console/STDIO.Refer jj&ubj)r#&}r$&(jXE`Processor SDK RTOS Board Support `__j}r%&(UnameX Processor SDK RTOS Board SupportjXindex_board.html#board-supportj]j]j]j]j]ujj&j]r&&j%X Processor SDK RTOS Board Supportr'&r(&}r)&(jUjj#&ubajjubj%XG for additional details.Once board specific configuration is complete r*&r+&}r,&(jXI for additional details.Once board specific configuration is complete \ jj&ubj<)r-&}r.&(jX *SPI_init()*j}r/&(j]j]j]j]j]ujj&j]r0&j%X SPI_init()r1&r2&}r3&(jUjj-&ubajjDubj%X, API should be called to initialize driver.r4&r5&}r6&(jX, API should be called to initialize driver.jj&ubeubeubj)r7&}r8&(jUjj%j j%jjj}r9&(j]j]j]j]r:&Usoc-specific-configurationr;&aj]r<&haujK,jhj]r=&(j)r>&}r?&(jXSoC Specific Configurationr@&jj7&j j%jj"j}rA&(j]j]j]j]j]ujK,jhj]rB&j%XSoC Specific ConfigurationrC&rD&}rE&(jj@&jj>&ubaubjX)rF&}rG&(jX"All SoC specific configurations (eg: SPI module registers base address, interrupt configurations, etc.) can be set using SPI_socSetInitCfg() SoC driver API before calling any SPI driver APIs. The default SoC specific configurations can be retrieved using SPI_socGetInitCfg() SoC driver API.rH&jj7&j j%jj\j}rI&(j]j]j]j]j]ujK.jhj]rJ&j%X"All SoC specific configurations (eg: SPI module registers base address, interrupt configurations, etc.) can be set using SPI_socSetInitCfg() SoC driver API before calling any SPI driver APIs. The default SoC specific configurations can be retrieved using SPI_socGetInitCfg() SoC driver API.rK&rL&}rM&(jjH&jjF&ubaubeubj)rN&}rO&(jUjj%j j%jjj}rP&(j]j]j]j]rQ&Uspi-configuration-structurerR&aj]rS&haujK5jhj]rT&(j)rU&}rV&(jXSPI Configuration StructurerW&jjN&j j%jj"j}rX&(j]j]j]j]j]ujK5jhj]rY&j%XSPI Configuration StructurerZ&r[&}r\&(jjW&jjU&ubaubjX)r]&}r^&(jXThe *SPI_soc.c* file binds driver with hardware attributes on the board through *SPI_config[]* structure. This structure must be provided to the SPI driver. It must be initialized before the *SPI_init()* function is called and cannot be changed afterwards. For details about individual fields of this structure, see Doxygen help by opening *PDK_INSTALL_DIR\packages\ti\drv\spi\docs\doxygen\html\index.html.*jjN&j j%jj\j}r_&(j]j]j]j]j]ujK7jhj]r`&(j%XThe ra&rb&}rc&(jXThe jj]&ubj<)rd&}re&(jX *SPI_soc.c*j}rf&(j]j]j]j]j]ujj]&j]rg&j%X SPI_soc.crh&ri&}rj&(jUjjd&ubajjDubj%XA file binds driver with hardware attributes on the board through rk&rl&}rm&(jXA file binds driver with hardware attributes on the board through jj]&ubj<)rn&}ro&(jX*SPI_config[]*j}rp&(j]j]j]j]j]ujj]&j]rq&j%X SPI_config[]rr&rs&}rt&(jUjjn&ubajjDubj%Xa structure. This structure must be provided to the SPI driver. It must be initialized before the ru&rv&}rw&(jXa structure. This structure must be provided to the SPI driver. It must be initialized before the jj]&ubj<)rx&}ry&(jX *SPI_init()*j}rz&(j]j]j]j]j]ujj]&j]r{&j%X SPI_init()r|&r}&}r~&(jUjjx&ubajjDubj%X function is called and cannot be changed afterwards. For details about individual fields of this structure, see Doxygen help by opening r&r&}r&(jX function is called and cannot be changed afterwards. For details about individual fields of this structure, see Doxygen help by opening jj]&ubj<)r&}r&(jXC*PDK_INSTALL_DIR\packages\ti\drv\spi\docs\doxygen\html\index.html.*j}r&(j]j]j]j]j]ujj]&j]r&j%X9PDK_INSTALL_DIRpackagestidrvspidocsdoxygenhtmlindex.html.r&r&}r&(jUjj&ubajjDubeubjX)r&}r&(jXEDriver  requires common *SPI_config[]*  to configure hardware attributes of MCSPI and QSPI/OSPI peripherals on SOC and board. First all MCSPI related hardware attributes is defined followed by QSPI/OSPI hardware attributes. Application will need to include appropriate offset to instance while invoking *SPI_open()* API..jjN&j j%jj\j}r&(j]j]j]j]j]ujK>jhj]r&(j%XDriver  requires common r&r&}r&(jXDriver  requires common jj&ubj<)r&}r&(jX*SPI_config[]*j}r&(j]j]j]j]j]ujj&j]r&j%X SPI_config[]r&r&}r&(jUjj&ubajjDubj%X   to configure hardware attributes of MCSPI and QSPI/OSPI peripherals on SOC and board. First all MCSPI related hardware attributes is defined followed by QSPI/OSPI hardware attributes. Application will need to include appropriate offset to instance while invoking r&r&}r&(jX   to configure hardware attributes of MCSPI and QSPI/OSPI peripherals on SOC and board. First all MCSPI related hardware attributes is defined followed by QSPI/OSPI hardware attributes. Application will need to include appropriate offset to instance while invoking jj&ubj<)r&}r&(jX *SPI_open()*j}r&(j]j]j]j]j]ujj&j]r&j%X SPI_open()r&r&}r&(jUjj&ubajjDubj%X API..r&r&}r&(jX API..jj&ubeubeubeubj)r&}r&(jUjKjj%j j%jjj}r&(j]r&Xapisr&aj]j]j]r&Uid45r&aj]ujKEjhj]r&(j)r&}r&(jXAPIsr&jj&j j%jj"j}r&(j]j]j]j]j]ujKEjhj]r&j%XAPIsr&r&}r&(jj&jj&ubaubjX)r&}r&(jXAPI Reference for application:r&jj&j j%jj\j}r&(j]j]j]j]j]ujKGjhj]r&j%XAPI Reference for application:r&r&}r&(jj&jj&ubaubj#)r&}r&(jX#include jj&j j%jj&j}r&(j2j3j]j]j]j]j]ujMjhj]r&j%X#include r&r&}r&(jUjj&ubaubjX)r&}r&(jX3SPI IP V1 driver also supports multi-channel API's:r&jj&j j%jj\j}r&(j]j]j]j]j]ujKMjhj]r&j%X3SPI IP V1 driver also supports multi-channel API's:r&r&}r&(jj&jj&ubaubj#)r&}r&(jX#include jj&j j%jj&j}r&(j2j3j]j]j]j]j]ujMjhj]r&j%X#include r&r&}r&(jUjj&ubaubj)r&}r&(jUjj&j j%jjj}r&(j]j]j]j]r&Uopen-spir&aj]r&haujKWjhj]r&(j)r&}r&(jXOpen SPIr&jj&j j%jj"j}r&(j]j]j]j]j]ujKWjhj]r&j%XOpen SPIr&r&}r&(jj&jj&ubaubj#)r&}r&(jX... Board_init(boardCfg); ... SPI_socGetInitCfg(peripheralNum, &spi_cfg); ... SPI_socSetInitCfg(peripheralNum, &spi_cfg); SPI_Params_init(&spiParams); spiParams.transferMode = SPI_MODE_BLOCKING; spiParams.transferCallbackFxn = NULL; handle = SPI_open(peripheralNum, &spiParams);jj&j j%jj&j}r&(j2j3j]j]j]j]j]ujMjhj]r&j%X... Board_init(boardCfg); ... SPI_socGetInitCfg(peripheralNum, &spi_cfg); ... SPI_socSetInitCfg(peripheralNum, &spi_cfg); SPI_Params_init(&spiParams); spiParams.transferMode = SPI_MODE_BLOCKING; spiParams.transferCallbackFxn = NULL; handle = SPI_open(peripheralNum, &spiParams);r&r&}r&(jUjj&ubaubjX)r&}r&(jX8SPI IP V1 driver also supports multi-channel open API's:r&jj&j j%jj\j}r&(j]j]j]j]j]ujKfjhj]r&j%X8SPI IP V1 driver also supports multi-channel open API's:r&r&}r&(jj&jj&ubaubj#)r&}r&(jX... Board_init(boardCfg); ... MCSPI_Params_init(&spiParams); spiParams.transferMode = SPI_MODE_BLOCKING; spiParams.transferCallbackFxn = NULL; handle = MCSPI_open(peripheralNum, channel, &spiParams);jj&j j%jj&j}r&(j2j3j]j]j]j]j]ujMjhj]r&j%X... Board_init(boardCfg); ... MCSPI_Params_init(&spiParams); spiParams.transferMode = SPI_MODE_BLOCKING; spiParams.transferCallbackFxn = NULL; handle = MCSPI_open(peripheralNum, channel, &spiParams);r&r&}r&(jUjj&ubaubj)r&}r&(jUjj&j j%jjj}r&(j]j]j]j]j]ujKrjhj]r&j)r&}r&(jUjKjj&j j%jjj}r&(j]j]j]j]j]ujKjhj]ubaubjX)r&}r&(jXAt this point SPI driver is ready for data transfer in blocking mode on specific instance identified by handle. Pseudo/Sample code for SPI read/write transaction is included below. Refer example for additional detailsr'jj&j j%jj\j}r'(j]j]j]j]j]ujKsjhj]r'j%XAt this point SPI driver is ready for data transfer in blocking mode on specific instance identified by handle. Pseudo/Sample code for SPI read/write transaction is included below. Refer example for additional detailsr'r'}r'(jj'jj&ubaubj#)r'}r'(jX<... spiTransaction.count = n; /* Transfer Length */ spiTransaction. txBuf = transmitBuffer; /* Buffer to be written */ spiTransaction.rxBuf = NULL; /* Buffer holding the received data */ transferOK = SPI_transfer(spi, &spiTransaction); /* Perform SPI transfer */ if (!transferOK) { /* SPI transaction failed */ }jj&j j%jj&j}r'(j2j3j]j]j]j]j]ujMjhj]r 'j%X<... spiTransaction.count = n; /* Transfer Length */ spiTransaction. txBuf = transmitBuffer; /* Buffer to be written */ spiTransaction.rxBuf = NULL; /* Buffer holding the received data */ transferOK = SPI_transfer(spi, &spiTransaction); /* Perform SPI transfer */ if (!transferOK) { /* SPI transaction failed */ }r 'r '}r '(jUjj'ubaubjX)r '}r'(jX<SPI IP V1 driver also supports multi-channel transfer API's:r'jj&j j%jj\j}r'(j]j]j]j]j]ujKjhj]r'j%X<SPI IP V1 driver also supports multi-channel transfer API's:r'r'}r'(jj'jj 'ubaubj#)r'}r'(jX>... spiTransaction.count = n; /* Transfer Length */ spiTransaction. txBuf = transmitBuffer; /* Buffer to be written */ spiTransaction.rxBuf = NULL; /* Buffer holding the received data */ transferOK = MCSPI_transfer(spi, &spiTransaction); /* Perform SPI transfer */ if (!transferOK) { /* SPI transaction failed */ }jj&j j%jj&j}r'(j2j3j]j]j]j]j]ujMjhj]r'j%X>... spiTransaction.count = n; /* Transfer Length */ spiTransaction. txBuf = transmitBuffer; /* Buffer to be written */ spiTransaction.rxBuf = NULL; /* Buffer holding the received data */ transferOK = MCSPI_transfer(spi, &spiTransaction); /* Perform SPI transfer */ if (!transferOK) { /* SPI transaction failed */ }r'r'}r'(jUjj'ubaubj\)r'}r'(jXSPI_open API supports configuration of data word length in the SPI_Params. Currently IP V1 driver (for AM3/4/5 devices) supports 8/16/32-bit word length, IP V0 driver (for Keystone devices) supports 8/16-bit word length.jj&j j%jj_j}r'(j]j]j]j]j]ujNjhj]r'jX)r '}r!'(jXSPI_open API supports configuration of data word length in the SPI_Params. Currently IP V1 driver (for AM3/4/5 devices) supports 8/16/32-bit word length, IP V0 driver (for Keystone devices) supports 8/16-bit word length.r"'jj'j j%jj\j}r#'(j]j]j]j]j]ujKj]r$'j%XSPI_open API supports configuration of data word length in the SPI_Params. Currently IP V1 driver (for AM3/4/5 devices) supports 8/16/32-bit word length, IP V0 driver (for Keystone devices) supports 8/16-bit word length.r%'r&'}r''(jj"'jj 'ubaubaubeubeubj)r('}r)'(jUjKjj%j j%jjj}r*'(j]r+'Xexamplesr,'aj]j]j]r-'Uid46r.'aj]ujKjhj]r/'(j)r0'}r1'(jXExamplesr2'jj('j j%jj"j}r3'(j]j]j]j]j]ujKjhj]r4'j%XExamplesr5'r6'}r7'(jj2'jj0'ubaubj)r8'}r9'(jUjj('j j%jjj}r:'(j]j]j]j]r;'Uspir<'aj]r='haujKjhj]r>'(j)r?'}r@'(jXSPIrA'jj8'j j%jj"j}rB'(j]j]j]j]j]ujKjhj]rC'j%XSPIrD'rE'}rF'(jjA'jj?'ubaubj)rG'}rH'(jUjj8'j j%jjj}rI'(j]j]j]j]j]ujNjhj]rJ'j)rK'}rL'(jUj}rM'(j]j]j]j]j]UcolsKujjG'j]rN'(j)rO'}rP'(jUj}rQ'(j]j]j]j]j]UcolwidthKujjK'j]jjubj)rR'}rS'(jUj}rT'(j]j]j]j]j]UcolwidthKujjK'j]jjubj)rU'}rV'(jUj}rW'(j]j]j]j]j]UcolwidthKujjK'j]jjubj)rX'}rY'(jUj}rZ'(j]j]j]j]j]UcolwidthKujjK'j]jjubj)r['}r\'(jUj}r]'(j]j]j]j]j]UcolwidthKujjK'j]jjubj)r^'}r_'(jUj}r`'(j]j]j]j]j]ujjK'j]ra'j)rb'}rc'(jUj}rd'(j]j]j]j]j]ujj^'j]re'(j)rf'}rg'(jUj}rh'(j]j]j]j]j]ujjb'j]ri'jX)rj'}rk'(jXNamerl'jjf'j j%jj\j}rm'(j]j]j]j]j]ujKj]rn'j%XNamero'rp'}rq'(jjl'jjj'ubaubajjubj)rr'}rs'(jUj}rt'(j]j]j]j]j]ujjb'j]ru'jX)rv'}rw'(jX Descriptionrx'jjr'j j%jj\j}ry'(j]j]j]j]j]ujKj]rz'j%X Descriptionr{'r|'}r}'(jjx'jjv'ubaubajjubj)r~'}r'(jUj}r'(j]j]j]j]j]ujjb'j]r'jX)r'}r'(jXExpected Resultsr'jj~'j j%jj\j}r'(j]j]j]j]j]ujKj]r'j%XExpected Resultsr'r'}r'(jj'jj'ubaubajjubj)r'}r'(jUj}r'(j]j]j]j]j]ujjb'j]r'jX)r'}r'(jX SoC Supportedr'jj'j j%jj\j}r'(j]j]j]j]j]ujKj]r'j%X SoC Supportedr'r'}r'(jj'jj'ubaubajjubj)r'}r'(jUj}r'(j]j]j]j]j]ujjb'j]r'jX)r'}r'(jX Build Typer'jj'j j%jj\j}r'(j]j]j]j]j]ujKj]r'j%X Build Typer'r'}r'(jj'jj'ubaubajjubejjubajjubj)r'}r'(jUj}r'(j]j]j]j]j]ujjK'j]r'(j)r'}r'(jUj}r'(j]j]j]j]j]ujj'j]r'(j)r'}r'(jUj}r'(j]j]j]j]j]ujj'j]r'(jX)r'}r'(jXSPI_FlashReadWriter'jj'j j%jj\j}r'(j]j]j]j]j]ujKj]r'j%XSPI_FlashReadWriter'r'}r'(jj'jj'ubaubjX)r'}r'(jXExample applicationr'jj'j j%jj\j}r'(j]j]j]j]j]ujKj]r'j%XExample applicationr'r'}r'(jj'jj'ubaubejjubj)r'}r'(jUj}r'(j]j]j]j]j]ujj'j]r'(jX)r'}r'(jXSample application demonstrating read and write of data to a NOR flash device connected over SPI interface. By default, write test is disabled, user can enable write test by defining TEST_SPI_NOR_WRITE in test/src/SPI_board.hr'jj'j j%jj\j}r'(j]j]j]j]j]ujKj]r'j%XSample application demonstrating read and write of data to a NOR flash device connected over SPI interface. By default, write test is disabled, user can enable write test by defining TEST_SPI_NOR_WRITE in test/src/SPI_board.hr'r'}r'(jj'jj'ubaubjX)r'}r'(jXbIf write test is enabled, write transaction is verified for correctness by reading contents back.r'jj'j j%jj\j}r'(j]j]j]j]j]ujKj]r'j%XbIf write test is enabled, write transaction is verified for correctness by reading contents back.r'r'}r'(jj'jj'ubaubejjubj)r'}r'(jUj}r'(j]j]j]j]j]ujj'j]r'(jX)r'}r'(jX8Following prints on console expected: **Pass criteria:**jj'j j%jj\j}r'(j]j]j]j]j]ujKj]r'(j%X&Following prints on console expected: r'r'}r'(jX&Following prints on console expected: jj'ubj|)r'}r'(jX**Pass criteria:**j}r'(j]j]j]j]j]ujj'j]r'j%XPass criteria:r'r'}r'(jUjj'ubajjubeubjX)r'}r'(jXAll tests have passed.r'jj'j j%jj\j}r'(j]j]j]j]j]ujKj]r'j%XAll tests have passed.r'r'}r'(jj'jj'ubaubejjubj)r'}r'(jUj}r'(j]j]j]j]j]ujj'j]r'jX)r'}r'(jX,k2g, k2hk, k2l, k2e, c6657, c6678, omapl137,r'jj'j j%jj\j}r'(j]j]j]j]j]ujKj]r'j%X,k2g, k2hk, k2l, k2e, c6657, c6678, omapl137,r'r'}r'(jj'jj'ubaubajjubj)r'}r'(jUj}r'(j]j]j]j]j]ujj'j]r'jX)r'}r'(jX CCS projectr'jj'j j%jj\j}r'(j]j]j]j]j]ujKj]r(j%X CCS projectr(r(}r((jj'jj'ubaubajjubejjubj)r(}r((jUj}r((j]j]j]j]j]ujj'j]r((j)r(}r ((jUj}r ((j]j]j]j]j]ujj(j]r (jX)r (}r ((jXSPI_TestApplicationr(jj(j j%jj\j}r((j]j]j]j]j]ujKj]r(j%XSPI_TestApplicationr(r(}r((jj(jj (ubaubajjubj)r(}r((jUj}r((j]j]j]j]j]ujj(j]r(jX)r(}r((jXODriver unit test application to validate features and interfaces for SPI driverr(jj(j j%jj\j}r((j]j]j]j]j]ujKj]r(j%XODriver unit test application to validate features and interfaces for SPI driverr(r(}r((jj(jj(ubaubajjubj)r (}r!((jUj}r"((j]j]j]j]j]ujj(j]r#(jX)r$(}r%((jXOFollowing prints on console expected: **Pass criteria:** All tests have passed.jj (j j%jj\j}r&((j]j]j]j]j]ujKj]r'((j%X&Following prints on console expected: r((r)(}r*((jX&Following prints on console expected: jj$(ubj|)r+(}r,((jX**Pass criteria:**j}r-((j]j]j]j]j]ujj$(j]r.(j%XPass criteria:r/(r0(}r1((jUjj+(ubajjubj%X All tests have passed.r2(r3(}r4((jX All tests have passed.jj$(ubeubajjubj)r5(}r6((jUj}r7((j]j]j]j]j]ujj(j]r8(jX)r9(}r:((jX&am335x AM437x, AM571x, AM572x, AM574x,r;(jj5(j j%jj\j}r<((j]j]j]j]j]ujKj]r=(j%X&am335x AM437x, AM571x, AM572x, AM574x,r>(r?(}r@((jj;(jj9(ubaubajjubj)rA(}rB((jUj}rC((j]j]j]j]j]ujj(j]rD(jX)rE(}rF((jX CCS projectrG(jjA(j j%jj\j}rH((j]j]j]j]j]ujKj]rI(j%X CCS projectrJ(rK(}rL((jjG(jjE(ubaubajjubejjubj)rM(}rN((jUj}rO((j]j]j]j]j]ujj'j]rP((j)rQ(}rR((jUj}rS((j]j]j]j]j]ujjM(j]rT(jX)rU(}rV((jXspiLoopback examplerW(jjQ(j j%jj\j}rX((j]j]j]j]j]ujKj]rY(j%XspiLoopback examplerZ(r[(}r\((jjW(jjU(ubaubajjubj)r](}r^((jUj}r_((j]j]j]j]j]ujjM(j]r`((jX)ra(}rb((jXExample application to validate features and interfaces for SPI driver in loopback mode. Configures the SPI in loopback mode, transmits a test pattern and receives it back from SPI.rc(jj](j j%jj\j}rd((j]j]j]j]j]ujKj]re(j%XExample application to validate features and interfaces for SPI driver in loopback mode. Configures the SPI in loopback mode, transmits a test pattern and receives it back from SPI.rf(rg(}rh((jjc(jja(ubaubjX)ri(}rj((jXNote: This example is intended to demonstrate the SPI LLD API usage on the HW platforms where SPI memory is not available. Currently this example is supported on OMAPL138/C6748 platforms.rk(jj](j j%jj\j}rl((j]j]j]j]j]ujKj]rm(j%XNote: This example is intended to demonstrate the SPI LLD API usage on the HW platforms where SPI memory is not available. Currently this example is supported on OMAPL138/C6748 platforms.rn(ro(}rp((jjk(jji(ubaubejjubj)rq(}rr((jUj}rs((j]j]j]j]j]ujjM(j]rt(jX)ru(}rv((jXOFollowing prints on console expected: **Pass criteria:** All tests have passed.jjq(j j%jj\j}rw((j]j]j]j]j]ujKj]rx((j%X&Following prints on console expected: ry(rz(}r{((jX&Following prints on console expected: jju(ubj|)r|(}r}((jX**Pass criteria:**j}r~((j]j]j]j]j]ujju(j]r(j%XPass criteria:r(r(}r((jUjj|(ubajjubj%X All tests have passed.r(r(}r((jX All tests have passed.jju(ubeubajjubj)r(}r((jUj}r((j]j]j]j]j]ujjM(j]r(jX)r(}r((jX@k2g, k2l, k2e, omapl138, AM335x, AM437x, AM571x, AM572x, AM574x,r(jj(j j%jj\j}r((j]j]j]j]j]ujKj]r(j%X@k2g, k2l, k2e, omapl138, AM335x, AM437x, AM571x, AM572x, AM574x,r(r(}r((jj(jj(ubaubajjubj)r(}r((jUj}r((j]j]j]j]j]ujjM(j]r(jX)r(}r((jX CCS projectr(jj(j j%jj\j}r((j]j]j]j]j]ujKj]r(j%X CCS projectr(r(}r((jj(jj(ubaubajjubejjubejjubejjubaubj)r(}r((jUjj8'j j%jjj}r((j]j]j]j]j]ujKjhj]r(j)r(}r((jUjKjj(j j%jjj}r((j]j]j]j]j]ujKjhj]ubaubeubj)r(}r((jUjj('j j%jjj}r((j]j]j]j]r(Uqspir(aj]r(haujKjhj]r((j)r(}r((jXQSPIr(jj(j j%jj"j}r((j]j]j]j]j]ujKjhj]r(j%XQSPIr(r(}r((jj(jj(ubaubj)r(}r((jUjj(j j%jjj}r((j]j]j]j]j]ujNjhj]r(j)r(}r((jUj}r((j]j]j]j]j]UcolsKujj(j]r((j)r(}r((jUj}r((j]j]j]j]j]UcolwidthKujj(j]jjubj)r(}r((jUj}r((j]j]j]j]j]UcolwidthKujj(j]jjubj)r(}r((jUj}r((j]j]j]j]j]UcolwidthKujj(j]jjubj)r(}r((jUj}r((j]j]j]j]j]UcolwidthKujj(j]jjubj)r(}r((jUj}r((j]j]j]j]j]UcolwidthKujj(j]jjubj)r(}r((jUj}r((j]j]j]j]j]ujj(j]r(j)r(}r((jUj}r((j]j]j]j]j]ujj(j]r((j)r(}r((jUj}r((j]j]j]j]j]ujj(j]r(jX)r(}r((jXNamer(jj(j j%jj\j}r((j]j]j]j]j]ujKj]r(j%XNamer(r(}r((jj(jj(ubaubajjubj)r(}r((jUj}r((j]j]j]j]j]ujj(j]r(jX)r(}r((jX Descriptionr(jj(j j%jj\j}r((j]j]j]j]j]ujKj]r(j%X Descriptionr(r(}r((jj(jj(ubaubajjubj)r(}r((jUj}r((j]j]j]j]j]ujj(j]r(jX)r(}r((jXExpected Resultsr(jj(j j%jj\j}r((j]j]j]j]j]ujKj]r(j%XExpected Resultsr(r(}r((jj(jj(ubaubajjubj)r(}r((jUj}r((j]j]j]j]j]ujj(j]r(jX)r(}r((jX SoC Supportedr(jj(j j%jj\j}r((j]j]j]j]j]ujKj]r(j%X SoC Supportedr)r)}r)(jj(jj(ubaubajjubj)r)}r)(jUj}r)(j]j]j]j]j]ujj(j]r)jX)r)}r)(jX Build Typer )jj)j j%jj\j}r )(j]j]j]j]j]ujKj]r )j%X Build Typer )r )}r)(jj )jj)ubaubajjubejjubajjubj)r)}r)(jUj}r)(j]j]j]j]j]ujj(j]r)(j)r)}r)(jUj}r)(j]j]j]j]j]ujj)j]r)(j)r)}r)(jUj}r)(j]j]j]j]j]ujj)j]r)(jX)r)}r)(jXQSPI_FlashReadWriter)jj)j j%jj\j}r)(j]j]j]j]j]ujKj]r)j%XQSPI_FlashReadWriter )r!)}r")(jj)jj)ubaubjX)r#)}r$)(jXExample applicationr%)jj)j j%jj\j}r&)(j]j]j]j]j]ujKj]r')j%XExample applicationr()r))}r*)(jj%)jj#)ubaubejjubj)r+)}r,)(jUj}r-)(j]j]j]j]j]ujj)j]r.)jX)r/)}r0)(jXSample application demonstrating read and write of data to a flash device connected over QSPI interface. Write transaction is verified  for correctness by reading contents back.r1)jj+)j j%jj\j}r2)(j]j]j]j]j]ujKj]r3)j%XSample application demonstrating read and write of data to a flash device connected over QSPI interface. Write transaction is verified  for correctness by reading contents back.r4)r5)}r6)(jj1)jj/)ubaubajjubj)r7)}r8)(jUj}r9)(j]j]j]j]j]ujj)j]r:)(jX)r;)}r<)(jX8Following prints on console expected: **Pass criteria:**jj7)j j%jj\j}r=)(j]j]j]j]j]ujKj]r>)(j%X&Following prints on console expected: r?)r@)}rA)(jX&Following prints on console expected: jj;)ubj|)rB)}rC)(jX**Pass criteria:**j}rD)(j]j]j]j]j]ujj;)j]rE)j%XPass criteria:rF)rG)}rH)(jUjjB)ubajjubeubjX)rI)}rJ)(jXAll tests have passed.rK)jj7)j j%jj\j}rL)(j]j]j]j]j]ujKj]rM)j%XAll tests have passed.rN)rO)}rP)(jjK)jjI)ubaubejjubj)rQ)}rR)(jUj}rS)(j]j]j]j]j]ujj)j]rT)jX)rU)}rV)(jX$AM437x, AM571x, AM572x, AM574x, k2g,rW)jjQ)j j%jj\j}rX)(j]j]j]j]j]ujKj]rY)j%X$AM437x, AM571x, AM572x, AM574x, k2g,rZ)r[)}r\)(jjW)jjU)ubaubajjubj)r])}r^)(jUj}r_)(j]j]j]j]j]ujj)j]r`)jX)ra)}rb)(jX CCS projectrc)jj])j j%jj\j}rd)(j]j]j]j]j]ujKj]re)j%X CCS projectrf)rg)}rh)(jjc)jja)ubaubajjubejjubj)ri)}rj)(jUj}rk)(j]j]j]j]j]ujj)j]rl)(j)rm)}rn)(jUj}ro)(j]j]j]j]j]ujji)j]rp)jX)rq)}rr)(jXQSPI_TestApplicationrs)jjm)j j%jj\j}rt)(j]j]j]j]j]ujKj]ru)j%XQSPI_TestApplicationrv)rw)}rx)(jjs)jjq)ubaubajjubj)ry)}rz)(jUj}r{)(j]j]j]j]j]ujji)j]r|)jX)r})}r~)(jXPDriver unit test application to validate features and interfaces for QSPI driverr)jjy)j j%jj\j}r)(j]j]j]j]j]ujKj]r)j%XPDriver unit test application to validate features and interfaces for QSPI driverr)r)}r)(jj)jj})ubaubajjubj)r)}r)(jUj}r)(j]j]j]j]j]ujji)j]r)jX)r)}r)(jXOFollowing prints on console expected: **Pass criteria:** All tests have passed.jj)j j%jj\j}r)(j]j]j]j]j]ujKj]r)(j%X&Following prints on console expected: r)r)}r)(jX&Following prints on console expected: jj)ubj|)r)}r)(jX**Pass criteria:**j}r)(j]j]j]j]j]ujj)j]r)j%XPass criteria:r)r)}r)(jUjj)ubajjubj%X All tests have passed.r)r)}r)(jX All tests have passed.jj)ubeubajjubj)r)}r)(jUj}r)(j]j]j]j]j]ujji)j]r)jX)r)}r)(jX$AM437x, AM571x, AM572x, AM574x, k2g,r)jj)j j%jj\j}r)(j]j]j]j]j]ujKj]r)j%X$AM437x, AM571x, AM572x, AM574x, k2g,r)r)}r)(jj)jj)ubaubajjubj)r)}r)(jUj}r)(j]j]j]j]j]ujji)j]r)jX)r)}r)(jX CCS projectr)jj)j j%jj\j}r)(j]j]j]j]j]ujKj]r)j%X CCS projectr)r)}r)(jj)jj)ubaubajjubejjubejjubejjubaubj)r)}r)(jUjj(j j%jjj}r)(j]j]j]j]j]ujKjhj]r)j)r)}r)(jUjKjj)j j%jjj}r)(j]j]j]j]j]ujKjhj]ubaubeubj)r)}r)(jUjj('j j%jjj}r)(j]j]j]j]r)Uospir)aj]r)hwaujKjhj]r)(j)r)}r)(jXOSPIr)jj)j j%jj"j}r)(j]j]j]j]j]ujKjhj]r)j%XOSPIr)r)}r)(jj)jj)ubaubj)r)}r)(jUjj)j j%jjj}r)(j]j]j]j]j]ujNjhj]r)j)r)}r)(jUj}r)(j]j]j]j]j]UcolsKujj)j]r)(j)r)}r)(jUj}r)(j]j]j]j]j]UcolwidthKujj)j]jjubj)r)}r)(jUj}r)(j]j]j]j]j]UcolwidthKujj)j]jjubj)r)}r)(jUj}r)(j]j]j]j]j]UcolwidthKujj)j]jjubj)r)}r)(jUj}r)(j]j]j]j]j]UcolwidthKujj)j]jjubj)r)}r)(jUj}r)(j]j]j]j]j]UcolwidthKujj)j]jjubj)r)}r)(jUj}r)(j]j]j]j]j]ujj)j]r)j)r)}r)(jUj}r)(j]j]j]j]j]ujj)j]r)(j)r)}r)(jUj}r)(j]j]j]j]j]ujj)j]r)jX)r)}r)(jXNamer)jj)j j%jj\j}r)(j]j]j]j]j]ujKj]r)j%XNamer)r)}r)(jj)jj)ubaubajjubj)r)}r)(jUj}r)(j]j]j]j]j]ujj)j]r)jX)r)}r)(jX Descriptionr)jj)j j%jj\j}r)(j]j]j]j]j]ujKj]r)j%X Descriptionr)r)}r)(jj)jj)ubaubajjubj)r)}r*(jUj}r*(j]j]j]j]j]ujj)j]r*jX)r*}r*(jXExpected Resultsr*jj)j j%jj\j}r*(j]j]j]j]j]ujKj]r*j%XExpected Resultsr*r *}r *(jj*jj*ubaubajjubj)r *}r *(jUj}r *(j]j]j]j]j]ujj)j]r*jX)r*}r*(jX SoC Supportedr*jj *j j%jj\j}r*(j]j]j]j]j]ujKj]r*j%X SoC Supportedr*r*}r*(jj*jj*ubaubajjubj)r*}r*(jUj}r*(j]j]j]j]j]ujj)j]r*jX)r*}r*(jX Build Typer*jj*j j%jj\j}r*(j]j]j]j]j]ujKj]r*j%X Build Typer *r!*}r"*(jj*jj*ubaubajjubejjubajjubj)r#*}r$*(jUj}r%*(j]j]j]j]j]ujj)j]r&*(j)r'*}r(*(jUj}r)*(j]j]j]j]j]ujj#*j]r**(j)r+*}r,*(jUj}r-*(j]j]j]j]j]ujj'*j]r.*jX)r/*}r0*(jXOSPI_TestApplicationr1*jj+*j j%jj\j}r2*(j]j]j]j]j]ujKj]r3*j%XOSPI_TestApplicationr4*r5*}r6*(jj1*jj/*ubaubajjubj)r7*}r8*(jUj}r9*(j]j]j]j]j]ujj'*j]r:*jX)r;*}r<*(jXPDriver unit test application to validate features and interfaces for OSPI driverr=*jj7*j j%jj\j}r>*(j]j]j]j]j]ujKj]r?*j%XPDriver unit test application to validate features and interfaces for OSPI driverr@*rA*}rB*(jj=*jj;*ubaubajjubj)rC*}rD*(jUj}rE*(j]j]j]j]j]ujj'*j]rF*jX)rG*}rH*(jXOFollowing prints on console expected: **Pass criteria:** All tests have passed.jjC*j j%jj\j}rI*(j]j]j]j]j]ujKj]rJ*(j%X&Following prints on console expected: rK*rL*}rM*(jX&Following prints on console expected: jjG*ubj|)rN*}rO*(jX**Pass criteria:**j}rP*(j]j]j]j]j]ujjG*j]rQ*j%XPass criteria:rR*rS*}rT*(jUjjN*ubajjubj%X All tests have passed.rU*rV*}rW*(jX All tests have passed.jjG*ubeubajjubj)rX*}rY*(jUj}rZ*(j]j]j]j]j]ujj'*j]r[*jX)r\*}r]*(jX am65xx j721er^*jjX*j j%jj\j}r_*(j]j]j]j]j]ujKj]r`*j%X am65xx j721era*rb*}rc*(jj^*jj\*ubaubajjubj)rd*}re*(jUj}rf*(j]j]j]j]j]ujj'*j]rg*jX)rh*}ri*(jXmakefilerj*jjd*j j%jj\j}rk*(j]j]j]j]j]ujKj]rl*j%Xmakefilerm*rn*}ro*(jjj*jjh*ubaubajjubejjubj)rp*}rq*(jUj}rr*(j]j]j]j]j]ujj#*j]rs*(j)rt*}ru*(jUj}rv*(j]j]j]j]j]ujjp*j]rw*jX)rx*}ry*(jXOSPI_SMP_Test Applicationrz*jjt*j j%jj\j}r{*(j]j]j]j]j]ujMj]r|*j%XOSPI_SMP_Test Applicationr}*r~*}r*(jjz*jjx*ubaubajjubj)r*}r*(jUj}r*(j]j]j]j]j]ujjp*j]r*jX)r*}r*(jXhDriver unit test application to validate features and interfaces for OSPI driver in SMP mode. (A53 core)r*jj*j j%jj\j}r*(j]j]j]j]j]ujMj]r*j%XhDriver unit test application to validate features and interfaces for OSPI driver in SMP mode. (A53 core)r*r*}r*(jj*jj*ubaubajjubj)r*}r*(jUj}r*(j]j]j]j]j]ujjp*j]r*jX)r*}r*(jXOFollowing prints on console expected: **Pass criteria:** All tests have passed.jj*j j%jj\j}r*(j]j]j]j]j]ujMj]r*(j%X&Following prints on console expected: r*r*}r*(jX&Following prints on console expected: jj*ubj|)r*}r*(jX**Pass criteria:**j}r*(j]j]j]j]j]ujj*j]r*j%XPass criteria:r*r*}r*(jUjj*ubajjubj%X All tests have passed.r*r*}r*(jX All tests have passed.jj*ubeubajjubj)r*}r*(jUj}r*(j]j]j]j]j]ujjp*j]r*jX)r*}r*(jX am65xx j721er*jj*j j%jj\j}r*(j]j]j]j]j]ujMj]r*j%X am65xx j721er*r*}r*(jj*jj*ubaubajjubj)r*}r*(jUj}r*(j]j]j]j]j]ujjp*j]r*jX)r*}r*(jXmakefiler*jj*j j%jj\j}r*(j]j]j]j]j]ujMj]r*j%Xmakefiler*r*}r*(jj*jj*ubaubajjubejjubejjubejjubaubj)r*}r*(jUjj)j j%jjj}r*(j]j]j]j]j]ujM jhj]r*j)r*}r*(jUjKjj*j j%jjj}r*(j]j]j]j]j]ujKjhj]ubaubeubj)r*}r*(jUjj('j j%jjj}r*(j]j]j]j]r*Umcspir*aj]r*haujMjhj]r*(j)r*}r*(jXMCSPIr*jj*j j%jj"j}r*(j]j]j]j]j]ujMjhj]r*j%XMCSPIr*r*}r*(jj*jj*ubaubj)r*}r*(jUjj*j j%jjj}r*(j]j]j]j]j]ujNjhj]r*j)r*}r*(jUj}r*(j]j]j]j]j]UcolsKujj*j]r*(j)r*}r*(jUj}r*(j]j]j]j]j]UcolwidthKujj*j]jjubj)r*}r*(jUj}r*(j]j]j]j]j]UcolwidthKujj*j]jjubj)r*}r*(jUj}r*(j]j]j]j]j]UcolwidthK(ujj*j]jjubj)r*}r*(jUj}r*(j]j]j]j]j]UcolwidthKujj*j]jjubj)r*}r*(jUj}r*(j]j]j]j]j]UcolwidthKujj*j]jjubj)r*}r*(jUj}r*(j]j]j]j]j]UcolwidthKujj*j]jjubj)r*}r*(jUj}r*(j]j]j]j]j]ujj*j]r*j)r*}r*(jUj}r*(j]j]j]j]j]ujj*j]r*(j)r*}r*(jUj}r*(j]j]j]j]j]ujj*j]r*jX)r*}r*(jXNamer*jj*j j%jj\j}r*(j]j]j]j]j]ujMj]r*j%XNamer*r*}r*(jj*jj*ubaubajjubj)r*}r*(jUj}r*(j]j]j]j]j]ujj*j]r+jX)r+}r+(jX Descriptionr+jj*j j%jj\j}r+(j]j]j]j]j]ujMj]r+j%X Descriptionr+r+}r+(jj+jj+ubaubajjubj)r +}r +(jUj}r +(j]j]j]j]j]ujj*j]r +jX)r +}r+(jXAdditional EVM Configurationr+jj +j j%jj\j}r+(j]j]j]j]j]ujMj]r+j%XAdditional EVM Configurationr+r+}r+(jj+jj +ubaubajjubj)r+}r+(jUj}r+(j]j]j]j]j]ujj*j]r+jX)r+}r+(jXExpected Resultsr+jj+j j%jj\j}r+(j]j]j]j]j]ujMj]r+j%XExpected Resultsr+r+}r +(jj+jj+ubaubajjubj)r!+}r"+(jUj}r#+(j]j]j]j]j]ujj*j]r$+jX)r%+}r&+(jX SoC Supportedr'+jj!+j j%jj\j}r(+(j]j]j]j]j]ujMj]r)+j%X SoC Supportedr*+r++}r,+(jj'+jj%+ubaubajjubj)r-+}r.+(jUj}r/+(j]j]j]j]j]ujj*j]r0+jX)r1+}r2+(jX Build Typer3+jj-+j j%jj\j}r4+(j]j]j]j]j]ujMj]r5+j%X Build Typer6+r7+}r8+(jj3+jj1+ubaubajjubejjubajjubj)r9+}r:+(jUj}r;+(j]j]j]j]j]ujj*j]r<+(j)r=+}r>+(jUj}r?+(j]j]j]j]j]ujj9+j]r@+(j)rA+}rB+(jUj}rC+(j]j]j]j]j]ujj=+j]rD+jX)rE+}rF+(jX%MCSPI_Serialize r Example applicationrG+jjA+j j%jj\j}rH+(j]j]j]j]j]ujMj]rI+j%X%MCSPI_Serialize r Example applicationrJ+rK+}rL+(jjG+jjE+ubaubajjubj)rM+}rN+(jUj}rO+(j]j]j]j]j]ujj=+j]rP+jX)rQ+}rR+(jXSample Application demonstrating reading data generated from industrial input module. Application uses GPIO pins to assert load signal in order to generate date from industrial input module.rS+jjM+j j%jj\j}rT+(j]j]j]j]j]ujMj]rU+j%XSample Application demonstrating reading data generated from industrial input module. Application uses GPIO pins to assert load signal in order to generate date from industrial input module.rV+rW+}rX+(jjS+jjQ+ubaubajjubj)rY+}rZ+(jUj}r[+(j]j]j]j]j]ujj=+j]r\+(jX)r]+}r^+(jX**AM57x IDK EVM:**r_+jjY+j j%jj\j}r`+(j]j]j]j]j]ujMj]ra+j|)rb+}rc+(jj_+j}rd+(j]j]j]j]j]ujj]+j]re+j%XAM57x IDK EVM:rf+rg+}rh+(jUjjb+ubajjubaubjX)ri+}rj+(jX1Short pins 1 and 2 on header J37(Industrial I/O)rk+jjY+j j%jj\j}rl+(j]j]j]j]j]ujMj]rm+j%X1Short pins 1 and 2 on header J37(Industrial I/O)rn+ro+}rp+(jjk+jji+ubaubjX)rq+}rr+(jXC**AM335x ICE v2:** Short pins 1 and 2 on header J14(Industrial I/O)jjY+j j%jj\j}rs+(j]j]j]j]j]ujMj]rt+(j|)ru+}rv+(jX**AM335x ICE v2:**j}rw+(j]j]j]j]j]ujjq+j]rx+j%XAM335x ICE v2:ry+rz+}r{+(jUjju+ubajjubj%X1 Short pins 1 and 2 on header J14(Industrial I/O)r|+r}+}r~+(jX1 Short pins 1 and 2 on header J14(Industrial I/O)jjq+ubeubjX)r+}r+(jXC**AM437x IDK EVM:** Short pins 1 and 2 on header J1(Industrial I/O)jjY+j j%jj\j}r+(j]j]j]j]j]ujMj]r+(j|)r+}r+(jX**AM437x IDK EVM:**j}r+(j]j]j]j]j]ujj+j]r+j%XAM437x IDK EVM:r+r+}r+(jUjj+ubajjubj%X0 Short pins 1 and 2 on header J1(Industrial I/O)r+r+}r+(jX0 Short pins 1 and 2 on header J1(Industrial I/O)jj+ubeubejjubj)r+}r+(jUj}r+(j]j]j]j]j]ujj=+j]r+(j)r+}r+(jUj}r+(j]j]j]j]j]ujj+j]r+(j)r+}r+(jUjKjj+j j%jjj}r+(j]j]j]j]j]ujKj]ubj)r+}r+(jX** **r+jKjj+j j%jjj}r+(j]j]j]j]j]ujKj]r+j|)r+}r+(jj+j}r+(j]j]j]j]j]ujj+j]r+j%X r+}r+(jUjj+ubajjubaubejjubjX)r+}r+(jX'Following prints  on console expected:r+jj+j j%jj\j}r+(j]j]j]j]j]ujMj]r+j%X'Following prints  on console expected:r+r+}r+(jj+jj+ubaubjX)r+}r+(jX**Pass criteria:**r+jj+j j%jj\j}r+(j]j]j]j]j]ujMj]r+j|)r+}r+(jj+j}r+(j]j]j]j]j]ujj+j]r+j%XPass criteria:r+r+}r+(jUjj+ubajjubaubjX)r+}r+(jXAll tests have passed.r+jj+j j%jj\j}r+(j]j]j]j]j]ujM j]r+j%XAll tests have passed.r+r+}r+(jj+jj+ubaubejjubj)r+}r+(jUj}r+(j]j]j]j]j]ujj=+j]r+jX)r+}r+(jX'AM335x, AM437x, AM571x, AM572x, AM574x,r+jj+j j%jj\j}r+(j]j]j]j]j]ujMj]r+j%X'AM335x, AM437x, AM571x, AM572x, AM574x,r+r+}r+(jj+jj+ubaubajjubj)r+}r+(jUj}r+(j]j]j]j]j]ujj=+j]r+jX)r+}r+(jX CCS projectr+jj+j j%jj\j}r+(j]j]j]j]j]ujMj]r+j%X CCS projectr+r+}r+(jj+jj+ubaubajjubejjubj)r+}r+(jUj}r+(j]j]j]j]j]ujj9+j]r+(j)r+}r+(jUj}r+(j]j]j]j]j]ujj+j]r+jX)r+}r+(jX)MCSPI_Dma_Seria lizer Example applicationr+jj+j j%jj\j}r+(j]j]j]j]j]ujM%j]r+j%X)MCSPI_Dma_Seria lizer Example applicationr+r+}r+(jj+jj+ubaubajjubj)r+}r+(jUj}r+(j]j]j]j]j]ujj+j]r+jX)r+}r+(jXSample Application demonstrating reading data generated from industrial input module through EDMA. Application uses GPIO pins to assert load signal in order to generate date from industrial input module.r+jj+j j%jj\j}r+(j]j]j]j]j]ujM%j]r+j%XSample Application demonstrating reading data generated from industrial input module through EDMA. Application uses GPIO pins to assert load signal in order to generate date from industrial input module.r+r+}r+(jj+jj+ubaubajjubj)r+}r+(jUj}r+(j]j]j]j]j]ujj+j]r+jX)r+}r+(jX**AM57x IDK EVM:** Short pins 1 and 2 on header J37(Industrial I/O) | **AM437x IDK EVM:** Short pins 1 and 2 on header J1(Industrial I/O)jj+j j%jj\j}r+(j]j]j]j]j]ujM%j]r+(j|)r+}r+(jX**AM57x IDK EVM:**j}r+(j]j]j]j]j]ujj+j]r+j%XAM57x IDK EVM:r+r,}r,(jUjj+ubajjubj%X4 Short pins 1 and 2 on header J37(Industrial I/O) | r,r,}r,(jX4 Short pins 1 and 2 on header J37(Industrial I/O) | jj+ubj|)r,}r,(jX**AM437x IDK EVM:**j}r,(j]j]j]j]j]ujj+j]r,j%XAM437x IDK EVM:r ,r ,}r ,(jUjj,ubajjubj%X0 Short pins 1 and 2 on header J1(Industrial I/O)r ,r ,}r,(jX0 Short pins 1 and 2 on header J1(Industrial I/O)jj+ubeubajjubj)r,}r,(jUj}r,(j]j]j]j]j]ujj+j]r,(j)r,}r,(jUj}r,(j]j]j]j]j]ujj,j]r,(j)r,}r,(jUjKjj,j j%jjj}r,(j]j]j]j]j]ujKj]ubj)r,}r,(jX** **r,jKjj,j j%jjj}r,(j]j]j]j]j]ujKj]r,j|)r,}r ,(jj,j}r!,(j]j]j]j]j]ujj,j]r",j%X r#,}r$,(jUjj,ubajjubaubejjubjX)r%,}r&,(jX'Following prints  on console expected:r',jj,j j%jj\j}r(,(j]j]j]j]j]ujM(j]r),j%X'Following prints  on console expected:r*,r+,}r,,(jj',jj%,ubaubjX)r-,}r.,(jX**Pass criteria:**r/,jj,j j%jj\j}r0,(j]j]j]j]j]ujM-j]r1,j|)r2,}r3,(jj/,j}r4,(j]j]j]j]j]ujj-,j]r5,j%XPass criteria:r6,r7,}r8,(jUjj2,ubajjubaubjX)r9,}r:,(jXAll tests have passed.r;,jj,j j%jj\j}r<,(j]j]j]j]j]ujM0j]r=,j%XAll tests have passed.r>,r?,}r@,(jj;,jj9,ubaubejjubj)rA,}rB,(jUj}rC,(j]j]j]j]j]ujj+j]rD,jX)rE,}rF,(jXAM437x, AM571x, AM572x, AM574x,rG,jjA,j j%jj\j}rH,(j]j]j]j]j]ujM%j]rI,j%XAM437x, AM571x, AM572x, AM574x,rJ,rK,}rL,(jjG,jjE,ubaubajjubj)rM,}rN,(jUj}rO,(j]j]j]j]j]ujj+j]rP,jX)rQ,}rR,(jX CCS projectrS,jjM,j j%jj\j}rT,(j]j]j]j]j]ujM%j]rU,j%X CCS projectrV,rW,}rX,(jjS,jjQ,ubaubajjubejjubj)rY,}rZ,(jUj}r[,(j]j]j]j]j]ujj9+j]r\,(j)r],}r^,(jUj}r_,(j]j]j]j]j]ujjY,j]r`,jX)ra,}rb,(jXMCSPI_SerialFla shrc,jj],j j%jj\j}rd,(j]j]j]j]j]ujM6j]re,j%XMCSPI_SerialFla shrf,rg,}rh,(jjc,jja,ubaubajjubj)ri,}rj,(jUj}rk,(j]j]j]j]j]ujjY,j]rl,jX)rm,}rn,(jXmSample Application demonstrating writing and reading data from the serial flash through MCSPI EDMA interface.ro,jji,j j%jj\j}rp,(j]j]j]j]j]ujM6j]rq,j%XmSample Application demonstrating writing and reading data from the serial flash through MCSPI EDMA interface.rr,rs,}rt,(jjo,jjm,ubaubajjubj)ru,}rv,(jUj}rw,(j]j]j]j]j]ujjY,j]rx,(jX)ry,}rz,(jX:**AM335x GP EVM:** Set the EVM in profile 2 (SW8[1] = OFF,jju,j j%jj\j}r{,(j]j]j]j]j]ujM6j]r|,(j|)r},}r~,(jX**AM335x GP EVM:**j}r,(j]j]j]j]j]ujjy,j]r,j%XAM335x GP EVM:r,r,}r,(jUjj},ubajjubj%X( Set the EVM in profile 2 (SW8[1] = OFF,r,r,}r,(jX( Set the EVM in profile 2 (SW8[1] = OFF,jjy,ubeubj )r,}r,(jUj}r,(j]j]j]j]j]ujju,j]r,jX)r,}r,(jXSW8[2] = ON, SW8[3:4] = OFF)r,jj,j j%jj\j}r,(j]j]j]j]j]ujM9j]r,j%XSW8[2] = ON, SW8[3:4] = OFF)r,r,}r,(jj,jj,ubaubajj ubejjubj)r,}r,(jUj}r,(j]j]j]j]j]ujjY,j]r,(j)r,}r,(jUj}r,(j]j]j]j]j]ujj,j]r,(j)r,}r,(jUjKjj,j j%jjj}r,(j]j]j]j]j]ujKj]ubj)r,}r,(jX** **r,jKjj,j j%jjj}r,(j]j]j]j]j]ujKj]r,j|)r,}r,(jj,j}r,(j]j]j]j]j]ujj,j]r,j%X r,}r,(jUjj,ubajjubaubejjubjX)r,}r,(jX'Following prints  on console expected:r,jj,j j%jj\j}r,(j]j]j]j]j]ujM9j]r,j%X'Following prints  on console expected:r,r,}r,(jj,jj,ubaubjX)r,}r,(jX**Pass criteria:**r,jj,j j%jj\j}r,(j]j]j]j]j]ujM>j]r,j|)r,}r,(jj,j}r,(j]j]j]j]j]ujj,j]r,j%XPass criteria:r,r,}r,(jUjj,ubajjubaubjX)r,}r,(jXAll tests have passed.r,jj,j j%jj\j}r,(j]j]j]j]j]ujMAj]r,j%XAll tests have passed.r,r,}r,(jj,jj,ubaubejjubj)r,}r,(jUj}r,(j]j]j]j]j]ujjY,j]r,jX)r,}r,(jXAM335x,r,jj,j j%jj\j}r,(j]j]j]j]j]ujM6j]r,j%XAM335x,r,r,}r,(jj,jj,ubaubajjubj)r,}r,(jUj}r,(j]j]j]j]j]ujjY,j]r,jX)r,}r,(jX CCS projectr,jj,j j%jj\j}r,(j]j]j]j]j]ujM6j]r,j%X CCS projectr,r,}r,(jj,jj,ubaubajjubejjubj)r,}r,(jUj}r,(j]j]j]j]j]ujj9+j]r,(j)r,}r,(jUj}r,(j]j]j]j]UmorerowsKj]ujj,j]r,jX)r,}r,(jX#MCSPI_slavemode example applicationr,jj,j j%jj\j}r,(j]j]j]j]j]ujMDj]r,j%X#MCSPI_slavemode example applicationr,r,}r,(jj,jj,ubaubajjubj)r,}r,(jUj}r,(j]j]j]j]UmorerowsKj]ujj,j]r,(jX)r,}r,(jXApplication demonstrates slave recieve and transmit features of McSPI. Application use case requires two EVMs. One acts as Master and Another as slave. McSPI connections information and addtional details are as follows.r,jj,j j%jj\j}r,(j]j]j]j]j]ujMDj]r,j%XApplication demonstrates slave recieve and transmit features of McSPI. Application use case requires two EVMs. One acts as Master and Another as slave. McSPI connections information and addtional details are as follows.r,r,}r,(jj,jj,ubaubjX)r,}r,(jX**No of Boards Required**:jj,j j%jj\j}r,(j]j]j]j]j]ujMVj]r,(j|)r,}r,(jX**No of Boards Required**j}r,(j]j]j]j]j]ujj,j]r-j%XNo of Boards Requiredr-r-}r-(jUjj,ubajjubj%X:r-}r-(jX:jj,ubeubjX)r-}r-(jX2jj,j j%jj\j}r-(j]j]j]j]j]ujMYj]r -j%X2r -}r -(jX2jj-ubaubjX)r -}r -(jX**Connection requirements:**r-jj,j j%jj\j}r-(j]j]j]j]j]ujM[j]r-j|)r-}r-(jj-j}r-(j]j]j]j]j]ujj -j]r-j%XConnection requirements:r-r-}r-(jUjj-ubajjubaubj)r-}r-(jUj}r-(j]j]j]j]j]ujj,j]r-(j)r-}r-(jX*Consider EVM1 as Master and EVM2 as slave.r-jKjj-j j%jjj}r-(j]j]j]j]j]ujKj]r -j%X*Consider EVM1 as Master and EVM2 as slave.r!-r"-}r#-(jj-jj-ubaubj)r$-}r%-(jXMasterSPI_CLK -------SlaveSr&-jKjj-j j%jjj}r'-(j]j]j]j]j]ujKj]r(-j%XMasterSPI_CLK -------SlaveSr)-r*-}r+-(jj&-jj$-ubaubejjubjX)r,-}r--(jXKPI_CLK | MasterSPI_D0- ---------SlaveS PI_D1 | MasterSPI_D1- ---------Slaver.-jj,j j%jj\j}r/-(j]j]j]j]j]ujMdj]r0-j%XKPI_CLK | MasterSPI_D0- ---------SlaveS PI_D1 | MasterSPI_D1- ---------Slaver1-r2-}r3-(jj.-jj,-ubaubj )r4-}r5-(jUj}r6-(j]j]j]j]j]ujj,j]r7-jX)r8-}r9-(jXSPI_D0r:-jj4-j j%jj\j}r;-(j]j]j]j]j]ujMjj]r<-j%XSPI_D0r=-r>-}r?-(jj:-jj8-ubaubajj ubj)r@-}rA-(jUj}rB-(j]j]j]j]j]ujj,j]rC-j)rD-}rE-(jX MasterSPI_CS0rF-jKjj@-j j%jjj}rG-(j]j]j]j]j]ujKj]rH-j%X MasterSPI_CS0rI-rJ-}rK-(jjF-jjD-ubaubajjubjX)rL-}rM-(jX8--------SlaveSP I_CS0 | DGND--------- -------------DG NDrN-jj,j j%jj\j}rO-(j]j]j]j]j]ujMlj]rP-j%X8--------SlaveSP I_CS0 | DGND--------- -------------DG NDrQ-rR-}rS-(jjN-jjL-ubaubjX)rT-}rU-(jX**Additional Requirements:**rV-jj,j j%jj\j}rW-(j]j]j]j]j]ujMrj]rX-j|)rY-}rZ-(jjV-j}r[-(j]j]j]j]j]ujjT-j]r\-j%XAdditional Requirements:r]-r^-}r_-(jUjjY-ubajjubaubjX)r`-}ra-(jXRun "MCSPI_SlaveMod e_SlaveExample_ Exampl eProject" first on Slave EVM and then "MCSPI_SlaveMode _MasterExample _Examp leProject" on Master EVM.jj,j j%jj\j}rb-(j]j]j]j]j]ujMuj]rc-(j%XRun "MCSPI_SlaveMod rd-re-}rf-(jXRun "MCSPI_SlaveMod jj`-ubcdocutils.nodes problematic rg-)rh-}ri-(jXe_SlaveExample_rj-j}rk-(j]rl-Uid289rm-aj]j]j]j]UrefidUid288rn-ujj`-j]ro-j%Xe_SlaveExample_rp-rq-}rr-(jUjjh-ubajU problematicrs-ubj%X Exampl eProject" first on Slave EVM and then "MCSPI_SlaveMode _MasterExample _Examp leProject" on Master EVM.rt-ru-}rv-(jX Exampl eProject" first on Slave EVM and then "MCSPI_SlaveMode _MasterExample _Examp leProject" on Master EVM.jj`-ubeubj)rw-}rx-(jUj}ry-(j]j]j]j]j]ujj,j]rz-(j)r{-}r|-(jUjKjjw-j j%jjj}r}-(j]j]j]j]j]ujKj]ubj)r~-}r-(jX **Note:**r-jKjjw-j j%jjj}r-(j]j]j]j]j]ujKj]r-j|)r-}r-(jj-j}r-(j]j]j]j]j]ujj~-j]r-j%XNote:r-r-}r-(jUjj-ubajjubaubejjubjX)r-}r-(jXrA DGND connection may be required from expansion connector on each board to make sure the data transfer is proper.r-jj,j j%jj\j}r-(j]j]j]j]j]ujMj]r-j%XrA DGND connection may be required from expansion connector on each board to make sure the data transfer is proper.r-r-}r-(jj-jj-ubaubjX)r-}r-(jXeFor AM6 or J7, only one EVM is required. Slave is run on MPU1_0 core and Master is run on MCU1_0 corer-jj,j j%jj\j}r-(j]j]j]j]j]ujMj]r-j%XeFor AM6 or J7, only one EVM is required. Slave is run on MPU1_0 core and Master is run on MCU1_0 corer-r-}r-(jj-jj-ubaubejjubj)r-}r-(jUj}r-(j]j]j]j]UmorerowsKj]ujj,j]r-(jX)r-}r-(jX**Pin Connections:**r-jj-j j%jj\j}r-(j]j]j]j]j]ujMDj]r-j|)r-}r-(jj-j}r-(j]j]j]j]j]ujj-j]r-j%XPin Connections:r-r-}r-(jUjj-ubajjubaubj)r-}r-(jUj}r-(j]j]j]j]j]ujj-j]r-(j)r-}r-(jX**IDK AM571x,**r-jKjj-j j%jjj}r-(j]j]j]j]j]ujKj]r-j|)r-}r-(jj-j}r-(j]j]j]j]j]ujj-j]r-j%X IDK AM571x,r-r-}r-(jUjj-ubajjubaubj)r-}r-(jX**IDK AM572x or IDK AM574x:**r-jKjj-j j%jjj}r-(j]j]j]j]j]ujKj]r-j|)r-}r-(jj-j}r-(j]j]j]j]j]ujj-j]r-j%XIDK AM572x or IDK AM574x:r-r-}r-(jUjj-ubajjubaubj)r-}r-(jXEVM1(master) ==== EVM2(slave)r-jKjj-j j%jjj}r-(j]j]j]j]j]ujKj]r-j%XEVM1(master) ==== EVM2(slave)r-r-}r-(jj-jj-ubaubj)r-}r-(jXJ21-Pin24(CLK)---J21-Pin24(CLK)r-jKjj-j j%jjj}r-(j]j]j]j]j]ujKj]r-j%XJ21-Pin24(CLK)---J21-Pin24(CLK)r-r-}r-(jj-jj-ubaubj)r-}r-(jX!J21-Pin26(MISO)---J21-Pin28(MISO)r-jKjj-j j%jjj}r-(j]j]j]j]j]ujKj]r-j%X!J21-Pin26(MISO)---J21-Pin28(MISO)r-r-}r-(jj-jj-ubaubj)r-}r-(jX!J21-Pin28(MOSI)---J21-Pin26(MOSI)r-jKjj-j j%jjj}r-(j]j]j]j]j]ujKj]r-j%X!J21-Pin28(MOSI)---J21-Pin26(MOSI)r-r-}r-(jj-jj-ubaubj)r-}r-(jX J21-Pin30(CS)------J21-Pin30(CS)r-jKjj-j j%jjj}r-(j]j]j]j]j]ujKj]r-j%X J21-Pin30(CS)------J21-Pin30(CS)r-r-}r-(jj-jj-ubaubj)r-}r-(jX J21-Pin22(DGND)--J21-Pin22(DGND)r-jKjj-j j%jjj}r-(j]j]j]j]j]ujKj]r-j%X J21-Pin22(DGND)--J21-Pin22(DGND)r-r-}r-(jj-jj-ubaubj)r-}r-(jUjKjj-j j%jjj}r-(j]j]j]j]j]ujKj]ubj)r-}r-(jX**IDK AM437x:**r-jKjj-j j%jjj}r-(j]j]j]j]j]ujKj]r-j|)r-}r-(jj-j}r.(j]j]j]j]j]ujj-j]r.j%X IDK AM437x:r.r.}r.(jUjj-ubajjubaubj)r.}r.(jXEVM1(master) ==== EVM2(slave)r.jKjj-j j%jjj}r.(j]j]j]j]j]ujKj]r .j%XEVM1(master) ==== EVM2(slave)r .r .}r .(jj.jj.ubaubj)r .}r.(jX!J16-Pin24(CLK)-----J16-Pin24(CLK)r.jKjj-j j%jjj}r.(j]j]j]j]j]ujKj]r.j%X!J16-Pin24(CLK)-----J16-Pin24(CLK)r.r.}r.(jj.jj .ubaubj)r.}r.(jX!J16-Pin26(MISO)---J16-Pin28(MISO)r.jKjj-j j%jjj}r.(j]j]j]j]j]ujKj]r.j%X!J16-Pin26(MISO)---J16-Pin28(MISO)r.r.}r.(jj.jj.ubaubj)r.}r.(jX!J16-Pin28(MOSI)---J16-Pin26(MOSI)r.jKjj-j j%jjj}r .(j]j]j]j]j]ujKj]r!.j%X!J16-Pin28(MOSI)---J16-Pin26(MOSI)r".r#.}r$.(jj.jj.ubaubj)r%.}r&.(jX J16-Pin30(CS)------J16-Pin30(CS)r'.jKjj-j j%jjj}r(.(j]j]j]j]j]ujKj]r).j%X J16-Pin30(CS)------J16-Pin30(CS)r*.r+.}r,.(jj'.jj%.ubaubj)r-.}r..(jX J16-Pin22(DGND)--J16-Pin22(DGND)r/.jKjj-j j%jjj}r0.(j]j]j]j]j]ujKj]r1.j%X J16-Pin22(DGND)--J16-Pin22(DGND)r2.r3.}r4.(jj/.jj-.ubaubj)r5.}r6.(jUjKjj-j j%jjj}r7.(j]j]j]j]j]ujKj]ubj)r8.}r9.(jX**ICEv2AM335x:**r:.jKjj-j j%jjj}r;.(j]j]j]j]j]ujKj]r<.j|)r=.}r>.(jj:.j}r?.(j]j]j]j]j]ujj8.j]r@.j%X ICEv2AM335x:rA.rB.}rC.(jUjj=.ubajjubaubj)rD.}rE.(jX"EVM1(master) ========= EVM2(slave)rF.jKjj-j j%jjj}rG.(j]j]j]j]j]ujKj]rH.j%X"EVM1(master) ========= EVM2(slave)rI.rJ.}rK.(jjF.jjD.ubaubj)rL.}rM.(jX#J3-Pin12(CLK)---------J3-Pin12(CLK)rN.jKjj-j j%jjj}rO.(j]j]j]j]j]ujKj]rP.j%X#J3-Pin12(CLK)---------J3-Pin12(CLK)rQ.rR.}rS.(jjN.jjL.ubaubj)rT.}rU.(jX#J3-Pin14(MIS0)-------J3-Pin16(MISO)rV.jKjj-j j%jjj}rW.(j]j]j]j]j]ujKj]rX.j%X#J3-Pin14(MIS0)-------J3-Pin16(MISO)rY.rZ.}r[.(jjV.jjT.ubaubj)r\.}r].(jX#J3-Pin16(MOSI)-------J3-Pin14(MOSI)r^.jKjj-j j%jjj}r_.(j]j]j]j]j]ujKj]r`.j%X#J3-Pin16(MOSI)-------J3-Pin14(MOSI)ra.rb.}rc.(jj^.jj\.ubaubj)rd.}re.(jX#J3-Pin18(CS)-----------J3-Pin18(CS)rf.jKjj-j j%jjj}rg.(j]j]j]j]j]ujKj]rh.j%X#J3-Pin18(CS)-----------J3-Pin18(CS)ri.rj.}rk.(jjf.jjd.ubaubj)rl.}rm.(jX"J3-Pin2(DGND)--------J3-Pin2(DGND)rn.jKjj-j j%jjj}ro.(j]j]j]j]j]ujKj]rp.j%X"J3-Pin2(DGND)--------J3-Pin2(DGND)rq.rr.}rs.(jjn.jjl.ubaubj)rt.}ru.(jUjKjj-j j%jjj}rv.(j]j]j]j]j]ujKj]ubj)rw.}rx.(jX**BBB AM335x:**ry.jKjj-j j%jjj}rz.(j]j]j]j]j]ujKj]r{.j|)r|.}r}.(jjy.j}r~.(j]j]j]j]j]ujjw.j]r.j%X BBB AM335x:r.r.}r.(jUjj|.ubajjubaubj)r.}r.(jXEVM1(master) ===== EVM2(slave)r.jKjj-j j%jjj}r.(j]j]j]j]j]ujKj]r.j%XEVM1(master) ===== EVM2(slave)r.r.}r.(jj.jj.ubaubj)r.}r.(jX!P9-Pin31(CLK)-------P9-Pin31(CLK)r.jKjj-j j%jjj}r.(j]j]j]j]j]ujKj]r.j%X!P9-Pin31(CLK)-------P9-Pin31(CLK)r.r.}r.(jj.jj.ubaubj)r.}r.(jX"P9-Pin29(MISO)------P9-Pin30(MISO)r.jKjj-j j%jjj}r.(j]j]j]j]j]ujKj]r.j%X"P9-Pin29(MISO)------P9-Pin30(MISO)r.r.}r.(jj.jj.ubaubj)r.}r.(jX"P9-Pin30(MOSI)------P9-Pin29(MOSI)r.jKjj-j j%jjj}r.(j]j]j]j]j]ujKj]r.j%X"P9-Pin30(MOSI)------P9-Pin29(MOSI)r.r.}r.(jj.jj.ubaubj)r.}r.(jX!P9-Pin28(CS)---------P9-Pin28(CS)r.jKjj-j j%jjj}r.(j]j]j]j]j]ujKj]r.j%X!P9-Pin28(CS)---------P9-Pin28(CS)r.r.}r.(jj.jj.ubaubj)r.}r.(jX!P9-Pin1(DGND)-------P9-Pin1(DGND)r.jKjj-j j%jjj}r.(j]j]j]j]j]ujKj]r.j%X!P9-Pin1(DGND)-------P9-Pin1(DGND)r.r.}r.(jj.jj.ubaubj)r.}r.(jUjKjj-j j%jjj}r.(j]j]j]j]j]ujKj]ubj)r.}r.(jX **K2G EVM:**r.jKjj-j j%jjj}r.(j]j]j]j]j]ujKj]r.j|)r.}r.(jj.j}r.(j]j]j]j]j]ujj.j]r.j%XK2G EVM:r.r.}r.(jUjj.ubajjubaubj)r.}r.(jX EVM1(master) ======= EVM2(slave)r.jKjj-j j%jjj}r.(j]j]j]j]j]ujKj]r.j%X EVM1(master) ======= EVM2(slave)r.r.}r.(jj.jj.ubaubj)r.}r.(jX#J12-Pin9(MISO)-------J12-Pin9(MISO)r.jKjj-j j%jjj}r.(j]j]j]j]j]ujKj]r.j%X#J12-Pin9(MISO)-------J12-Pin9(MISO)r.r.}r.(jj.jj.ubaubj)r.}r.(jX"J12-Pin11(MOSI)----J12-Pin11(MOSI)r.jKjj-j j%jjj}r.(j]j]j]j]j]ujKj]r.j%X"J12-Pin11(MOSI)----J12-Pin11(MOSI)r.r.}r.(jj.jj.ubaubj)r.}r.(jX"J12-Pin13(CLK)------J12-Pin13(CLK)r.jKjj-j j%jjj}r.(j]j]j]j]j]ujKj]r.j%X"J12-Pin13(CLK)------J12-Pin13(CLK)r.r.}r.(jj.jj.ubaubj)r.}r.(jX"J12-Pin15(CS0)------J12-Pin15(CS0)r.jKjj-j j%jjj}r.(j]j]j]j]j]ujKj]r.j%X"J12-Pin15(CS0)------J12-Pin15(CS0)r.r.}r.(jj.jj.ubaubj)r.}r.(jX J12-Pin49(DGND)--J12-Pin49(DGND)r.jKjj-j j%jjj}r.(j]j]j]j]j]ujKj]r.j%X J12-Pin49(DGND)--J12-Pin49(DGND)r.r.}r.(jj.jj.ubaubj)r.}r.(jUjKjj-j j%jjj}r.(j]j]j]j]j]ujKj]ubejjubj)r.}r.(jUj}r.(j]j]j]j]j]ujj-j]r.(j)r.}r.(jX**icev2AMIC110 EVM:**r.jKjj.j j%jjj}r.(j]j]j]j]j]ujKj]r.j|)r.}r.(jj.j}r/(j]j]j]j]j]ujj.j]r/j%Xicev2AMIC110 EVM:r/r/}r/(jUjj.ubajjubaubj)r/}r/(jX EVM1(master) ======= EVM2(slave)r/jKjj.j j%jjj}r/(j]j]j]j]j]ujKj]r /j%X EVM1(master) ======= EVM2(slave)r /r /}r /(jj/jj/ubaubj)r /}r/(jX#J5-Pin12(MISO)-------J5-Pin14(MISO)r/jKjj.j j%jjj}r/(j]j]j]j]j]ujKj]r/j%X#J5-Pin12(MISO)-------J5-Pin14(MISO)r/r/}r/(jj/jj /ubaubj)r/}r/(jX"J5-Pin14(MOSI)------J5-Pin12(MOSI)r/jKjj.j j%jjj}r/(j]j]j]j]j]ujKj]r/j%X"J5-Pin14(MOSI)------J5-Pin12(MOSI)r/r/}r/(jj/jj/ubaubj)r/}r/(jX J4-Pin13(CLK)------J4-Pin13(CLK)r/jKjj.j j%jjj}r /(j]j]j]j]j]ujKj]r!/j%X J4-Pin13(CLK)------J4-Pin13(CLK)r"/r#/}r$/(jj/jj/ubaubj)r%/}r&/(jXJ5-Pin4(CS)---------J5-Pin4(CS)r'/jKjj.j j%jjj}r(/(j]j]j]j]j]ujKj]r)/j%XJ5-Pin4(CS)---------J5-Pin4(CS)r*/r+/}r,/(jj'/jj%/ubaubj)r-/}r./(jX!J5-Pin2(DGND)-------J5-Pin2(DGND)r//jKjj.j j%jjj}r0/(j]j]j]j]j]ujKj]r1/j%X!J5-Pin2(DGND)-------J5-Pin2(DGND)r2/r3/}r4/(jj//jj-/ubaubejjubj)r5/}r6/(jUj}r7/(j]j]j]j]j]ujj-j]r8/(j)r9/}r:/(jX**am65xx EVM/IDK:**r;/jKjj5/j j%jjj}r/}r?/(jj;/j}r@/(j]j]j]j]j]ujj9/j]rA/j%Xam65xx EVM/IDK:rB/rC/}rD/(jUjj>/ubajjubaubj)rE/}rF/(jX$MCU1_0 (master) ====== MPU1_0(slave)rG/jKjj5/j j%jjj}rH/(j]j]j]j]j]ujKj]rI/j%X$MCU1_0 (master) ====== MPU1_0(slave)rJ/rK/}rL/(jjG/jjE/ubaubejjubj)rM/}rN/(jUj}rO/(j]j]j]j]j]ujj-j]rP/(j)rQ/}rR/(jX**J721e EVM:**rS/jKjjM/j j%jjj}rT/(j]j]j]j]j]ujKj]rU/j|)rV/}rW/(jjS/j}rX/(j]j]j]j]j]ujjQ/j]rY/j%X J721e EVM:rZ/r[/}r\/(jUjjV/ubajjubaubj)r]/}r^/(jX$MCU1_0 (master) ====== MPU1_0(slave)r_/jKjjM/j j%jjj}r`/(j]j]j]j]j]ujKj]ra/j%X$MCU1_0 (master) ====== MPU1_0(slave)rb/rc/}rd/(jj_/jj]/ubaubejjubejjubj)re/}rf/(jUj}rg/(j]j]j]j]UmorerowsKj]ujj,j]rh/(j)ri/}rj/(jUj}rk/(j]j]j]j]j]ujje/j]rl/(j)rm/}rn/(jX,**On slave EVM console: **\ SPI initializedjKjji/j j%jjj}ro/(j]j]j]j]j]ujKj]rp/(jg-)rq/}rr/(jX**j}rs/(j]rt/Uid48ru/aj]j]j]j]UrefidUid47rv/ujjm/j]rw/j%X**rx/ry/}rz/(jUjjq/ubajjs-ubj%XOn slave EVM console: r{/r|/}r}/(jXOn slave EVM console: jjm/ubjg-)r~/}r/(jX**j}r/(j]r/Uid50r/aj]j]j]j]UrefidUid49r/ujjm/j]r/j%X**r/r/}r/(jUjj~/ubajjs-ubj%XSPI initializedr/r/}r/(jX\ SPI initializedjjm/ubeubj)r/}r/(jX Slave: PASS: Txd from master SPIr/jKjji/j j%jjj}r/(j]j]j]j]j]ujKj]r/j%X Slave: PASS: Txd from master SPIr/r/}r/(jj/jj/ubaubejjubj)r/}r/(jUj}r/(j]j]j]j]j]ujje/j]r/(j)r/}r/(jUjKjj/j j%jjj}r/(j]j]j]j]j]ujKj]ubj)r/}r/(jX**On Master EVM console:jKjj/j j%jjj}r/(j]j]j]j]j]ujKj]r/(jg-)r/}r/(jX**j}r/(j]r/Uid52r/aj]j]j]j]UrefidUid51r/ujj/j]r/j%X**r/r/}r/(jUjj/ubajjs-ubj%XOn Master EVM console:r/r/}r/(jXOn Master EVM console:jj/ubeubejjubj )r/}r/(jUj}r/(j]j]j]j]j]ujje/j]r/jX)r/}r/(jX initializedr/jj/j j%jj\j}r/(j]j]j]j]j]ujMQj]r/j%X initializedr/r/}r/(jj/jj/ubaubajj ubj)r/}r/(jUj}r/(j]j]j]j]j]ujje/j]r/(j)r/}r/(jX Master: PASS: Txd from slave SPIr/jKjj/j j%jjj}r/(j]j]j]j]j]ujKj]r/j%X Master: PASS: Txd from slave SPIr/r/}r/(jj/jj/ubaubj)r/}r/(jXDoner/jKjj/j j%jjj}r/(j]j]j]j]j]ujKj]r/j%XDoner/r/}r/(jj/jj/ubaubejjubejjubj)r/}r/(jUj}r/(j]j]j]j]j]ujj,j]r/jX)r/}r/(jX,AM335x, AM437x, AM571x, AM572x, AM574x, k2g,r/jj/j j%jj\j}r/(j]j]j]j]j]ujMDj]r/j%X,AM335x, AM437x, AM571x, AM572x, AM574x, k2g,r/r/}r/(jj/jj/ubaubajjubj)r/}r/(jUj}r/(j]j]j]j]j]ujj,j]r/jX)r/}r/(jX CCS projectr/jj/j j%jj\j}r/(j]j]j]j]j]ujMDj]r/j%X CCS projectr/r/}r/(jj/jj/ubaubajjubejjubj)r/}r/(jUj}r/(j]j]j]j]j]ujj9+j]r/(j)r/}r/(jUj}r/(j]j]j]j]j]ujj/j]r/jX)r/}r/(jX am65xx j721er/jj/j j%jj\j}r/(j]j]j]j]j]ujMLj]r/j%X am65xx j721er/r/}r/(jj/jj/ubaubajjubj)r/}r/(jUj}r/(j]j]j]j]j]ujj/j]r/jX)r/}r/(jXmakefiler/jj/j j%jj\j}r/(j]j]j]j]j]ujMLj]r/j%Xmakefiler/r/}r/(jj/jj/ubaubajjubejjubj)r/}r0(jUj}r0(j]j]j]j]j]ujj9+j]r0(j)r0}r0(jUj}r0(j]j]j]j]j]ujj/j]r0jX)r0}r0(jX#MCSPI_SMP_Basic Example applicationr 0jj0j j%jj\j}r 0(j]j]j]j]j]ujMj]r 0j%X#MCSPI_SMP_Basic Example applicationr 0r 0}r0(jj 0jj0ubaubajjubj)r0}r0(jUj}r0(j]j]j]j]j]ujj/j]r0jX)r0}r0(jXSample Application demonstrating reading data generated from industrial input module. Application uses GPIO pins to assert load signal in order to generate date from industrial input module in SMP mode. (A15 core)r0jj0j j%jj\j}r0(j]j]j]j]j]ujMj]r0j%XSample Application demonstrating reading data generated from industrial input module. Application uses GPIO pins to assert load signal in order to generate date from industrial input module in SMP mode. (A15 core)r0r0}r0(jj0jj0ubaubajjubj)r0}r0(jUj}r0(j]j]j]j]j]ujj/j]jjubj)r0}r0(jUj}r 0(j]j]j]j]j]ujj/j]r!0(j)r"0}r#0(jUj}r$0(j]j]j]j]j]ujj0j]r%0(j)r&0}r'0(jUjKjj"0j j%jjj}r(0(j]j]j]j]j]ujKj]ubj)r)0}r*0(jX** **r+0jKjj"0j j%jjj}r,0(j]j]j]j]j]ujKj]r-0j|)r.0}r/0(jj+0j}r00(j]j]j]j]j]ujj)0j]r10j%X r20}r30(jUjj.0ubajjubaubejjubjX)r40}r50(jX'Following prints  on console expected:r60jj0j j%jj\j}r70(j]j]j]j]j]ujMj]r80j%X'Following prints  on console expected:r90r:0}r;0(jj60jj40ubaubjX)r<0}r=0(jX**Pass criteria:**r>0jj0j j%jj\j}r?0(j]j]j]j]j]ujMj]r@0j|)rA0}rB0(jj>0j}rC0(j]j]j]j]j]ujj<0j]rD0j%XPass criteria:rE0rF0}rG0(jUjjA0ubajjubaubjX)rH0}rI0(jXAll tests have passed.rJ0jj0j j%jj\j}rK0(j]j]j]j]j]ujMj]rL0j%XAll tests have passed.rM0rN0}rO0(jjJ0jjH0ubaubejjubj)rP0}rQ0(jUj}rR0(j]j]j]j]j]ujj/j]rS0jX)rT0}rU0(jX AM572x-EVMrV0jjP0j j%jj\j}rW0(j]j]j]j]j]ujMj]rX0j%X AM572x-EVMrY0rZ0}r[0(jjV0jjT0ubaubajjubj)r\0}r]0(jUj}r^0(j]j]j]j]j]ujj/j]r_0jX)r`0}ra0(jX CCS projectrb0jj\0j j%jj\j}rc0(j]j]j]j]j]ujMj]rd0j%X CCS projectre0rf0}rg0(jjb0jj`0ubaubajjubejjubejjubejjubaubeubeubj)rh0}ri0(jUjj%j j%jjj}rj0(j]j]j]j]rk0Ubuilding-spi-examplesrl0aj]rm0haujMjhj]rn0(j)ro0}rp0(jXBuilding SPI examplesrq0jjh0j j%jj"j}rr0(j]j]j]j]j]ujMjhj]rs0j%XBuilding SPI examplesrt0ru0}rv0(jjq0jjo0ubaubj)rw0}rx0(jUjjh0j j%jjj}ry0(jX-j]j]j]j]j]ujMjhj]rz0j)r{0}r|0(jXLMakefile based examples and dependent libraries can be built from the top level or module level SPI makefile, refer to the `Processor SDK RTOS Getting Started Guide `__ for details of how to setup the build environment. Once you have setup the build environment, issue the following commands:r}0jjw0j j%jj j}r~0(j]j]j]j]j]ujNjhj]r0jX)r0}r0(jj}0jj{0j j%jj\j}r0(j]j]j]j]j]ujMj]r0(j%X{Makefile based examples and dependent libraries can be built from the top level or module level SPI makefile, refer to the r0r0}r0(jX{Makefile based examples and dependent libraries can be built from the top level or module level SPI makefile, refer to the jj0ubj)r0}r0(jXT`Processor SDK RTOS Getting Started Guide `__j}r0(UnameX(Processor SDK RTOS Getting Started GuidejX%index_overview.html#setup-environmentj]j]j]j]j]ujj0j]r0j%X(Processor SDK RTOS Getting Started Guider0r0}r0(jUjj0ubajjubj%X} for details of how to setup the build environment. Once you have setup the build environment, issue the following commands:r0r0}r0(jX} for details of how to setup the build environment. Once you have setup the build environment, issue the following commands:jj0ubeubaubaubj#)r0}r0(jXTo build and clean libs/apps from top-level makefile: cd /packages make spi make spi_clean To build and clean libs/apps from module-level makefile: cd /packages/ti/drv/spi make all make cleanjjh0j j%jj&j}r0(j2j3j]j]j]j]j]ujM jhj]r0j%XTo build and clean libs/apps from top-level makefile: cd /packages make spi make spi_clean To build and clean libs/apps from module-level makefile: cd /packages/ti/drv/spi make all make cleanr0r0}r0(jUjj0ubaubj)r0}r0(jUjjh0j j%jjj}r0(jX-j]j]j]j]j]ujMjhj]r0j)r0}r0(jX2RTSC CCS project based examples are built from CCSr0jj0j j%jj j}r0(j]j]j]j]j]ujNjhj]r0jX)r0}r0(jj0jj0j j%jj\j}r0(j]j]j]j]j]ujMj]r0j%X2RTSC CCS project based examples are built from CCSr0r0}r0(jj0jj0ubaubaubaubj#)r0}r0(jXcd /packages ./pdkProjectCreate.sh [soc] [board] [endian] spi [project type] [processor] [SECUREMODE=] Import and build CCS Project from /packages/MyExampleProjects/jjh0j j%jj&j}r0(j2j3j]j]j]j]j]ujM jhj]r0j%Xcd /packages ./pdkProjectCreate.sh [soc] [board] [endian] spi [project type] [processor] [SECUREMODE=] Import and build CCS Project from /packages/MyExampleProjects/r0r0}r0(jUjj0ubaubeubj)r0}r0(jUjj%j j%jjj}r0(j]j]j]j]r0U/ospi-driver-configuration-to-support-qspi-flashr0aj]r0hsaujMjhj]r0(j)r0}r0(jX/OSPI Driver Configuration to support QSPI flashr0jj0j j%jj"j}r0(j]j]j]j]j]ujMjhj]r0j%X/OSPI Driver Configuration to support QSPI flashr0r0}r0(jj0jj0ubaubjX)r0}r0(jX\If the board has a QSPI flash, the PDK driver needs to be updated to support the QSPI flash:r0jj0j j%jj\j}r0(j]j]j]j]j]ujMjhj]r0j%X\If the board has a QSPI flash, the PDK driver needs to be updated to support the QSPI flash:r0r0}r0(jj0jj0ubaubj)r0}r0(jUjj0j j%jjj}r0(jX-j]j]j]j]j]ujMjhj]r0j)r0}r0(jX6Board QSPI Flash Instance Configuration in board_cfg.hr0jj0j j%jj j}r0(j]j]j]j]j]ujNjhj]r0jX)r0}r0(jj0jj0j j%jj\j}r0(j]j]j]j]j]ujMj]r0j%X6Board QSPI Flash Instance Configuration in board_cfg.hr0r0}r0(jj0jj0ubaubaubaubj#)r0}r0(jXH#define BOARD_QSPI_NOR_INSTANCE jj0j j%jj&j}r0(j2j3j]j]j]j]j]ujM( jhj]r0j%XH#define BOARD_QSPI_NOR_INSTANCE r0r0}r0(jUjj0ubaubj)r0}r0(jUjj0j j%jjj}r0(jX-j]j]j]j]j]ujMjhj]r0j)r0}r0(jXSPI SoC Driver Configurations:r0jj0j j%jj j}r0(j]j]j]j]j]ujNjhj]r0jX)r0}r0(jj0jj0j j%jj\j}r0(j]j]j]j]j]ujMj]r0j%XSPI SoC Driver Configurations:r0r0}r0(jj0jj0ubaubaubaubj#)r0}r0(jX... OSPI_v0_HwAttrs ospi_cfg; SPI_init(); OSPI_socGetInitCfg(BOARD_QSPI_NOR_INSTANCE, &ospi_cfg); ospi_cfg.xferLines = OSPI_XFER_LINES_QUAD; ospi_cfg.pageSize = ; ospi_cfg.devDelays[0] = ; ospi_cfg.devDelays[1] = ; ospi_cfg.devDelays[2] = ; ospi_cfg.devDelays[3] = ; ospi_cfg.rdDataCapDelay = ; OSPI_socSetInitCfg(BOARD_OSPI_NOR_INSTANCE, &ospi_cfg);jj0j j%jj&j}r0(j2j3j]j]j]j]j]ujM- jhj]r0j%X... OSPI_v0_HwAttrs ospi_cfg; SPI_init(); OSPI_socGetInitCfg(BOARD_QSPI_NOR_INSTANCE, &ospi_cfg); ospi_cfg.xferLines = OSPI_XFER_LINES_QUAD; ospi_cfg.pageSize = ; ospi_cfg.devDelays[0] = ; ospi_cfg.devDelays[1] = ; ospi_cfg.devDelays[2] = ; ospi_cfg.devDelays[3] = ; ospi_cfg.rdDataCapDelay = ; OSPI_socSetInitCfg(BOARD_OSPI_NOR_INSTANCE, &ospi_cfg);r0r0}r0(jUjj0ubaubeubj)r0}r0(jUjKjj%j j%jjj}r0(j]r0Xsupport for benchmark testingr0aj]j]j]r0Usupport-for-benchmark-testingr0aj]ujMjhj]r0(j)r0}r0(jXSupport for Benchmark Testingr0jj0j j%jj"j}r0(j]j]j]j]j]ujMjhj]r1j%XSupport for Benchmark Testingr1r1}r1(jj0jj0ubaubj)r1}r1(jUjj0j j%jjj}r1(j]j]j]j]j]ujNjhj]r1j)r1}r 1(jUj}r 1(j]j]j]j]j]UcolsKujj1j]r 1(j)r 1}r 1(jUj}r1(j]j]j]j]j]UcolwidthKujj1j]jjubj)r1}r1(jUj}r1(j]j]j]j]j]UcolwidthKujj1j]jjubj)r1}r1(jUj}r1(j]j]j]j]j]UcolwidthK)ujj1j]jjubj)r1}r1(jUj}r1(j]j]j]j]j]UcolwidthKujj1j]jjubj)r1}r1(jUj}r1(j]j]j]j]j]UcolwidthKujj1j]jjubj)r1}r1(jUj}r1(j]j]j]j]j]ujj1j]r1j)r1}r 1(jUj}r!1(j]j]j]j]j]ujj1j]r"1(j)r#1}r$1(jUj}r%1(j]j]j]j]j]ujj1j]r&1jX)r'1}r(1(jXNamer)1jj#1j j%jj\j}r*1(j]j]j]j]j]ujMj]r+1j%XNamer,1r-1}r.1(jj)1jj'1ubaubajjubj)r/1}r01(jUj}r11(j]j]j]j]j]ujj1j]r21jX)r31}r41(jX Descriptionr51jj/1j j%jj\j}r61(j]j]j]j]j]ujMj]r71j%X Descriptionr81r91}r:1(jj51jj31ubaubajjubj)r;1}r<1(jUj}r=1(j]j]j]j]j]ujj1j]r>1jX)r?1}r@1(jXExpected ResultsrA1jj;1j j%jj\j}rB1(j]j]j]j]j]ujMj]rC1j%XExpected ResultsrD1rE1}rF1(jjA1jj?1ubaubajjubj)rG1}rH1(jUj}rI1(j]j]j]j]j]ujj1j]rJ1jX)rK1}rL1(jXSOC/Core SuppportedrM1jjG1j j%jj\j}rN1(j]j]j]j]j]ujMj]rO1j%XSOC/Core SuppportedrP1rQ1}rR1(jjM1jjK1ubaubajjubj)rS1}rT1(jUj}rU1(j]j]j]j]j]ujj1j]rV1jX)rW1}rX1(jX Build TyperY1jjS1j j%jj\j}rZ1(j]j]j]j]j]ujMj]r[1j%X Build Typer\1r]1}r^1(jjY1jjW1ubaubajjubejjubajjubj)r_1}r`1(jUj}ra1(j]j]j]j]j]ujj1j]rb1j)rc1}rd1(jUj}re1(j]j]j]j]j]ujj_1j]rf1(j)rg1}rh1(jUj}ri1(j]j]j]j]j]ujjc1j]rj1jX)rk1}rl1(jXOSPI flash Test Apprm1jjg1j j%jj\j}rn1(j]j]j]j]j]ujMj]ro1j%XOSPI flash Test Apprp1rq1}rr1(jjm1jjk1ubaubajjubj)rs1}rt1(jUj}ru1(j]j]j]j]j]ujjc1j]rv1jX)rw1}rx1(jX2Test application used for performance benchmarkingry1jjs1j j%jj\j}rz1(j]j]j]j]j]ujMj]r{1j%X2Test application used for performance benchmarkingr|1r}1}r~1(jjy1jjw1ubaubajjubj)r1}r1(jUj}r1(j]j]j]j]j]ujjc1j]r1(jX)r1}r1(jX0Test application will print on the UART console:r1jj1j j%jj\j}r1(j]j]j]j]j]ujMj]r1j%X0Test application will print on the UART console:r1r1}r1(jj1jj1ubaubjX)r1}r1(jX5Board_flashWrite ### bytes at transfer rate #### Kbpsr1jj1j j%jj\j}r1(j]j]j]j]j]ujMj]r1j%X5Board_flashWrite ### bytes at transfer rate #### Kbpsr1r1}r1(jj1jj1ubaubjX)r1}r1(jX4Board_flashRead ### bytes at transfer rate #### Mbpsr1jj1j j%jj\j}r1(j]j]j]j]j]ujMj]r1j%X4Board_flashRead ### bytes at transfer rate #### Mbpsr1r1}r1(jj1jj1ubaubjX)r1}r1(jXBoard_flashWrite CPU Load %##r1jj1j j%jj\j}r1(j]j]j]j]j]ujMj]r1j%XBoard_flashWrite CPU Load %##r1r1}r1(jj1jj1ubaubjX)r1}r1(jXBoard_flashRead CPU Load %##r1jj1j j%jj\j}r1(j]j]j]j]j]ujMj]r1j%XBoard_flashRead CPU Load %##r1r1}r1(jj1jj1ubaubejjubj)r1}r1(jUj}r1(j]j]j]j]j]ujjc1j]r1jX)r1}r1(jX.am65xx/A53 am65xx/R5 j721e/mpu1_0 j721e/mcu1_0r1jj1j j%jj\j}r1(j]j]j]j]j]ujMj]r1j%X.am65xx/A53 am65xx/R5 j721e/mpu1_0 j721e/mcu1_0r1r1}r1(jj1jj1ubaubajjubj)r1}r1(jUj}r1(j]j]j]j]j]ujjc1j]r1jX)r1}r1(jXmaker1jj1j j%jj\j}r1(j]j]j]j]j]ujMj]r1j%Xmaker1r1}r1(jj1jj1ubaubajjubejjubajjubejjubaubj\)r1}r1(jX1. Data transfer between DDR and OSPI flash memory, performance measurement does not include time to invalidate/write back cache 2. GTC counter (200MHz) used for throughput measurement on A53, and PMU cycle counter (400MHz) on R5 3. sysbios load moduel used for load measurement 4. Pipeline PHY enabled, DDR mode enabled in DAC mode 5. Pipeline PHY disabled, DDR mode disabled in INDAC mode with ospi clock divider of 32 6. Read/write transfer size of 1M bytes 7. Write transfer size 1M bytes with DMA chunk size of 16 bytes in DAC DMA modejj0j Njj_j}r1(j]j]j]j]j]ujNjhj]r1j`)r1}r1(jUj}r1(jeU.j]j]j]jfUj]j]jgjhujj1j]r1(j)r1}r1(jX}Data transfer between DDR and OSPI flash memory, performance measurement does not include time to invalidate/write back cacher1j}r1(j]j]j]j]j]ujj1j]r1jX)r1}r1(jj1jj1j j%jj\j}r1(j]j]j]j]j]ujMj]r1j%X}Data transfer between DDR and OSPI flash memory, performance measurement does not include time to invalidate/write back cacher1r1}r1(jj1jj1ubaubajj ubj)r1}r1(jXaGTC counter (200MHz) used for throughput measurement on A53, and PMU cycle counter (400MHz) on R5r1j}r1(j]j]j]j]j]ujj1j]r1jX)r1}r1(jj1jj1j j%jj\j}r1(j]j]j]j]j]ujMj]r1j%XaGTC counter (200MHz) used for throughput measurement on A53, and PMU cycle counter (400MHz) on R5r1r1}r1(jj1jj1ubaubajj ubj)r1}r1(jX-sysbios load moduel used for load measurementr1j}r1(j]j]j]j]j]ujj1j]r1jX)r1}r1(jj1jj1j j%jj\j}r1(j]j]j]j]j]ujMj]r1j%X-sysbios load moduel used for load measurementr1r1}r1(jj1jj1ubaubajj ubj)r1}r1(jX2Pipeline PHY enabled, DDR mode enabled in DAC moder1j}r1(j]j]j]j]j]ujj1j]r1jX)r1}r1(jj1jj1j j%jj\j}r1(j]j]j]j]j]ujMj]r1j%X2Pipeline PHY enabled, DDR mode enabled in DAC moder1r1}r1(jj1jj1ubaubajj ubj)r1}r1(jXTPipeline PHY disabled, DDR mode disabled in INDAC mode with ospi clock divider of 32r1j}r1(j]j]j]j]j]ujj1j]r1jX)r2}r2(jj1jj1j j%jj\j}r2(j]j]j]j]j]ujMj]r2j%XTPipeline PHY disabled, DDR mode disabled in INDAC mode with ospi clock divider of 32r2r2}r2(jj1jj2ubaubajj ubj)r2}r2(jX$Read/write transfer size of 1M bytesr 2j}r 2(j]j]j]j]j]ujj1j]r 2jX)r 2}r 2(jj 2jj2j j%jj\j}r2(j]j]j]j]j]ujMj]r2j%X$Read/write transfer size of 1M bytesr2r2}r2(jj 2jj 2ubaubajj ubj)r2}r2(jXLWrite transfer size 1M bytes with DMA chunk size of 16 bytes in DAC DMA moder2j}r2(j]j]j]j]j]ujj1j]r2jX)r2}r2(jj2jj2j j%jj\j}r2(j]j]j]j]j]ujMj]r2j%XLWrite transfer size 1M bytes with DMA chunk size of 16 bytes in DAC DMA moder2r2}r2(jj2jj2ubaubajj ubejjcubaubj)r2}r 2(jUjj0j j%jjj}r!2(j]j]j]j]j]ujMjhj]r"2j)r#2}r$2(jUjKjj2j j%jjj}r%2(j]j]j]j]j]ujKjhj]ubaubeubj)r&2}r'2(jUjKjj%j j%jjj}r(2(j]r)2Xadditional referencesr*2aj]j]j]r+2Uid53r,2aj]ujMjhj]r-2(j)r.2}r/2(jXAdditional Referencesr02jj&2j j%jj"j}r12(j]j]j]j]j]ujMjhj]r22j%XAdditional Referencesr32r42}r52(jj02jj.2ubaubj)r62}r72(jUjj&2j j%jjj}r82(j]j]j]j]j]ujMjhj]r92j)r:2}r;2(jUjKjj62j j%jjj}r<2(j]j]j]j]j]ujKjhj]ubaubeubeubj j jj?j}r=2(j]UlevelKj]j]Usourcej j]j]UlineK+UtypejXujK-jhj]r>2(jX)r?2}r@2(jXTitle overline too short.j}rA2(j]j]j]j]j]ujj%j]rB2j%XTitle overline too short.rC2rD2}rE2(jUjj?2ubajj\ubj#)rF2}rG2(jX'*********** McSPI-QSPI-OSPI ***********j}rH2(j2j3j]j]j]j]j]ujj%j]rI2j%X'*********** McSPI-QSPI-OSPI ***********rJ2rK2}rL2(jUjjF2ubajj&ubeubh)rM2}rN2(jUjj%j j%jj?j}rO2(j]UlevelKj]j]rP2j%aUsourcej%j]j]UlineKUtypejAujKjhj]rQ2jX)rR2}rS2(jX/Duplicate implicit target name: "introduction".j}rT2(j]j]j]j]j]ujjM2j]rU2j%X/Duplicate implicit target name: "introduction".rV2rW2}rX2(jUjjR2ubajj\ubaubh)rY2}rZ2(jUjj%j j%jj?j}r[2(j]UlevelKj]j]r\2j&aUsourcej%j]j]UlineKUtypejAujKjhj]r]2jX)r^2}r_2(jX7Duplicate implicit target name: "driver configuration".j}r`2(j]j]j]j]j]ujjY2j]ra2j%X7Duplicate implicit target name: "driver configuration".rb2rc2}rd2(jUjj^2ubajj\ubaubh)re2}rf2(jUjj&j j%jj?j}rg2(j]UlevelKj]j]rh2j&aUsourcej%j]j]UlineKEUtypejAujKEjhj]ri2jX)rj2}rk2(jX'Duplicate implicit target name: "apis".j}rl2(j]j]j]j]j]ujje2j]rm2j%X'Duplicate implicit target name: "apis".rn2ro2}rp2(jUjjj2ubajj\ubaubh)rq2}rr2(jUjj&j j%jj?j}rs2(j]UlevelKj]j]Usourcej%j]j]UlineKSUtypejujNjhj]rt2(jX)ru2}rv2(jX@Error in "rubric" directive: 1 argument(s) required, 0 supplied.j}rw2(j]j]j]j]j]ujjq2j]rx2j%X@Error in "rubric" directive: 1 argument(s) required, 0 supplied.ry2rz2}r{2(jUjju2ubajj\ubj#)r|2}r}2(jX.. rubric:: :name: section j}r~2(j2j3j]j]j]j]j]ujjq2j]r2j%X.. rubric:: :name: section r2r2}r2(jUjj|2ubajj&ubeubh)r2}r2(jUjj&j j%jj?j}r2(j]UlevelKj]j]Usourcej%j]j]UlineKsUtypejXujKrjhj]r2jX)r2}r2(jX%Line block ends without a blank line.j}r2(j]j]j]j]j]ujj2j]r2j%X%Line block ends without a blank line.r2r2}r2(jUjj2ubajj\ubaubh)r2}r2(jUjj('j j%jj?j}r2(j]UlevelKj]j]r2j.'aUsourcej%j]j]UlineKUtypejAujKjhj]r2jX)r2}r2(jX+Duplicate implicit target name: "examples".j}r2(j]j]j]j]j]ujj2j]r2j%X+Duplicate implicit target name: "examples".r2r2}r2(jUjj2ubajj\ubaubh)r2}r2(jUjj8'j j%jj?j}r2(j]UlevelKj]j]Usourcej%j]j]UlineKUtypejXujKjhj]r2jX)r2}r2(jX%Line block ends without a blank line.j}r2(j]j]j]j]j]ujj2j]r2j%X%Line block ends without a blank line.r2r2}r2(jUjj2ubajj\ubaubh)r2}r2(jUjj(j j%jj?j}r2(j]UlevelKj]j]Usourcej%j]j]UlineKUtypejXujKjhj]r2jX)r2}r2(jX%Line block ends without a blank line.j}r2(j]j]j]j]j]ujj2j]r2j%X%Line block ends without a blank line.r2r2}r2(jUjj2ubajj\ubaubh)r2}r2(jUj}r2(j]UlevelKj]j]Usourcej%j]j]UlineM9Utypejujju,j]r2jX)r2}r2(jXUnexpected indentation.j}r2(j]j]j]j]j]ujj2j]r2j%XUnexpected indentation.r2r2}r2(jUjj2ubajj\ubajj?ubh)r2}r2(jUj}r2(j]UlevelKj]j]Usourcej%j]j]UlineM`UtypejXujj,j]r2jX)r2}r2(jX%Line block ends without a blank line.j}r2(j]j]j]j]j]ujj2j]r2j%X%Line block ends without a blank line.r2r2}r2(jUjj2ubajj\ubajj?ubh)r2}r2(jUj}r2(j]UlevelKj]j]Usourcej%j]j]UlineMjUtypejujj,j]r2jX)r2}r2(jXUnexpected indentation.j}r2(j]j]j]j]j]ujj2j]r2j%XUnexpected indentation.r2r2}r2(jUjj2ubajj\ubajj?ubh)r2}r2(jUj}r2(j]UlevelKj]j]Usourcej%j]j]UlineMlUtypejXujj,j]r2jX)r2}r2(jX;Block quote ends without a blank line; unexpected unindent.j}r2(j]j]j]j]j]ujj2j]r2j%X;Block quote ends without a blank line; unexpected unindent.r2r2}r2(jUjj2ubajj\ubajj?ubh)r2}r2(jUj}r2(j]UlevelKj]j]Usourcej%j]j]UlineMmUtypejXujj,j]r2jX)r2}r2(jX%Line block ends without a blank line.j}r2(j]j]j]j]j]ujj2j]r2j%X%Line block ends without a blank line.r2r2}r2(jUjj2ubajj\ubajj?ubh)r2}r2(jUj}r2(j]UlevelKj]r2jv/aj]r2ju/aUsourcej%j]j]UlineMEUtypejXujje/j]r2jX)r2}r2(jX.Inline strong start-string without end-string.j}r2(j]j]j]j]j]ujj2j]r2j%X.Inline strong start-string without end-string.r2r2}r2(jUjj2ubajj\ubajj?ubh)r2}r2(jUj}r2(j]UlevelKj]r2j/aj]r2j/aUsourcej%j]j]UlineMEUtypejXujje/j]r2jX)r2}r2(jX.Inline strong start-string without end-string.j}r2(j]j]j]j]j]ujj2j]r2j%X.Inline strong start-string without end-string.r2r2}r3(jUjj2ubajj\ubajj?ubh)r3}r3(jUj}r3(j]UlevelKj]r3j/aj]r3j/aUsourcej%j]j]UlineMOUtypejXujje/j]r3jX)r3}r3(jX.Inline strong start-string without end-string.j}r 3(j]j]j]j]j]ujj3j]r 3j%X.Inline strong start-string without end-string.r 3r 3}r 3(jUjj3ubajj\ubajj?ubh)r3}r3(jUj}r3(j]UlevelKj]j]Usourcej%j]j]UlineMSUtypejXujje/j]r3jX)r3}r3(jX;Block quote ends without a blank line; unexpected unindent.j}r3(j]j]j]j]j]ujj3j]r3j%X;Block quote ends without a blank line; unexpected unindent.r3r3}r3(jUjj3ubajj\ubajj?ubh)r3}r3(jUjjh0j j%jj?j}r3(j]UlevelKj]j]Usourcej%j]j]UlineMUtypejXujMjhj]r3jX)r3}r3(jX;Bullet list ends without a blank line; unexpected unindent.j}r3(j]j]j]j]j]ujj3j]r 3j%X;Bullet list ends without a blank line; unexpected unindent.r!3r"3}r#3(jUjj3ubajj\ubaubh)r$3}r%3(jUjjh0j j%jj?j}r&3(j]UlevelKj]j]Usourcej%j]j]UlineMUtypejXujMjhj]r'3jX)r(3}r)3(jX;Bullet list ends without a blank line; unexpected unindent.j}r*3(j]j]j]j]j]ujj$3j]r+3j%X;Bullet list ends without a blank line; unexpected unindent.r,3r-3}r.3(jUjj(3ubajj\ubaubh)r/3}r03(jUjj0j j%jj?j}r13(j]UlevelKj]j]Usourcej%j]j]UlineMUtypejXujMjhj]r23jX)r33}r43(jX;Bullet list ends without a blank line; unexpected unindent.j}r53(j]j]j]j]j]ujj/3j]r63j%X;Bullet list ends without a blank line; unexpected unindent.r73r83}r93(jUjj33ubajj\ubaubh)r:3}r;3(jUjj0j j%jj?j}r<3(j]UlevelKj]j]Usourcej%j]j]UlineMUtypejXujMjhj]r=3jX)r>3}r?3(jX;Bullet list ends without a blank line; unexpected unindent.j}r@3(j]j]j]j]j]ujj:3j]rA3j%X;Bullet list ends without a blank line; unexpected unindent.rB3rC3}rD3(jUjj>3ubajj\ubaubh)rE3}rF3(jUjj0j j%jj?j}rG3(j]UlevelKj]j]Usourcej%j]j]UlineMUtypejXujMjhj]rH3jX)rI3}rJ3(jX%Line block ends without a blank line.j}rK3(j]j]j]j]j]ujjE3j]rL3j%X%Line block ends without a blank line.rM3rN3}rO3(jUjjI3ubajj\ubaubh)rP3}rQ3(jUjj&2j j%jj?j}rR3(j]UlevelKj]j]rS3j,2aUsourcej%j]j]UlineMUtypejAujMjhj]rT3jX)rU3}rV3(jX8Duplicate implicit target name: "additional references".j}rW3(j]j]j]j]j]ujjP3j]rX3j%X8Duplicate implicit target name: "additional references".rY3rZ3}r[3(jUjjU3ubajj\ubaubh)r\3}r]3(jUjj&2j j%jj?j}r^3(j]UlevelKj]j]Usourcej%j]j]UlineMUtypejujM jhj]r_3(jX)r`3}ra3(jXMalformed table.j}rb3(j]j]j]j]j]ujj\3j]rc3j%XMalformed table.rd3re3}rf3(jUjj`3ubajj\ubj#)rg3}rh3(jX1+-----------------------------------+-----------------------------------+ | **Document** | **Location** | +-----------------------------------+-----------------------------------+ | API Reference Manual | $(TI_PDK_INSTALL_DIR)\packages\ti | | | \drv\spi\docs\doxygen\html\index. | | | html | +-----------------------------------+-----------------------------------+ | Release Notes | $(TI_PDK_INSTALL_DIR)\packages\ti | | | \drv\spi\docs\ReleaseNotes_SPI_LL | | git | D.pdf | +-----------------------------------+-----------------------------------+j}ri3(j2j3j]j]j]j]j]ujj\3j]rj3j%X1+-----------------------------------+-----------------------------------+ | **Document** | **Location** | +-----------------------------------+-----------------------------------+ | API Reference Manual | $(TI_PDK_INSTALL_DIR)\packages\ti | | | \drv\spi\docs\doxygen\html\index. | | | html | +-----------------------------------+-----------------------------------+ | Release Notes | $(TI_PDK_INSTALL_DIR)\packages\ti | | | \drv\spi\docs\ReleaseNotes_SPI_LL | | git | D.pdf | +-----------------------------------+-----------------------------------+rk3rl3}rm3(jUjjg3ubajj&ubeubh)rn3}ro3(jUjj&2j XZinternal padding after source/rtos/PDK_Platform_Software/Device_Drivers/QSPI_McSPI.rst.incrp3jj?j}rq3(j]UlevelKj]j]Usourcej%j]j]UlineMUtypejujMjhj]rr3(jX)rs3}rt3(jX;Content block expected for the "raw" directive; none found.j}ru3(j]j]j]j]j]ujjn3j]rv3j%X;Content block expected for the "raw" directive; none found.rw3rx3}ry3(jUjjs3ubajj\ubj#)rz3}r{3(jX.. raw:: html j}r|3(j2j3j]j]j]j]j]ujjn3j]r}3j%X.. raw:: html r~3r3}r3(jUjjz3ubajj&ubeubh)r3}r3(jUjj)r3}r3(jUjKjj)r3}r3(jUjhj j jjj}r3(j]j]j]j]r3Uedma3r3aj]r3haujK3jhj]r3(j)r3}r3(jXEDMA3r3jj3j j jj"j}r3(j]j]j]j]j]ujK3jhj]r3j%XEDMA3r3r3}r3(jj3jj3ubaubj))r3}r3(jX@http://processors.wiki.ti.com/index.php/Processor_SDK_RTOS_EDMA3jj3j j,X>source/rtos/PDK_Platform_Software/Device_Drivers/EDMA3.rst.incr3r3}r3bjj0j}r3(j2j3j]j]j]j]j]ujKjhj]r3j%X@http://processors.wiki.ti.com/index.php/Processor_SDK_RTOS_EDMA3r3r3}r3(jUjj3ubaubj3j)r3}r3(jUjKjj3j j3jjj}r3(j]r3Xuser interfacer3aj]j]j]r3Uid56r3aj]ujKjhj]r3(j)r3}r3(jXUser Interfacer3jj3j j3jj"j}r3(j]j]j]j]j]ujKjhj]r3j%XUser Interfacer3r3}r3(jj3jj3ubaubj)r3}r3(jUjKjj3j j3jjj}r3(j]r3Xdriver configurationr3aj]j]j]r3Uid57r3aj]ujKjhj]r3(j)r3}r3(jXDriver Configurationr3jj3j j3jj"j}r3(j]j]j]j]j]ujKjhj]r3j%XDriver Configurationr3r3}r3(jj3jj3ubaubjX)r3}r3(jXWEDMA3 peripheral IP is re-used in different SoCs with only a few configuration changes:r3jj3j j3jj\j}r3(j]j]j]j]j]ujKjhj]r3j%XWEDMA3 peripheral IP is re-used in different SoCs with only a few configuration changes:r3r3}r3(jj3jj3ubaubj)r3}r3(jUjj3j j3jjj}r3(jX-j]j]j]j]j]ujK jhj]r3(j)r3}r3(jX)Number of DMA and QDMA channels supportedr3jj3j j3jj j}r3(j]j]j]j]j]ujNjhj]r3jX)r3}r3(jj3jj3j j3jj\j}r3(j]j]j]j]j]ujK j]r3j%X)Number of DMA and QDMA channels supportedr3r3}r3(jj3jj3ubaubaubj)r3}r3(jXNumber of PARAM sets availabler3jj3j j3jj j}r3(j]j]j]j]j]ujNjhj]r3jX)r3}r3(jj3jj3j j3jj\j}r3(j]j]j]j]j]ujK!j]r3j%XNumber of PARAM sets availabler3r3}r3(jj3jj3ubaubaubj)r3}r3(jX5Number of event queues and transfer controllers etc. jj3j j3jj j}r3(j]j]j]j]j]ujNjhj]r3jX)r3}r3(jX4Number of event queues and transfer controllers etc.r3jj3j j3jj\j}r3(j]j]j]j]j]ujK"j]r3j%X4Number of event queues and transfer controllers etc.r3r3}r3(jj3jj3ubaubaubeubjX)r3}r3(jX8The EDMA3 peripheral is used by other peripherals for their DMA needs thus the EDMA3 Driver needs to cater to the requirements of device drivers of these peripherals as well as other application software that may need to use DMA services. Resources for EDMA driver is managed through RM sub module within driver.r3jj3j j3jj\j}r3(j]j]j]j]j]ujK$jhj]r3j%X8The EDMA3 peripheral is used by other peripherals for their DMA needs thus the EDMA3 Driver needs to cater to the requirements of device drivers of these peripherals as well as other application software that may need to use DMA services. Resources for EDMA driver is managed through RM sub module within driver.r3r3}r3(jj3jj3ubaubeubj)r3}r3(jUjKjj3j j3jjj}r3(j]r3Xapisr3aj]j]j]r3Uid58r3aj]ujK+jhj]r3(j)r3}r3(jXAPIsr4jj3j j3jj"j}r4(j]j]j]j]j]ujK+jhj]r4j%XAPIsr4r4}r4(jj4jj3ubaubjX)r4}r4(jXAPI reference for EDMA3 driverr4jj3j j3jj\j}r 4(j]j]j]j]j]ujK-jhj]r 4j%XAPI reference for EDMA3 driverr 4r 4}r 4(jj4jj4ubaubj#)r4}r4(jX'#include jj3j j3jj&j}r4(j2j3j]j]j]j]j]ujM jhj]r4j%X'#include r4r4}r4(jUjj4ubaubjX)r4}r4(jX1API reference for EDMA3 Resource Management layerr4jj3j j3jj\j}r4(j]j]j]j]j]ujK3jhj]r4j%X1API reference for EDMA3 Resource Management layerr4r4}r4(jj4jj4ubaubj#)r4}r4(jX%#include jj3j j3jj&j}r4(j2j3j]j]j]j]j]ujM jhj]r 4j%X%#include r!4r"4}r#4(jUjj4ubaubeubeubj)r$4}r%4(jUjKjj3j j3jjj}r&4(j]r'4jaj]j]j]r(4Uid59r)4aj]ujK:jhj]r*4(j)r+4}r,4(jXFAQr-4jj$4j j3jj"j}r.4(j]j]j]j]j]ujK:jhj]r/4j%XFAQr04r14}r24(jj-4jj+4ubaubjX)r34}r44(jX$**How to debug common EDMA issues?**r54jj$4j j3jj\j}r64(j]j]j]j]j]ujK;jhj]r74j|)r84}r94(jj54j}r:4(j]j]j]j]j]ujj34j]r;4j%X How to debug common EDMA issues?r<4r=4}r>4(jUjj84ubajjubaubjX)r?4}r@4(jXbPlease refer to `EDMA3 FAQ `__ for Keystone devices.jj$4j j3jj\j}rA4(j]j]j]j]j]ujK=jhj]rB4(j%XPlease refer to rC4rD4}rE4(jXPlease refer to jj?4ubj)rF4}rG4(jX<`EDMA3 FAQ `__j}rH4(UnameX EDMA3 FAQjX,http://www.ti.com/lit/an/sprac52/sprac52.pdfj]j]j]j]j]ujj?4j]rI4j%X EDMA3 FAQrJ4rK4}rL4(jUjjF4ubajjubj%X for Keystone devices.rM4rN4}rO4(jX for Keystone devices.jj?4ubeubeubj)rP4}rQ4(jUjKjj3j j3jjj}rR4(j]rS4Xadditional referencesrT4aj]j]j]rU4Uid60rV4aj]ujKCjhj]rW4(j)rX4}rY4(jXAdditional ReferencesrZ4jjP4j j3jj"j}r[4(j]j]j]j]j]ujKCjhj]r\4j%XAdditional Referencesr]4r^4}r_4(jjZ4jjX4ubaubj)r`4}ra4(jUjjP4j j3jjj}rb4(j]j]j]j]j]ujNjhj]rc4j)rd4}re4(jUj}rf4(j]j]j]j]j]UcolsKujj`4j]rg4(j)rh4}ri4(jUj}rj4(j]j]j]j]j]UcolwidthKujjd4j]jjubj)rk4}rl4(jUj}rm4(j]j]j]j]j]UcolwidthK/ujjd4j]jjubj)rn4}ro4(jUj}rp4(j]j]j]j]j]ujjd4j]rq4j)rr4}rs4(jUj}rt4(j]j]j]j]j]ujjn4j]ru4j)rv4}rw4(jUj}rx4(j]UmorecolsKj]j]j]j]ujjr4j]ry4jX)rz4}r{4(jXEDMA3 Driver Summaryr|4jjv4j j3jj\j}r}4(j]j]j]j]j]ujKFj]r~4j%XEDMA3 Driver Summaryr4r4}r4(jj|4jjz4ubaubajjubajjubajjubj)r4}r4(jUj}r4(j]j]j]j]j]ujjd4j]r4(j)r4}r4(jUj}r4(j]j]j]j]j]ujj4j]r4(j)r4}r4(jUj}r4(j]j]j]j]j]ujj4j]r4jX)r4}r4(jXComponent Typer4jj4j j3jj\j}r4(j]j]j]j]j]ujKHj]r4j%XComponent Typer4r4}r4(jj4jj4ubaubajjubj)r4}r4(jUj}r4(j]j]j]j]j]ujj4j]r4jX)r4}r4(jXLibraryr4jj4j j3jj\j}r4(j]j]j]j]j]ujKHj]r4j%XLibraryr4r4}r4(jj4jj4ubaubajjubejjubj)r4}r4(jUj}r4(j]j]j]j]j]ujj4j]r4(j)r4}r4(jUj}r4(j]j]j]j]j]ujj4j]r4jX)r4}r4(jXInstall Packager4jj4j j3jj\j}r4(j]j]j]j]j]ujKKj]r4j%XInstall Packager4r4}r4(jj4jj4ubaubajjubj)r4}r4(jUj}r4(j]j]j]j]j]ujj4j]r4jX)r4}r4(jXEDMA3 Low level driversr4jj4j j3jj\j}r4(j]j]j]j]j]ujKKj]r4j%XEDMA3 Low level driversr4r4}r4(jj4jj4ubaubajjubejjubj)r4}r4(jUj}r4(j]j]j]j]j]ujj4j]r4(j)r4}r4(jUj}r4(j]j]j]j]j]ujj4j]r4jX)r4}r4(jXInstall Directoryr4jj4j j3jj\j}r4(j]j]j]j]j]ujKNj]r4j%XInstall Directoryr4r4}r4(jj4jj4ubaubajjubj)r4}r4(jUj}r4(j]j]j]j]j]ujj4j]r4jX)r4}r4(jX(/edma3_lld_xx_xx_xx_xxr4jj4j j3jj\j}r4(j]j]j]j]j]ujKNj]r4j%X(/edma3_lld_xx_xx_xx_xxr4r4}r4(jj4jj4ubaubajjubejjubj)r4}r4(jUj}r4(j]j]j]j]j]ujj4j]r4(j)r4}r4(jUj}r4(j]j]j]j]j]ujj4j]r4jX)r4}r4(jX Project Typer4jj4j j3jj\j}r4(j]j]j]j]j]ujKQj]r4j%X Project Typer4r4}r4(jj4jj4ubaubajjubj)r4}r4(jUj}r4(j]j]j]j]j]ujj4j]r4jX)r4}r4(jXN/Ar4jj4j j3jj\j}r4(j]j]j]j]j]ujKQj]r4j%XN/Ar4r4}r4(jj4jj4ubaubajjubejjubj)r4}r4(jUj}r4(j]j]j]j]j]ujj4j]r4(j)r4}r4(jUj}r4(j]j]j]j]j]ujj4j]r4jX)r4}r4(jXEndian Supportr5jj4j j3jj\j}r5(j]j]j]j]j]ujKTj]r5j%XEndian Supportr5r5}r5(jj5jj4ubaubajjubj)r5}r5(jUj}r5(j]j]j]j]j]ujj4j]r 5jX)r 5}r 5(jXLittle and Bigr 5jj5j j3jj\j}r 5(j]j]j]j]j]ujKTj]r5j%XLittle and Bigr5r5}r5(jj 5jj 5ubaubajjubejjubj)r5}r5(jUj}r5(j]j]j]j]j]ujj4j]r5(j)r5}r5(jUj}r5(j]j]j]j]j]ujj5j]r5jX)r5}r5(jX Library Namer5jj5j j3jj\j}r5(j]j]j]j]j]ujKWj]r5j%X Library Namer5r 5}r!5(jj5jj5ubaubajjubj)r"5}r#5(jUj}r$5(j]j]j]j]j]ujj5j]r%5jX)r&5}r'5(jXyedma3_lld_drv.ae66 (little endian), edma3_lld_drv.ae66e (big endian), edma3_lld_drv.aa15fg (A15), edma3_lld_drv.aem4 (M4)r(5jj"5j j3jj\j}r)5(j]j]j]j]j]ujKWj]r*5j%Xyedma3_lld_drv.ae66 (little endian), edma3_lld_drv.ae66e (big endian), edma3_lld_drv.aa15fg (A15), edma3_lld_drv.aem4 (M4)r+5r,5}r-5(jj(5jj&5ubaubajjubejjubj)r.5}r/5(jUj}r05(j]j]j]j]j]ujj4j]r15(j)r25}r35(jUj}r45(j]j]j]j]j]ujj.5j]r55jX)r65}r75(jX Linker Pathr85jj25j j3jj\j}r95(j]j]j]j]j]ujK]j]r:5j%X Linker Pathr;5r<5}r=5(jj85jj65ubaubajjubj)r>5}r?5(jUj}r@5(j]j]j]j]j]ujj.5j]rA5jX)rB5}rC5(jX< rD5jj>5j j3jj\j}rE5(j]j]j]j]j]ujK]j]rF5j%X< rG5rH5}rI5(jjD5jjB5ubaubajjubejjubj)rJ5}rK5(jUj}rL5(j]j]j]j]j]ujj4j]rM5(j)rN5}rO5(jUj}rP5(j]j]j]j]j]ujjJ5j]rQ5jX)rR5}rS5(jX Include PathsrT5jjN5j j3jj\j}rU5(j]j]j]j]j]ujKaj]rV5j%X Include PathsrW5rX5}rY5(jjT5jjR5ubaubajjubj)rZ5}r[5(jUj}r\5(j]j]j]j]j]ujjJ5j]r]5jX)r^5}r_5(jX$ r`5jjZ5j j3jj\j}ra5(j]j]j]j]j]ujKaj]rb5j%X$ rc5rd5}re5(jj`5jj^5ubaubajjubejjubj)rf5}rg5(jUj}rh5(j]j]j]j]j]ujj4j]ri5(j)rj5}rk5(jUj}rl5(j]j]j]j]j]ujjf5j]rm5jX)rn5}ro5(jXReference Guidesrp5jjj5j j3jj\j}rq5(j]j]j]j]j]ujKej]rr5j%XReference Guidesrs5rt5}ru5(jjp5jjn5ubaubajjubj)rv5}rw5(jUj}rx5(j]j]j]j]j]ujjf5j]ry5jX)rz5}r{5(jX See docs under install directoryr|5jjv5j j3jj\j}r}5(j]j]j]j]j]ujKej]r~5j%X See docs under install directoryr5r5}r5(jj|5jjz5ubaubajjubejjubj)r5}r5(jUj}r5(j]j]j]j]j]ujj4j]r5(j)r5}r5(jUj}r5(j]j]j]j]j]ujj5j]r5jX)r5}r5(jXAdditional Resourcesr5jj5j j3jj\j}r5(j]j]j]j]j]ujKhj]r5j%XAdditional Resourcesr5r5}r5(jj5jj5ubaubajjubj)r5}r5(jUj}r5(j]j]j]j]j]ujj5j]r5jX)r5}r5(jX6Programming the EDMA3 using the Low-Level Driver (LLD)r5jj5j j3jj\j}r5(j]j]j]j]j]ujKhj]r5j%X6Programming the EDMA3 using the Low-Level Driver (LLD)r5r5}r5(jj5jj5ubaubajjubejjubj)r5}r5(jUj}r5(j]j]j]j]j]ujj4j]r5(j)r5}r5(jUj}r5(j]j]j]j]j]ujj5j]r5jX)r5}r5(jXLicenser5jj5j j3jj\j}r5(j]j]j]j]j]ujKlj]r5j%XLicenser5r5}r5(jj5jj5ubaubajjubj)r5}r5(jUj}r5(j]j]j]j]j]ujj5j]r5jX)r5}r5(jXBSDr5jj5j j3jj\j}r5(j]j]j]j]j]ujKlj]r5j%XBSDr5r5}r5(jj5jj5ubaubajjubejjubejjubejjubaubjb)r5}r5(jXEDMA3 sample libsr5jjP4j j3jjfj}r5(j]r5Uedma3-sample-libsr5aj]j]j]j]r5h/aujNjhj]r5j%XEDMA3 sample libsr5r5}r5(jj5jj5ubaubj)r5}r5(jUjjP4j j3jjj}r5(j]j]j]j]j]ujNjhj]r5j)r5}r5(jUj}r5(j]j]j]j]j]UcolsKujj5j]r5(j)r5}r5(jUj}r5(j]j]j]j]j]UcolwidthKujj5j]jjubj)r5}r5(jUj}r5(j]j]j]j]j]UcolwidthK/ujj5j]jjubj)r5}r5(jUj}r5(j]j]j]j]j]ujj5j]r5j)r5}r5(jUj}r5(j]j]j]j]j]ujj5j]r5j)r5}r5(jUj}r5(j]UmorecolsKj]j]j]j]ujj5j]r5jX)r5}r5(jXEDMA3 Driver Sample Summaryr5jj5j j3jj\j}r5(j]j]j]j]j]ujKtj]r5j%XEDMA3 Driver Sample Summaryr5r5}r5(jj5jj5ubaubajjubajjubajjubj)r5}r5(jUj}r5(j]j]j]j]j]ujj5j]r5(j)r5}r5(jUj}r5(j]j]j]j]j]ujj5j]r5(j)r5}r5(jUj}r5(j]j]j]j]j]ujj5j]r5jX)r5}r5(jXComponent Typer5jj5j j3jj\j}r5(j]j]j]j]j]ujKvj]r5j%XComponent Typer5r5}r5(jj5jj5ubaubajjubj)r5}r5(jUj}r5(j]j]j]j]j]ujj5j]r5jX)r5}r6(jXLibraryr6jj5j j3jj\j}r6(j]j]j]j]j]ujKvj]r6j%XLibraryr6r6}r6(jj6jj5ubaubajjubejjubj)r6}r6(jUj}r 6(j]j]j]j]j]ujj5j]r 6(j)r 6}r 6(jUj}r 6(j]j]j]j]j]ujj6j]r6jX)r6}r6(jXInstall Packager6jj 6j j3jj\j}r6(j]j]j]j]j]ujKyj]r6j%XInstall Packager6r6}r6(jj6jj6ubaubajjubj)r6}r6(jUj}r6(j]j]j]j]j]ujj6j]r6jX)r6}r6(jXEDMA3 Low level driversr6jj6j j3jj\j}r6(j]j]j]j]j]ujKyj]r6j%XEDMA3 Low level driversr 6r!6}r"6(jj6jj6ubaubajjubejjubj)r#6}r$6(jUj}r%6(j]j]j]j]j]ujj5j]r&6(j)r'6}r(6(jUj}r)6(j]j]j]j]j]ujj#6j]r*6jX)r+6}r,6(jXInstall Directoryr-6jj'6j j3jj\j}r.6(j]j]j]j]j]ujK|j]r/6j%XInstall Directoryr06r16}r26(jj-6jj+6ubaubajjubj)r36}r46(jUj}r56(j]j]j]j]j]ujj#6j]r66jX)r76}r86(jX(/edma3_lld_xx_xx_xx_xxr96jj36j j3jj\j}r:6(j]j]j]j]j]ujK|j]r;6j%X(/edma3_lld_xx_xx_xx_xxr<6r=6}r>6(jj96jj76ubaubajjubejjubj)r?6}r@6(jUj}rA6(j]j]j]j]j]ujj5j]rB6(j)rC6}rD6(jUj}rE6(j]j]j]j]j]ujj?6j]rF6jX)rG6}rH6(jX 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(little endian), edma3_lld_drv_sample.ae66e (big endian), edma3_lld_drv_sample.aa15fg (A15), edma3_lld_drv_sample.aem4 (M4)r6r6}r6(jj6jj6ubaubjX)r6}r6(jXedma3_lld_rm_sample.ae66 (little endian), edma3_lld_rm_sample.ae66e (big endian), edma3_lld_rm_sample.aa15fg (A15), edma3_lld_rm_sample.aem4 (M4)r6jj6j j3jj\j}r6(j]j]j]j]j]ujKj]r6j%Xedma3_lld_rm_sample.ae66 (little endian), edma3_lld_rm_sample.ae66e (big endian), edma3_lld_rm_sample.aa15fg (A15), edma3_lld_rm_sample.aem4 (M4)r6r6}r6(jj6jj6ubaubejjubejjubj)r6}r6(jUj}r6(j]j]j]j]j]ujj5j]r6(j)r6}r6(jUj}r6(j]j]j]j]j]ujj6j]r6jX)r6}r6(jX Linker Pathr6jj6j j3jj\j}r6(j]j]j]j]j]ujKj]r6j%X Linker Pathr6r6}r6(jj6jj6ubaubajjubj)r6}r6(jUj}r6(j]j]j]j]j]ujj6j]r6jX)r6}r6(jXZ r6jj6j j3jj\j}r6(j]j]j]j]j]ujKj]r6j%XZ r6r6}r6(jj6jj6ubaubajjubejjubj)r6}r6(jUj}r6(j]j]j]j]j]ujj5j]r6(j)r6}r6(jUj}r6(j]j]j]j]j]ujj6j]r6jX)r6}r6(jX Include Pathsr6jj6j j3jj\j}r6(j]j]j]j]j]ujKj]r6j%X Include Pathsr6r6}r6(jj6jj6ubaubajjubj)r6}r6(jUj}r6(j]j]j]j]j]ujj6j]r6jX)r6}r6(jX$ r6jj6j j3jj\j}r6(j]j]j]j]j]ujKj]r6j%X$ r6r6}r6(jj6jj6ubaubajjubejjubj)r6}r6(jUj}r6(j]j]j]j]j]ujj5j]r6(j)r6}r6(jUj}r6(j]j]j]j]j]ujj6j]r6jX)r6}r6(jXReference Guidesr6jj6j j3jj\j}r6(j]j]j]j]j]ujKj]r6j%XReference Guidesr6r6}r6(jj6jj6ubaubajjubj)r6}r6(jUj}r6(j]j]j]j]j]ujj6j]r6jX)r6}r6(jX See docs under install directoryr6jj6j j3jj\j}r6(j]j]j]j]j]ujKj]r6j%X See docs under install directoryr6r6}r6(jj6jj6ubaubajjubejjubj)r6}r6(jUj}r6(j]j]j]j]j]ujj5j]r6(j)r6}r6(jUj}r6(j]j]j]j]j]ujj6j]r6jX)r6}r6(jXAdditional Resourcesr6jj6j j3jj\j}r6(j]j]j]j]j]ujKj]r6j%XAdditional Resourcesr6r6}r6(jj6jj6ubaubajjubj)r6}r7(jUj}r7(j]j]j]j]j]ujj6j]r7jX)r7}r7(jX6Programming the EDMA3 using the Low-Level Driver (LLD)r7jj6j j3jj\j}r7(j]j]j]j]j]ujKj]r7j%X6Programming the EDMA3 using the Low-Level Driver (LLD)r7r 7}r 7(jj7jj7ubaubajjubejjubj)r 7}r 7(jUj}r 7(j]j]j]j]j]ujj5j]r7(j)r7}r7(jUj}r7(j]j]j]j]j]ujj 7j]r7jX)r7}r7(jXLicenser7jj7j j3jj\j}r7(j]j]j]j]j]ujKj]r7j%XLicenser7r7}r7(jj7jj7ubaubajjubj)r7}r7(jUj}r7(j]j]j]j]j]ujj 7j]r7jX)r7}r 7(jXBSDr!7jj7j j3jj\j}r"7(j]j]j]j]j]ujKj]r#7j%XBSDr$7r%7}r&7(jj!7jj7ubaubajjubejjubejjubejjubaubj)r'7}r(7(jUjjP4j j3jjj}r)7(j]j]j]j]j]ujKjhj]r*7j)r+7}r,7(jUjKjj'7j j3jjj}r-7(j]j]j]j]j]ujKjhj]ubaubeubeubj j3jjj}r.7(j]r/7Xoverviewr07aj]j]j]r17Uid54r27aj]ujKjhj]r37(j)r47}r57(jXOverviewr67jj3j j3jj"j}r77(j]j]j]j]j]ujKjhj]r87j%XOverviewr97r:7}r;7(jj67jj47ubaubj)r<7}r=7(jUjKjj3j j3jjj}r>7(j]r?7X introductionr@7aj]j]j]rA7Uid55rB7aj]ujKjhj]rC7(j)rD7}rE7(jX IntroductionrF7jj<7j j3jj"j}rG7(j]j]j]j]j]ujKjhj]rH7j%X IntroductionrI7rJ7}rK7(jjF7jjD7ubaubjX)rL7}rM7(jXEDMA3 Low Level Driver is targeted to device drivers and applications for submitting and synchronizing EDMA3-based DMA transfers.rN7jj<7j j3jj\j}rO7(j]j]j]j]j]ujK jhj]rP7j%XEDMA3 Low Level Driver is targeted to device drivers and applications for submitting and synchronizing EDMA3-based DMA transfers.rQ7rR7}rS7(jjN7jjL7ubaubjX)rT7}rU7(jXEDMA3 is a peripheral that supports data transfers between two memory mapped devices. It supports EDMA as well as QDMA channels for data transfer.rV7jj<7j j3jj\j}rW7(j]j]j]j]j]ujK jhj]rX7j%XEDMA3 is a peripheral that supports data transfers between two memory mapped devices. It supports EDMA as well as QDMA channels for data transfer.rY7rZ7}r[7(jjV7jjT7ubaubjX)r\7}r]7(jXThe EDMA3 LLD consists of an EDMA3 Driver and EDMA3 Resource Manager. The **EDMA3 Driver** provides functionality that allows device drivers and applications for submitting and synchronizing with EDMA3 based DMA transfers. In order to simplify the usage, this component internally uses the services of the **EDMA3 Resource Manager** and provides one consistent interface for applications or device drivers.jj<7j j3jj\j}r^7(j]j]j]j]j]ujKjhj]r_7(j%XJThe EDMA3 LLD consists of an EDMA3 Driver and EDMA3 Resource Manager. The r`7ra7}rb7(jXJThe EDMA3 LLD consists of an EDMA3 Driver and EDMA3 Resource Manager. The jj\7ubj|)rc7}rd7(jX**EDMA3 Driver**j}re7(j]j]j]j]j]ujj\7j]rf7j%X EDMA3 Driverrg7rh7}ri7(jUjjc7ubajjubj%X provides functionality that allows device drivers and applications for submitting and synchronizing with EDMA3 based DMA transfers. In order to simplify the usage, this component internally uses the services of the rj7rk7}rl7(jX provides functionality that allows device drivers and applications for submitting and synchronizing with EDMA3 based DMA transfers. In order to simplify the usage, this component internally uses the services of the jj\7ubj|)rm7}rn7(jX**EDMA3 Resource Manager**j}ro7(j]j]j]j]j]ujj\7j]rp7j%XEDMA3 Resource Managerrq7rr7}rs7(jUjjm7ubajjubj%XJ and provides one consistent interface for applications or device drivers.rt7ru7}rv7(jXJ and provides one consistent interface for applications or device drivers.jj\7ubeubeubeubj j3jj?j}rw7(j]UlevelKj]j]rx7j27aUsourcej3j]j]UlineKUtypejAujKjhj]ry7jX)rz7}r{7(jX+Duplicate implicit target name: "overview".j}r|7(j]j]j]j]j]ujj3j]r}7j%X+Duplicate implicit target name: "overview".r~7r7}r7(jUjjz7ubajj\ubaubh)r7}r7(jUjj<7j j3jj?j}r7(j]UlevelKj]j]r7jB7aUsourcej3j]j]UlineKUtypejAujKjhj]r7jX)r7}r7(jX/Duplicate implicit target name: "introduction".j}r7(j]j]j]j]j]ujj7j]r7j%X/Duplicate implicit target name: "introduction".r7r7}r7(jUjj7ubajj\ubaubh)r7}r7(jUjj3j j3jj?j}r7(j]UlevelKj]j]r7j3aUsourcej3j]j]UlineKUtypejAujKjhj]r7jX)r7}r7(jX1Duplicate implicit target name: "user interface".j}r7(j]j]j]j]j]ujj7j]r7j%X1Duplicate implicit target name: "user interface".r7r7}r7(jUjj7ubajj\ubaubh)r7}r7(jUjj3j j3jj?j}r7(j]UlevelKj]j]r7j3aUsourcej3j]j]UlineKUtypejAujKjhj]r7jX)r7}r7(jX7Duplicate implicit target name: "driver configuration".j}r7(j]j]j]j]j]ujj7j]r7j%X7Duplicate implicit target name: "driver configuration".r7r7}r7(jUjj7ubajj\ubaubh)r7}r7(jUjj3j j3jj?j}r7(j]UlevelKj]j]r7j3aUsourcej3j]j]UlineK+UtypejAujK+jhj]r7jX)r7}r7(jX'Duplicate implicit target name: "apis".j}r7(j]j]j]j]j]ujj7j]r7j%X'Duplicate implicit target name: "apis".r7r7}r7(jUjj7ubajj\ubaubh)r7}r7(jUjj$4j j3jj?j}r7(j]UlevelKj]j]r7j)4aUsourcej3j]j]UlineK:UtypejAujK:jhj]r7jX)r7}r7(jX&Duplicate implicit target name: "faq".j}r7(j]j]j]j]j]ujj7j]r7j%X&Duplicate implicit target name: "faq".r7r7}r7(jUjj7ubajj\ubaubh)r7}r7(jUjjP4j j3jj?j}r7(j]UlevelKj]j]r7jV4aUsourcej3j]j]UlineKCUtypejAujKCjhj]r7jX)r7}r7(jX8Duplicate implicit target name: "additional references".j}r7(j]j]j]j]j]ujj7j]r7j%X8Duplicate implicit target name: "additional references".r7r7}r7(jUjj7ubajj\ubaubh)r7}r7(jUjj)r7}r7(jUjKjj)r7}r7(jUjhj j jjj}r7(j]j]j]j]r7U icss-emacr7aj]r7hFaujK9jhj]r7(j)r7}r7(jX ICSS-EMACr7jj7j j jj"j}r7(j]j]j]j]j]ujK9jhj]r7j%X ICSS-EMACr7r7}r7(jj7jj7ubaubj7j)r7}r7(jUjKjj7j j,XIsource/rtos/PDK_Platform_Software/Device_Drivers/ICSS_EMAC_LLD_FW.rst.incr7r7}r7bjjj}r7(j]r7Xuser interfacer7aj]j]j]r7Uid62r7aj]ujK/jhj]r7(j)r7}r7(jXUser Interfacer7jj7j j7jj"j}r7(j]j]j]j]j]ujK/jhj]r7j%XUser Interfacer7r7}r7(jj7jj7ubaubj)r7}r7(jUjKjj7j j7jjj}r7(j]r7Xdriver configurationr7aj]j]j]r7Uid63r7aj]ujK2jhj]r7(j)r7}r7(jXDriver Configurationr7jj7j j7jj"j}r7(j]j]j]j]j]ujK2jhj]r7j%XDriver Configurationr7r7}r7(jj7jj7ubaubj)r7}r8(jUjj7j j7jjj}r8(j]j]j]j]j]ujK4jhj]r8(j)r8}r8(jX **Board Specific Configuration**r8jKjj7j j7jjj}r8(j]j]j]j]j]ujK4jhj]r8j|)r8}r 8(jj8j}r 8(j]j]j]j]j]ujj8j]r 8j%XBoard Specific Configurationr 8r 8}r8(jUjj8ubajjubaubj)r8}r8(jXAll the board specific configurations eg: enabling clock and pin-mux for GPIO/MDIP/IEP pins should be performed before calling any driver APIs. By default Board_Init() API supports all initialization sequence for TI supported EVMs. In addition it initializes UART instance for Console/STDIO.Refer `Processor SDK RTOS Board Support `__ for additional details.Once board specific configuration is complete driver APIS can be invoked.jKjj7j j7jjj}r8(j]j]j]j]j]ujK`__j}r8(UnameX Processor SDK RTOS Board SupportjXindex_board.html#board-supportj]j]j]j]j]ujj8j]r8j%X Processor SDK RTOS Board Supportr8r8}r8(jUjj8ubajjubj%Xa for additional details.Once board specific configuration is complete driver APIS can be invoked.r8r8}r8(jXa for additional details.Once board specific configuration is complete driver APIS can be invoked.jj8ubeubeubj)r 8}r!8(jUjj7j j7jjj}r"8(j]j]j]j]j]ujK>jhj]r#8(j)r$8}r%8(jUjKjj 8j j7jjj}r&8(j]j]j]j]j]ujKjhj]ubj)r'8}r(8(jX%**ICSS_EMAC Configuration Structure**r)8jKjj 8j j7jjj}r*8(j]j]j]j]j]ujK?jhj]r+8j|)r,8}r-8(jj)8j}r.8(j]j]j]j]j]ujj'8j]r/8j%X!ICSS_EMAC Configuration Structurer08r18}r28(jUjj,8ubajjubaubj)r38}r48(jXThe icss_emacSoc.c file contains the declaration of the hardware attributes corresponding to the ICSS_EMAC subsystem. Hardware attributes includes base address of various sub-subsystems required by the the ICSS_EMAC LLD. This configuration is required and needs to be passed in as part of the ICSS_EMAC Handle when calling the icss_emacInit API. For details about individual fields of this structure, see the Doxygen help by opening PDK_INSTALL_DIR\\packages\\ti\\drv\\icss_emac\\docs\\doxygen\\html\\index.html.jKjj 8j j7jjj}r58(j]j]j]j]j]ujKGjhj]r68j%XThe icss_emacSoc.c file contains the declaration of the hardware attributes corresponding to the ICSS_EMAC subsystem. Hardware attributes includes base address of various sub-subsystems required by the the ICSS_EMAC LLD. This configuration is required and needs to be passed in as part of the ICSS_EMAC Handle when calling the icss_emacInit API. For details about individual fields of this structure, see the Doxygen help by opening PDK_INSTALL_DIR\packages\ti\drv\icss_emac\docs\doxygen\html\index.html.r78r88}r98(jXThe icss_emacSoc.c file contains the declaration of the hardware attributes corresponding to the ICSS_EMAC subsystem. Hardware attributes includes base address of various sub-subsystems required by the the ICSS_EMAC LLD. This configuration is required and needs to be passed in as part of the ICSS_EMAC Handle when calling the icss_emacInit API. For details about individual fields of this structure, see the Doxygen help by opening PDK_INSTALL_DIR\\packages\\ti\\drv\\icss_emac\\docs\\doxygen\\html\\index.html.jj38ubaubeubj)r:8}r;8(jUjj7j j7jjj}r<8(j]j]j]j]j]ujKIjhj]r=8j)r>8}r?8(jUjKjj:8j j7jjj}r@8(j]j]j]j]j]ujKjhj]ubaubeubj)rA8}rB8(jUjKjj7j j7jjj}rC8(j]rD8XapisrE8aj]j]j]rF8Uid64rG8aj]ujKLjhj]rH8(j)rI8}rJ8(jXAPIsrK8jjA8j j7jj"j}rL8(j]j]j]j]j]ujKLjhj]rM8j%XAPIsrN8rO8}rP8(jjK8jjI8ubaubjX)rQ8}rR8(jXAPI reference for application:rS8jjA8j j7jj\j}rT8(j]j]j]j]j]ujKNjhj]rU8j%XAPI reference for application:rV8rW8}rX8(jjS8jjQ8ubaubj#)rY8}rZ8(jX*#include jjA8j j7jj&j}r[8(j2j3j]j]j]j]j]ujMq jhj]r\8j%X*#include r]8r^8}r_8(jUjjY8ubaubjb)r`8}ra8(jX API Call Flowrb8jKjjA8j j7jjfj}rc8(j]rd8Uid65re8aj]j]rf8X api-call-flowrg8aj]j]ujNjhj]rh8j%X API Call Flowri8rj8}rk8(jjb8jj`8ubaubjX)rl8}rm8(jXThe below sequence indicates the calling sequence of ICSS_EMAC driver APIs for a use case of an EMAC example which implements single Ethernet MAC using PRU-ICSS Instance 2, ETH0. For additional details refer example inside packagern8jjA8j j7jj\j}ro8(j]j]j]j]j]ujKWjhj]rp8j%XThe below sequence indicates the calling sequence of ICSS_EMAC driver APIs for a use case of an EMAC example which implements single Ethernet MAC using PRU-ICSS Instance 2, ETH0. For additional details refer example inside packagerq8rr8}rs8(jjn8jjl8ubaubj#)rt8}ru8(jXe... Board_init(cfg); /* Perform MDIO init */ ICSS_EMAC_testMdioInit(CSL_MPU_PRUSS2_U_MII_MDIO_REGS);jjA8j j7jj&j}rv8(j2j3j]j]j]j]j]ujM} jhj]rw8j%Xe... Board_init(cfg); /* Perform MDIO init */ ICSS_EMAC_testMdioInit(CSL_MPU_PRUSS2_U_MII_MDIO_REGS);rx8ry8}rz8(jUjjt8ubaubj#)r{8}r|8(jXc/* Create handle for PRUICSS instance*/ ICSS_EMAC_testPruIcssHandle2= PRUICSS_create(pruss_config,2); /* Setup crossbar configuration to receive PRU-ICSS interrupts and map them to A15 (illustration for PRU2ETH0) */ CSL_xbarDspIrqConfigure(..); /* Link ISR */ CSL_xbarDspIrqConfigure(..); /* RX PKT ISR */ CSL_xbarDspIrqConfigure(..); /* TX PKT ISR */jjA8j j7jj&j}r}8(j2j3j]j]j]j]j]ujM jhj]r~8j%Xc/* Create handle for PRUICSS instance*/ ICSS_EMAC_testPruIcssHandle2= PRUICSS_create(pruss_config,2); /* Setup crossbar configuration to receive PRU-ICSS interrupts and map them to A15 (illustration for PRU2ETH0) */ CSL_xbarDspIrqConfigure(..); /* Link ISR */ CSL_xbarDspIrqConfigure(..); /* RX PKT ISR */ CSL_xbarDspIrqConfigure(..); /* TX PKT ISR */r8r8}r8(jUjj{8ubaubj#)r8}r8(jX/*Initialize driver */ ... ICSS_EmacInit(..); /* Register callbacks for RX/TX, Link Interrupts, these are called in context of ISR */ ICSS_EmacRegisterPort0ISRCallback(..); ICSS_EmacRegisterHwIntRx(..); ICSS_EmacRegisterHwIntTx(..);jjA8j j7jj&j}r8(j2j3j]j]j]j]j]ujM jhj]r8j%X/*Initialize driver */ ... ICSS_EmacInit(..); /* Register callbacks for RX/TX, Link Interrupts, these are called in context of ISR */ ICSS_EmacRegisterPort0ISRCallback(..); ICSS_EmacRegisterHwIntRx(..); ICSS_EmacRegisterHwIntTx(..);r8r8}r8(jUjj8ubaubj#)r8}r8(jXY/* Enable interrupts for RX/TX/Link*/ ICSS_EMAC_testInterruptInit(ICSS_EMAC_testHandle2);jjA8j j7jj&j}r8(j2j3j]j]j]j]j]ujM jhj]r8j%XY/* Enable interrupts for RX/TX/Link*/ ICSS_EMAC_testInterruptInit(ICSS_EMAC_testHandle2);r8r8}r8(jUjj8ubaubj#)r8}r8(jXY/* Enable Link Interrupt in MDIO sub-system */ ICSS_EMAC_testMdioEnableLinkInterrupt(..);jjA8j j7jj&j}r8(j2j3j]j]j]j]j]ujM jhj]r8j%XY/* Enable Link Interrupt in MDIO sub-system */ ICSS_EMAC_testMdioEnableLinkInterrupt(..);r8r8}r8(jUjj8ubaubj#)r8}r8(jXH/* At this point, ICSS_EMAC LLD APIs can be called */ jjA8j j7jj&j}r8(j2j3j]j]j]j]j]ujM jhj]r8j%XH/* At this point, ICSS_EMAC LLD APIs can be called */ r8r8}r8(jUjj8ubaubjb)r8}r8(jXFirmwarer8jKjjA8j j7jjfj}r8(j]r8Uid66r8aj]j]r8j!aj]j]ujNjhj]r8j%XFirmwarer8r8}r8(jj8jj8ubaubjX)r8}r8(jXFTI PRU-ICSS cores (Programmable Real-Time Unit Industrial Communication Subsystem) is firmware programmable and can take on various personalities. Examples include an SORTE, ethernet Switch, Industrial protocol switch. Please refer to `ICSS-EMAC Firmwares `__ for further explanation.jjA8j j7jj\j}r8(j]j]j]j]j]ujKjhj]r8(j%XTI PRU-ICSS cores (Programmable Real-Time Unit Industrial Communication Subsystem) is firmware programmable and can take on various personalities. Examples include an SORTE, ethernet Switch, Industrial protocol switch. Please refer to r8r8}r8(jXTI PRU-ICSS cores (Programmable Real-Time Unit Industrial Communication Subsystem) is firmware programmable and can take on various personalities. Examples include an SORTE, ethernet Switch, Industrial protocol switch. Please refer to jj8ubj)r8}r8(jXB`ICSS-EMAC Firmwares `__j}r8(UnameXICSS-EMAC FirmwaresjX(index_pru_icss_fw.html#pru-icss-firmwarej]j]j]j]j]ujj8j]r8j%XICSS-EMAC Firmwaresr8r8}r8(jUjj8ubajjubj%X for further explanation.r8r8}r8(jX for further explanation.jj8ubeubj)r8}r8(jUjjA8j j7jjj}r8(j]j]j]j]j]ujKjhj]r8j)r8}r8(jUjKjj8j j7jjj}r8(j]j]j]j]j]ujKjhj]ubaubeubeubj)r8}r8(jUjKjj7j j7jjj}r8(j]r8X applicationr8aj]j]j]r8Uid67r8aj]ujKjhj]r8(j)r8}r8(jX Applicationr8jj8j j7jj"j}r8(j]j]j]j]j]ujKjhj]r8j%X Applicationr8r8}r8(jj8jj8ubaubj)r8}r8(jUjKjj8j j7jjj}r8(j]r8Xexamplesr8aj]j]j]r8Uid68r8aj]ujKjhj]r8(j)r8}r8(jXExamplesr8jj8j j7jj"j}r8(j]j]j]j]j]ujKjhj]r8j%XExamplesr8r8}r8(jj8jj8ubaubjX)r8}r8(jXRefer “ICSS_EMAC_Example__Testproject” for additional reference. Refer Release Note for ICSS_EMAC supported on different EVMs.r8jj8j j7jj\j}r8(j]j]j]j]j]ujKjhj]r8j%XRefer “ICSS_EMAC_Example__Testproject” for additional reference. Refer Release Note for ICSS_EMAC supported on different EVMs.r8r8}r8(jj8jj8ubaubj)r8}r8(jUjj8j j7jjj}r8(j]j]j]j]j]ujNjhj]r8j)r8}r8(jUj}r8(j]j]j]j]j]UcolsKujj8j]r8(j)r8}r8(jUj}r8(j]j]j]j]j]UcolwidthKujj8j]jjubj)r8}r8(jUj}r8(j]j]j]j]j]UcolwidthKujj8j]jjubj)r8}r8(jUj}r8(j]j]j]j]j]UcolwidthKujj8j]jjubj)r8}r8(jUj}r8(j]j]j]j]j]UcolwidthKujj8j]jjubj)r8}r8(jUj}r8(j]j]j]j]j]ujj8j]r9j)r9}r9(jUj}r9(j]j]j]j]j]ujj8j]r9(j)r9}r9(jUj}r9(j]j]j]j]j]ujj9j]r9j)r 9}r 9(jUj}r 9(j]j]j]j]j]ujj9j]r 9j)r 9}r9(jXNamer9jKjj 9j j7jjj}r9(j]j]j]j]j]ujKj]r9j%XNamer9r9}r9(jj9jj 9ubaubajjubajjubj)r9}r9(jUj}r9(j]j]j]j]j]ujj9j]r9j)r9}r9(jUj}r9(j]j]j]j]j]ujj9j]r9j)r9}r9(jX Descriptionr9jKjj9j j7jjj}r 9(j]j]j]j]j]ujKj]r!9j%X Descriptionr"9r#9}r$9(jj9jj9ubaubajjubajjubj)r%9}r&9(jUj}r'9(j]j]j]j]j]ujj9j]r(9j)r)9}r*9(jUj}r+9(j]j]j]j]j]ujj%9j]r,9j)r-9}r.9(jXEVM Configurationr/9jKjj)9j j7jjj}r09(j]j]j]j]j]ujKj]r19j%XEVM Configurationr29r39}r49(jj/9jj-9ubaubajjubajjubj)r59}r69(jUj}r79(j]j]j]j]j]ujj9j]r89j)r99}r:9(jUj}r;9(j]j]j]j]j]ujj59j]r<9j)r=9}r>9(jXExpected Resultsr?9jKjj99j j7jjj}r@9(j]j]j]j]j]ujKj]rA9j%XExpected ResultsrB9rC9}rD9(jj?9jj=9ubaubajjubajjubejjubajjubj)rE9}rF9(jUj}rG9(j]j]j]j]j]ujj8j]rH9(j)rI9}rJ9(jUj}rK9(j]j]j]j]j]ujjE9j]rL9(j)rM9}rN9(jUj}rO9(j]j]j]j]j]ujjI9j]rP9jX)rQ9}rR9(jXICSS_EMAC_Basic ExamplerS9jjM9j j7jj\j}rT9(j]j]j]j]j]ujKj]rU9j%XICSS_EMAC_Basic ExamplerV9rW9}rX9(jjS9jjQ9ubaubajjubj)rY9}rZ9(jUj}r[9(j]j]j]j]j]ujjI9j]r\9(jX)r]9}r^9(jX)EMAC Loopback test at PRU-ICSS EMAC PHY.r_9jjY9j j7jj\j}r`9(j]j]j]j]j]ujKj]ra9j%X)EMAC Loopback test at PRU-ICSS EMAC PHY.rb9rc9}rd9(jj_9jj]9ubaubj)re9}rf9(jUj}rg9(j]j]j]j]j]ujjY9j]rh9j)ri9}rj9(jXExample demonstrates loopback capability by sending dummy broadcast packet to PRU-ICSS instance 2, ethernet port 0 (PRU ETH0). Unit test registers receive packet callback routine with LLD to be called for RX packet. Call back routine will extract packet received, perform simple memory comparison against packet sent for integrity check. Unit test will iterate 10 times for packet transmission and reception check.rk9jKjje9j j7jjj}rl9(j]j]j]j]j]ujKj]rm9j%XExample demonstrates loopback capability by sending dummy broadcast packet to PRU-ICSS instance 2, ethernet port 0 (PRU ETH0). Unit test registers receive packet callback routine with LLD to be called for RX packet. Call back routine will extract packet received, perform simple memory comparison against packet sent for integrity check. Unit test will iterate 10 times for packet transmission and reception check.rn9ro9}rp9(jjk9jji9ubaubajjubejjubj)rq9}rr9(jUj}rs9(j]j]j]j]j]ujjI9j]rt9jX)ru9}rv9(jX10/100 Mb/s loopback cablerw9jjq9j j7jj\j}rx9(j]j]j]j]j]ujKj]ry9j%X10/100 Mb/s loopback cablerz9r{9}r|9(jjw9jju9ubaubajjubj)r}9}r~9(jUj}r9(j]j]j]j]j]ujjI9j]r9jX)r9}r9(jX>Unit Test will print ^All tests have passed^ via UART console.r9jj}9j j7jj\j}r9(j]j]j]j]j]ujKj]r9j%X>Unit Test will print ^All tests have passed^ via UART console.r9r9}r9(jj9jj9ubaubajjubejjubj)r9}r9(jUj}r9(j]j]j]j]j]ujjE9j]r9(j)r9}r9(jUj}r9(j]j]j]j]j]ujj9j]r9jX)r9}r9(jXICSS_EMAC_Switc hExampler9jj9j j7jj\j}r9(j]j]j]j]j]ujKj]r9j%XICSS_EMAC_Switc hExampler9r9}r9(jj9jj9ubaubajjubj)r9}r9(jUj}r9(j]j]j]j]j]ujj9j]r9(jX)r9}r9(jX+Switch Loopback test at PRU-ICSS EMAC PHY.r9jj9j j7jj\j}r9(j]j]j]j]j]ujKj]r9j%X+Switch Loopback test at PRU-ICSS EMAC PHY.r9r9}r9(jj9jj9ubaubj)r9}r9(jUj}r9(j]j]j]j]j]ujj9j]r9j)r9}r9(jXExample demonstrates switch learning loopback capability by sending dummy broadcast packet to PRU-ICSS instance, ethernet port. Unit test registers receive packet callback routine with LLD to be called for RX packet. Call back routine will extract packet received, perform simple memory comparison against packet sent for integrity check. As with switch for every 1 transmitted packet, firmware will respond back with 2 recieved packets. Unit test will iterate 10 times for packet transmission and reception check.r9jKjj9j j7jjj}r9(j]j]j]j]j]ujKj]r9j%XExample demonstrates switch learning loopback capability by sending dummy broadcast packet to PRU-ICSS instance, ethernet port. Unit test registers receive packet callback routine with LLD to be called for RX packet. Call back routine will extract packet received, perform simple memory comparison against packet sent for integrity check. As with switch for every 1 transmitted packet, firmware will respond back with 2 recieved packets. Unit test will iterate 10 times for packet transmission and reception check.r9r9}r9(jj9jj9ubaubajjubejjubj)r9}r9(jUj}r9(j]j]j]j]j]ujj9j]r9jX)r9}r9(jX100 Mb/s loopback cabler9jj9j j7jj\j}r9(j]j]j]j]j]ujKj]r9j%X100 Mb/s loopback cabler9r9}r9(jj9jj9ubaubajjubj)r9}r9(jUj}r9(j]j]j]j]j]ujj9j]r9jX)r9}r9(jX>Unit Test will print ^All tests have passed^ via UART console.r9jj9j j7jj\j}r9(j]j]j]j]j]ujKj]r9j%X>Unit Test will print ^All tests have passed^ via UART console.r9r9}r9(jj9jj9ubaubajjubejjubejjubejjubaubj)r9}r9(jUjj8j j7jjj}r9(j]j]j]j]j]ujMjhj]r9j)r9}r9(jUjKjj9j j7jjj}r9(j]j]j]j]j]ujKjhj]ubaubeubeubj)r9}r9(jUjj7j j7jjj}r9(j]j]j]j]r9U debug-guider9aj]r9h+aujM jhj]r9(j)r9}r9(jX Debug Guider9jj9j j7jj"j}r9(j]j]j]j]j]ujM jhj]r9j%X Debug Guider9r9}r9(jj9jj9ubaubjX)r9}r9(jXFor debugging ICSS EMAC examples or LLD. Please refer to `ICSS-EMAC Debug Guide `__.jj9j j7jj\j}r9(j]j]j]j]j]ujM jhj]r9(j%X9For debugging ICSS EMAC examples or LLD. Please refer to r9r9}r9(jX9For debugging ICSS EMAC examples or LLD. Please refer to jj9ubj)r9}r9(jX]`ICSS-EMAC Debug Guide `__j}r9(UnameXICSS-EMAC Debug GuidejXAhttp://processors.wiki.ti.com/index.php/ICSS_EMAC_LLD_debug_guidej]j]j]j]j]ujj9j]r9j%XICSS-EMAC Debug Guider9r9}r9(jUjj9ubajjubj%X.r9}r9(jX.jj9ubeubeubj)r9}r9(jUjKjj7j j7jjj}r9(j]r9Xadditional referencesr9aj]j]j]r9Uid69r9aj]ujMjhj]r9(j)r9}r9(jXAdditional Referencesr9jj9j j7jj"j}r9(j]j]j]j]j]ujMjhj]r9j%XAdditional Referencesr9r9}r9(jj9jj9ubaubj)r9}r:(jUjj9j j7jjj}r:(j]j]j]j]j]ujNjhj]r:j)r:}r:(jUj}r:(j]j]j]j]j]UcolsKujj9j]r:(j)r:}r:(jUj}r :(j]j]j]j]j]UcolwidthK#ujj:j]jjubj)r :}r :(jUj}r :(j]j]j]j]j]UcolwidthK*ujj:j]jjubj)r :}r:(jUj}r:(j]j]j]j]j]ujj:j]r:(j)r:}r:(jUj}r:(j]j]j]j]j]ujj :j]r:(j)r:}r:(jUj}r:(j]j]j]j]j]ujj:j]r:jX)r:}r:(jX **Document**r:jj:j j7jj\j}r:(j]j]j]j]j]ujMj]r:j|)r:}r:(jj:j}r :(j]j]j]j]j]ujj:j]r!:j%XDocumentr":r#:}r$:(jUjj:ubajjubaubajjubj)r%:}r&:(jUj}r':(j]j]j]j]j]ujj:j]r(:jX)r):}r*:(jX **Location**r+:jj%:j j7jj\j}r,:(j]j]j]j]j]ujMj]r-:j|)r.:}r/:(jj+:j}r0:(j]j]j]j]j]ujj):j]r1:j%XLocationr2:r3:}r4:(jUjj.:ubajjubaubajjubejjubj)r5:}r6:(jUj}r7:(j]j]j]j]j]ujj :j]r8:(j)r9:}r::(jUj}r;:(j]j]j]j]j]ujj5:j]r<:jX)r=:}r>:(jXAPI Reference Manualr?:jj9:j j7jj\j}r@:(j]j]j]j]j]ujMj]rA:j%XAPI Reference ManualrB:rC:}rD:(jj?:jj=:ubaubajjubj)rE:}rF:(jUj}rG:(j]j]j]j]j]ujj5:j]rH:jX)rI:}rJ:(jXV$(TI_PDK_INSTALL_DIR)\\packages\\ti \\drv\\icss_emac\\docs\\doxygen\\html\\ index.htmljjE:j j7jj\j}rK:(j]j]j]j]j]ujMj]rL:j%XN$(TI_PDK_INSTALL_DIR)\packages\ti \drv\icss_emac\docs\doxygen\html\ index.htmlrM:rN:}rO:(jXV$(TI_PDK_INSTALL_DIR)\\packages\\ti \\drv\\icss_emac\\docs\\doxygen\\html\\ index.htmljjI:ubaubajjubejjubj)rP:}rQ:(jUj}rR:(j]j]j]j]j]ujj :j]rS:(j)rT:}rU:(jUj}rV:(j]j]j]j]j]ujjP:j]rW:jX)rX:}rY:(jX Release NotesrZ:jjT:j j7jj\j}r[:(j]j]j]j]j]ujMj]r\:j%X Release Notesr]:r^:}r_:(jjZ:jjX:ubaubajjubj)r`:}ra:(jUj}rb:(j]j]j]j]j]ujjP:j]rc:jX)rd:}re:(jX[$(TI_PDK_INSTALL_DIR)\\packages\\ti \\drv\\icss_emac\\docs\\ReleaseNotes_ ICSS_EMAC_LLD.pdfjj`:j j7jj\j}rf:(j]j]j]j]j]ujMj]rg:j%XU$(TI_PDK_INSTALL_DIR)\packages\ti \drv\icss_emac\docs\ReleaseNotes_ ICSS_EMAC_LLD.pdfrh:ri:}rj:(jX[$(TI_PDK_INSTALL_DIR)\\packages\\ti \\drv\\icss_emac\\docs\\ReleaseNotes_ ICSS_EMAC_LLD.pdfjjd:ubaubajjubejjubj)rk:}rl:(jUj}rm:(j]j]j]j]j]ujj :j]rn:(j)ro:}rp:(jUj}rq:(j]j]j]j]j]ujjk:j]rr:jX)rs:}rt:(jXICSS-EMAC LLD Detailsru:jjo:j j7jj\j}rv:(j]j]j]j]j]ujMj]rw:j%XICSS-EMAC LLD Detailsrx:ry:}rz:(jju:jjs:ubaubajjubj)r{:}r|:(jUj}r}:(j]j]j]j]j]ujjk:j]r~:jX)r:}r:(jX<`[2] `__r:jj{:j j7jj\j}r:(j]j]j]j]j]ujMj]r:j)r:}r:(jj:j}r:(UnameX[2]jX1http://processors.wiki.ti.com/index.php/ICSS-EMACj]j]j]j]j]ujj:j]r:j%X[2]r:r:}r:(jUjj:ubajjubaubajjubejjubejjubejjubaubj)r:}r:(jUjj9j j7jjj}r:(j]j]j]j]j]ujM jhj]r:j)r:}r:(jUjKjj:j j7jjj}r:(j]j]j]j]j]ujKjhj]ubaubeubeubj j7jjj}r:(j]r:X introductionr:aj]j]j]r:Uid61r:aj]ujKjhj]r:(j)r:}r:(jX Introductionr:jj7j j7jj"j}r:(j]j]j]j]j]ujKjhj]r:j%X Introductionr:r:}r:(jj:jj:ubaubjX)r:}r:(jX=The ICSS_EMAC (industrial communications subsystem Ethernet Media Access Controller) driver provide APIs to transmit and receive packets with a firmware based Ethernet switch that has been implemented on TI’s PRU-ICSS (Programmable Real-Time Unit Subsystem and Industrial Communication SubSystem) 32-bit RISC cores.r:jj7j j7jj\j}r:(j]j]j]j]j]ujKjhj]r:j%X=The ICSS_EMAC (industrial communications subsystem Ethernet Media Access Controller) driver provide APIs to transmit and receive packets with a firmware based Ethernet switch that has been implemented on TI’s PRU-ICSS (Programmable Real-Time Unit Subsystem and Industrial Communication SubSystem) 32-bit RISC cores.r:r:}r:(jj:jj:ubaubj)r:}r:(jUjj7j j7jjj}r:(j]j]j]j]j]ujK jhj]r:j)r:}r:(jUjKjj:j j7jjj}r:(j]j]j]j]j]ujKjhj]ubaubjb)r:}r:(jXSoftware Architecturer:jj7j j7jjfj}r:(j]r:Usoftware-architecturer:aj]j]j]j]r:haujNjhj]r:j%XSoftware Architecturer:r:}r:(jj:jj:ubaubjX)r:}r:(jXEThe ICSS EMAC low level driver can be partitioned into the following:r:jj7j j7jj\j}r:(j]j]j]j]j]ujKjhj]r:j%XEThe ICSS EMAC low level driver can be partitioned into the following:r:r:}r:(jj:jj:ubaubj)r:}r:(jUjj7j j7jjj}r:(jX-j]j]j]j]j]ujKjhj]r:(j)r:}r:(jXDriver software running on the host processor, provides a well defined set of APIs to configure the driver, send packets to the firmware and receive packet from the firmware.jj:j j7jj j}r:(j]j]j]j]j]ujNjhj]r:jX)r:}r:(jXDriver software running on the host processor, provides a well defined set of APIs to configure the driver, send packets to the firmware and receive packet from the firmware.r:jj:j j7jj\j}r:(j]j]j]j]j]ujKj]r:j%XDriver software running on the host processor, provides a well defined set of APIs to configure the driver, send packets to the firmware and receive packet from the firmware.r:r:}r:(jj:jj:ubaubaubj)r:}r:(jXtFirmware which implements a 2 port ethernet switch supporting 802.1d @100 Mbps. This runs on the TI-PRU-ICSS cores. jj:j j7jj j}r:(j]j]j]j]j]ujNjhj]r:jX)r:}r:(jXsFirmware which implements a 2 port ethernet switch supporting 802.1d @100 Mbps. This runs on the TI-PRU-ICSS cores.r:jj:j j7jj\j}r:(j]j]j]j]j]ujKj]r:j%XsFirmware which implements a 2 port ethernet switch supporting 802.1d @100 Mbps. This runs on the TI-PRU-ICSS cores.r:r:}r:(jj:jj:ubaubaubeubj)r:}r:(jUjj7j j7jjj}r:(j]j]j]j]j]ujKjhj]r:j)r:}r:(jUjKjj:j j7jjj}r:(j]j]j]j]j]ujKjhj]ubaubjb)r:}r:(jXDriver Featuresr:jKjj7j j7jjfj}r:(j]r:Udriver-featuresr:aj]j]r:Xdriver-featuresr:aj]j]ujNjhj]r:j%XDriver Featuresr:r:}r:(jj:jj:ubaubjX)r:}r:(jX#ICSS_EMAC LLD implements following:r:jj7j j7jj\j}r:(j]j]j]j]j]ujKjhj]r:j%X#ICSS_EMAC LLD implements following:r:r:}r:(jj:jj:ubaubj)r:}r:(jUjj7j j7jjj}r:(jX-j]j]j]j]j]ujKjhj]r:(j)r:}r:(jXKRx - Copying packet received from firmware and providing it to TCP/IP stackjj:j j7jj j}r:(j]j]j]j]j]ujNjhj]r;jX)r;}r;(jXKRx - Copying packet received from firmware and providing it to TCP/IP stackr;jj:j j7jj\j}r;(j]j]j]j]j]ujKj]r;j%XKRx - Copying packet received from firmware and providing it to TCP/IP stackr;r;}r;(jj;jj;ubaubaubj)r ;}r ;(jX3Tx - Providing packet from TCP/IP stack to firmwarer ;jj:j j7jj j}r ;(j]j]j]j]j]ujNjhj]r ;jX)r;}r;(jj ;jj ;j j7jj\j}r;(j]j]j]j]j]ujK j]r;j%X3Tx - Providing packet from TCP/IP stack to firmwarer;r;}r;(jj ;jj;ubaubaubj)r;}r;(jXLearning/Forwarding Data Baser;jj:j j7jj j}r;(j]j]j]j]j]ujNjhj]r;jX)r;}r;(jj;jj;j j7jj\j}r;(j]j]j]j]j]ujK!j]r;j%XLearning/Forwarding Data Baser;r;}r ;(jj;jj;ubaubaubj)r!;}r";(jXStorm Prevention implementationr#;jj:j j7jj j}r$;(j]j]j]j]j]ujNjhj]r%;jX)r&;}r';(jj#;jj!;j j7jj\j}r(;(j]j]j]j]j]ujK"j]r);j%XStorm Prevention implementationr*;r+;}r,;(jj#;jj&;ubaubaubj)r-;}r.;(jXHost Statistics implementationr/;jj:j j7jj j}r0;(j]j]j]j]j]ujNjhj]r1;jX)r2;}r3;(jj/;jj-;j j7jj\j}r4;(j]j]j]j]j]ujK#j]r5;j%XHost Statistics implementationr6;r7;}r8;(jj/;jj2;ubaubaubj)r9;}r:;(jX#TCP/IP stack related initializationr;;jj:j j7jj j}r<;(j]j]j]j]j]ujNjhj]r=;jX)r>;}r?;(jj;;jj9;j j7jj\j}r@;(j]j]j]j]j]ujK$j]rA;j%X#TCP/IP stack related initializationrB;rC;}rD;(jj;;jj>;ubaubaubj)rE;}rF;(jXConfiguring IP addressrG;jj:j j7jj j}rH;(j]j]j]j]j]ujNjhj]rI;jX)rJ;}rK;(jjG;jjE;j j7jj\j}rL;(j]j]j]j]j]ujK%j]rM;j%XConfiguring IP addressrN;rO;}rP;(jjG;jjJ;ubaubaubj)rQ;}rR;(jXARM interrupt management jj:j j7jj j}rS;(j]j]j]j]j]ujNjhj]rT;jX)rU;}rV;(jXARM interrupt managementrW;jjQ;j j7jj\j}rX;(j]j]j]j]j]ujK&j]rY;j%XARM interrupt managementrZ;r[;}r\;(jjW;jjU;ubaubaubeubj )r];}r^;(jUjj7j j7jj j}r_;(j]j]j]j]j]ujNjhj]r`;j )ra;}rb;(jXFor details of the driver, please refer to `[1] `__ jj];j j7jj j}rc;(j]j]j]j]j]ujK*j]rd;(j )re;}rf;(jX*For details of the driver, please refer torg;jja;j j7jj j}rh;(j]j]j]j]j]ujK*j]ri;j%X*For details of the driver, please refer torj;rk;}rl;(jjg;jje;ubaubj )rm;}rn;(jUj}ro;(j]j]j]j]j]ujja;j]rp;jX)rq;}rr;(jXU`[1] `__rs;jjm;j j7jj\j}rt;(j]j]j]j]j]ujK*j]ru;j)rv;}rw;(jjs;j}rx;(UnameX[1]jXKhttp://processors.wiki.ti.com/index.php/Processor_SDK_RTOS_ICSS-EMAC-Designj]j]j]j]j]ujjq;j]ry;j%X[1]rz;r{;}r|;(jUjjv;ubajjubaubajj ubeubaubj)r};}r~;(jUjj7j j7jjj}r;(j]j]j]j]j]ujK,jhj]r;j)r;}r;(jUjKjj};j j7jjj}r;(j]j]j]j]j]ujKjhj]ubaubeubj j7jj?j}r;(j]UlevelKj]j]r;j:aUsourcej7j]j]UlineKUtypejAujKjhj]r;jX)r;}r;(jX/Duplicate implicit target name: "introduction".j}r;(j]j]j]j]j]ujj7j]r;j%X/Duplicate implicit target name: "introduction".r;r;}r;(jUjj;ubajj\ubaubh)r;}r;(jUjj7j j7jj?j}r;(j]UlevelKj]j]r;j7aUsourcej7j]j]UlineK/UtypejAujK/jhj]r;jX)r;}r;(jX1Duplicate implicit target name: "user interface".j}r;(j]j]j]j]j]ujj;j]r;j%X1Duplicate implicit target name: "user interface".r;r;}r;(jUjj;ubajj\ubaubh)r;}r;(jUjj7j j7jj?j}r;(j]UlevelKj]j]r;j7aUsourcej7j]j]UlineK2UtypejAujK2jhj]r;jX)r;}r;(jX7Duplicate implicit target name: "driver configuration".j}r;(j]j]j]j]j]ujj;j]r;j%X7Duplicate implicit target name: "driver configuration".r;r;}r;(jUjj;ubajj\ubaubh)r;}r;(jUjjA8j j7jj?j}r;(j]UlevelKj]j]r;jG8aUsourcej7j]j]UlineKLUtypejAujKLjhj]r;jX)r;}r;(jX'Duplicate implicit target name: "apis".j}r;(j]j]j]j]j]ujj;j]r;j%X'Duplicate implicit target name: "apis".r;r;}r;(jUjj;ubajj\ubaubh)r;}r;(jUj}r;(j]UlevelKj]j]r;j8aUsourcej j]j]UlineK9UtypejXujj8j]r;jX)r;}r;(jX+Duplicate explicit target name: "firmware".j}r;(j]j]j]j]j]ujj;j]r;j%X+Duplicate explicit target name: "firmware".r;r;}r;(jUjj;ubajj\ubajj?ubh)r;}r;(jUjj8j j7jj?j}r;(j]UlevelKj]j]r;j8aUsourcej7j]j]UlineKUtypejAujKjhj]r;jX)r;}r;(jX.Duplicate implicit target name: "application".j}r;(j]j]j]j]j]ujj;j]r;j%X.Duplicate implicit target name: "application".r;r;}r;(jUjj;ubajj\ubaubh)r;}r;(jUjj8j j7jj?j}r;(j]UlevelKj]j]r;j8aUsourcej7j]j]UlineKUtypejAujKjhj]r;jX)r;}r;(jX+Duplicate implicit target name: "examples".j}r;(j]j]j]j]j]ujj;j]r;j%X+Duplicate implicit target name: "examples".r;r;}r;(jUjj;ubajj\ubaubh)r;}r;(jUjj9j j7jj?j}r;(j]UlevelKj]j]r;j9aUsourcej7j]j]UlineMUtypejAujMjhj]r;jX)r;}r;(jX8Duplicate implicit target name: "additional references".j}r;(j]j]j]j]j]ujj;j]r;j%X8Duplicate implicit target name: "additional references".r;r;}r;(jUjj;ubajj\ubaubh)r;}r;(jUjj9j X`internal padding after source/rtos/PDK_Platform_Software/Device_Drivers/ICSS_EMAC_LLD_FW.rst.incr;jj?j}r;(j]UlevelKj]j]Usourcej7j]j]UlineM"UtypejujM#jhj]r;(jX)r;}r;(jX;Content block expected for the "raw" directive; none found.j}r;(j]j]j]j]j]ujj;j]r;j%X;Content block expected for the "raw" directive; none found.r;r;}r;(jUjj;ubajj\ubj#)r;}r;(jX.. raw:: html j}r;(j2j3j]j]j]j]j]ujj;j]r;j%X.. raw:: html r;r;}r;(jUjj;ubajj&ubeubh)r;}r;(jUjj)r;}r;(jUjhj j jjj}r;(j]j]j]j]r;Uprussr;aj]r;haujK?jhj]r;(j)r;}r;(jXPRUSSr<jj;j j jj"j}r<(j]j]j]j]j]ujK?jhj]r<j%XPRUSSr<r<}r<(jj<jj;ubaubj))r<}r<(jX@http://processors.wiki.ti.com/index.php/Processor_SDK_RTOS_PRUSSjj;j j,X>source/rtos/PDK_Platform_Software/Device_Drivers/PRUSS.rst.incr<r <}r <bjj0j}r <(j2j3j]j]j]j]j]ujKjhj]r <j%X@http://processors.wiki.ti.com/index.php/Processor_SDK_RTOS_PRUSSr <r<}r<(jUjj<ubaubj)r<}r<(jUjKjj;j j <jjj}r<(j]r<Xoverviewr<aj]j]j]r<Uid70r<aj]ujKjhj]r<(j)r<}r<(jXOverviewr<jj<j j <jj"j}r<(j]j]j]j]j]ujKjhj]r<j%XOverviewr<r<}r<(jj<jj<ubaubj)r <}r!<(jUjKjj<j j <jjj}r"<(j]r#<X introductionr$<aj]j]j]r%<Uid71r&<aj]ujKjhj]r'<(j)r(<}r)<(jX Introductionr*<jj <j j <jj"j}r+<(j]j]j]j]j]ujKjhj]r,<j%X Introductionr-<r.<}r/<(jj*<jj(<ubaubj)r0<}r1<(jUjj <j j <jjj}r2<(j]j]j]j]j]ujKjhj]r3<j)r4<}r5<(jXThe PRUSS (Programmable Real-Time Unit Subsystem) provides a well-defined API layer which allows applications to use the PRUSS low level driver to control  sub system.r6<jKjj0<j j <jjj}r7<(j]j]j]j]j]ujK jhj]r8<j%XThe PRUSS (Programmable Real-Time Unit Subsystem) provides a well-defined API layer which allows applications to use the PRUSS low level driver to control  sub system.r9<r:<}r;<(jj6<jj4<ubaubaubj)r<<}r=<(jUjj <j j <jjj}r><(j]j]j]j]j]ujK jhj]r?<j)r@<}rA<(jUjKjj<<j j <jjj}rB<(j]j]j]j]j]ujKjhj]ubaubjb)rC<}rD<(jXFirmwarerE<jKjj <j j <jjfj}rF<(j]rG<Uid72rH<aj]j]rI<XfirmwarerJ<aj]j]ujNjhj]rK<j%XFirmwarerL<rM<}rN<(jjE<jjC<ubaubjX)rO<}rP<(jX@The PRUSS (Programmable Real-Time Unit Subsystem) is firmware programmable and can take on various personalities. Examples include an ethernet MAC, ethernet Switch, Industrial protocol switch. For a good example, please refer to `Simple Open Real Time Ethernet Protocol (SORTE) `__jj <j j <jj\j}rQ<(j]j]j]j]j]ujKjhj]rR<(j%XThe PRUSS (Programmable Real-Time Unit Subsystem) is firmware programmable and can take on various personalities. Examples include an ethernet MAC, ethernet Switch, Industrial protocol switch. For a good example, please refer to rS<rT<}rU<(jXThe PRUSS (Programmable Real-Time Unit Subsystem) is firmware programmable and can take on various personalities. Examples include an ethernet MAC, ethernet Switch, Industrial protocol switch. For a good example, please refer to jjO<ubj)rV<}rW<(jX[`Simple Open Real Time Ethernet Protocol (SORTE) `__j}rX<(UnameX/Simple Open Real Time Ethernet Protocol (SORTE)jX%index_pru_icss_fw.html#pru-icss-sortej]j]j]j]j]ujjO<j]rY<j%X/Simple Open Real Time Ethernet Protocol (SORTE)rZ<r[<}r\<(jUjjV<ubajjubeubjb)r]<}r^<(jXDriver Featuresr_<jKjj <j j <jjfj}r`<(j]ra<Uid73rb<aj]j]rc<j:aj]j]ujNjhj]rd<j%XDriver Featuresre<rf<}rg<(jj_<jj]<ubaubj)rh<}ri<(jUjj <j j <jjj}rj<(jX-j]j]j]j]j]ujKjhj]rk<(j)rl<}rm<(jX3PRU control features i.e enable/disable/reset a PRUrn<jjh<j j <jj j}ro<(j]j]j]j]j]ujNjhj]rp<jX)rq<}rr<(jjn<jjl<j j <jj\j}rs<(j]j]j]j]j]ujKj]rt<j%X3PRU control features i.e enable/disable/reset a PRUru<rv<}rw<(jjn<jjq<ubaubaubj)rx<}ry<(jX6Helper functions i.e. load and execute firmware in PRUrz<jjh<j j <jj j}r{<(j]j]j]j]j]ujNjhj]r|<jX)r}<}r~<(jjz<jjx<j j <jj\j}r<(j]j]j]j]j]ujKj]r<j%X6Helper functions i.e. load and execute firmware in PRUr<r<}r<(jjz<jj}<ubaubaubj)r<}r<(jX*Memory mapping of PRU/L3/External memoriesr<jjh<j j <jj j}r<(j]j]j]j]j]ujNjhj]r<jX)r<}r<(jj<jj<j j <jj\j}r<(j]j]j]j]j]ujKj]r<j%X*Memory mapping of PRU/L3/External memoriesr<r<}r<(jj<jj<ubaubaubj)r<}r<(jXPRU and Host event management (i.e. map sys_evt/channel/hosts in PRU INTC generate interrupts, wait for occurrence of an event, and acknowledge interruptsjjh<j j <jj j}r<(j]j]j]j]j]ujNjhj]r<jX)r<}r<(jXPRU and Host event management (i.e. map sys_evt/channel/hosts in PRU INTC generate interrupts, wait for occurrence of an event, and acknowledge interruptsr<jj<j j <jj\j}r<(j]j]j]j]j]ujKj]r<j%XPRU and Host event management (i.e. map sys_evt/channel/hosts in PRU INTC generate interrupts, wait for occurrence of an event, and acknowledge interruptsr<r<}r<(jj<jj<ubaubaubj)r<}r<(jX.Interrupt management for A15/C66x CPU targets jjh<j j <jj j}r<(j]j]j]j]j]ujNjhj]r<jX)r<}r<(jX-Interrupt management for A15/C66x CPU targetsr<jj<j j <jj\j}r<(j]j]j]j]j]ujK j]r<j%X-Interrupt management for A15/C66x CPU targetsr<r<}r<(jj<jj<ubaubaubeubeubeubj)r<}r<(jUjKjj;j j <jjj}r<(j]r<Xuser interfacer<aj]j]j]r<Uid74r<aj]ujK#jhj]r<(j)r<}r<(jXUser Interfacer<jj<j j <jj"j}r<(j]j]j]j]j]ujK#jhj]r<j%XUser Interfacer<r<}r<(jj<jj<ubaubj)r<}r<(jUjKjj<j j <jjj}r<(j]r<Xdriver configurationr<aj]j]j]r<Uid75r<aj]ujK&jhj]r<(j)r<}r<(jXDriver Configurationr<jj<j j <jj"j}r<(j]j]j]j]j]ujK&jhj]r<j%XDriver Configurationr<r<}r<(jj<jj<ubaubjb)r<}r<(jX **Board Specific Configuration**r<jKjj<j j <jjfj}r<(j]r<Uid76r<aj]j]r<Xboard-specific-configurationr<aj]j]ujNjhj]r<j|)r<}r<(jj<j}r<(j]j]j]j]j]ujj<j]r<j%XBoard Specific Configurationr<r<}r<(jUjj<ubajjubaubjX)r<}r<(jXAll the board specific configurations like enabling the clock and pin-mux of UART/GPIO/PRUSS ICSS pins should be performed before calling any of the driver APIs.r<jj<j j <jj\j}r<(j]j]j]j]j]ujK+jhj]r<j%XAll the board specific configurations like enabling the clock and pin-mux of UART/GPIO/PRUSS ICSS pins should be performed before calling any of the driver APIs.r<r<}r<(jj<jj<ubaubj)r<}r<(jUjj<j j <jjj}r<(j]j]j]j]j]ujK/jhj]r<j)r<}r<(jUjKjj<j j <jjj}r<(j]j]j]j]j]ujKjhj]ubaubjb)r<}r<(jX!**PRUSS Configuration Structure**r<jj<j j <jjfj}r<(j]r<Upruss-configuration-structurer<aj]j]j]j]r<h aujNjhj]r<j|)r<}r<(jj<j}r<(j]j]j]j]j]ujj<j]r<j%XPRUSS Configuration Structurer<r<}r<(jUjj<ubajjubaubjX)r<}r<(jXThe pruicss_device.c file contains the declaration of the PRUICSS config structure. This structure must be provided to the driver at the time when PRUICSS_create() API is called to creat the PRUICSS_Handle. This handle is subsequently required to make any PRUSS LLD API call.r<jj<j j <jj\j}r<(j]j]j]j]j]ujK3jhj]r<j%XThe pruicss_device.c file contains the declaration of the PRUICSS config structure. This structure must be provided to the driver at the time when PRUICSS_create() API is called to creat the PRUICSS_Handle. This handle is subsequently required to make any PRUSS LLD API call.r<r<}r<(jj<jj<ubaubeubj)r<}r<(jUjKjj<j j <jjj}r=(j]r=Xapisr=aj]j]j]r=Uid77r=aj]ujK9jhj]r=(j)r=}r=(jXAPIsr=jj<j j <jj"j}r =(j]j]j]j]j]ujK9jhj]r =j%XAPIsr =r =}r =(jj=jj=ubaubjX)r=}r=(jXReference API header file:r=jj<j j <jj\j}r=(j]j]j]j]j]ujK;jhj]r=j%XReference API header file:r=r=}r=(jj=jj=ubaubj#)r=}r=(jX!#include jj<j j <jj&j}r=(j2j3j]j]j]j]j]ujM jhj]r=j%X!#include r=r=}r=(jUjj=ubaubjb)r=}r=(jX API Call Flowr=jKjj<j j <jjfj}r =(j]r!=Uid78r"=aj]j]r#=jg8aj]j]ujNjhj]r$=j%X API Call Flowr%=r&=}r'=(jj=jj=ubaubjX)r(=}r)=(jXBelow sequence indicates calling sequence of PRUSS driver APIs for a use case of sending INTC event to the PRU. Refer example code within module for additional detailsr*=jj<j j <jj\j}r+=(j]j]j]j]j]ujKDjhj]r,=j%XBelow sequence indicates calling sequence of PRUSS driver APIs for a use case of sending INTC event to the PRU. Refer example code within module for additional detailsr-=r.=}r/=(jj*=jj(=ubaubj#)r0=}r1=(jX... /* Initialize Board */ Board_init(boardCfg); /* Creates handle for PRUICSS instance */ handle = PRUICSS_create(pruss_config,instance); /* Disable PRUICSS instance */ PRUICSS_pruDisable(handle,instance ); /* Register an Interrupt Handler for an event */ PRUICSS_registerIrqHandler(handle,pruEvtoutNum,intrNum,eventNum,waitEnable,irqHandler); /* Sets the buffer pointer for PRU */ PRUICSS_setPRUBuffer(..); /* API to do Interrupt-Channel-host mapping */ PRUICSS_pruIntcInit(handle,&pruss_intc_initdata); /* Execute program on PRU */ PRUICSS_pruExecProgram(handle,0); /* Enable PRU */ PRUICSS_pruEnable(handle,0); /* Generates INTC event */ PRUICSS_pruSendEvent(handle,ARM_PRU0_EVENT);jj<j j <jj&j}r2=(j2j3j]j]j]j]j]ujM jhj]r3=j%X... /* Initialize Board */ Board_init(boardCfg); /* Creates handle for PRUICSS instance */ handle = PRUICSS_create(pruss_config,instance); /* Disable PRUICSS instance */ PRUICSS_pruDisable(handle,instance ); /* Register an Interrupt Handler for an event */ PRUICSS_registerIrqHandler(handle,pruEvtoutNum,intrNum,eventNum,waitEnable,irqHandler); /* Sets the buffer pointer for PRU */ PRUICSS_setPRUBuffer(..); /* API to do Interrupt-Channel-host mapping */ PRUICSS_pruIntcInit(handle,&pruss_intc_initdata); /* Execute program on PRU */ PRUICSS_pruExecProgram(handle,0); /* Enable PRU */ PRUICSS_pruEnable(handle,0); /* Generates INTC event */ PRUICSS_pruSendEvent(handle,ARM_PRU0_EVENT);r4=r5=}r6=(jUjj0=ubaubeubeubj)r7=}r8=(jUjKjj;j j <jjj}r9=(j]r:=X applicationr;=aj]j]j]r<=Uid79r==aj]ujKhjhj]r>=(j)r?=}r@=(jX ApplicationrA=jj7=j j <jj"j}rB=(j]j]j]j]j]ujKhjhj]rC=j%X ApplicationrD=rE=}rF=(jjA=jj?=ubaubj)rG=}rH=(jUjKjj7=j j <jjj}rI=(j]rJ=XexamplesrK=aj]j]j]rL=Uid80rM=aj]ujKkjhj]rN=(j)rO=}rP=(jXExamplesrQ=jjG=j j <jj"j}rR=(j]j]j]j]j]ujKkjhj]rS=j%XExamplesrT=rU=}rV=(jjQ=jjO=ubaubj)rW=}rX=(jUjjG=j j <jjj}rY=(j]j]j]j]j]ujNjhj]rZ=j)r[=}r\=(jUj}r]=(j]j]j]j]j]UcolsKujjW=j]r^=(j)r_=}r`=(jUj}ra=(j]j]j]j]j]UcolwidthKujj[=j]jjubj)rb=}rc=(jUj}rd=(j]j]j]j]j]UcolwidthKujj[=j]jjubj)re=}rf=(jUj}rg=(j]j]j]j]j]UcolwidthKujj[=j]jjubj)rh=}ri=(jUj}rj=(j]j]j]j]j]ujj[=j]rk=j)rl=}rm=(jUj}rn=(j]j]j]j]j]ujjh=j]ro=(j)rp=}rq=(jUj}rr=(j]j]j]j]j]ujjl=j]rs=jX)rt=}ru=(jXNamerv=jjp=j j <jj\j}rw=(j]j]j]j]j]ujKnj]rx=j%XNamery=rz=}r{=(jjv=jjt=ubaubajjubj)r|=}r}=(jUj}r~=(j]j]j]j]j]ujjl=j]r=j)r=}r=(jUj}r=(j]j]j]j]j]ujj|=j]r=j)r=}r=(jX Descriptionr=jKjj=j j <jjj}r=(j]j]j]j]j]ujKj]r=j%X Descriptionr=r=}r=(jj=jj=ubaubajjubajjubj)r=}r=(jUj}r=(j]j]j]j]j]ujjl=j]r=j)r=}r=(jUj}r=(j]j]j]j]j]ujj=j]r=j)r=}r=(jXExpected Resultsr=jKjj=j j <jjj}r=(j]j]j]j]j]ujKj]r=j%XExpected Resultsr=r=}r=(jj=jj=ubaubajjubajjubejjubajjubj)r=}r=(jUj}r=(j]j]j]j]j]ujj[=j]r=j)r=}r=(jUj}r=(j]j]j]j]j]ujj=j]r=(j)r=}r=(jUj}r=(j]j]j]j]j]ujj=j]r=jX)r=}r=(jXPRUSS_TestApplicationr=jj=j j <jj\j}r=(j]j]j]j]j]ujKpj]r=j%XPRUSS_TestApplicationr=r=}r=(jj=jj=ubaubajjubj)r=}r=(jUj}r=(j]j]j]j]j]ujj=j]r=j)r=}r=(jUj}r=(j]j]j]j]j]ujj=j]r=j)r=}r=(jXTest application is designed to ping pong an event between CPU target(A15/C66x) and PRU for a fixed count.Application is to test PRU’s load, control and Interrupt controller functionalities.r=jKjj=j j <jjj}r=(j]j]j]j]j]ujKj]r=j%XTest application is designed to ping pong an event between CPU target(A15/C66x) and PRU for a fixed count.Application is to test PRU’s load, control and Interrupt controller functionalities.r=r=}r=(jj=jj=ubaubajjubajjubj)r=}r=(jUj}r=(j]j]j]j]j]ujj=j]r=(j)r=}r=(jUj}r=(j]j]j]j]j]ujj=j]r=(j)r=}r=(jXAFollowing prints expected on console based on pass/fail criteria:r=jKjj=j j <jjj}r=(j]j]j]j]j]ujKj]r=j%XAFollowing prints expected on console based on pass/fail criteria:r=r=}r=(jj=jj=ubaubj)r=}r=(jUjKjj=j j <jjj}r=(j]j]j]j]j]ujKj]ubj)r=}r=(jX**Pass criteria:**r=jKjj=j j <jjj}r=(j]j]j]j]j]ujKj]r=j|)r=}r=(jj=j}r=(j]j]j]j]j]ujj=j]r=j%XPass criteria:r=r=}r=(jUjj=ubajjubaubejjubj)r=}r=(jUj}r=(j]j]j]j]j]ujj=j]r=j)r=}r=(jXPrints related to sending and receiving  event from PRU will be printed on  console. Test program at the end expected to output: "All tests have passed"r=jKjj=j j <jjj}r=(j]j]j]j]j]ujKj]r=j%XPrints related to sending and receiving  event from PRU will be printed on  console. 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The driver uses a volume to partition mapping technique to handle multiple storage device with multiple partition. The driver supports file operations such as open, read and wirte on to the SD/MMC card. The FATFS driver access the SD/MMC card through the PDK MMCSD driver which needs to be configured from the application as part of the FATFS_config structure. The FATFS driver is used in other PDK module application such as MMCSD, USB and SBL.r@?jj/?j j(?jj\j}rA?(j]j]j]j]j]ujKjhj]rB?j%XPDK FATFS driver provides support for both single and multiple partition on a given SD/MMC card. The driver uses a volume to partition mapping technique to handle multiple storage device with multiple partition. The driver supports file operations such as open, read and wirte on to the SD/MMC card. The FATFS driver access the SD/MMC card through the PDK MMCSD driver which needs to be configured from the application as part of the FATFS_config structure. The FATFS driver is used in other PDK module application such as MMCSD, USB and SBL.rC?rD?}rE?(jj@?jj>?ubaubjX)rF?}rG?(jXjFATFS file operation API's can be accessed from the application only after FATFS_open function is invoked.rH?jj/?j j(?jj\j}rI?(j]j]j]j]j]ujKjhj]rJ?j%XjFATFS file operation API's can be accessed from the application only after FATFS_open function is invoked.rK?rL?}rM?(jjH?jjF?ubaubj#)rN?}rO?(jX1FATFS_init(); FATFS_open(0U, NULL, &fatfsHandle);jj/?j j(?jj&j}rP?(jj Xcj2j3j]j]j]j!}j]j]ujKjhj]rQ?j%X1FATFS_init(); FATFS_open(0U, NULL, &fatfsHandle);rR?rS?}rT?(jUjjN?ubaubeubj)rU?}rV?(jUjKjj?j j(?jjj}rW?(j]rX?Xuser interfacerY?aj]j]j]rZ?Uid85r[?aj]ujK#jhj]r\?(j)r]?}r^?(jXUser Interfacer_?jjU?j j(?jj"j}r`?(j]j]j]j]j]ujK#jhj]ra?j%XUser Interfacerb?rc?}rd?(jj_?jj]?ubaubj)re?}rf?(jUjKjjU?j j(?jjj}rg?(j]rh?Xdriver configurationri?aj]j]j]rj?Uid86rk?aj]ujK&jhj]rl?(j)rm?}rn?(jXDriver Configurationro?jje?j j(?jj"j}rp?(j]j]j]j]j]ujK&jhj]rq?j%XDriver Configurationrr?rs?}rt?(jjo?jjm?ubaubjb)ru?}rv?(jX **Board Specific Configuration**rw?jKjje?j j(?jjfj}rx?(j]ry?Uid87rz?aj]j]r{?Xboard-specific-configurationr|?aj]j]ujNjhj]r}?j|)r~?}r?(jjw?j}r?(j]j]j]j]j]ujju?j]r?j%XBoard Specific Configurationr?r?}r?(jUjj~?ubajjubaubjX)r?}r?(jXAll board specific configurations eg:enabling clock and pin-mux for UART pins are required before calling any driver APIs.By default Board_Init() API supports all initialization sequence for TI supported EVMs. In addition it initializes UART instance for Console/STDIO.Refer `Processor SDK RTOS Board Support `__ for additional details.Once board specific configuration is complete FATFS_init() API can be called to initialize FATFS for the driver.jje?j j(?jj\j}r?(j]j]j]j]j]ujK+jhj]r?(j%XAll board specific configurations eg:enabling clock and pin-mux for UART pins are required before calling any driver APIs.By default Board_Init() API supports all initialization sequence for TI supported EVMs. In addition it initializes UART instance for Console/STDIO.Refer r?r?}r?(jXAll board specific configurations eg:enabling clock and pin-mux for UART pins are required before calling any driver APIs.By default Board_Init() API supports all initialization sequence for TI supported EVMs. In addition it initializes UART instance for Console/STDIO.Refer jj?ubj)r?}r?(jXE`Processor SDK RTOS Board Support `__j}r?(UnameX Processor SDK RTOS Board SupportjXindex_board.html#board-supportj]j]j]j]j]ujj?j]r?j%X Processor SDK RTOS Board Supportr?r?}r?(jUjj?ubajjubj%X for additional details.Once board specific configuration is complete FATFS_init() API can be called to initialize FATFS for the driver.r?r?}r?(jX for additional details.Once board specific configuration is complete FATFS_init() API can be called to initialize FATFS for the driver.jj?ubeubjb)r?}r?(jX!**FATFS Configuration Structure**r?jje?j j(?jjfj}r?(j]r?Ufatfs-configuration-structurer?aj]j]j]j]r?haujNjhj]r?j|)r?}r?(jj?j}r?(j]j]j]j]j]ujj?j]r?j%XFATFS Configuration Structurer?r?}r?(jUjj?ubajjubaubjX)r?}r?(jXNApplication is expected to perform driver specific configuration for FATFS_config structure. The structure supports initialization of multiple drivers for FATFS, i.e. both MMCSD and USB can be configured to use FATFS file system by configuring each driver to different drive instance. This structure must be provided to the FATFS driver. It must be initialized before the FATFS_init() function is called and cannot be changed subsequently. For details about individual fields of this structure, see the Doxygen help:PDK_INSTALL_DIR\\packages\\ti\\fs\\fatfs\\docs\\doxygen\\html\\index.html.jje?j j(?jj\j}r?(j]j]j]j]j]ujK7jhj]r?j%XFApplication is expected to perform driver specific configuration for FATFS_config structure. The structure supports initialization of multiple drivers for FATFS, i.e. both MMCSD and USB can be configured to use FATFS file system by configuring each driver to different drive instance. This structure must be provided to the FATFS driver. It must be initialized before the FATFS_init() function is called and cannot be changed subsequently. For details about individual fields of this structure, see the Doxygen help:PDK_INSTALL_DIR\packages\ti\fs\fatfs\docs\doxygen\html\index.html.r?r?}r?(jXNApplication is expected to perform driver specific configuration for FATFS_config structure. The structure supports initialization of multiple drivers for FATFS, i.e. both MMCSD and USB can be configured to use FATFS file system by configuring each driver to different drive instance. This structure must be provided to the FATFS driver. It must be initialized before the FATFS_init() function is called and cannot be changed subsequently. For details about individual fields of this structure, see the Doxygen help:PDK_INSTALL_DIR\\packages\\ti\\fs\\fatfs\\docs\\doxygen\\html\\index.html.jj?ubaubeubj)r?}r?(jUjKjjU?j j(?jjj}r?(j]r?Xapisr?aj]j]j]r?Uid88r?aj]ujKBjhj]r?(j)r?}r?(jXAPIsr?jj?j j(?jj"j}r?(j]j]j]j]j]ujKBjhj]r?j%XAPIsr?r?}r?(jj?jj?ubaubjX)r?}r?(jXxIn order to use the FATFS module APIs, the FATFS.h and ff.h header file should be included in an application as follows:r?jj?j j(?jj\j}r?(j]j]j]j]j]ujKDjhj]r?j%XxIn order to use the FATFS module APIs, the FATFS.h and ff.h header file should be included in an application as follows:r?r?}r?(jj?jj?ubaubj#)r?}r?(jX:#include #include jj?j j(?jj&j}r?(jj Xcj2j3j]j]j]j!}j]j]ujKGjhj]r?j%X:#include #include r?r?}r?(jUjj?ubaubjb)r?}r?(jX API Call Flowr?jKjj?j j(?jjfj}r?(j]r?Uid89r?aj]j]r?X api-call-flowr?aj]j]ujNjhj]r?j%X API Call Flowr?r?}r?(jj?jj?ubaubjX)r?}r?(jXCBelow sequence indicates the calling sequence of FATFS driver APIs:r?jj?j j(?jj\j}r?(j]j]j]j]j]ujKOjhj]r?j%XCBelow sequence indicates the calling sequence of FATFS driver APIs:r?r?}r?(jj?jj?ubaubj#)r?}r?(jXFATFS_Handle FATFS; FATFS_Params FATFSParams; FATFS_Params_init(&FATFSParams); FATFS = FATFS_open(peripheralNum, &FATFSParams);jj?j j(?jj&j}r?(jj Xcj2j3j]j]j]j!}j]j]ujKQjhj]r?j%XFATFS_Handle FATFS; FATFS_Params FATFSParams; FATFS_Params_init(&FATFSParams); FATFS = FATFS_open(peripheralNum, &FATFSParams);r?r?}r?(jUjj?ubaubjX)r?}r?(jXAt this point application can invoke additional FAT File system API eg: f_open(), f_write(), f_read() etc to perform file operations on devicer?jj?j j(?jj\j}r?(j]j]j]j]j]ujKZjhj]r?j%XAt this point application can invoke additional FAT File system API eg: f_open(), f_write(), f_read() etc to perform file operations on devicer?r?}r?(jj?jj?ubaubeubeubj)r?}r?(jUjKjj?j j(?jjj}r?(j]r?X applicationr?aj]j]j]r?Uid90r?aj]ujK`jhj]r?(j)r?}r?(jX Applicationr?jj?j j(?jj"j}r?(j]j]j]j]j]ujK`jhj]r?j%X Applicationr?r?}r?(jj?jj?ubaubj)r?}r?(jUjKjj?j j(?jjj}r@(j]r@Xexamplesr@aj]j]j]r@Uid91r@aj]ujKcjhj]r@(j)r@}r@(jXExamplesr@jj?j j(?jj"j}r @(j]j]j]j]j]ujKcjhj]r @j%XExamplesr @r @}r @(jj@jj@ubaubj)r@}r@(jUjj?j j(?jjj}r@(j]j]j]j]j]ujNjhj]r@j)r@}r@(jUj}r@(j]j]j]j]j]UcolsKujj@j]r@(j)r@}r@(jUj}r@(j]j]j]j]j]UcolwidthKujj@j]jjubj)r@}r@(jUj}r@(j]j]j]j]j]UcolwidthKujj@j]jjubj)r@}r@(jUj}r@(j]j]j]j]j]UcolwidthKujj@j]jjubj)r@}r @(jUj}r!@(j]j]j]j]j]UcolwidthKujj@j]jjubj)r"@}r#@(jUj}r$@(j]j]j]j]j]UcolwidthKujj@j]jjubj)r%@}r&@(jUj}r'@(j]j]j]j]j]ujj@j]r(@j)r)@}r*@(jUj}r+@(j]j]j]j]j]ujj%@j]r,@(j)r-@}r.@(jUj}r/@(j]j]j]j]j]ujj)@j]r0@jX)r1@}r2@(jXNamer3@jj-@j j(?jj\j}r4@(j]j]j]j]j]ujKfj]r5@j%XNamer6@r7@}r8@(jj3@jj1@ubaubajjubj)r9@}r:@(jUj}r;@(j]j]j]j]j]ujj)@j]r<@j)r=@}r>@(jUj}r?@(j]j]j]j]j]ujj9@j]r@@j)rA@}rB@(jX DescriptionrC@jKjj=@j j(?jjj}rD@(j]j]j]j]j]ujKj]rE@j%X DescriptionrF@rG@}rH@(jjC@jjA@ubaubajjubajjubj)rI@}rJ@(jUj}rK@(j]j]j]j]j]ujj)@j]rL@jX)rM@}rN@(jXExpected ResultsrO@jjI@j j(?jj\j}rP@(j]j]j]j]j]ujKfj]rQ@j%XExpected ResultsrR@rS@}rT@(jjO@jjM@ubaubajjubj)rU@}rV@(jUj}rW@(j]j]j]j]j]ujj)@j]rX@jX)rY@}rZ@(jXSupported SOCsr[@jjU@j j(?jj\j}r\@(j]j]j]j]j]ujKfj]r]@j%XSupported SOCsr^@r_@}r`@(jj[@jjY@ubaubajjubj)ra@}rb@(jUj}rc@(j]j]j]j]j]ujj)@j]rd@jX)re@}rf@(jX Build Typerg@jja@j j(?jj\j}rh@(j]j]j]j]j]ujKfj]ri@j%X Build Typerj@rk@}rl@(jjg@jje@ubaubajjubejjubajjubj)rm@}rn@(jUj}ro@(j]j]j]j]j]ujj@j]rp@(j)rq@}rr@(jUj}rs@(j]j]j]j]j]ujjm@j]rt@(j)ru@}rv@(jUj}rw@(j]j]j]j]j]ujjq@j]rx@jX)ry@}rz@(jXFATFS_Console_ExampleProjectr{@jju@j j(?jj\j}r|@(j]j]j]j]j]ujKhj]r}@j%XFATFS_Console_ExampleProjectr~@r@}r@(jj{@jjy@ubaubajjubj)r@}r@(jUj}r@(j]j]j]j]j]ujjq@j]r@j)r@}r@(jUj}r@(j]j]j]j]j]ujj@j]r@j)r@}r@(jX;Example will initialize card and checks for valid FAT partition. When a valid FAT partition is detected console interface for command execution is provided. Supported console commands include ls (to list files of directory), cd (change directory), pwd (present working directory) and cat (text file read operation).r@jKjj@j j(?jjj}r@(j]j]j]j]j]ujKj]r@j%X;Example will initialize card and checks for valid FAT partition. When a valid FAT partition is detected console interface for command execution is provided. Supported console commands include ls (to list files of directory), cd (change directory), pwd (present working directory) and cat (text file read operation).r@r@}r@(jj@jj@ubaubajjubajjubj)r@}r@(jUj}r@(j]j]j]j]j]ujjq@j]r@jX)r@}r@(jX^When a card is detected with valid FAT partition console interface output will indicate "0:> "r@jj@j j(?jj\j}r@(j]j]j]j]j]ujKhj]r@j%X^When a card is detected with valid FAT partition console interface output will indicate "0:> "r@r@}r@(jj@jj@ubaubajjubj)r@}r@(jUj}r@(j]j]j]j]j]ujjq@j]r@jX)r@}r@(jX"AM335x AM437x AM571x AM572x AM574xr@jj@j j(?jj\j}r@(j]j]j]j]j]ujKij]r@j%X"AM335x AM437x AM571x AM572x AM574xr@r@}r@(jj@jj@ubaubajjubj)r@}r@(jUj}r@(j]j]j]j]j]ujjq@j]r@jX)r@}r@(jX CCS Projectr@jj@j j(?jj\j}r@(j]j]j]j]j]ujKij]r@j%X CCS Projectr@r@}r@(jj@jj@ubaubajjubejjubj)r@}r@(jUj}r@(j]j]j]j]j]ujjm@j]r@(j)r@}r@(jUj}r@(j]j]j]j]j]ujj@j]r@jX)r@}r@(jXFATFS_Console_TestAppr@jj@j j(?jj\j}r@(j]j]j]j]j]ujK|j]r@j%XFATFS_Console_TestAppr@r@}r@(jj@jj@ubaubajjubj)r@}r@(jUj}r@(j]j]j]j]j]ujj@j]r@j)r@}r@(jUj}r@(j]j]j]j]j]ujj@j]r@j)r@}r@(jX Same as abover@jKjj@j j(?jjj}r@(j]j]j]j]j]ujKj]r@j%X Same as abover@r@}r@(jj@jj@ubaubajjubajjubj)r@}r@(jUj}r@(j]j]j]j]j]ujj@j]r@jX)r@}r@(jX Same as abover@jj@j j(?jj\j}r@(j]j]j]j]j]ujK|j]r@j%X Same as abover@r@}r@(jj@jj@ubaubajjubj)r@}r@(jUj}r@(j]j]j]j]j]ujj@j]r@jX)r@}r@(jXAM65xr@jj@j j(?jj\j}r@(j]j]j]j]j]ujK|j]r@j%XAM65xr@r@}r@(jj@jj@ubaubajjubj)r@}r@(jUj}r@(j]j]j]j]j]ujj@j]r@jX)r@}r@(jXMakefiler@jj@j j(?jj\j}r@(j]j]j]j]j]ujK|j]r@j%XMakefiler@r@}r@(jj@jj@ubaubajjubejjubj)r@}r@(jUj}r@(j]j]j]j]j]ujjm@j]r@(j)r@}r@(jUj}r@(j]j]j]j]j]ujj@j]rAjX)rA}rA(jX!FATFS_Console_SMP_Example ProjectrAjj@j j(?jj\j}rA(j]j]j]j]j]ujK~j]rAj%X!FATFS_Console_SMP_Example ProjectrArA}rA(jjAjjAubaubajjubj)r A}r A(jUj}r A(j]j]j]j]j]ujj@j]r Aj)r A}rA(jUj}rA(j]j]j]j]j]ujj Aj]rAj)rA}rA(jXLExample will initialize card and checks for valid FAT partition. When a valid FAT partition is detected console interface for command execution is provided. Supported console commands include ls (to list files of directory), cd (change directory), pwd (present working directory) and cat (text file read operation) with SMP enabled.rAjKjj Aj j(?jjj}rA(j]j]j]j]j]ujKj]rAj%XLExample will initialize card and checks for valid FAT partition. When a valid FAT partition is detected console interface for command execution is provided. Supported console commands include ls (to list files of directory), cd (change directory), pwd (present working directory) and cat (text file read operation) with SMP enabled.rArA}rA(jjAjjAubaubajjubajjubj)rA}rA(jUj}rA(j]j]j]j]j]ujj@j]rAjX)rA}rA(jX^When a card is detected with valid FAT partition console interface output will indicate "0:> "rAjjAj j(?jj\j}r A(j]j]j]j]j]ujK~j]r!Aj%X^When a card is detected with valid FAT partition console interface output will indicate "0:> "r"Ar#A}r$A(jjAjjAubaubajjubj)r%A}r&A(jUj}r'A(j]j]j]j]j]ujj@j]r(AjX)r)A}r*A(jXAM572x-EVM (A15 core)r+Ajj%Aj j(?jj\j}r,A(j]j]j]j]j]ujKj]r-Aj%XAM572x-EVM (A15 core)r.Ar/A}r0A(jj+Ajj)Aubaubajjubj)r1A}r2A(jUj}r3A(j]j]j]j]j]ujj@j]r4AjX)r5A}r6A(jX CCS Projectr7Ajj1Aj j(?jj\j}r8A(j]j]j]j]j]ujKj]r9Aj%X CCS Projectr:Ar;A}rA(jUj}r?A(j]j]j]j]j]ujjm@j]r@A(j)rAA}rBA(jUj}rCA(j]j]j]j]j]ujj=Aj]rDAjX)rEA}rFA(jXFATFS_Console_SMP_TestApprGAjjAAj j(?jj\j}rHA(j]j]j]j]j]ujKj]rIAj%XFATFS_Console_SMP_TestApprJArKA}rLA(jjGAjjEAubaubajjubj)rMA}rNA(jUj}rOA(j]j]j]j]j]ujj=Aj]rPAj)rQA}rRA(jUj}rSA(j]j]j]j]j]ujjMAj]rTAj)rUA}rVA(jX Same as aboverWAjKjjQAj j(?jjj}rXA(j]j]j]j]j]ujKj]rYAj%X Same as aboverZAr[A}r\A(jjWAjjUAubaubajjubajjubj)r]A}r^A(jUj}r_A(j]j]j]j]j]ujj=Aj]r`AjX)raA}rbA(jX Same as abovercAjj]Aj j(?jj\j}rdA(j]j]j]j]j]ujKj]reAj%X Same as aboverfArgA}rhA(jjcAjjaAubaubajjubj)riA}rjA(jUj}rkA(j]j]j]j]j]ujj=Aj]rlAjX)rmA}rnA(jXAM65x(A53 core)roAjjiAj j(?jj\j}rpA(j]j]j]j]j]ujKj]rqAj%XAM65x(A53 core)rrArsA}rtA(jjoAjjmAubaubajjubj)ruA}rvA(jUj}rwA(j]j]j]j]j]ujj=Aj]rxAjX)ryA}rzA(jXMakefiler{AjjuAj j(?jj\j}r|A(j]j]j]j]j]ujKj]r}Aj%XMakefiler~ArA}rA(jj{AjjyAubaubajjubejjubejjubejjubaubeubeubj)rA}rA(jUjKjj?j j(?jjj}rA(j]rAX$building ccs projects based examplesrAaj]j]j]rAU$building-ccs-projects-based-examplesrAaj]ujKjhj]rA(j)rA}rA(jX$Building CCS projects based examplesrAjjAj j(?jj"j}rA(j]j]j]j]j]ujKjhj]rAj%X$Building CCS projects based examplesrArA}rA(jjAjjAubaubjX)rA}rA(jXCCS Projects mentioned in the above table are built using pdkProjectCreate.bat/sh as explained in `PDK Example and Test Project Creation `__jjAj j(?jj\j}rA(j]j]j]j]j]ujKjhj]rA(j%XbCCS Projects mentioned in the above table are built using pdkProjectCreate.bat/sh as explained in rArA}rA(jXbCCS Projects mentioned in the above table are built using pdkProjectCreate.bat/sh as explained in jjAubj)rA}rA(jXe`PDK Example and Test Project Creation `__j}rA(UnameX%PDK Example and Test Project CreationjX9index_overview.html#pdk-example-and-test-project-creationj]j]j]j]j]ujjAj]rAj%X%PDK Example and Test Project CreationrArA}rA(jUjjAubajjubeubeubj)rA}rA(jUjj?j j(?jjj}rA(j]j]j]j]rAU.building-fatfs-test-applications-via-makefilesrAaj]rAhJaujKjhj]rA(j)rA}rA(jX.Building FATFS Test applications via makefilesrAjjAj j(?jj"j}rA(j]j]j]j]j]ujKjhj]rAj%X.Building FATFS Test applications via makefilesrArA}rA(jjAjjAubaubj)rA}rA(jUjjAj j(?jjj}rA(jX-j]j]j]j]j]ujKjhj]rA(j)rA}rA(jX\FATFSD Test applications and dependent libraries are built from the top level fatfs makefilerAjjAj j(?jj j}rA(j]j]j]j]j]ujNjhj]rAjX)rA}rA(jjAjjAj j(?jj\j}rA(j]j]j]j]j]ujKj]rAj%X\FATFSD Test applications and dependent libraries are built from the top level fatfs makefilerArA}rA(jjAjjAubaubaubj)rA}rA(jX:Refer to the `Processor SDK RTOS Getting Started Guide `__ for details of how to setup the build environment. Once you have setup the build environment, issue the following commands: - cd /packages/ - To build: make fatfs - To clean: make fatfs_clean jjAj j(?jj j}rA(j]j]j]j]j]ujNjhj]rA(jX)rA}rA(jXRefer to the `Processor SDK RTOS Getting Started Guide `__ for details of how to setup the build environment. Once you have setup the build environment, issue the following commands:jjAj j(?jj\j}rA(j]j]j]j]j]ujKj]rA(j%X Refer to the rArA}rA(jX Refer to the jjAubj)rA}rA(jXT`Processor SDK RTOS Getting Started Guide `__j}rA(UnameX(Processor SDK RTOS Getting Started GuidejX%index_overview.html#setup-environmentj]j]j]j]j]ujjAj]rAj%X(Processor SDK RTOS Getting Started GuiderArA}rA(jUjjAubajjubj%X} for details of how to setup the build environment. Once you have setup the build environment, issue the following commands:rArA}rA(jX} for details of how to setup the build environment. Once you have setup the build environment, issue the following commands:jjAubeubj )rA}rA(jUj}rA(j]j]j]j]j]ujjAj]rAj)rA}rA(jUj}rA(jX-j]j]j]j]j]ujjAj]rA(j)rA}rA(jXcd /packages/rAj}rA(j]j]j]j]j]ujjAj]rAjX)rA}rA(jjAjjAj j(?jj\j}rA(j]j]j]j]j]ujKj]rAj%Xcd /packages/rArA}rA(jjAjjAubaubajj ubj)rA}rA(jXTo build: make fatfsrAj}rA(j]j]j]j]j]ujjAj]rAjX)rA}rA(jjAjjAj j(?jj\j}rA(j]j]j]j]j]ujKj]rAj%XTo build: make fatfsrArA}rA(jjAjjAubaubajj ubj)rA}rA(jXTo clean: make fatfs_clean j}rA(j]j]j]j]j]ujjAj]rAjX)rA}rA(jXTo clean: make fatfs_cleanrAjjAj j(?jj\j}rA(j]j]j]j]j]ujKj]rAj%XTo clean: make fatfs_cleanrArA}rA(jjAjjAubaubajj ubejjubajj ubeubj)rA}rB(jXSimilarly, to build at the module level, issue the following commands for rebuilding : - cd /packages/ti/fs/fatfs - To build: make all - To clean: make clean jjAj j(?jj j}rB(j]j]j]j]j]ujNjhj]rB(jX)rB}rB(jXVSimilarly, to build at the module level, issue the following commands for rebuilding :rBjjAj j(?jj\j}rB(j]j]j]j]j]ujKj]rBj%XVSimilarly, to build at the module level, issue the following commands for rebuilding :rBr B}r B(jjBjjBubaubj )r B}r B(jUj}r B(j]j]j]j]j]ujjAj]rBj)rB}rB(jUj}rB(jX-j]j]j]j]j]ujj Bj]rB(j)rB}rB(jXcd /packages/ti/fs/fatfsrBj}rB(j]j]j]j]j]ujjBj]rBjX)rB}rB(jjBjjBj j(?jj\j}rB(j]j]j]j]j]ujKj]rBj%Xcd /packages/ti/fs/fatfsrBrB}rB(jjBjjBubaubajj ubj)rB}r B(jXTo build: make allr!Bj}r"B(j]j]j]j]j]ujjBj]r#BjX)r$B}r%B(jj!BjjBj j(?jj\j}r&B(j]j]j]j]j]ujKj]r'Bj%XTo build: make allr(Br)B}r*B(jj!Bjj$Bubaubajj ubj)r+B}r,B(jXTo clean: make clean j}r-B(j]j]j]j]j]ujjBj]r.BjX)r/B}r0B(jXTo clean: make cleanr1Bjj+Bj j(?jj\j}r2B(j]j]j]j]j]ujKj]r3Bj%XTo clean: make cleanr4Br5B}r6B(jj1Bjj/Bubaubajj ubejjubajj ubeubeubeubj)r7B}r8B(jUjKjj?j j(?jjj}r9B(j]r:BXadditional referencesr;Baj]j]j]rB(j)r?B}r@B(jXAdditional ReferencesrABjj7Bj j(?jj"j}rBB(j]j]j]j]j]ujKjhj]rCBj%XAdditional ReferencesrDBrEB}rFB(jjABjj?Bubaubj)rGB}rHB(jUjj7Bj j(?jjj}rIB(j]j]j]j]j]ujNjhj]rJBj)rKB}rLB(jUj}rMB(j]j]j]j]j]UcolsKujjGBj]rNB(j)rOB}rPB(jUj}rQB(j]j]j]j]j]UcolwidthK#ujjKBj]jjubj)rRB}rSB(jUj}rTB(j]j]j]j]j]UcolwidthK)ujjKBj]jjubj)rUB}rVB(jUj}rWB(j]j]j]j]j]ujjKBj]rXB(j)rYB}rZB(jUj}r[B(j]j]j]j]j]ujjUBj]r\B(j)r]B}r^B(jUj}r_B(j]j]j]j]j]ujjYBj]r`BjX)raB}rbB(jX **Document**rcBjj]Bj j(?jj\j}rdB(j]j]j]j]j]ujKj]reBj|)rfB}rgB(jjcBj}rhB(j]j]j]j]j]ujjaBj]riBj%XDocumentrjBrkB}rlB(jUjjfBubajjubaubajjubj)rmB}rnB(jUj}roB(j]j]j]j]j]ujjYBj]rpBjX)rqB}rrB(jX **Location**rsBjjmBj j(?jj\j}rtB(j]j]j]j]j]ujKj]ruBj|)rvB}rwB(jjsBj}rxB(j]j]j]j]j]ujjqBj]ryBj%XLocationrzBr{B}r|B(jUjjvBubajjubaubajjubejjubj)r}B}r~B(jUj}rB(j]j]j]j]j]ujjUBj]rB(j)rB}rB(jUj}rB(j]j]j]j]j]ujj}Bj]rBjX)rB}rB(jXAPI Reference ManualrBjjBj j(?jj\j}rB(j]j]j]j]j]ujKj]rBj%XAPI Reference ManualrBrB}rB(jjBjjBubaubajjubj)rB}rB(jUj}rB(j]j]j]j]j]ujj}Bj]rBjX)rB}rB(jXQ$(TI_PDK_INSTALL_DIR)\\packages\\ti \\fs\\fatfs\\docs\\doxygen\\html\\index .htmljjBj j(?jj\j}rB(j]j]j]j]j]ujKj]rBj%XI$(TI_PDK_INSTALL_DIR)\packages\ti \fs\fatfs\docs\doxygen\html\index .htmlrBrB}rB(jXQ$(TI_PDK_INSTALL_DIR)\\packages\\ti \\fs\\fatfs\\docs\\doxygen\\html\\index .htmljjBubaubajjubejjubj)rB}rB(jUj}rB(j]j]j]j]j]ujjUBj]rB(j)rB}rB(jUj}rB(j]j]j]j]j]ujjBj]rBjX)rB}rB(jX Release NotesrBjjBj j(?jj\j}rB(j]j]j]j]j]ujKj]rBj%X Release NotesrBrB}rB(jjBjjBubaubajjubj)rB}rB(jUj}rB(j]j]j]j]j]ujjBj]rBjX)rB}rB(jXR$(TI_PDK_INSTALL_DIR)\\packages\\ti \\fs\\fatfs\\docs\\ReleaseNotes_FATFS _LLD.pdfjjBj j(?jj\j}rB(j]j]j]j]j]ujKj]rBj%XL$(TI_PDK_INSTALL_DIR)\packages\ti \fs\fatfs\docs\ReleaseNotes_FATFS _LLD.pdfrBrB}rB(jXR$(TI_PDK_INSTALL_DIR)\\packages\\ti \\fs\\fatfs\\docs\\ReleaseNotes_FATFS _LLD.pdfjjBubaubajjubejjubejjubejjubaubj)rB}rB(jUjj7Bj j(?jjj}rB(j]j]j]j]j]ujKjhj]rBj)rB}rB(jUjKjjBj j(?jjj}rB(j]j]j]j]j]ujKjhj]ubaubeubeubj j(?jjj}rB(j]rBXoverviewrBaj]j]j]rBUid82rBaj]ujKjhj]rB(j)rB}rB(jXOverviewrBjj?j j(?jj"j}rB(j]j]j]j]j]ujKjhj]rBj%XOverviewrBrB}rB(jjBjjBubaubj)rB}rB(jUjKjj?j j(?jjj}rB(j]rBX introductionrBaj]j]j]rBUid83rBaj]ujKjhj]rB(j)rB}rB(jX IntroductionrBjjBj j(?jj"j}rB(j]j]j]j]j]ujKjhj]rBj%X IntroductionrBrB}rB(jjBjjBubaubjX)rB}rB(jXFATFS module provides an interface to configure a driver for FAT file system compatible device that connects via MMCSD, USB, etc. It configures FATFS for disk operations driver disk Initialize, disk read, disk writerBjjBj j(?jj\j}rB(j]j]j]j]j]ujK jhj]rBj%XFATFS module provides an interface to configure a driver for FAT file system compatible device that connects via MMCSD, USB, etc. It configures FATFS for disk operations driver disk Initialize, disk read, disk writerBrB}rB(jjBjjBubaubeubeubj j(?jj?j}rB(j]UlevelKj]j]rBjBaUsourcej(?j]j]UlineKUtypejAujKjhj]rBjX)rB}rB(jX+Duplicate implicit target name: "overview".j}rB(j]j]j]j]j]ujj?j]rBj%X+Duplicate implicit target name: "overview".rBrB}rB(jUjjBubajj\ubaubh)rB}rB(jUjjBj j(?jj?j}rB(j]UlevelKj]j]rBjBaUsourcej(?j]j]UlineKUtypejAujKjhj]rBjX)rB}rB(jX/Duplicate implicit target name: "introduction".j}rB(j]j]j]j]j]ujjBj]rBj%X/Duplicate implicit target name: "introduction".rBrB}rB(jUjjBubajj\ubaubh)rB}rB(jUjj/?j j(?jj?j}rB(j]UlevelKj]j]rBj4?aUsourcej(?j]j]UlineKUtypejAujKjhj]rBjX)rB}rB(jX2Duplicate implicit target name: "driver overview".j}rB(j]j]j]j]j]ujjBj]rBj%X2Duplicate implicit target name: "driver overview".rBrC}rC(jUjjBubajj\ubaubh)rC}rC(jUjjU?j j(?jj?j}rC(j]UlevelKj]j]rCj[?aUsourcej(?j]j]UlineK#UtypejAujK#jhj]rCjX)rC}rC(jX1Duplicate implicit target name: "user interface".j}r C(j]j]j]j]j]ujjCj]r Cj%X1Duplicate implicit target name: "user interface".r Cr C}r C(jUjjCubajj\ubaubh)rC}rC(jUjje?j j(?jj?j}rC(j]UlevelKj]j]rCjk?aUsourcej(?j]j]UlineK&UtypejAujK&jhj]rCjX)rC}rC(jX7Duplicate implicit target name: "driver configuration".j}rC(j]j]j]j]j]ujjCj]rCj%X7Duplicate implicit target name: "driver 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"application".rGCrHC}rIC(jUjjCCubajj\ubaubh)rJC}rKC(jUjj?j j(?jj?j}rLC(j]UlevelKj]j]rMCj@aUsourcej(?j]j]UlineKcUtypejAujKcjhj]rNCjX)rOC}rPC(jX+Duplicate implicit target name: "examples".j}rQC(j]j]j]j]j]ujjJCj]rRCj%X+Duplicate implicit target name: "examples".rSCrTC}rUC(jUjjOCubajj\ubaubh)rVC}rWC(jUj}rXC(j]UlevelKj]j]Usourcej(?j]j]UlineKUtypejujjAj]rYCjX)rZC}r[C(jXUnexpected indentation.j}r\C(j]j]j]j]j]ujjVCj]r]Cj%XUnexpected indentation.r^Cr_C}r`C(jUjjZCubajj\ubajj?ubh)raC}rbC(jUjj7Bj j(?jj?j}rcC(j]UlevelKj]j]rdCj=BaUsourcej(?j]j]UlineKUtypejAujKjhj]reCjX)rfC}rgC(jX8Duplicate implicit target name: "additional references".j}rhC(j]j]j]j]j]ujjaCj]riCj%X8Duplicate implicit target name: "additional references".rjCrkC}rlC(jUjjfCubajj\ubaubh)rmC}rnC(jUjj)roC}rpC(jUjKjj)rqC}rrC(jUjhj j jjj}rsC(j]j]j]j]rtCUmmcsdruCaj]rvChaujKKjhj]rwC(j)rxC}ryC(jXMMCSDrzCjjqCj j jj"j}r{C(j]j]j]j]j]ujKKjhj]r|Cj%XMMCSDr}Cr~C}rC(jjzCjjxCubaubj))rC}rC(jX@http://processors.wiki.ti.com/index.php/Processor_SDK_RTOS_MMCSDjjqCj j,X>source/rtos/PDK_Platform_Software/Device_Drivers/MMCSD.rst.incrCrC}rCbjj0j}rC(j2j3j]j]j]j]j]ujKjhj]rCj%X@http://processors.wiki.ti.com/index.php/Processor_SDK_RTOS_MMCSDrCrC}rC(jUjjCubaubjoCj)rC}rC(jUjKjjqCj jCjjj}rC(j]rCXuser interfacerCaj]j]j]rCUid95rCaj]ujK!jhj]rC(j)rC}rC(jXUser InterfacerCjjCj jCjj"j}rC(j]j]j]j]j]ujK!jhj]rCj%XUser InterfacerCrC}rC(jjCjjCubaubj)rC}rC(jUjKjjCj jCjjj}rC(j]rCXdriver configurationrCaj]j]j]rCUid96rCaj]ujK$jhj]rC(j)rC}rC(jXDriver ConfigurationrCjjCj jCjj"j}rC(j]j]j]j]j]ujK$jhj]rCj%XDriver ConfigurationrCrC}rC(jjCjjCubaubjb)rC}rC(jX **Board Specific Configuration**rCjKjjCj jCjjfj}rC(j]rCUid97rCaj]j]rCXboard-specific-configurationrCaj]j]ujNjhj]rCj|)rC}rC(jjCj}rC(j]j]j]j]j]ujjCj]rCj%XBoard Specific ConfigurationrCrC}rC(jUjjCubajjubaubjX)rC}rC(jXAll board specific configurations eg:enabling clock and pin-mux for UART pins are required before calling any driver APIs.By default Board_Init() API supports all initialization sequence for TI supported EVMs. In addition it initializes UART instance for Console/STDIO.Refer `Processor SDK RTOS Board Support `__ for additional details.Once board specific configuration is complete MMCSD_init() API can be called to initialize driver.jjCj jCjj\j}rC(j]j]j]j]j]ujK)jhj]rC(j%XAll board specific configurations eg:enabling clock and pin-mux for UART pins are required before calling any driver APIs.By default Board_Init() API supports all initialization sequence for TI supported EVMs. In addition it initializes UART instance for Console/STDIO.Refer rCrC}rC(jXAll board specific configurations eg:enabling clock and pin-mux for UART pins are required before calling any driver APIs.By default Board_Init() API supports all initialization sequence for TI supported EVMs. In addition it initializes UART instance for Console/STDIO.Refer jjCubj)rC}rC(jXE`Processor SDK RTOS Board Support `__j}rC(UnameX Processor SDK RTOS Board SupportjXindex_board.html#board-supportj]j]j]j]j]ujjCj]rCj%X Processor SDK RTOS Board SupportrCrC}rC(jUjjCubajjubj%X{ for additional details.Once board specific configuration is complete MMCSD_init() API can be called to initialize driver.rCrC}rC(jX{ for additional details.Once board specific configuration is complete MMCSD_init() API can be called to initialize driver.jjCubeubjb)rC}rC(jX!**MMCSD Configuration Structure**rCjjCj jCjjfj}rC(j]rCUmmcsd-configuration-structurerCaj]j]j]j]rChaujNjhj]rCj|)rC}rC(jjCj}rC(j]j]j]j]j]ujjCj]rCj%XMMCSD Configuration StructurerCrC}rC(jUjjCubajjubaubjX)rC}rC(jXTThe MMCSD_soc.c file binds driver with hardware attributes on the board through MMCSD_config structure. This structure must be initialized before the MMCSD_init() function is called and cannot be changed afterwards. For details about the individual fields of this structure, see the Doxygen help by opening \\docs\\doxygen\\html\\index.htmljjCj jCjj\j}rC(j]j]j]j]j]ujK5jhj]rCj%XPThe MMCSD_soc.c file binds driver with hardware attributes on the board through MMCSD_config structure. This structure must be initialized before the MMCSD_init() function is called and cannot be changed afterwards. For details about the individual fields of this structure, see the Doxygen help by opening \docs\doxygen\html\index.htmlrCrC}rC(jXTThe MMCSD_soc.c file binds driver with hardware attributes on the board through MMCSD_config structure. This structure must be initialized before the MMCSD_init() function is called and cannot be changed afterwards. For details about the individual fields of this structure, see the Doxygen help by opening \\docs\\doxygen\\html\\index.htmljjCubaubeubj)rC}rC(jUjKjjCj jCjjj}rC(j]rCXapisrCaj]j]j]rCUid98rCaj]ujK=jhj]rC(j)rC}rC(jXAPIsrCjjCj jCjj"j}rC(j]j]j]j]j]ujK=jhj]rCj%XAPIsrCrC}rC(jjCjjCubaubjX)rC}rC(jX0Reference for API header file with documentationrCjjCj jCjj\j}rC(j]j]j]j]j]ujK?jhj]rCj%X0Reference for API header file with documentationrCrC}rC(jjCjjCubaubj#)rC}rC(jX#include jjCj jCjj&j}rC(j2j3j]j]j]j]j]ujM jhj]rCj%X#include rCrC}rC(jUjjCubaubjb)rD}rD(jX API Call FlowrDjKjjCj jCjjfj}rD(j]rDUid99rDaj]j]rDX api-call-flowrDaj]j]ujNjhj]rDj%X API Call Flowr Dr D}r D(jjDjjDubaubjX)r D}r D(jX|The below sequence indicates the calling sequence of MMCSD driver APIs for a use case of write transaction in blocking mode:rDjjCj jCjj\j}rD(j]j]j]j]j]ujKHjhj]rDj%X|The below sequence indicates the calling sequence of MMCSD driver APIs for a use case of write transaction in blocking mode:rDrD}rD(jjDjj Dubaubj#)rD}rD(jXMMCSD_Handle MMCSD; UInt peripheralNum = 0; /* Such as MMCSD0 */ MMCSD_Params MMCSDParams; ... MMCSD_Params_init(&MMCSDParams); MMCSD = MMCSD_open(peripheralNum, &MMCSDParams);
if (MMCSD == NULL) {
/* Error opening MMCSD */ ... readOK = MMCSD_read(MMCSD, rxBuffer , startBlock, numBlock); /* Perform MMCSD read */ if (!transferOK) { /* MMCSD transaction failed */} writeOK = MMCSD_write(MMCSD, TxBuffer , startBlock, numBlock); /* Perform MMCSD write */ if (!writeOK) { /* MMCSD transaction failed */}jjCj jCjj&j}rD(j2j3j]j]j]j]j]ujM jhj]rDj%XMMCSD_Handle MMCSD; UInt peripheralNum = 0; /* Such as MMCSD0 */ MMCSD_Params MMCSDParams; ... MMCSD_Params_init(&MMCSDParams); MMCSD = MMCSD_open(peripheralNum, &MMCSDParams);
if (MMCSD == NULL) {
/* Error opening MMCSD */ ... readOK = MMCSD_read(MMCSD, rxBuffer , startBlock, numBlock); /* Perform MMCSD read */ if (!transferOK) { /* MMCSD transaction failed */} writeOK = MMCSD_write(MMCSD, TxBuffer , startBlock, numBlock); /* Perform MMCSD write */ if (!writeOK) { /* MMCSD transaction failed */}rDrD}rD(jUjjDubaubjb)rD}rD(jX eMMC UsagerDjjCj jCjjfj}rD(j]rDU emmc-usager Daj]j]j]j]r!DhaujNjhj]r"Dj%X eMMC Usager#Dr$D}r%D(jjDjjDubaubjX)r&D}r'D(jXMMCSD driver supports eMMC device. Application need to configure the eMMC device for an instance of peripheral. It is also recommended to configure the operating bus width of eMMC device.r(DjjCj jCjj\j}r)D(j]j]j]j]j]ujK^jhj]r*Dj%XMMCSD driver supports eMMC device. Application need to configure the eMMC device for an instance of peripheral. It is also recommended to configure the operating bus width of eMMC device.r+Dr,D}r-D(jj(Djj&Dubaubj#)r.D}r/D(jXmmcsdInitCfg[MMCSD_INSTANCE].cardType = MMCSD_CARD_EMMC; mmcsdInitCfg[MMCSD_INSTANCE].supportedBusWidth = MMCSD_BUS_WIDTH_8BIT; MMCSD_init();jjCj jCjj&j}r0D(j2j3j]j]j]j]j]ujMjhj]r1Dj%XmmcsdInitCfg[MMCSD_INSTANCE].cardType = MMCSD_CARD_EMMC; mmcsdInitCfg[MMCSD_INSTANCE].supportedBusWidth = MMCSD_BUS_WIDTH_8BIT; MMCSD_init();r2Dr3D}r4D(jUjj.Dubaubjb)r5D}r6D(jX EDMA Usager7DjjCj jCjjfj}r8D(j]r9DU edma-usager:Daj]j]j]j]r;Dh4aujNjhj]rD}r?D(jj7Djj5DubaubjX)r@D}rAD(jX[MMCSD driver supports EDMA operations to transfer data between memory and MMCSD peripheral.rBDjjCj jCjj\j}rCD(j]j]j]j]j]ujKkjhj]rDDj%X[MMCSD driver supports EDMA operations to transfer data between memory and MMCSD peripheral.rEDrFD}rGD(jjBDjj@DubaubjX)rHD}rID(jXDriver uses separate source files for these operations.Refer source MMCSD_soc.c for DMA MMCSD SOC configuration. Application need to create EDMA handle and update the configuration before MMCSD_init() API.rJDjjCj jCjj\j}rKD(j]j]j]j]j]ujKnjhj]rLDj%XDriver uses separate source files for these operations.Refer source MMCSD_soc.c for DMA MMCSD SOC configuration. Application need to create EDMA handle and update the configuration before MMCSD_init() API.rMDrND}rOD(jjJDjjHDubaubj#)rPD}rQD(jXdmmcsdInitCfg[MMCSD_INSTANCE].edmaHandle = MMCSDApp_edmaInit();/* Refer Example/Test */ MMCSD_init();jjCj jCjj&j}rRD(j2j3j]j]j]j]j]ujM jhj]rSDj%XdmmcsdInitCfg[MMCSD_INSTANCE].edmaHandle = MMCSDApp_edmaInit();/* Refer Example/Test */ MMCSD_init();rTDrUD}rVD(jUjjPDubaubjX)rWD}rXD(jXRefer “MMCSD_[Usecase]_[Board/SoC]_DMA_[cpu][Example/Test]project” for additional reference. Refer SDK Release Note for supported EVMs.rYDjjCj jCjj\j}rZD(j]j]j]j]j]ujKwjhj]r[Dj%XRefer “MMCSD_[Usecase]_[Board/SoC]_DMA_[cpu][Example/Test]project” for additional reference. Refer SDK Release Note for supported EVMs.r\Dr]D}r^D(jjYDjjWDubaubjb)r_D}r`D(jXUHS Mode UsageraDjjCj jCjjfj}rbD(j]rcDUuhs-mode-usagerdDaj]j]j]j]reDhLaujNjhj]rfDj%XUHS Mode UsagergDrhD}riD(jjaDjj_DubaubjX)rjD}rkD(jXThe MMCSD driver supports UHS-I cards. Feature is available for AM57x SOC and is dependent on board or platform support for run-time switching from 3.0V to 1.8V. Feature is validated on AM572x GP EVM 3.0rlDjjCj jCjj\j}rmD(j]j]j]j]j]ujK}jhj]rnDj%XThe MMCSD driver supports UHS-I cards. Feature is available for AM57x SOC and is dependent on board or platform support for run-time switching from 3.0V to 1.8V. Feature is validated on AM572x GP EVM 3.0roDrpD}rqD(jjlDjjjDubaubeubeubj)rrD}rsD(jUjKjjqCj jCjjj}rtD(j]ruDX applicationrvDaj]j]j]rwDUid100rxDaj]ujKjhj]ryD(j)rzD}r{D(jX Applicationr|DjjrDj jCjj"j}r}D(j]j]j]j]j]ujKjhj]r~Dj%X ApplicationrDrD}rD(jj|DjjzDubaubj)rD}rD(jUjKjjrDj jCjjj}rD(j]rDXexamples & unit testsrDaj]j]j]rDUexamples-unit-testsrDaj]ujKjhj]rD(j)rD}rD(jXExamples & Unit testsrDjjDj jCjj"j}rD(j]j]j]j]j]ujKjhj]rDj%XExamples & Unit testsrDrD}rD(jjDjjDubaubj)rD}rD(jUjjDj jCjjj}rD(j]j]j]j]j]ujNjhj]rDj)rD}rD(jUj}rD(j]j]j]j]j]UcolsKujjDj]rD(j)rD}rD(jUj}rD(j]j]j]j]j]UcolwidthK"ujjDj]jjubj)rD}rD(jUj}rD(j]j]j]j]j]UcolwidthKujjDj]jjubj)rD}rD(jUj}rD(j]j]j]j]j]UcolwidthKujjDj]jjubj)rD}rD(jUj}rD(j]j]j]j]j]UcolwidthKujjDj]jjubj)rD}rD(jUj}rD(j]j]j]j]j]UcolwidthKujjDj]jjubj)rD}rD(jUj}rD(j]j]j]j]j]ujjDj]rDj)rD}rD(jUj}rD(j]j]j]j]j]ujjDj]rD(j)rD}rD(jUj}rD(j]j]j]j]j]ujjDj]rDjX)rD}rD(jXNamerDjjDj jCjj\j}rD(j]j]j]j]j]ujKj]rDj%XNamerDrD}rD(jjDjjDubaubajjubj)rD}rD(jUj}rD(j]j]j]j]j]ujjDj]rDjX)rD}rD(jX DescriptionrDjjDj jCjj\j}rD(j]j]j]j]j]ujKj]rDj%X DescriptionrDrD}rD(jjDjjDubaubajjubj)rD}rD(jUj}rD(j]j]j]j]j]ujjDj]rDjX)rD}rD(jXExpected ResultsrDjjDj jCjj\j}rD(j]j]j]j]j]ujKj]rDj%XExpected ResultsrDrD}rD(jjDjjDubaubajjubj)rD}rD(jUj}rD(j]j]j]j]j]ujjDj]rDjX)rD}rD(jXSupported SOCsrDjjDj jCjj\j}rD(j]j]j]j]j]ujKj]rDj%XSupported SOCsrDrD}rD(jjDjjDubaubajjubj)rD}rD(jUj}rD(j]j]j]j]j]ujjDj]rDjX)rD}rD(jX Build TyperDjjDj jCjj\j}rD(j]j]j]j]j]ujKj]rDj%X Build TyperDrD}rD(jjDjjDubaubajjubejjubajjubj)rD}rD(jUj}rD(j]j]j]j]j]ujjDj]rD(j)rD}rD(jUj}rD(j]j]j]j]j]ujjDj]rD(j)rD}rD(jUj}rD(j]j]j]j]j]ujjDj]rDjX)rD}rD(jXMMCSD_FATFS_ExampleProjectrDjjDj jCjj\j}rD(j]j]j]j]j]ujKj]rDj%XMMCSD_FATFS_ExampleProjectrDrD}rE(jjDjjDubaubajjubj)rE}rE(jUj}rE(j]j]j]j]j]ujjDj]rEjX)rE}rE(jX7Example initializes the card and checks for valid FAT partition. When a valid FAT partition is detected console interface for command execution is provided. Console commands supported are ls (to list files of directory), cd (change directory), pwd (present working directory) and cat (text file read operation).rEjjEj jCjj\j}rE(j]j]j]j]j]ujKj]r Ej%X7Example initializes the card and checks for valid FAT partition. When a valid FAT partition is detected console interface for command execution is provided. Console commands supported are ls (to list files of directory), cd (change directory), pwd (present working directory) and cat (text file read operation).r Er E}r E(jjEjjEubaubajjubj)r E}rE(jUj}rE(j]j]j]j]j]ujjDj]rEjX)rE}rE(jXXWhen a card is detected with valid FAT partition a console interface apperas like "0:> "rEjj Ej jCjj\j}rE(j]j]j]j]j]ujKj]rEj%XXWhen a card is detected with valid FAT partition a console interface apperas like "0:> "rErE}rE(jjEjjEubaubajjubj)rE}rE(jUj}rE(j]j]j]j]j]ujjDj]rEjX)rE}rE(jX:AM335x AM437x AM571x AM572x AM574x K2G OMAPL137x OMAPL138xrEjjEj jCjj\j}r E(j]j]j]j]j]ujKj]r!Ej%X:AM335x AM437x AM571x AM572x AM574x K2G OMAPL137x OMAPL138xr"Er#E}r$E(jjEjjEubaubajjubj)r%E}r&E(jUj}r'E(j]j]j]j]j]ujjDj]r(EjX)r)E}r*E(jX CCS Projectr+Ejj%Ej jCjj\j}r,E(j]j]j]j]j]ujKj]r-Ej%X CCS Projectr.Er/E}r0E(jj+Ejj)Eubaubajjubejjubj)r1E}r2E(jUj}r3E(j]j]j]j]j]ujjDj]r4E(j)r5E}r6E(jUj}r7E(j]j]j]j]j]ujj1Ej]r8EjX)r9E}r:E(jXMMCSD_Test_Projectr;Ejj5Ej jCjj\j}rEr?E}r@E(jj;Ejj9Eubaubajjubj)rAE}rBE(jUj}rCE(j]j]j]j]j]ujj1Ej]rDEjX)rEE}rFE(jXUnit Test application demonstrating write and read a fixed number of bytes into MMCSD card. Verifies written data pattern to conclude PASS/FAIL.rGEjjAEj jCjj\j}rHE(j]j]j]j]j]ujKj]rIEj%XUnit Test application demonstrating write and read a fixed number of bytes into MMCSD card. Verifies written data pattern to conclude PASS/FAIL.rJErKE}rLE(jjGEjjEEubaubajjubj)rME}rNE(jUj}rOE(j]j]j]j]j]ujj1Ej]rPEjX)rQE}rRE(jX)Prints on console All tests have passedrSEjjMEj jCjj\j}rTE(j]j]j]j]j]ujKj]rUEj%X)Prints on console All tests have passedrVErWE}rXE(jjSEjjQEubaubajjubj)rYE}rZE(jUj}r[E(j]j]j]j]j]ujj1Ej]r\EjX)r]E}r^E(jX:AM335x AM437x AM571x AM572x AM574x K2G OMAPL137x OMAPL138xr_EjjYEj jCjj\j}r`E(j]j]j]j]j]ujKj]raEj%X:AM335x AM437x AM571x AM572x AM574x K2G OMAPL137x OMAPL138xrbErcE}rdE(jj_Ejj]Eubaubajjubj)reE}rfE(jUj}rgE(j]j]j]j]j]ujj1Ej]rhEjX)riE}rjE(jX CCS ProjectrkEjjeEj jCjj\j}rlE(j]j]j]j]j]ujKj]rmEj%X CCS ProjectrnEroE}rpE(jjkEjjiEubaubajjubejjubj)rqE}rrE(jUj}rsE(j]j]j]j]j]ujjDj]rtE(j)ruE}rvE(jUj}rwE(j]j]j]j]j]ujjqEj]rxEjX)ryE}rzE(jXMMCSD_DMA_Test_Projectr{EjjuEj jCjj\j}r|E(j]j]j]j]j]ujKj]r}Ej%XMMCSD_DMA_Test_Projectr~ErE}rE(jj{EjjyEubaubajjubj)rE}rE(jUj}rE(j]j]j]j]j]ujjqEj]rEjX)rE}rE(jXUnit Test application demonstrating write and read a fixed number of bytes into MMCSD card. Verifies written data pattern to conclude PASS/FAIL.rEjjEj jCjj\j}rE(j]j]j]j]j]ujKj]rEj%XUnit Test application demonstrating write and read a fixed number of bytes into MMCSD card. Verifies written data pattern to conclude PASS/FAIL.rErE}rE(jjEjjEubaubajjubj)rE}rE(jUj}rE(j]j]j]j]j]ujjqEj]rEjX)rE}rE(jX'Prints on console All tests have passedrEjjEj jCjj\j}rE(j]j]j]j]j]ujKj]rEj%X'Prints on console All tests have passedrErE}rE(jjEjjEubaubajjubj)rE}rE(jUj}rE(j]j]j]j]j]ujjqEj]rEjX)rE}rE(jX:AM335x AM437x AM571x AM572x AM574x K2G OMAPL137x OMAPl138xrEjjEj jCjj\j}rE(j]j]j]j]j]ujKj]rEj%X:AM335x AM437x AM571x AM572x AM574x K2G OMAPL137x OMAPl138xrErE}rE(jjEjjEubaubajjubj)rE}rE(jUj}rE(j]j]j]j]j]ujjqEj]rEjX)rE}rE(jX CCS ProjectrEjjEj jCjj\j}rE(j]j]j]j]j]ujKj]rEj%X CCS ProjectrErE}rE(jjEjjEubaubajjubejjubj)rE}rE(jUj}rE(j]j]j]j]j]ujjDj]rE(j)rE}rE(jUj}rE(j]j]j]j]UmorerowsKj]ujjEj]rEjX)rE}rE(jXMMCSD_SMP_Test_ProjectrEjjEj jCjj\j}rE(j]j]j]j]j]ujKj]rEj%XMMCSD_SMP_Test_ProjectrErE}rE(jjEjjEubaubajjubj)rE}rE(jUj}rE(j]j]j]j]UmorerowsKj]ujjEj]rEjX)rE}rE(jXUnit Test application demonstrating write and read a fixed number of bytes into MMCSD card. Verifies written data pattern to conclude PASS/FAIL in SMP mode.rEjjEj jCjj\j}rE(j]j]j]j]j]ujKj]rEj%XUnit Test application demonstrating write and read a fixed number of bytes into MMCSD card. Verifies written data pattern to conclude PASS/FAIL in SMP mode.rErE}rE(jjEjjEubaubajjubj)rE}rE(jUj}rE(j]j]j]j]UmorerowsKj]ujjEj]rEjX)rE}rE(jX)Prints on console All tests have passedrEjjEj jCjj\j}rE(j]j]j]j]j]ujKj]rEj%X)Prints on console All tests have passedrErE}rE(jjEjjEubaubajjubj)rE}rE(jUj}rE(j]j]j]j]j]ujjEj]rEjX)rE}rE(jX AM572x - EVMrEjjEj jCjj\j}rE(j]j]j]j]j]ujKj]rEj%X AM572x - EVMrErE}rE(jjEjjEubaubajjubj)rE}rE(jUj}rE(j]j]j]j]j]ujjEj]rEjX)rE}rE(jX CCS ProjectrEjjEj jCjj\j}rE(j]j]j]j]j]ujKj]rEj%X CCS ProjectrErE}rE(jjEjjEubaubajjubejjubj)rE}rE(jUj}rE(j]j]j]j]j]ujjDj]rE(j)rE}rE(jUj}rE(j]j]j]j]j]ujjEj]rEjX)rE}rE(jX am65xx,j721erEjjEj jCjj\j}rE(j]j]j]j]j]ujKj]rEj%X am65xx,j721erErE}rF(jjEjjEubaubajjubj)rF}rF(jUj}rF(j]j]j]j]j]ujjEj]rFjX)rF}rF(jXmakefilerFjjFj jCjj\j}rF(j]j]j]j]j]ujKj]r Fj%Xmakefiler Fr F}r F(jjFjjFubaubajjubejjubj)r F}rF(jUj}rF(j]j]j]j]j]ujjDj]rF(j)rF}rF(jUj}rF(j]j]j]j]UmorerowsKj]ujj Fj]rFjX)rF}rF(jXMMCSD_SMP_DMA_Test_ProjectrFjjFj jCjj\j}rF(j]j]j]j]j]ujKj]rFj%XMMCSD_SMP_DMA_Test_ProjectrFrF}rF(jjFjjFubaubajjubj)rF}rF(jUj}rF(j]j]j]j]UmorerowsKj]ujj Fj]r FjX)r!F}r"F(jXUnit Test application demonstrating write and read a fixed number of bytes into MMCSD card. Verifies written data pattern to conclude PASS/FAIL in SMP mode with DMA enabled.r#FjjFj jCjj\j}r$F(j]j]j]j]j]ujKj]r%Fj%XUnit Test application demonstrating write and read a fixed number of bytes into MMCSD card. Verifies written data pattern to conclude PASS/FAIL in SMP mode with DMA enabled.r&Fr'F}r(F(jj#Fjj!Fubaubajjubj)r)F}r*F(jUj}r+F(j]j]j]j]UmorerowsKj]ujj Fj]r,FjX)r-F}r.F(jX'Prints on console All tests have passedr/Fjj)Fj jCjj\j}r0F(j]j]j]j]j]ujKj]r1Fj%X'Prints on console All tests have passedr2Fr3F}r4F(jj/Fjj-Fubaubajjubj)r5F}r6F(jUj}r7F(j]j]j]j]j]ujj Fj]r8FjX)r9F}r:F(jX AM572x - EVMr;Fjj5Fj jCjj\j}rFr?F}r@F(jj;Fjj9Fubaubajjubj)rAF}rBF(jUj}rCF(j]j]j]j]j]ujj Fj]rDFjX)rEF}rFF(jX CCS ProjectrGFjjAFj jCjj\j}rHF(j]j]j]j]j]ujKj]rIFj%X CCS ProjectrJFrKF}rLF(jjGFjjEFubaubajjubejjubj)rMF}rNF(jUj}rOF(j]j]j]j]j]ujjDj]rPF(j)rQF}rRF(jUj}rSF(j]j]j]j]j]ujjMFj]rTFjX)rUF}rVF(jX am65xx,j721erWFjjQFj jCjj\j}rXF(j]j]j]j]j]ujKj]rYFj%X am65xx,j721erZFr[F}r\F(jjWFjjUFubaubajjubj)r]F}r^F(jUj}r_F(j]j]j]j]j]ujjMFj]r`FjX)raF}rbF(jXmakefilercFjj]Fj jCjj\j}rdF(j]j]j]j]j]ujKj]reFj%XmakefilerfFrgF}rhF(jjcFjjaFubaubajjubejjubj)riF}rjF(jUj}rkF(j]j]j]j]j]ujjDj]rlF(j)rmF}rnF(jUj}roF(j]j]j]j]j]ujjiFj]rpFjX)rqF}rrF(jXMMCSD_EMMC_TestProjectrsFjjmFj jCjj\j}rtF(j]j]j]j]j]ujKj]ruFj%XMMCSD_EMMC_TestProjectrvFrwF}rxF(jjsFjjqFubaubajjubj)ryF}rzF(jUj}r{F(j]j]j]j]j]ujjiFj]r|FjX)r}F}r~F(jXUnit Test application demonstrating write and read a fixed number of bytes into eMMC device. Verifies written data pattern to conclude PASS/FAIL.rFjjyFj jCjj\j}rF(j]j]j]j]j]ujKj]rFj%XUnit Test application demonstrating write and read a fixed number of bytes into eMMC device. Verifies written data pattern to conclude PASS/FAIL.rFrF}rF(jjFjj}Fubaubajjubj)rF}rF(jUj}rF(j]j]j]j]j]ujjiFj]rFjX)rF}rF(jX'Prints on console All tests have passedrFjjFj jCjj\j}rF(j]j]j]j]j]ujKj]rFj%X'Prints on console All tests have passedrFrF}rF(jjFjjFubaubajjubj)rF}rF(jUj}rF(j]j]j]j]j]ujjiFj]rFjX)rF}rF(jX:AM335x AM437x AM571x AM572x AM574x K2G OMAPL137x OMAPL138xrFjjFj jCjj\j}rF(j]j]j]j]j]ujKj]rFj%X:AM335x AM437x AM571x AM572x AM574x K2G OMAPL137x OMAPL138xrFrF}rF(jjFjjFubaubajjubj)rF}rF(jUj}rF(j]j]j]j]j]ujjiFj]rFjX)rF}rF(jX CCS ProjectrFjjFj jCjj\j}rF(j]j]j]j]j]ujKj]rFj%X CCS ProjectrFrF}rF(jjFjjFubaubajjubejjubj)rF}rF(jUj}rF(j]j]j]j]j]ujjDj]rF(j)rF}rF(jUj}rF(j]j]j]j]j]ujjFj]rFjX)rF}rF(jXMMCSD_EMMC_DMA_TestProjectrFjjFj jCjj\j}rF(j]j]j]j]j]ujKj]rFj%XMMCSD_EMMC_DMA_TestProjectrFrF}rF(jjFjjFubaubajjubj)rF}rF(jUj}rF(j]j]j]j]j]ujjFj]rFjX)rF}rF(jXUnit Test application demonstrating write and read a fixed number of bytes into eMMC device. Verifies written data pattern to conclude PASS/FAIL.rFjjFj jCjj\j}rF(j]j]j]j]j]ujKj]rFj%XUnit Test application demonstrating write and read a fixed number of bytes into eMMC device. Verifies written data pattern to conclude PASS/FAIL.rFrF}rF(jjFjjFubaubajjubj)rF}rF(jUj}rF(j]j]j]j]j]ujjFj]rFjX)rF}rF(jX'Prints on console All tests have passedrFjjFj jCjj\j}rF(j]j]j]j]j]ujKj]rFj%X'Prints on console All tests have passedrFrF}rF(jjFjjFubaubajjubj)rF}rF(jUj}rF(j]j]j]j]j]ujjFj]rFjX)rF}rF(jX:AM335x AM437x AM571x AM572x AM574x K2G OMAPL137x OMAPL138xrFjjFj jCjj\j}rF(j]j]j]j]j]ujKj]rFj%X:AM335x AM437x AM571x AM572x AM574x K2G OMAPL137x OMAPL138xrFrF}rF(jjFjjFubaubajjubj)rF}rF(jUj}rF(j]j]j]j]j]ujjFj]rFjX)rF}rF(jX CCS ProjectrFjjFj jCjj\j}rF(j]j]j]j]j]ujKj]rFj%X CCS ProjectrFrF}rF(jjFjjFubaubajjubejjubj)rF}rF(jUj}rF(j]j]j]j]j]ujjDj]rF(j)rF}rF(jUj}rF(j]j]j]j]j]ujjFj]rFjX)rF}rF(jXMMC Test ApplicationrFjjFj jCjj\j}rF(j]j]j]j]j]ujKj]rFj%XMMC Test ApplicationrFrF}rF(jjFjjFubaubajjubj)rF}rF(jUj}rF(j]j]j]j]j]ujjFj]rF(jX)rF}rF(jXUnit Test application demonstrating write and read a fixed number of bytes into MMC device. Verifies written data pattern to conclude PASS/FAIL. Supported only on OMAPL137 platform.rFjjFj jCjj\j}rG(j]j]j]j]j]ujKj]rGj%XUnit Test application demonstrating write and read a fixed number of bytes into MMC device. Verifies written data pattern to conclude PASS/FAIL. Supported only on OMAPL137 platform.rGrG}rG(jjFjjFubaubjX)rG}rG(jX There is no on-board eMMC chip on OMAPL137 platform. Need to use external MMC card inserted into MMCSD slot of the board. Currently the driver supports standard MMC card and other cards like MMCplus may not work. The example requires the card size to be at least 2GB.rGjjFj jCjj\j}rG(j]j]j]j]j]ujKj]r Gj%X There is no on-board eMMC chip on OMAPL137 platform. Need to use external MMC card inserted into MMCSD slot of the board. Currently the driver supports standard MMC card and other cards like MMCplus may not work. The example requires the card size to be at least 2GB.r Gr G}r G(jjGjjGubaubejjubj)r G}rG(jUj}rG(j]j]j]j]j]ujjFj]rGjX)rG}rG(jX'Prints on console All tests have passedrGjj Gj jCjj\j}rG(j]j]j]j]j]ujKj]rGj%X'Prints on console All tests have passedrGrG}rG(jjGjjGubaubajjubj)rG}rG(jUj}rG(j]j]j]j]j]ujjFj]rGjX)rG}rG(jX OMAPL137xrGjjGj jCjj\j}r G(j]j]j]j]j]ujKj]r!Gj%X OMAPL137xr"Gr#G}r$G(jjGjjGubaubajjubj)r%G}r&G(jUj}r'G(j]j]j]j]j]ujjFj]r(GjX)r)G}r*G(jX CCS Projectr+Gjj%Gj jCjj\j}r,G(j]j]j]j]j]ujKj]r-Gj%X CCS Projectr.Gr/G}r0G(jj+Gjj)Gubaubajjubejjubj)r1G}r2G(jUj}r3G(j]j]j]j]j]ujjDj]r4G(j)r5G}r6G(jUj}r7G(j]j]j]j]j]ujj1Gj]r8GjX)r9G}r:G(jX MMCSD_TestAppr;Gjj5Gj jCjj\j}rGr?G}r@G(jj;Gjj9Gubaubajjubj)rAG}rBG(jUj}rCG(j]j]j]j]j]ujj1Gj]rDGjX)rEG}rFG(jXUnit Test application demonstrating write and read a fixed number of bytes into MMCSD card. Verifies written data pattern to conclude PASS/FAIL.rGGjjAGj jCjj\j}rHG(j]j]j]j]j]ujMj]rIGj%XUnit Test application demonstrating write and read a fixed number of bytes into MMCSD card. Verifies written data pattern to conclude PASS/FAIL.rJGrKG}rLG(jjGGjjEGubaubajjubj)rMG}rNG(jUj}rOG(j]j]j]j]j]ujj1Gj]rPGjX)rQG}rRG(jX'Prints on console All tests have passedrSGjjMGj jCjj\j}rTG(j]j]j]j]j]ujMj]rUGj%X'Prints on console All tests have passedrVGrWG}rXG(jjSGjjQGubaubajjubj)rYG}rZG(jUj}r[G(j]j]j]j]j]ujj1Gj]r\GjX)r]G}r^G(jX AM65x J721er_GjjYGj jCjj\j}r`G(j]j]j]j]j]ujMj]raGj%X AM65x J721erbGrcG}rdG(jj_Gjj]Gubaubajjubj)reG}rfG(jUj}rgG(j]j]j]j]j]ujj1Gj]rhGjX)riG}rjG(jXMakefilerkGjjeGj jCjj\j}rlG(j]j]j]j]j]ujMj]rmGj%XMakefilernGroG}rpG(jjkGjjiGubaubajjubejjubj)rqG}rrG(jUj}rsG(j]j]j]j]j]ujjDj]rtG(j)ruG}rvG(jUj}rwG(j]j]j]j]j]ujjqGj]rxGjX)ryG}rzG(jXMMCSD_DMA_TestAppr{GjjuGj jCjj\j}r|G(j]j]j]j]j]ujM j]r}Gj%XMMCSD_DMA_TestAppr~GrG}rG(jj{GjjyGubaubajjubj)rG}rG(jUj}rG(j]j]j]j]j]ujjqGj]rGjX)rG}rG(jX7Functionally same as MMCSD_TestApp but with DMA enabledrGjjGj jCjj\j}rG(j]j]j]j]j]ujM j]rGj%X7Functionally same as MMCSD_TestApp but with DMA enabledrGrG}rG(jjGjjGubaubajjubj)rG}rG(jUj}rG(j]j]j]j]j]ujjqGj]rGjX)rG}rG(jX'Prints on console All tests have passedrGjjGj jCjj\j}rG(j]j]j]j]j]ujM j]rGj%X'Prints on console All tests have passedrGrG}rG(jjGjjGubaubajjubj)rG}rG(jUj}rG(j]j]j]j]j]ujjqGj]rGjX)rG}rG(jX AM65x J721erGjjGj jCjj\j}rG(j]j]j]j]j]ujMj]rGj%X AM65x J721erGrG}rG(jjGjjGubaubajjubj)rG}rG(jUj}rG(j]j]j]j]j]ujjqGj]rGjX)rG}rG(jXMakefilerGjjGj jCjj\j}rG(j]j]j]j]j]ujMj]rGj%XMakefilerGrG}rG(jjGjjGubaubajjubejjubj)rG}rG(jUj}rG(j]j]j]j]j]ujjDj]rG(j)rG}rG(jUj}rG(j]j]j]j]j]ujjGj]rGjX)rG}rG(jXMMCSD_EMMC_TestApprGjjGj jCjj\j}rG(j]j]j]j]j]ujMj]rGj%XMMCSD_EMMC_TestApprGrG}rG(jjGjjGubaubajjubj)rG}rG(jUj}rG(j]j]j]j]j]ujjGj]rGjX)rG}rG(jXUnit Test application demonstrating write and read a fixed number of bytes into the onboard EMMC.Verifies written data pattern to conclude PASS/FAIL.rGjjGj jCjj\j}rG(j]j]j]j]j]ujMj]rGj%XUnit Test application demonstrating write and read a fixed number of bytes into the onboard EMMC.Verifies written data pattern to conclude PASS/FAIL.rGrG}rG(jjGjjGubaubajjubj)rG}rG(jUj}rG(j]j]j]j]j]ujjGj]rGjX)rG}rG(jX(Prints on console All tests have passedrGjjGj jCjj\j}rG(j]j]j]j]j]ujMj]rGj%X(Prints on console All tests have passedrGrG}rG(jjGjjGubaubajjubj)rG}rG(jUj}rG(j]j]j]j]j]ujjGj]rGjX)rG}rG(jX AM65x J721erGjjGj jCjj\j}rG(j]j]j]j]j]ujMj]rGj%X AM65x J721erGrG}rG(jjGjjGubaubajjubj)rG}rG(jUj}rG(j]j]j]j]j]ujjGj]rGjX)rG}rG(jXMakefilerGjjGj jCjj\j}rG(j]j]j]j]j]ujMj]rGj%XMakefilerGrG}rG(jjGjjGubaubajjubejjubj)rG}rG(jUj}rG(j]j]j]j]j]ujjDj]rG(j)rG}rG(jUj}rG(j]j]j]j]j]ujjGj]rGjX)rG}rG(jXMMCSD_EMMC_DMA_TestApprGjjGj jCjj\j}rG(j]j]j]j]j]ujMj]rGj%XMMCSD_EMMC_DMA_TestApprGrG}rH(jjGjjGubaubajjubj)rH}rH(jUj}rH(j]j]j]j]j]ujjGj]rHjX)rH}rH(jX5Functionally Same as EMMC_TestApp but using DMA moderHjjHj jCjj\j}rH(j]j]j]j]j]ujMj]r Hj%X5Functionally Same as EMMC_TestApp but using DMA moder Hr H}r H(jjHjjHubaubajjubj)r H}rH(jUj}rH(j]j]j]j]j]ujjGj]rHjX)rH}rH(jX'Prints on console All tests have passedrHjj Hj jCjj\j}rH(j]j]j]j]j]ujMj]rHj%X'Prints on console All tests have passedrHrH}rH(jjHjjHubaubajjubj)rH}rH(jUj}rH(j]j]j]j]j]ujjGj]rHjX)rH}rH(jX AM65x J721erHjjHj jCjj\j}r H(j]j]j]j]j]ujMj]r!Hj%X AM65x J721er"Hr#H}r$H(jjHjjHubaubajjubj)r%H}r&H(jUj}r'H(j]j]j]j]j]ujjGj]r(HjX)r)H}r*H(jXMakefiler+Hjj%Hj jCjj\j}r,H(j]j]j]j]j]ujMj]r-Hj%XMakefiler.Hr/H}r0H(jj+Hjj)Hubaubajjubejjubj)r1H}r2H(jUj}r3H(j]j]j]j]j]ujjDj]r4H(j)r5H}r6H(jUj}r7H(j]j]j]j]j]ujj1Hj]r8HjX)r9H}r:H(jXMMCSD_Baremetal_TestAppr;Hjj5Hj jCjj\j}rHr?H}r@H(jj;Hjj9Hubaubajjubj)rAH}rBH(jUj}rCH(j]j]j]j]j]ujj1Hj]rDHjX)rEH}rFH(jX"Baremetal version of MMCSD_TestApprGHjjAHj jCjj\j}rHH(j]j]j]j]j]ujM"j]rIHj%X"Baremetal version of MMCSD_TestApprJHrKH}rLH(jjGHjjEHubaubajjubj)rMH}rNH(jUj}rOH(j]j]j]j]j]ujj1Hj]rPHjX)rQH}rRH(jX'Prints on console All tests have passedrSHjjMHj jCjj\j}rTH(j]j]j]j]j]ujM"j]rUHj%X'Prints on console All tests have passedrVHrWH}rXH(jjSHjjQHubaubajjubj)rYH}rZH(jUj}r[H(j]j]j]j]j]ujj1Hj]r\HjX)r]H}r^H(jX AM65x J721er_HjjYHj jCjj\j}r`H(j]j]j]j]j]ujM$j]raHj%X AM65x J721erbHrcH}rdH(jj_Hjj]Hubaubajjubj)reH}rfH(jUj}rgH(j]j]j]j]j]ujj1Hj]rhHjX)riH}rjH(jXMakefilerkHjjeHj jCjj\j}rlH(j]j]j]j]j]ujM$j]rmHj%XMakefilernHroH}rpH(jjkHjjiHubaubajjubejjubj)rqH}rrH(jUj}rsH(j]j]j]j]j]ujjDj]rtH(j)ruH}rvH(jUj}rwH(j]j]j]j]j]ujjqHj]rxHjX)ryH}rzH(jXMMCSD_Baremetal_DMA_TestAppr{HjjuHj jCjj\j}r|H(j]j]j]j]j]ujM'j]r}Hj%XMMCSD_Baremetal_DMA_TestAppr~HrH}rH(jj{HjjyHubaubajjubj)rH}rH(jUj}rH(j]j]j]j]j]ujjqHj]rHjX)rH}rH(jX'Baremetal version of MMCSD_EMMC_TestApprHjjHj jCjj\j}rH(j]j]j]j]j]ujM'j]rHj%X'Baremetal version of MMCSD_EMMC_TestApprHrH}rH(jjHjjHubaubajjubj)rH}rH(jUj}rH(j]j]j]j]j]ujjqHj]rHjX)rH}rH(jX'Prints on console All tests have passedrHjjHj jCjj\j}rH(j]j]j]j]j]ujM'j]rHj%X'Prints on console All tests have passedrHrH}rH(jjHjjHubaubajjubj)rH}rH(jUj}rH(j]j]j]j]j]ujjqHj]rHjX)rH}rH(jX AM65x J721erHjjHj jCjj\j}rH(j]j]j]j]j]ujM)j]rHj%X AM65x J721erHrH}rH(jjHjjHubaubajjubj)rH}rH(jUj}rH(j]j]j]j]j]ujjqHj]rHjX)rH}rH(jXMakefilerHjjHj jCjj\j}rH(j]j]j]j]j]ujM)j]rHj%XMakefilerHrH}rH(jjHjjHubaubajjubejjubj)rH}rH(jUj}rH(j]j]j]j]j]ujjDj]rH(j)rH}rH(jUj}rH(j]j]j]j]j]ujjHj]rHjX)rH}rH(jXMMCSD_Baremetal_EMMC_TestApprHjjHj jCjj\j}rH(j]j]j]j]j]ujM,j]rHj%XMMCSD_Baremetal_EMMC_TestApprHrH}rH(jjHjjHubaubajjubj)rH}rH(jUj}rH(j]j]j]j]j]ujjHj]rHjX)rH}rH(jX'Baremetal version of MMCSD_EMMC_TestApprHjjHj jCjj\j}rH(j]j]j]j]j]ujM,j]rHj%X'Baremetal version of MMCSD_EMMC_TestApprHrH}rH(jjHjjHubaubajjubj)rH}rH(jUj}rH(j]j]j]j]j]ujjHj]rHjX)rH}rH(jX'Prints on console All tests have passedrHjjHj jCjj\j}rH(j]j]j]j]j]ujM,j]rHj%X'Prints on console All tests have passedrHrH}rH(jjHjjHubaubajjubj)rH}rH(jUj}rH(j]j]j]j]j]ujjHj]rHjX)rH}rH(jX AM65x J721erHjjHj jCjj\j}rH(j]j]j]j]j]ujM.j]rHj%X AM65x J721erHrH}rH(jjHjjHubaubajjubj)rH}rH(jUj}rH(j]j]j]j]j]ujjHj]rHjX)rH}rH(jXMakefilerHjjHj jCjj\j}rH(j]j]j]j]j]ujM.j]rHj%XMakefilerHrH}rH(jjHjjHubaubajjubejjubj)rH}rH(jUj}rH(j]j]j]j]j]ujjDj]rH(j)rH}rH(jUj}rH(j]j]j]j]j]ujjHj]rHjX)rH}rH(jX MMCSD_Baremetal_EMMC_DMA_TestApprHjjHj jCjj\j}rH(j]j]j]j]j]ujM1j]rHj%X MMCSD_Baremetal_EMMC_DMA_TestApprHrH}rI(jjHjjHubaubajjubj)rI}rI(jUj}rI(j]j]j]j]j]ujjHj]rIjX)rI}rI(jXFFunctionally same as MMCSD_Baremetal_EMMC_TestApp but with DMA enabledrIjjIj jCjj\j}rI(j]j]j]j]j]ujM1j]r Ij%XFFunctionally same as MMCSD_Baremetal_EMMC_TestApp but with DMA enabledr Ir I}r I(jjIjjIubaubajjubj)r I}rI(jUj}rI(j]j]j]j]j]ujjHj]rIjX)rI}rI(jX'Prints on console All tests have passedrIjj Ij jCjj\j}rI(j]j]j]j]j]ujM1j]rIj%X'Prints on console All tests have passedrIrI}rI(jjIjjIubaubajjubj)rI}rI(jUj}rI(j]j]j]j]j]ujjHj]rIjX)rI}rI(jX AM65x J721erIjjIj jCjj\j}r I(j]j]j]j]j]ujM3j]r!Ij%X AM65x J721er"Ir#I}r$I(jjIjjIubaubajjubj)r%I}r&I(jUj}r'I(j]j]j]j]j]ujjHj]r(IjX)r)I}r*I(jXMakefiler+Ijj%Ij jCjj\j}r,I(j]j]j]j]j]ujM3j]r-Ij%XMakefiler.Ir/I}r0I(jj+Ijj)Iubaubajjubejjubj)r1I}r2I(jUj}r3I(j]j]j]j]j]ujjDj]r4I(j)r5I}r6I(jUj}r7I(j]j]j]j]j]ujj1Ij]r8IjX)r9I}r:I(jXMMCSD_Regression_TestAppr;Ijj5Ij jCjj\j}rIr?I}r@I(jj;Ijj9Iubaubajjubj)rAI}rBI(jUj}rCI(j]j]j]j]j]ujj1Ij]rDIjX)rEI}rFI(jXIMenu driven regression test which tests various configurations of SD cardrGIjjAIj jCjj\j}rHI(j]j]j]j]j]ujM6j]rIIj%XIMenu driven regression test which tests various configurations of SD cardrJIrKI}rLI(jjGIjjEIubaubajjubj)rMI}rNI(jUj}rOI(j]j]j]j]j]ujj1Ij]rPIjX)rQI}rRI(jX'Prints on console All tests have passedrSIjjMIj jCjj\j}rTI(j]j]j]j]j]ujM6j]rUIj%X'Prints on console All tests have passedrVIrWI}rXI(jjSIjjQIubaubajjubj)rYI}rZI(jUj}r[I(j]j]j]j]j]ujj1Ij]r\IjX)r]I}r^I(jX AM65x J721er_IjjYIj jCjj\j}r`I(j]j]j]j]j]ujM7j]raIj%X AM65x J721erbIrcI}rdI(jj_Ijj]Iubaubajjubj)reI}rfI(jUj}rgI(j]j]j]j]j]ujj1Ij]rhIjX)riI}rjI(jXMakefilerkIjjeIj jCjj\j}rlI(j]j]j]j]j]ujM7j]rmIj%XMakefilernIroI}rpI(jjkIjjiIubaubajjubejjubj)rqI}rrI(jUj}rsI(j]j]j]j]j]ujjDj]rtI(j)ruI}rvI(jUj}rwI(j]j]j]j]j]ujjqIj]rxIjX)ryI}rzI(jXMMCSD_EMMC_Regression_TestAppr{IjjuIj jCjj\j}r|I(j]j]j]j]j]ujM:j]r}Ij%XMMCSD_EMMC_Regression_TestAppr~IrI}rI(jj{IjjyIubaubajjubj)rI}rI(jUj}rI(j]j]j]j]j]ujjqIj]rIjX)rI}rI(jXFMenu driven regression test which tests various configurations of EMMCrIjjIj jCjj\j}rI(j]j]j]j]j]ujM:j]rIj%XFMenu driven regression test which tests various configurations of EMMCrIrI}rI(jjIjjIubaubajjubj)rI}rI(jUj}rI(j]j]j]j]j]ujjqIj]rIjX)rI}rI(jX'Prints on console All tests have passedrIjjIj jCjj\j}rI(j]j]j]j]j]ujM:j]rIj%X'Prints on console All tests have passedrIrI}rI(jjIjjIubaubajjubj)rI}rI(jUj}rI(j]j]j]j]j]ujjqIj]rIjX)rI}rI(jX AM65x J721erIjjIj jCjj\j}rI(j]j]j]j]j]ujM;j]rIj%X AM65x J721erIrI}rI(jjIjjIubaubajjubj)rI}rI(jUj}rI(j]j]j]j]j]ujjqIj]rIjX)rI}rI(jXMakefilerIjjIj jCjj\j}rI(j]j]j]j]j]ujM;j]rIj%XMakefilerIrI}rI(jjIjjIubaubajjubejjubejjubejjubaubeubeubj)rI}rI(jUjjqCj jCjjj}rI(j]j]j]j]rIU2benchmarking-read-write-performance-on-am65x-j721erIaj]rIhAaujM@jhj]rI(j)rI}rI(jX4Benchmarking Read/Write Performance (on AM65x/J721e)rIjjIj jCjj"j}rI(j]j]j]j]j]ujM@jhj]rIj%X4Benchmarking Read/Write Performance (on AM65x/J721e)rIrI}rI(jjIjjIubaubjX)rI}rI(jXvThe MMCSD__Regression_TestApp application (listed above) measures read/write throughput (in mega bytes per sec).rIjjIj jCjj\j}rI(j]j]j]j]j]ujMBjhj]rIj%XvThe MMCSD__Regression_TestApp application (listed above) measures read/write throughput (in mega bytes per sec).rIrI}rI(jjIjjIubaubj )rI}rI(jUjjIj Njj j}rI(j]j]j]j]j]ujNjhj]rIj )rI}rI(jXsIt measures the following - RAW read/write throughput: This involves the reading/writing of a continuous block of data, say 1MB data buffer on to the SD/eMMC using MMCSD_Read()/MMCSD_Write(). - FATFS read/write (SD Only) throughput: This involves reading/writing of a 1MB buffer of data through f_read()/f_write(). Please note that FAT32 is tested with SD card only jjIj jCjj j}rI(j]j]j]j]j]ujMHj]rI(j )rI}rI(jXIt measures the followingrIjjIj jCjj j}rI(j]j]j]j]j]ujMHj]rIj%XIt measures the followingrIrI}rI(jjIjjIubaubj )rI}rI(jUj}rI(j]j]j]j]j]ujjIj]rIj)rI}rI(jUj}rI(jX-j]j]j]j]j]ujjIj]rI(j)rI}rI(jXRAW read/write throughput: This involves the reading/writing of a continuous block of data, say 1MB data buffer on to the SD/eMMC using MMCSD_Read()/MMCSD_Write().j}rI(j]j]j]j]j]ujjIj]rIjX)rI}rI(jXRAW read/write throughput: This involves the reading/writing of a continuous block of data, say 1MB data buffer on to the SD/eMMC using MMCSD_Read()/MMCSD_Write().rIjjIj jCjj\j}rI(j]j]j]j]j]ujMEj]rIj%XRAW read/write throughput: This involves the reading/writing of a continuous block of data, say 1MB data buffer on to the SD/eMMC using MMCSD_Read()/MMCSD_Write().rIrI}rI(jjIjjIubaubajj ubj)rI}rI(jXFATFS read/write (SD Only) throughput: This involves reading/writing of a 1MB buffer of data through f_read()/f_write(). Please note that FAT32 is tested with SD card only j}rI(j]j]j]j]j]ujjIj]rIjX)rI}rI(jXFATFS read/write (SD Only) throughput: This involves reading/writing of a 1MB buffer of data through f_read()/f_write(). Please note that FAT32 is tested with SD card onlyrIjjIj jCjj\j}rI(j]j]j]j]j]ujMGj]rIj%XFATFS read/write (SD Only) throughput: This involves reading/writing of a 1MB buffer of data through f_read()/f_write(). Please note that FAT32 is tested with SD card onlyrIrI}rI(jjIjjIubaubajj ubejjubajj ubeubaubeubj)rI}rI(jUjjqCj jCjjj}rI(j]j]j]j]rIUbenchmarking-stepsrIaj]rIhaujMKjhj]rI(j)rI}rJ(jXBenchmarking StepsrJjjIj jCjj"j}rJ(j]j]j]j]j]ujMKjhj]rJj%XBenchmarking StepsrJrJ}rJ(jjJjjIubaubjX)rJ}rJ(jXPThe performance benchmarks on SD Read/Write can be done with the following stepsr JjjIj jCjj\j}r J(j]j]j]j]j]ujMMjhj]r Jj%XPThe performance benchmarks on SD Read/Write can be done with the following stepsr Jr J}rJ(jj JjjJubaubj )rJ}rJ(jUjjIj Njj j}rJ(j]j]j]j]j]ujNjhj]rJj)rJ}rJ(jUj}rJ(jX-j]j]j]j]j]ujjJj]rJ(j)rJ}rJ(jXXLoad the MMCSD_Regression_TestApp on A53/R5 core of AM65x or mpu1_0/mcu1_0 core of J721erJj}rJ(j]j]j]j]j]ujjJj]rJjX)rJ}rJ(jjJjjJj jCjj\j}rJ(j]j]j]j]j]ujMOj]rJj%XXLoad the MMCSD_Regression_TestApp on A53/R5 core of AM65x or mpu1_0/mcu1_0 core of J721er Jr!J}r"J(jjJjjJubaubajj ubj)r#J}r$J(jXmInsert SD Card formatted with FAT32 format preferably with allocation size=4096 bytes for better performance.r%Jj}r&J(j]j]j]j]j]ujjJj]r'JjX)r(J}r)J(jj%Jjj#Jj jCjj\j}r*J(j]j]j]j]j]ujMPj]r+Jj%XmInsert SD Card formatted with FAT32 format preferably with allocation size=4096 bytes for better performance.r,Jr-J}r.J(jj%Jjj(Jubaubajj ubj)r/J}r0J(jXnRun the application. It presents with a menu of various modes the SD card which can be run on the UART consoler1Jj}r2J(j]j]j]j]j]ujjJj]r3JjX)r4J}r5J(jj1Jjj/Jj jCjj\j}r6J(j]j]j]j]j]ujMQj]r7Jj%XnRun the application. It presents with a menu of various modes the SD card which can be run on the UART consoler8Jr9J}r:J(jj1Jjj4Jubaubajj ubj)r;J}rJ(j]j]j]j]j]ujjJj]r?JjX)r@J}rAJ(jj=Jjj;Jj jCjj\j}rBJ(j]j]j]j]j]ujMRj]rCJj%XCSelect the desired mode from the list (say HS mode) and press EnterrDJrEJ}rFJ(jj=Jjj@Jubaubajj ubj)rGJ}rHJ(jXThe test will run RAW & FATFS read/writes of various buffer sizes 256K, 512K, 1024K and 2048K. This might take a minute or two to complete.j}rIJ(j]j]j]j]j]ujjJj]rJJjX)rKJ}rLJ(jXThe test will run RAW & FATFS read/writes of various buffer sizes 256K, 512K, 1024K and 2048K. This might take a minute or two to complete.rMJjjGJj jCjj\j}rNJ(j]j]j]j]j]ujMSj]rOJj%XThe test will run RAW & FATFS read/writes of various buffer sizes 256K, 512K, 1024K and 2048K. This might take a minute or two to complete.rPJrQJ}rRJ(jjMJjjKJubaubajj ubj)rSJ}rTJ(jXyTwo tables are printed at the end of the test run for this mode with RAW & FATFS throughput numbers for each buffer size.j}rUJ(j]j]j]j]j]ujjJj]rVJjX)rWJ}rXJ(jXyTwo tables are printed at the end of the test run for this mode with RAW & FATFS throughput numbers for each buffer size.rYJjjSJj jCjj\j}rZJ(j]j]j]j]j]ujMUj]r[Jj%XyTwo tables are printed at the end of the test run for this mode with RAW & FATFS throughput numbers for each buffer size.r\Jr]J}r^J(jjYJjjWJubaubajj ubj)r_J}r`J(jXNote: Instead of running each mode seperately, you can select "All non powercycle tests" option (-1) which runs all the supported modes along with the throughput numbers for each of them. j}raJ(j]j]j]j]j]ujjJj]rbJjX)rcJ}rdJ(jXNote: Instead of running each mode seperately, you can select "All non powercycle tests" option (-1) which runs all the supported modes along with the throughput numbers for each of them.reJjj_Jj jCjj\j}rfJ(j]j]j]j]j]ujMWj]rgJj%XNote: Instead of running each mode seperately, you can select "All non powercycle tests" option (-1) which runs all the supported modes along with the throughput numbers for each of them.rhJriJ}rjJ(jjeJjjcJubaubajj ubejjubaubjX)rkJ}rlJ(jXDEMMC performance benchmarks can be measured with the following stepsrmJjjIj jCjj\j}rnJ(j]j]j]j]j]ujM[jhj]roJj%XDEMMC performance benchmarks can be measured with the following stepsrpJrqJ}rrJ(jjmJjjkJubaubj )rsJ}rtJ(jUjjIj Njj j}ruJ(j]j]j]j]j]ujNjhj]rvJj)rwJ}rxJ(jUj}ryJ(jX-j]j]j]j]j]ujjsJj]rzJ(j)r{J}r|J(jX]Load the MMCSD_EMMC_Regression_TestApp on A53/R5 core of AM65x or mpu1_0/mcu1_0 core of J721er}Jj}r~J(j]j]j]j]j]ujjwJj]rJjX)rJ}rJ(jj}Jjj{Jj jCjj\j}rJ(j]j]j]j]j]ujM]j]rJj%X]Load the MMCSD_EMMC_Regression_TestApp on A53/R5 core of AM65x or mpu1_0/mcu1_0 core of J721erJrJ}rJ(jj}JjjJubaubajj ubj)rJ}rJ(jXgRun the application. It presents with a menu of various eMMC modes which can be run on the UART consolerJj}rJ(j]j]j]j]j]ujjwJj]rJjX)rJ}rJ(jjJjjJj jCjj\j}rJ(j]j]j]j]j]ujM^j]rJj%XgRun the application. It presents with a menu of various eMMC modes which can be run on the UART consolerJrJ}rJ(jjJjjJubaubajj ubj)rJ}rJ(jXGSelect the desired mode from the list (say HS-DDR mode) and press EnterrJj}rJ(j]j]j]j]j]ujjwJj]rJjX)rJ}rJ(jjJjjJj jCjj\j}rJ(j]j]j]j]j]ujM_j]rJj%XGSelect the desired mode from the list (say HS-DDR mode) and press EnterrJrJ}rJ(jjJjjJubaubajj ubj)rJ}rJ(jXThe test will run RAW read/writes of various buffer sizes 256K, 512K, 1024K and 2048K. This might take a minute or two to complete.j}rJ(j]j]j]j]j]ujjwJj]rJjX)rJ}rJ(jXThe test will run RAW read/writes of various buffer sizes 256K, 512K, 1024K and 2048K. This might take a minute or two to complete.rJjjJj jCjj\j}rJ(j]j]j]j]j]ujM`j]rJj%XThe test will run RAW read/writes of various buffer sizes 256K, 512K, 1024K and 2048K. This might take a minute or two to complete.rJrJ}rJ(jjJjjJubaubajj ubj)rJ}rJ(jX_A table is printed at the end of the test with the RAW throughput numbers for each buffer size.rJj}rJ(j]j]j]j]j]ujjwJj]rJjX)rJ}rJ(jjJjjJj jCjj\j}rJ(j]j]j]j]j]ujMbj]rJj%X_A table is printed at the end of the test with the RAW throughput numbers for each buffer size.rJrJ}rJ(jjJjjJubaubajj ubj)rJ}rJ(jXNote: Instead of running each mode seperately, you can select "All non powercycle tests" option (-1) which runs all the supported modes along with the throughput numbers for each of them. j}rJ(j]j]j]j]j]ujjwJj]rJjX)rJ}rJ(jXNote: Instead of running each mode seperately, you can select "All non powercycle tests" option (-1) which runs all the supported modes along with the throughput numbers for each of them.rJjjJj jCjj\j}rJ(j]j]j]j]j]ujMcj]rJj%XNote: Instead of running each mode seperately, you can select "All non powercycle tests" option (-1) which runs all the supported modes along with the throughput numbers for each of them.rJrJ}rJ(jjJjjJubaubajj ubejjubaubeubj)rJ}rJ(jUjKjjqCj jCjjj}rJ(j]rJjAaj]j]j]rJUid101rJaj]ujMgjhj]rJ(j)rJ}rJ(jX$Building CCS projects based examplesrJjjJj jCjj"j}rJ(j]j]j]j]j]ujMgjhj]rJj%X$Building CCS projects based examplesrJrJ}rJ(jjJjjJubaubjX)rJ}rJ(jXCCS Projects mentioned in the above table are built using pdkProjectCreate.bat/sh as explained in `PDK Example and Test Project Creation `__jjJj jCjj\j}rJ(j]j]j]j]j]ujMijhj]rJ(j%XbCCS Projects mentioned in the above table are built using pdkProjectCreate.bat/sh as explained in rJrJ}rJ(jXbCCS Projects mentioned in the above table are built using pdkProjectCreate.bat/sh as explained in jjJubj)rJ}rJ(jXe`PDK Example and Test Project Creation `__j}rJ(UnameX%PDK Example and Test Project CreationjX9index_overview.html#pdk-example-and-test-project-creationj]j]j]j]j]ujjJj]rJj%X%PDK Example and Test Project CreationrJrJ}rJ(jUjjJubajjubeubeubj)rJ}rJ(jUjjqCj jCjjj}rJ(j]j]j]j]rJU.building-mmcsd-test-applications-via-makefilesrJaj]rJh:aujMnjhj]rJ(j)rJ}rJ(jX.Building MMCSD Test applications via makefilesrJjjJj jCjj"j}rJ(j]j]j]j]j]ujMnjhj]rJj%X.Building MMCSD Test applications via makefilesrJrJ}rJ(jjJjjJubaubj)rJ}rJ(jUjjJj jCjjj}rJ(jX-j]j]j]j]j]ujMpjhj]rJ(j)rJ}rJ(jX[MMCSD Test applications and dependent libraries are built from the top level mmcsd makefilerJjjJj jCjj j}rJ(j]j]j]j]j]ujNjhj]rJjX)rJ}rJ(jjJjjJj jCjj\j}rJ(j]j]j]j]j]ujMpj]rJj%X[MMCSD Test applications and dependent libraries are built from the top level mmcsd makefilerJrJ}rJ(jjJjjJubaubaubj)rJ}rK(jX:Refer to the `Processor SDK RTOS Getting Started Guide `__ for details of how to setup the build environment. Once you have setup the build environment, issue the following commands: - cd /packages/ - To build: make mmcsd - To clean: make mmcsd_clean jjJj jCjj j}rK(j]j]j]j]j]ujNjhj]rK(jX)rK}rK(jXRefer to the `Processor SDK RTOS Getting Started Guide `__ for details of how to setup the build environment. Once you have setup the build environment, issue the following commands:jjJj jCjj\j}rK(j]j]j]j]j]ujMqj]rK(j%X Refer to the rKrK}r K(jX Refer to the jjKubj)r K}r K(jXT`Processor SDK RTOS Getting Started Guide `__j}r K(UnameX(Processor SDK RTOS Getting Started GuidejX%index_overview.html#setup-environmentj]j]j]j]j]ujjKj]r Kj%X(Processor SDK RTOS Getting Started GuiderKrK}rK(jUjj Kubajjubj%X} for details of how to setup the build environment. Once you have setup the build environment, issue the following commands:rKrK}rK(jX} for details of how to setup the build environment. Once you have setup the build environment, issue the following commands:jjKubeubj )rK}rK(jUj}rK(j]j]j]j]j]ujjJj]rKj)rK}rK(jUj}rK(jX-j]j]j]j]j]ujjKj]rK(j)rK}rK(jXcd /packages/rKj}rK(j]j]j]j]j]ujjKj]r KjX)r!K}r"K(jjKjjKj jCjj\j}r#K(j]j]j]j]j]ujMsj]r$Kj%Xcd /packages/r%Kr&K}r'K(jjKjj!Kubaubajj ubj)r(K}r)K(jXTo build: make mmcsdr*Kj}r+K(j]j]j]j]j]ujjKj]r,KjX)r-K}r.K(jj*Kjj(Kj jCjj\j}r/K(j]j]j]j]j]ujMtj]r0Kj%XTo build: make mmcsdr1Kr2K}r3K(jj*Kjj-Kubaubajj ubj)r4K}r5K(jXTo clean: make mmcsd_clean j}r6K(j]j]j]j]j]ujjKj]r7KjX)r8K}r9K(jXTo clean: make mmcsd_cleanr:Kjj4Kj jCjj\j}r;K(j]j]j]j]j]ujMuj]rK}r?K(jj:Kjj8Kubaubajj ubejjubajj ubeubj)r@K}rAK(jXSimilarly, to build at the module level, issue the following commands for rebuilding : - cd /packages/ti/drv/mmcsd - To build: make all - To clean: make clean jjJj jCjj j}rBK(j]j]j]j]j]ujNjhj]rCK(jX)rDK}rEK(jXVSimilarly, to build at the module level, issue the following commands for rebuilding :rFKjj@Kj jCjj\j}rGK(j]j]j]j]j]ujMwj]rHKj%XVSimilarly, to build at the module level, issue the following commands for rebuilding :rIKrJK}rKK(jjFKjjDKubaubj )rLK}rMK(jUj}rNK(j]j]j]j]j]ujj@Kj]rOKj)rPK}rQK(jUj}rRK(jX-j]j]j]j]j]ujjLKj]rSK(j)rTK}rUK(jXcd /packages/ti/drv/mmcsdrVKj}rWK(j]j]j]j]j]ujjPKj]rXKjX)rYK}rZK(jjVKjjTKj jCjj\j}r[K(j]j]j]j]j]ujMyj]r\Kj%Xcd /packages/ti/drv/mmcsdr]Kr^K}r_K(jjVKjjYKubaubajj ubj)r`K}raK(jXTo build: make allrbKj}rcK(j]j]j]j]j]ujjPKj]rdKjX)reK}rfK(jjbKjj`Kj jCjj\j}rgK(j]j]j]j]j]ujMzj]rhKj%XTo build: make allriKrjK}rkK(jjbKjjeKubaubajj ubj)rlK}rmK(jXTo clean: make clean j}rnK(j]j]j]j]j]ujjPKj]roKjX)rpK}rqK(jXTo clean: make cleanrrKjjlKj jCjj\j}rsK(j]j]j]j]j]ujM{j]rtKj%XTo clean: make cleanruKrvK}rwK(jjrKjjpKubaubajj ubejjubajj ubeubeubeubj)rxK}ryK(jUjKjjqCj jCjjj}rzK(j]r{KXadditional referencesr|Kaj]j]j]r}KUid102r~Kaj]ujMjhj]rK(j)rK}rK(jXAdditional ReferencesrKjjxKj jCjj"j}rK(j]j]j]j]j]ujMjhj]rKj%XAdditional ReferencesrKrK}rK(jjKjjKubaubj)rK}rK(jUjjxKj jCjjj}rK(j]j]j]j]j]ujNjhj]rKj)rK}rK(jUj}rK(j]j]j]j]j]UcolsKujjKj]rK(j)rK}rK(jUj}rK(j]j]j]j]j]UcolwidthK#ujjKj]jjubj)rK}rK(jUj}rK(j]j]j]j]j]UcolwidthK,ujjKj]jjubj)rK}rK(jUj}rK(j]j]j]j]j]ujjKj]rK(j)rK}rK(jUj}rK(j]j]j]j]j]ujjKj]rK(j)rK}rK(jUj}rK(j]j]j]j]j]ujjKj]rKjX)rK}rK(jX **Document**rKjjKj jCjj\j}rK(j]j]j]j]j]ujMj]rKj|)rK}rK(jjKj}rK(j]j]j]j]j]ujjKj]rKj%XDocumentrKrK}rK(jUjjKubajjubaubajjubj)rK}rK(jUj}rK(j]j]j]j]j]ujjKj]rKjX)rK}rK(jX **Location**rKjjKj jCjj\j}rK(j]j]j]j]j]ujMj]rKj|)rK}rK(jjKj}rK(j]j]j]j]j]ujjKj]rKj%XLocationrKrK}rK(jUjjKubajjubaubajjubejjubj)rK}rK(jUj}rK(j]j]j]j]j]ujjKj]rK(j)rK}rK(jUj}rK(j]j]j]j]j]ujjKj]rKjX)rK}rK(jXAPI Reference ManualrKjjKj jCjj\j}rK(j]j]j]j]j]ujMj]rKj%XAPI Reference ManualrKrK}rK(jjKjjKubaubajjubj)rK}rK(jUj}rK(j]j]j]j]j]ujjKj]rKjX)rK}rK(jXR$(TI_PDK_INSTALL_DIR)\\packages\\ti \\drv\\mmcsd\\docs\\doxygen\\html\\inde x.htmljjKj jCjj\j}rK(j]j]j]j]j]ujMj]rKj%XJ$(TI_PDK_INSTALL_DIR)\packages\ti \drv\mmcsd\docs\doxygen\html\inde x.htmlrKrK}rK(jXR$(TI_PDK_INSTALL_DIR)\\packages\\ti \\drv\\mmcsd\\docs\\doxygen\\html\\inde x.htmljjKubaubajjubejjubj)rK}rK(jUj}rK(j]j]j]j]j]ujjKj]rK(j)rK}rK(jUj}rK(j]j]j]j]j]ujjKj]rKjX)rK}rK(jX Release NotesrKjjKj jCjj\j}rK(j]j]j]j]j]ujMj]rKj%X Release NotesrKrK}rK(jjKjjKubaubajjubj)rK}rK(jUj}rK(j]j]j]j]j]ujjKj]rKjX)rK}rK(jXS$(TI_PDK_INSTALL_DIR)\\packages\\ti \\drv\\mmcsd\\docs\\ReleaseNotes_MMCS D_LLD.pdfjjKj jCjj\j}rK(j]j]j]j]j]ujMj]rKj%XM$(TI_PDK_INSTALL_DIR)\packages\ti \drv\mmcsd\docs\ReleaseNotes_MMCS D_LLD.pdfrKrK}rK(jXS$(TI_PDK_INSTALL_DIR)\\packages\\ti \\drv\\mmcsd\\docs\\ReleaseNotes_MMCS D_LLD.pdfjjKubaubajjubejjubejjubejjubaubj)rK}rK(jUjjxKj jCjjj}rK(j]j]j]j]j]ujMjhj]rKj)rK}rK(jUjKjjKj jCjjj}rK(j]j]j]j]j]ujKjhj]ubaubeubeubj jCjjj}rK(j]rKXoverviewrKaj]j]j]rKUid93rKaj]ujKjhj]rL(j)rL}rL(jXOverviewrLjjoCj jCjj"j}rL(j]j]j]j]j]ujKjhj]rLj%XOverviewrLrL}rL(jjLjjLubaubj)r L}r L(jUjKjjoCj jCjjj}r L(j]r LX introductionr Laj]j]j]rLUid94rLaj]ujKjhj]rL(j)rL}rL(jX IntroductionrLjj Lj jCjj"j}rL(j]j]j]j]j]ujKjhj]rLj%X IntroductionrLrL}rL(jjLjjLubaubjX)rL}rL(jXMMCSD module provides an interface between CPU and any MMCSD-bus-compatible device that connects via MMCSD serial bus. External components attached to MMCSD bus can serially transmit/receive data to/from the CPU device through two-wire interfacerLjj Lj jCjj\j}rL(j]j]j]j]j]ujK jhj]rLj%XMMCSD module provides an interface between CPU and any MMCSD-bus-compatible device that connects via MMCSD serial bus. External components attached to MMCSD bus can serially transmit/receive data to/from the CPU device through two-wire interfacerLrL}r L(jjLjjLubaubjb)r!L}r"L(jX Key Featuresr#Ljj Lj jCjjfj}r$L(j]r%LU key-featuresr&Laj]j]j]j]r'LhaujNjhj]r(Lj%X Key Featuresr)Lr*L}r+L(jj#Ljj!Lubaubj)r,L}r-L(jUjj Lj jCjjj}r.L(j]j]j]j]j]ujKjhj]r/Lj)r0L}r1L(jXType of transfersr2LjKjj,Lj jCjjj}r3L(j]j]j]j]j]ujKjhj]r4Lj%XType of transfersr5Lr6L}r7L(jj2Ljj0Lubaubaubj )r8L}r9L(jUjj Lj Njj j}r:L(j]j]j]j]j]ujNjhj]r;Lj)rL(jX-j]j]j]j]j]ujj8Lj]r?L(j)r@L}rAL(jX ReadrBLj}rCL(j]j]j]j]j]ujjM(j]UlevelKj]j]r?Mj~KaUsourcejCj]j]UlineMUtypejAujMjhj]r@MjX)rAM}rBM(jX8Duplicate implicit target name: "additional references".j}rCM(j]j]j]j]j]ujjjjMj j^Mjj&j}rM(j2j3j]j]j]j]j]ujMjhj]rMj%X!#include rMrM}rM(jUjjMubaubjX)rM}rM(jXCPlease see the doxygen in "API Reference Manual" below for details.rMjjMj j^Mjj\j}rM(j]j]j]j]j]ujKBjhj]rMj%XCPlease see the doxygen in "API Reference Manual" below for details.rMrM}rM(jjMjjMubaubj)rM}rM(jUjjMj j^Mjjj}rM(j]j]j]j]j]ujKDjhj]rMj)rM}rM(jUjKjjMj j^Mjjj}rM(j]j]j]j]j]ujKjhj]ubaubeubeubj)rM}rM(jUjKjjLMj j^Mjjj}rM(j]rMX applicationrMaj]j]j]rMUid109rMaj]ujKGjhj]rM(j)rM}rM(jX ApplicationrMjjMj j^Mjj"j}rM(j]j]j]j]j]ujKGjhj]rMj%X ApplicationrMrM}rM(jjMjjMubaubj)rM}rM(jUjKjjMj j^Mjjj}rM(j]rMXexamplesrMaj]j]j]rMUid110rMaj]ujKJjhj]rM(j)rM}rM(jXExamplesrMjjMj j^Mjj"j}rM(j]j]j]j]j]ujKJjhj]rMj%XExamplesrMrM}rM(jjMjjMubaubj)rM}rM(jUjjMj j^Mjjj}rM(j]j]j]j]j]ujNjhj]rMj)rM}rM(jUj}rM(j]j]j]j]j]UcolsKujjMj]rM(j)rM}rM(jUj}rM(j]j]j]j]j]UcolwidthKujjMj]jjubj)rM}rM(jUj}rM(j]j]j]j]j]UcolwidthKujjMj]jjubj)rM}rM(jUj}rM(j]j]j]j]j]UcolwidthKujjMj]jjubj)rM}rM(jUj}rM(j]j]j]j]j]ujjMj]rMj)rM}rM(jUj}rM(j]j]j]j]j]ujjMj]rM(j)rM}rM(jUj}rM(j]j]j]j]j]ujjMj]rMjX)rM}rN(jXNamerNjjMj j^Mjj\j}rN(j]j]j]j]j]ujKMj]rNj%XNamerNrN}rN(jjNjjMubaubajjubj)rN}rN(jUj}r N(j]j]j]j]j]ujjMj]r Nj)r N}r N(jUj}r N(j]j]j]j]j]ujjNj]rNj)rN}rN(jX DescriptionrNjKjj Nj j^Mjjj}rN(j]j]j]j]j]ujKj]rNj%X DescriptionrNrN}rN(jjNjjNubaubajjubajjubj)rN}rN(jUj}rN(j]j]j]j]j]ujjMj]rNjX)rN}rN(jXExpected ResultsrNjjNj j^Mjj\j}rN(j]j]j]j]j]ujKMj]rNj%XExpected Resultsr Nr!N}r"N(jjNjjNubaubajjubejjubajjubj)r#N}r$N(jUj}r%N(j]j]j]j]j]ujjMj]r&N(j)r'N}r(N(jUj}r)N(j]j]j]j]j]ujj#Nj]r*N(j)r+N}r,N(jUj}r-N(j]j]j]j]j]ujj'Nj]r.NjX)r/N}r0N(jXQMSS_Example applicationr1Njj+Nj j^Mjj\j}r2N(j]j]j]j]j]ujKOj]r3Nj%XQMSS_Example applicationr4Nr5N}r6N(jj1Njj/Nubaubajjubj)r7N}r8N(jUj}r9N(j]j]j]j]j]ujj'Nj]r:Nj)r;N}rNj)r?N}r@N(jX\Example demonstrating *infra DMA, interrupt test* use case. Reference example for developersjKjj;Nj j^Mjjj}rAN(j]j]j]j]j]ujKj]rBN(j%XExample demonstrating rCNrDN}rEN(jXExample demonstrating jj?Nubj<)rFN}rGN(jX*infra DMA, interrupt test*j}rHN(j]j]j]j]j]ujj?Nj]rINj%Xinfra DMA, interrupt testrJNrKN}rLN(jUjjFNubajjDubj%X+ use case. Reference example for developersrMNrNN}rON(jX+ use case. Reference example for developersjj?Nubeubajjubajjubj)rPN}rQN(jUj}rRN(j]j]j]j]j]ujj'Nj]rSNj)rTN}rUN(jUj}rVN(j]j]j]j]j]ujjPNj]rWNj)rXN}rYN(jX5User observes the output printed over the CCS consolerZNjKjjTNj j^Mjjj}r[N(j]j]j]j]j]ujKj]r\Nj%X5User observes the output printed over the CCS consoler]Nr^N}r_N(jjZNjjXNubaubajjubajjubejjubj)r`N}raN(jUj}rbN(j]j]j]j]j]ujj#Nj]rcN(j)rdN}reN(jUj}rfN(j]j]j]j]j]ujj`Nj]rgNjX)rhN}riN(jXQMSS_UnitTestApplicat ionrjNjjdNj j^Mjj\j}rkN(j]j]j]j]j]ujKWj]rlNj%XQMSS_UnitTestApplicat ionrmNrnN}roN(jjjNjjhNubaubajjubj)rpN}rqN(jUj}rrN(j]j]j]j]j]ujj`Nj]rsNj)rtN}ruN(jUj}rvN(j]j]j]j]j]ujjpNj]rwNj)rxN}ryN(jX&Unit Test application to test all APIsrzNjKjjtNj j^Mjjj}r{N(j]j]j]j]j]ujKj]r|Nj%X&Unit Test application to test all APIsr}Nr~N}rN(jjzNjjxNubaubajjubajjubj)rN}rN(jUj}rN(j]j]j]j]j]ujj`Nj]rNj)rN}rN(jUj}rN(j]j]j]j]j]ujjNj]rNj)rN}rN(jX5User observes the output printed over the CCS consolerNjKjjNj j^Mjjj}rN(j]j]j]j]j]ujKj]rNj%X5User observes the output printed over the CCS consolerNrN}rN(jjNjjNubaubajjubajjubejjubejjubejjubaubjb)rN}rN(jXSample Example OutputrNjKjjMj j^Mjjfj}rN(j]rNUid111rNaj]j]rNj<aj]j]ujNjhj]rNj%XSample Example OutputrNrN}rN(jjNjjNubaubjX)rN}rN(jX%This came from K2K multicore example:rNjjMj j^Mjj\j}rN(j]j]j]j]j]ujK_jhj]rNj%X%This came from K2K multicore example:rNrN}rN(jjNjjNubaubj#)rN}rN(jX&************************************************** ************ QMSS Multicore Example ************** ************************************************** ************************************************** ************ QMSS Multicore Example ************** ************************************************** ************************************************** ************************************************** ************ QMSS Multicore Example ************** ************ QMSS Multicore Example ************** ************************************************** ************************************************** Core 1 : Starting BIOS... Core 2 : Starting BIOS... Core 3 : Starting BIOS... Core 0 : Starting BIOS... Core 0 : Created RM packet heap Core 0 : Created IPC MessageQ heap Core 0 : Created receive Q for Client1 Core 1 : Opened RM packet heap Core 2 : Opened RM packet heap Core 3 : Opened RM packet heap Core 1 : Opened IPC MessageQ heap Core 2 : Opened IPC MessageQ heap Core 3 : Opened IPC MessageQ heap Core 1 : Created receive Q for Server Core 2 : Created receive Q for Server Core 3 : Created receive Q for Server Core 1 : Opened Server's receive Q Core 1 : Waiting for QMSS to be initialized... Core 0 : Opened Client1's receive Q for Server Core 0 : Created receive Q for Client2 Core 0 : Opened Client2's receive Q for Server Core 0 : Created receive Q for Client3 Core 2 : Opened Server's receive Q Core 2 : Waiting for QMSS to be initialized... Core 0 : Opened Client3's receive Q for Server -----------------------Initializing--------------------------- Core 0 : L1D cache size 4. L2 cache size 0. Core 0 : Memory region 0 inserted Core 0 : Memory region 1 inserted Core 0 : Tx Completion Queue Number  : 897 opened Core 0 : Number of Tx descriptors requested : 32. Number of descriptors allocated : 32 Core 0 : Number of Rx descriptors requested : 32. Number of descriptors allocated : 32 Core 0 : Number of Sync free descriptors requested : 32. Number of descriptors allocated : 32 Core 0 : Sync Queue Number  : 9025 opened Core 0 : Sync Cfg Queue Number  : 9026 opened Core 0 : Sync Free Queue Number  : 898 opened Core 0 : Receive Free Queue Number  : 736 opened Core 0 : Transmit Free Queue Number  : 8928 opened Core 0 : System initialization completed: 8928 Core 0 : Publishing RM nameserver names for shared queues --------------------Queue status CORE 0---------------------- After Initialization Tx Free Queue 8928 Entry Count  : 32 Rx Free Queue 736 Entry Count  : 32 Tx completion Queue 897 Entry Count  : 0 Sync Queue 9025 Entry Count  : 0 Sync free Queue 898 Entry Count  : 32 Sync Cfg Queue 9026 Entry Count  : 0 ------------------------------------------------------------- Core 0 : Registering High Priority interrupt channel : 0 eventId : 48 queue Number : 704 Core 3 : Opened Server's receive Q Core 1 : QMSS initialization done. Core 2 : QMSS initialization done. Core 3 : Waiting for QMSS to be initialized... Core 3 : QMSS initialization done. Core 1 : Rx Free Queue Number  : 736 opened Core 2 : Rx Free Queue Number  : 736 opened Core 3 : Rx Free Queue Number  : 736 opened Core 1 : Tx Free Queue Number  : 8928 opened Core 2 : Tx Free Queue Number  : 8928 opened Core 3 : Tx Free Queue Number  : 8928 opened Core 1 : Tx Completion Queue Number : 897 opened Core 2 : Tx Completion Queue Number : 897 opened Core 3 : Tx Completion Queue Number : 897 opened Core 1 : Sync Queue Number  : 9025 opened Core 2 : Sync Queue Number  : 9025 opened Core 3 : Sync Queue Number  : 9025 opened Core 1 : Sync Free Queue Number  : 898 opened Core 2 : Sync Free Queue Number  : 898 opened Core 3 : Sync Free Queue Number  : 898 opened Core 1 : Sync Cfg Queue Number  : 9026 opened Core 2 : Sync Cfg Queue Number  : 9026 opened Core 3 : Sync Cfg Queue Number  : 9026 opened Core 1 : Registering High Priority interrupt channel : 1 eventId : 48 queue Number : 705 Core 2 : Registering High Priority interrupt channel : 2 eventId : 48 queue Number : 706 Core 3 : Registering High Priority interrupt channel : 3 eventId : 48 queue Number : 707 Core 1 : Waiting for sync signal Core 2 : Waiting for sync signal Core 3 : Waiting for sync signal Core 0 : Opened Tx channel  : 0 Core 0 : Opened Rx channel  : 0 Core 0 : Transmit Queue Number  : 800 Core 0 : Receive Queue Number  : 704 Core 0 : Opened Rx flow  : 0 Core 0 : High priority accumulator programmed for channel : 0 queue : 704 Core 0 : Transmitting 8 packets.......... ************************************************************* Core 0 : Opened Tx channel  : 0 Core 0 : Opened Rx channel  : 0 Core 0 : Transmit Queue Number  : 800 Core 0 : Receive Queue Number  : 705 Core 0 : Opened Rx flow  : 0 Core 0 : High priority accumulator programmed for channel : 1 queue : 705 Core 0 : Transmitting 8 packets.......... ************************************************************* Core 0 : Opened Tx channel  : 0 Core 0 : Opened Rx channel  : 0 Core 0 : Transmit Queue Number  : 800 Core 0 : Receive Queue Number  : 706 Core 0 : Opened Rx flow  : 0 Core 0 : High priority accumulator programmed for channel : 2 queue : 706 Core 0 : Transmitting 8 packets.......... ************************************************************* Core 0 : Opened Tx channel  : 0 Core 0 : Opened Rx channel  : 0 Core 0 : Transmit Queue Number  : 800 Core 0 : Receive Queue Number  : 707 Core 0 : Opened Rx flow  : 0 Core 0 : High priority accumulator programmed for channel : 3 queue : 707 Core 0 : Transmitting 8 packets.......... ************************************************************* Core 0 : Waiting for sync signal Core 0 : Got sync signal ************************************************************* --------------------Queue status CORE 0---------------------- After packet processing Tx Free Queue 8928 Entry Count  : 0 Rx Free Queue 736 Entry Count  : 32 Tx completion Queue 897 Entry Count  : 32 Sync Queue 9025 Entry Count  : 4 Sync free Queue 898 Entry Count  : 27 Sync Cfg Queue 9026 Entry Count  : 1 ------------------------------------------------------------- Core 0 : Waiting for other cores to ack sync signal Core 1 : Got sync signal Core 2 : Got sync signal Core 3 : Got sync signal ************************************************************* ************************************************************* ************************************************************* Core 0 : acks found --------------------Deinitializing--------------------------- --------------------Queue status CORE 0---------------------- Before exit Tx Free Queue 8928 Entry Count  : 0 Rx Free Queue 736 Entry Count  : 32 Tx completion Queue 897 Entry Count  : 32 Sync Queue 9025 Entry Count  : 0 Sync free Queue 898 Entry Count  : 28 Sync Cfg Queue 9026 Entry Count  : 4 ------------------------------------------------------------- Core 0 : Receive free queue closed successfully. Ref count : 0 Core 0 : Transmit completion queue closed successfully. Ref count : 3 Core 0 : Transmit free queue closed successfully. Ref count : 3 Core 0 : Sync queue closed successfully. Ref count : 3 Core 0 : Sync free queue closed successfully. Ref count : 3 Core 0 : Sync queue closed successfully. Ref count : 3 Core 0 : CPPI CPDMA closed successfully Core 0 : CPPI exit successful Core 0: Cleaning regions Core 0: exit QMSS Core 1 : Receive free queue closed successfully. Ref count : 3 Core 2 : Receive free queue closed successfully. Ref count : 2 Core 3 : Receive free queue closed successfully. Ref count : 1 Core 1 : Transmit completion queue closed successfully. Ref count : 2 Core 2 : Transmit completion queue closed successfully. Ref count : 1 Core 3 : Transmit completion queue closed successfully. Ref count : 0 Core 1 : Transmit free queue closed successfully. Ref count : 2 Core 2 : Transmit free queue closed successfully. Ref count : 1 Core 3 : Transmit free queue closed successfully. Ref count : 0 Core 1 : Sync queue closed successfully. Ref count : 2 Core 2 : Sync queue closed successfully. Ref count : 1 Core 3 : Sync queue closed successfully. Ref count : 0 Core 1 : Sync free queue closed successfully. Ref count : 2 Core 2 : Sync free queue closed successfully. Ref count : 1 Core 3 : Sync free queue closed successfully. Ref count : 0 Core 1 : Sync queue closed successfully. Ref count : 2 Core 2 : Sync queue closed successfully. Ref count : 1 Core 3 : Sync queue closed successfully. Ref count : 0 ******************************************************* ******************************************************* ******************************************************* ******** QMSS Multicore (1) Example Done (PASS) ******* ******** QMSS Multicore (2) Example Done (PASS) ******* ******** QMSS Multicore (3) Example Done (PASS) ******* ******************************************************* ******************************************************* ******************************************************* Core 0 : Deleting RM nameserver names for shared queues Instance name: RM_Server Handle: 0x00854578 Type: Server Resource Status: Core 0 : All resources freed successfully ******************************************************* ******** QMSS Multicore (0) Example Done (PASS) ******* *******************************************************jjMj j^Mjj&j}rN(j2j3j]j]j]j]j]ujMjhj]rNj%X&************************************************** ************ QMSS Multicore Example ************** ************************************************** ************************************************** ************ QMSS Multicore Example ************** ************************************************** ************************************************** ************************************************** ************ QMSS Multicore Example ************** ************ QMSS Multicore Example ************** ************************************************** ************************************************** Core 1 : Starting BIOS... Core 2 : Starting BIOS... Core 3 : Starting BIOS... Core 0 : Starting BIOS... Core 0 : Created RM packet heap Core 0 : Created IPC MessageQ heap Core 0 : Created receive Q for Client1 Core 1 : Opened RM packet heap Core 2 : Opened RM packet heap Core 3 : Opened RM packet heap Core 1 : Opened IPC MessageQ heap Core 2 : Opened IPC MessageQ heap Core 3 : Opened IPC MessageQ heap Core 1 : Created receive Q for Server Core 2 : Created receive Q for Server Core 3 : Created receive Q for Server Core 1 : Opened Server's receive Q Core 1 : Waiting for QMSS to be initialized... Core 0 : Opened Client1's receive Q for Server Core 0 : Created receive Q for Client2 Core 0 : Opened Client2's receive Q for Server Core 0 : Created receive Q for Client3 Core 2 : Opened Server's receive Q Core 2 : Waiting for QMSS to be initialized... Core 0 : Opened Client3's receive Q for Server -----------------------Initializing--------------------------- Core 0 : L1D cache size 4. L2 cache size 0. Core 0 : Memory region 0 inserted Core 0 : Memory region 1 inserted Core 0 : Tx Completion Queue Number  : 897 opened Core 0 : Number of Tx descriptors requested : 32. Number of descriptors allocated : 32 Core 0 : Number of Rx descriptors requested : 32. Number of descriptors allocated : 32 Core 0 : Number of Sync free descriptors requested : 32. Number of descriptors allocated : 32 Core 0 : Sync Queue Number  : 9025 opened Core 0 : Sync Cfg Queue Number  : 9026 opened Core 0 : Sync Free Queue Number  : 898 opened Core 0 : Receive Free Queue Number  : 736 opened Core 0 : Transmit Free Queue Number  : 8928 opened Core 0 : System initialization completed: 8928 Core 0 : Publishing RM nameserver names for shared queues --------------------Queue status CORE 0---------------------- After Initialization Tx Free Queue 8928 Entry Count  : 32 Rx Free Queue 736 Entry Count  : 32 Tx completion Queue 897 Entry Count  : 0 Sync Queue 9025 Entry Count  : 0 Sync free Queue 898 Entry Count  : 32 Sync Cfg Queue 9026 Entry Count  : 0 ------------------------------------------------------------- Core 0 : Registering High Priority interrupt channel : 0 eventId : 48 queue Number : 704 Core 3 : Opened Server's receive Q Core 1 : QMSS initialization done. Core 2 : QMSS initialization done. Core 3 : Waiting for QMSS to be initialized... Core 3 : QMSS initialization done. Core 1 : Rx Free Queue Number  : 736 opened Core 2 : Rx Free Queue Number  : 736 opened Core 3 : Rx Free Queue Number  : 736 opened Core 1 : Tx Free Queue Number  : 8928 opened Core 2 : Tx Free Queue Number  : 8928 opened Core 3 : Tx Free Queue Number  : 8928 opened Core 1 : Tx Completion Queue Number : 897 opened Core 2 : Tx Completion Queue Number : 897 opened Core 3 : Tx Completion Queue Number : 897 opened Core 1 : Sync Queue Number  : 9025 opened Core 2 : Sync Queue Number  : 9025 opened Core 3 : Sync Queue Number  : 9025 opened Core 1 : Sync Free Queue Number  : 898 opened Core 2 : Sync Free Queue Number  : 898 opened Core 3 : Sync Free Queue Number  : 898 opened Core 1 : Sync Cfg Queue Number  : 9026 opened Core 2 : Sync Cfg Queue Number  : 9026 opened Core 3 : Sync Cfg Queue Number  : 9026 opened Core 1 : Registering High Priority interrupt channel : 1 eventId : 48 queue Number : 705 Core 2 : Registering High Priority interrupt channel : 2 eventId : 48 queue Number : 706 Core 3 : Registering High Priority interrupt channel : 3 eventId : 48 queue Number : 707 Core 1 : Waiting for sync signal Core 2 : Waiting for sync signal Core 3 : Waiting for sync signal Core 0 : Opened Tx channel  : 0 Core 0 : Opened Rx channel  : 0 Core 0 : Transmit Queue Number  : 800 Core 0 : Receive Queue Number  : 704 Core 0 : Opened Rx flow  : 0 Core 0 : High priority accumulator programmed for channel : 0 queue : 704 Core 0 : Transmitting 8 packets.......... ************************************************************* Core 0 : Opened Tx channel  : 0 Core 0 : Opened Rx channel  : 0 Core 0 : Transmit Queue Number  : 800 Core 0 : Receive Queue Number  : 705 Core 0 : Opened Rx flow  : 0 Core 0 : High priority accumulator programmed for channel : 1 queue : 705 Core 0 : Transmitting 8 packets.......... ************************************************************* Core 0 : Opened Tx channel  : 0 Core 0 : Opened Rx channel  : 0 Core 0 : Transmit Queue Number  : 800 Core 0 : Receive Queue Number  : 706 Core 0 : Opened Rx flow  : 0 Core 0 : High priority accumulator programmed for channel : 2 queue : 706 Core 0 : Transmitting 8 packets.......... ************************************************************* Core 0 : Opened Tx channel  : 0 Core 0 : Opened Rx channel  : 0 Core 0 : Transmit Queue Number  : 800 Core 0 : Receive Queue Number  : 707 Core 0 : Opened Rx flow  : 0 Core 0 : High priority accumulator programmed for channel : 3 queue : 707 Core 0 : Transmitting 8 packets.......... ************************************************************* Core 0 : Waiting for sync signal Core 0 : Got sync signal ************************************************************* --------------------Queue status CORE 0---------------------- After packet processing Tx Free Queue 8928 Entry Count  : 0 Rx Free Queue 736 Entry Count  : 32 Tx completion Queue 897 Entry Count  : 32 Sync Queue 9025 Entry Count  : 4 Sync free Queue 898 Entry Count  : 27 Sync Cfg Queue 9026 Entry Count  : 1 ------------------------------------------------------------- Core 0 : Waiting for other cores to ack sync signal Core 1 : Got sync signal Core 2 : Got sync signal Core 3 : Got sync signal ************************************************************* ************************************************************* ************************************************************* Core 0 : acks found --------------------Deinitializing--------------------------- --------------------Queue status CORE 0---------------------- Before exit Tx Free Queue 8928 Entry Count  : 0 Rx Free Queue 736 Entry Count  : 32 Tx completion Queue 897 Entry Count  : 32 Sync Queue 9025 Entry Count  : 0 Sync free Queue 898 Entry Count  : 28 Sync Cfg Queue 9026 Entry Count  : 4 ------------------------------------------------------------- Core 0 : Receive free queue closed successfully. Ref count : 0 Core 0 : Transmit completion queue closed successfully. Ref count : 3 Core 0 : Transmit free queue closed successfully. Ref count : 3 Core 0 : Sync queue closed successfully. Ref count : 3 Core 0 : Sync free queue closed successfully. Ref count : 3 Core 0 : Sync queue closed successfully. Ref count : 3 Core 0 : CPPI CPDMA closed successfully Core 0 : CPPI exit successful Core 0: Cleaning regions Core 0: exit QMSS Core 1 : Receive free queue closed successfully. Ref count : 3 Core 2 : Receive free queue closed successfully. Ref count : 2 Core 3 : Receive free queue closed successfully. Ref count : 1 Core 1 : Transmit completion queue closed successfully. Ref count : 2 Core 2 : Transmit completion queue closed successfully. Ref count : 1 Core 3 : Transmit completion queue closed successfully. Ref count : 0 Core 1 : Transmit free queue closed successfully. Ref count : 2 Core 2 : Transmit free queue closed successfully. Ref count : 1 Core 3 : Transmit free queue closed successfully. Ref count : 0 Core 1 : Sync queue closed successfully. Ref count : 2 Core 2 : Sync queue closed successfully. Ref count : 1 Core 3 : Sync queue closed successfully. Ref count : 0 Core 1 : Sync free queue closed successfully. Ref count : 2 Core 2 : Sync free queue closed successfully. Ref count : 1 Core 3 : Sync free queue closed successfully. Ref count : 0 Core 1 : Sync queue closed successfully. Ref count : 2 Core 2 : Sync queue closed successfully. Ref count : 1 Core 3 : Sync queue closed successfully. Ref count : 0 ******************************************************* ******************************************************* ******************************************************* ******** QMSS Multicore (1) Example Done (PASS) ******* ******** QMSS Multicore (2) Example Done (PASS) ******* ******** QMSS Multicore (3) Example Done (PASS) ******* ******************************************************* ******************************************************* ******************************************************* Core 0 : Deleting RM nameserver names for shared queues Instance name: RM_Server Handle: 0x00854578 Type: Server Resource Status: Core 0 : All resources freed successfully ******************************************************* ******** QMSS Multicore (0) Example Done (PASS) ******* *******************************************************rNrN}rN(jUjjNubaubeubeubj)rN}rN(jUjKjjLMj j^Mjjj}rN(j]rNjaaj]j]j]rNUid112rNaj]ujMNjhj]rN(j)rN}rN(jX Debug FAQrNjjNj j^Mjj"j}rN(j]j]j]j]j]ujMNjhj]rNj%X Debug FAQrNrN}rN(jjNjjNubaubj`)rN}rN(jUjjNj j^Mjjcj}rN(jeU.j]j]j]jfUj]j]jgjhujMPjhj]rN(j)rN}rN(jXDouble Push - Some queue elements lost. #. Pushing the same pointer twice is illegal. In hardware it does something similar to double linking the same object into two places of a software linked list. It corrupts the list, such that some items will be orphaned/lost. jjNj Njj j}rN(j]j]j]j]j]ujNjhj]rN(jX)rN}rN(jX'Double Push - Some queue elements lost.rNjjNj j^Mjj\j}rN(j]j]j]j]j]ujMPj]rNj%X'Double Push - Some queue elements lost.rNrN}rN(jjNjjNubaubj`)rN}rN(jUj}rN(jeU.j]j]j]jfUj]j]jgjhujjNj]rNj)rN}rN(jXPushing the same pointer twice is illegal. In hardware it does something similar to double linking the same object into two places of a software linked list. It corrupts the list, such that some items will be orphaned/lost. j}rN(j]j]j]j]j]ujjNj]rNjX)rN}rN(jXPushing the same pointer twice is illegal. In hardware it does something similar to double linking the same object into two places of a software linked list. It corrupts the list, such that some items will be orphaned/lost.rNjjNj j^Mjj\j}rN(j]j]j]j]j]ujMRj]rNj%XPushing the same pointer twice is illegal. In hardware it does something similar to double linking the same object into two places of a software linked list. It corrupts the list, such that some items will be orphaned/lost.rNrN}rN(jjNjjNubaubajj ubajjcubeubj)rN}rN(jX*NULL Push - Entire queue lost #. Pushing NULL (0) clears the entire queue. This is intentionally done by Qmss_QueueEmpty(). However the various Qmss_QueuePush functions don't check for NULL (to save cycles). Don't push NULL (for example received when Qmss_QueuePop finds an empty queue). jjNj Njj j}rN(j]j]j]j]j]ujNjhj]rN(jX)rN}rN(jXNULL Push - Entire queue lostrNjjNj j^Mjj\j}rN(j]j]j]j]j]ujMWj]rNj%XNULL Push - Entire queue lostrNrN}rN(jjNjjNubaubj`)rN}rN(jUj}rN(jeU.j]j]j]jfUj]j]jgjhujjNj]rNj)rN}rN(jXPushing NULL (0) clears the entire queue. This is intentionally done by Qmss_QueueEmpty(). However the various Qmss_QueuePush functions don't check for NULL (to save cycles). Don't push NULL (for example received when Qmss_QueuePop finds an empty queue). j}rN(j]j]j]j]j]ujjNj]rNjX)rN}rN(jXPushing NULL (0) clears the entire queue. This is intentionally done by Qmss_QueueEmpty(). However the various Qmss_QueuePush functions don't check for NULL (to save cycles). Don't push NULL (for example received when Qmss_QueuePop finds an empty queue).rNjjNj j^Mjj\j}rN(j]j]j]j]j]ujMYj]rNj%XPushing NULL (0) clears the entire queue. This is intentionally done by Qmss_QueueEmpty(). However the various Qmss_QueuePush functions don't check for NULL (to save cycles). Don't push NULL (for example received when Qmss_QueuePop finds an empty queue).rNrN}rN(jjNjjNubaubajj ubajjcubeubj)rN}rN(jX.Hint Bits (4 low LSBs of desc pointer) #. These are used to tell DMAs such as CPPI the size of the descriptor. Thus, when receiving descriptors from hardware, you must use QMSS_DESC_PTR() to discard them, else unaligned memory accesses that corrupt descriptors will be generated by software. jjNj Njj j}rN(j]j]j]j]j]ujNjhj]rN(jX)rN}rN(jX&Hint Bits (4 low LSBs of desc pointer)rNjjNj j^Mjj\j}rN(j]j]j]j]j]ujM^j]rNj%X&Hint Bits (4 low LSBs of desc pointer)rNrN}rO(jjNjjNubaubj`)rO}rO(jUj}rO(jeU.j]j]j]jfUj]j]jgjhujjNj]rOj)rO}rO(jXThese are used to tell DMAs such as CPPI the size of the descriptor. Thus, when receiving descriptors from hardware, you must use QMSS_DESC_PTR() to discard them, else unaligned memory accesses that corrupt descriptors will be generated by software. j}rO(j]j]j]j]j]ujjOj]rOjX)r O}r O(jXThese are used to tell DMAs such as CPPI the size of the descriptor. Thus, when receiving descriptors from hardware, you must use QMSS_DESC_PTR() to discard them, else unaligned memory accesses that corrupt descriptors will be generated by software.r OjjOj j^Mjj\j}r O(j]j]j]j]j]ujM`j]r Oj%XThese are used to tell DMAs such as CPPI the size of the descriptor. Thus, when receiving descriptors from hardware, you must use QMSS_DESC_PTR() to discard them, else unaligned memory accesses that corrupt descriptors will be generated by software.rOrO}rO(jj Ojj Oubaubajj ubajjcubeubj)rO}rO(jX=General lost descriptors #. Its not a bad idea to have code that can inventory all your descriptors as part of destructive debug. Iterate over all queues, and pop all descriptors. Set a bit in a large bitmap for each descriptor found. Bits that remain 0 indicate "lost" descriptors which could have happened due to double push or null push or software bugs that simply lost them. By examining the contents of descriptor(s) and buffer(s), can often determine who last used them therefore what part of code lost them. #. Its also good to have nondestructive debug code that can call Qmss_getQueueByteCount() and Qmss_getQueueEntryCount() for each queue. This should be able to find all but a few (~4) descriptors per hardware DMA that are in flight. If large amounts of descriptors are missing, it means there is a bug. For this debug/monitor purpose, its OK to make own Qmss_QueueHandle by casting the queue number (eg (Qmss_QueueHandle)queueNum) since its undesirable to generate accounting/management for purpose of nondestructive debug. jjNj Njj j}rO(j]j]j]j]j]ujNjhj]rO(jX)rO}rO(jXGeneral lost descriptorsrOjjOj j^Mjj\j}rO(j]j]j]j]j]ujMej]rOj%XGeneral lost descriptorsrOrO}rO(jjOjjOubaubj`)rO}rO(jUj}rO(jeU.j]j]j]jfUj]j]jgjhujjOj]r O(j)r!O}r"O(jXIts not a bad idea to have code that can inventory all your descriptors as part of destructive debug. Iterate over all queues, and pop all descriptors. Set a bit in a large bitmap for each descriptor found. Bits that remain 0 indicate "lost" descriptors which could have happened due to double push or null push or software bugs that simply lost them. By examining the contents of descriptor(s) and buffer(s), can often determine who last used them therefore what part of code lost them.j}r#O(j]j]j]j]j]ujjOj]r$OjX)r%O}r&O(jXIts not a bad idea to have code that can inventory all your descriptors as part of destructive debug. Iterate over all queues, and pop all descriptors. Set a bit in a large bitmap for each descriptor found. Bits that remain 0 indicate "lost" descriptors which could have happened due to double push or null push or software bugs that simply lost them. By examining the contents of descriptor(s) and buffer(s), can often determine who last used them therefore what part of code lost them.r'Ojj!Oj j^Mjj\j}r(O(j]j]j]j]j]ujMgj]r)Oj%XIts not a bad idea to have code that can inventory all your descriptors as part of destructive debug. Iterate over all queues, and pop all descriptors. Set a bit in a large bitmap for each descriptor found. Bits that remain 0 indicate "lost" descriptors which could have happened due to double push or null push or software bugs that simply lost them. By examining the contents of descriptor(s) and buffer(s), can often determine who last used them therefore what part of code lost them.r*Or+O}r,O(jj'Ojj%Oubaubajj ubj)r-O}r.O(jXIts also good to have nondestructive debug code that can call Qmss_getQueueByteCount() and Qmss_getQueueEntryCount() for each queue. This should be able to find all but a few (~4) descriptors per hardware DMA that are in flight. If large amounts of descriptors are missing, it means there is a bug. For this debug/monitor purpose, its OK to make own Qmss_QueueHandle by casting the queue number (eg (Qmss_QueueHandle)queueNum) since its undesirable to generate accounting/management for purpose of nondestructive debug. j}r/O(j]j]j]j]j]ujjOj]r0OjX)r1O}r2O(jXIts also good to have nondestructive debug code that can call Qmss_getQueueByteCount() and Qmss_getQueueEntryCount() for each queue. This should be able to find all but a few (~4) descriptors per hardware DMA that are in flight. If large amounts of descriptors are missing, it means there is a bug. For this debug/monitor purpose, its OK to make own Qmss_QueueHandle by casting the queue number (eg (Qmss_QueueHandle)queueNum) since its undesirable to generate accounting/management for purpose of nondestructive debug.r3Ojj-Oj j^Mjj\j}r4O(j]j]j]j]j]ujMoj]r5Oj%XIts also good to have nondestructive debug code that can call Qmss_getQueueByteCount() and Qmss_getQueueEntryCount() for each queue. This should be able to find all but a few (~4) descriptors per hardware DMA that are in flight. If large amounts of descriptors are missing, it means there is a bug. For this debug/monitor purpose, its OK to make own Qmss_QueueHandle by casting the queue number (eg (Qmss_QueueHandle)queueNum) since its undesirable to generate accounting/management for purpose of nondestructive debug.r6Or7O}r8O(jj3Ojj1Oubaubajj ubejjcubeubeubeubj)r9O}r:O(jUjKjjLMj j^Mjjj}r;O(j]rOUid113r?Oaj]ujMzjhj]r@O(j)rAO}rBO(jXAdditional ReferencesrCOjj9Oj j^Mjj"j}rDO(j]j]j]j]j]ujMzjhj]rEOj%XAdditional ReferencesrFOrGO}rHO(jjCOjjAOubaubj)rIO}rJO(jUjj9Oj j^Mjjj}rKO(j]j]j]j]j]ujNjhj]rLOj)rMO}rNO(jUj}rOO(j]j]j]j]j]UcolsKujjIOj]rPO(j)rQO}rRO(jUj}rSO(j]j]j]j]j]UcolwidthK#ujjMOj]jjubj)rTO}rUO(jUj}rVO(j]j]j]j]j]UcolwidthK#ujjMOj]jjubj)rWO}rXO(jUj}rYO(j]j]j]j]j]ujjMOj]rZO(j)r[O}r\O(jUj}r]O(j]j]j]j]j]ujjWOj]r^O(j)r_O}r`O(jUj}raO(j]j]j]j]j]ujj[Oj]rbOjX)rcO}rdO(jX **Document**reOjj_Oj j^Mjj\j}rfO(j]j]j]j]j]ujM}j]rgOj|)rhO}riO(jjeOj}rjO(j]j]j]j]j]ujjcOj]rkOj%XDocumentrlOrmO}rnO(jUjjhOubajjubaubajjubj)roO}rpO(jUj}rqO(j]j]j]j]j]ujj[Oj]rrOjX)rsO}rtO(jX **Location**ruOjjoOj j^Mjj\j}rvO(j]j]j]j]j]ujM}j]rwOj|)rxO}ryO(jjuOj}rzO(j]j]j]j]j]ujjsOj]r{Oj%XLocationr|Or}O}r~O(jUjjxOubajjubaubajjubejjubj)rO}rO(jUj}rO(j]j]j]j]j]ujjWOj]rO(j)rO}rO(jUj}rO(j]j]j]j]j]ujjOj]rOjX)rO}rO(jXAPI Reference ManualrOjjOj j^Mjj\j}rO(j]j]j]j]j]ujMj]rOj%XAPI Reference ManualrOrO}rO(jjOjjOubaubajjubj)rO}rO(jUj}rO(j]j]j]j]j]ujjOj]rOjX)rO}rO(jXI$(TI_PDK_INSTALL_DIR)/packages/ti /drv/QMSS/docs/doxygen/html/index .htmlrOjjOj j^Mjj\j}rO(j]j]j]j]j]ujMj]rOj%XI$(TI_PDK_INSTALL_DIR)/packages/ti /drv/QMSS/docs/doxygen/html/index .htmlrOrO}rO(jjOjjOubaubajjubejjubj)rO}rO(jUj}rO(j]j]j]j]j]ujjWOj]rO(j)rO}rO(jUj}rO(j]j]j]j]j]ujjOj]rOjX)rO}rO(jX Release NotesrOjjOj j^Mjj\j}rO(j]j]j]j]j]ujMj]rOj%X Release NotesrOrO}rO(jjOjjOubaubajjubj)rO}rO(jUj}rO(j]j]j]j]j]ujjOj]rOjX)rO}rO(jXK$(TI_PDK_INSTALL_DIR)/packages/ti /drv/QMSS/docs/ReleaseNotes_QMSS_ LLD.pdfjjOj j^Mjj\j}rO(j]j]j]j]j]ujMj]rO(j%X1$(TI_PDK_INSTALL_DIR)/packages/ti /drv/QMSS/docs/rOrO}rO(jX1$(TI_PDK_INSTALL_DIR)/packages/ti /drv/QMSS/docs/jjOubjg-)rO}rO(jXReleaseNotes_QMSS_rOj}rO(j]rOUid291rOaj]j]j]j]UrefidUid290rOujjOj]rOj%XReleaseNotes_QMSS_rOrO}rO(jUjjOubajjs-ubj%X LLD.pdfrOrO}rO(jX LLD.pdfjjOubeubajjubejjubj)rO}rO(jUj}rO(j]j]j]j]j]ujjWOj]rO(j)rO}rO(jUj}rO(j]j]j]j]j]ujjOj]rOjX)rO}rO(jX*QoS (Weighted Round Robin and SP QoS tree)rOjjOj j^Mjj\j}rO(j]j]j]j]j]ujMj]rOj%X*QoS (Weighted Round Robin and SP QoS tree)rOrO}rO(jjOjjOubaubajjubj)rO}rO(jUj}rO(j]j]j]j]j]ujjOj]rOjX)rO}rO(jXm$(TI_PDK_INSTALL_DIR)/packages/ti /drv/QMSS/docs/firmware/qos_sched ,qos_sched_drop_sched,qos_sched_w ide.pdfrOjjOj j^Mjj\j}rO(j]j]j]j]j]ujMj]rOj%Xm$(TI_PDK_INSTALL_DIR)/packages/ti /drv/QMSS/docs/firmware/qos_sched ,qos_sched_drop_sched,qos_sched_w ide.pdfrOrO}rO(jjOjjOubaubajjubejjubj)rO}rO(jUj}rO(j]j]j]j]j]ujjWOj]rO(j)rO}rO(jUj}rO(j]j]j]j]j]ujjOj]rOjX)rO}rO(jX(QoS (Leaky bucket and SRIO TX Scheduler)rOjjOj j^Mjj\j}rO(j]j]j]j]j]ujMj]rOj%X(QoS (Leaky bucket and SRIO TX Scheduler)rOrO}rO(jjOjjOubaubajjubj)rO}rO(jUj}rO(j]j]j]j]j]ujjOj]rOjX)rO}rO(jXA$(TI_PDK_INSTALL_DIR)/packages/ti /drv/QMSS/docs/firmware/qos.pdfrOjjOj j^Mjj\j}rO(j]j]j]j]j]ujMj]rOj%XA$(TI_PDK_INSTALL_DIR)/packages/ti /drv/QMSS/docs/firmware/qos.pdfrOrO}rO(jjOjjOubaubajjubejjubj)rO}rO(jUj}rO(j]j]j]j]j]ujjWOj]rO(j)rP}rP(jUj}rP(j]j]j]j]j]ujjOj]rPjX)rP}rP(jXHardware Userguide/TRMrPjjPj j^Mjj\j}rP(j]j]j]j]j]ujMj]rPj%XHardware Userguide/TRMr Pr P}r P(jjPjjPubaubajjubj)r P}r P(jUj}rP(j]j]j]j]j]ujjOj]rPjX)rP}rP(jX/`UG TRM PDF `__rPjj Pj j^Mjj\j}rP(j]j]j]j]j]ujMj]rPj)rP}rP(jjPj}rP(UnameX UG TRM PDFjXhttp://www.ti.com/lit/sprugr9j]j]j]j]j]ujjPj]rPj%X UG TRM PDFrPrP}rP(jUjjPubajjubaubajjubejjubj)rP}rP(jUj}rP(j]j]j]j]j]ujjWOj]rP(j)r P}r!P(jUj}r"P(j]j]j]j]j]ujjPj]r#PjX)r$P}r%P(jX'CPPI LLD (Navigator/QMSS DMA component)r&Pjj Pj j^Mjj\j}r'P(j]j]j]j]j]ujMj]r(Pj%X'CPPI LLD (Navigator/QMSS DMA component)r)Pr*P}r+P(jj&Pjj$Pubaubajjubj)r,P}r-P(jUj}r.P(j]j]j]j]j]ujjPj]r/PjX)r0P}r1P(jX `CPPI LLD`_r2Pjj,Pj j^Mjj\j}r3P(j]j]j]j]j]ujMj]r4Pj)r5P}r6P(jj2PjqKjj0Pjjj}r7P(UnameXCPPI LLDjXindex_device_drv.html#cppir8Pj]j]j]j]j]uj]r9Pj%XCPPI LLDr:Pr;P}rP(jX(.. _CPPI LLD: index_device_drv.html#cppijKjj9Oj j^Mjjj}r?P(jj8Pj]r@PUcppi-lldrAPaj]j]j]j]rBPhaujMjhj]ubj)rCP}rDP(jUjj9Oj j^Mjjj}rEP(j]j]j]j]j]ujMjhj]rFPj)rGP}rHP(jUjKjjCPj j^Mjjj}rIP(j]j]j]j]j]ujKjhj]ubaubeubeubj j^Mjjj}rJP(j]rKPXoverviewrLPaj]j]j]rMPUid103rNPaj]ujKjhj]rOP(j)rPP}rQP(jXOverviewrRPjjJMj j^Mjj"j}rSP(j]j]j]j]j]ujKjhj]rTPj%XOverviewrUPrVP}rWP(jjRPjjPPubaubj)rXP}rYP(jUjKjjJMj j^Mjjj}rZP(j]r[PX introductionr\Paj]j]j]r]PUid104r^Paj]ujKjhj]r_P(j)r`P}raP(jX IntroductionrbPjjXPj j^Mjj"j}rcP(j]j]j]j]j]ujKjhj]rdPj%X IntroductionrePrfP}rgP(jjbPjj`PubaubjX)rhP}riP(jXThe Queue Manager Sub System (QMSS) low level driver provides the interface to Queue Manager Subsystem hardware which is part of the Multicore Navigator functional unit for a keystone device. QMSS provides hardware assisted queue system and implements fundamental operations such as en-queue and de-queue, descriptor management, accumulator functionality and configuration of infrastructure DMA mode. The LLD provides APIs to get full entitlement of supported hardware functionality.rjPjjXPj j^Mjj\j}rkP(j]j]j]j]j]ujK jhj]rlPj%XThe Queue Manager Sub System (QMSS) low level driver provides the interface to Queue Manager Subsystem hardware which is part of the Multicore Navigator functional unit for a keystone device. QMSS provides hardware assisted queue system and implements fundamental operations such as en-queue and de-queue, descriptor management, accumulator functionality and configuration of infrastructure DMA mode. The LLD provides APIs to get full entitlement of supported hardware functionality.rmPrnP}roP(jjjPjjhPubaubjX)rpP}rqP(jX=The LLD also includes accumulation and QoS (Quality of Service) firmware. QoS enables restriction of data rates in bytes per second or packets per second, weighted round robin queue selection, and selective descriptor dropping for oversubscribed queues. Accumulation The APIs are provided through the LLD. The API documentation for both QoS and Accumulator is available in the API Reference manual below. The capabilities of the QoS firmware are documented in their design documents. The capabilities of the accumulator are documented in the Hardware Peripheral User Guide.rrPjjXPj j^Mjj\j}rsP(j]j]j]j]j]ujKjhj]rtPj%X=The LLD also includes accumulation and QoS (Quality of Service) firmware. QoS enables restriction of data rates in bytes per second or packets per second, weighted round robin queue selection, and selective descriptor dropping for oversubscribed queues. Accumulation The APIs are provided through the LLD. The API documentation for both QoS and Accumulator is available in the API Reference manual below. The capabilities of the QoS firmware are documented in their design documents. The capabilities of the accumulator are documented in the Hardware Peripheral User Guide.ruPrvP}rwP(jjrPjjpPubaubjb)rxP}ryP(jXModes of OperationrzPjKjjXPj j^Mjjfj}r{P(j]r|PUid105r}Paj]j]r~PXmodes-of-operationrPaj]j]ujNjhj]rPj%XModes of OperationrPrP}rP(jjzPjjxPubaubjX)rP}rP(jX-QMSS library (ti.drv.qm) supports below modesrPjjXPj j^Mjj\j}rP(j]j]j]j]j]ujKjhj]rPj%X-QMSS library (ti.drv.qm) supports below modesrPrP}rP(jjPjjPubaubjX)rP}rP(jX5**Joint Mode**: In this mode, only linkingRAM0Base, linkingRAM0Size, and linkingRAM1Base are used to configure all QM groups simultaneously. For all existing devices (K2H, K2K) this is only mode that should be used. For the rest of the devices such as K2L, K2E, 6678 and 6657, this is the only mode available.jjXPj j^Mjj\j}rP(j]j]j]j]j]ujK!jhj]rP(j|)rP}rP(jX**Joint Mode**j}rP(j]j]j]j]j]ujjPj]rPj%X Joint ModerPrP}rP(jUjjPubajjubj%X': In this mode, only linkingRAM0Base, linkingRAM0Size, and linkingRAM1Base are used to configure all QM groups simultaneously. For all existing devices (K2H, K2K) this is only mode that should be used. For the rest of the devices such as K2L, K2E, 6678 and 6657, this is the only mode available.rPrP}rP(jX': In this mode, only linkingRAM0Base, linkingRAM0Size, and linkingRAM1Base are used to configure all QM groups simultaneously. For all existing devices (K2H, K2K) this is only mode that should be used. For the rest of the devices such as K2L, K2E, 6678 and 6657, this is the only mode available.jjPubeubjX)rP}rP(jX`**Split Mode**: This mode shouldn't be used as it doesn't support all peripherals on the device.jjXPj j^Mjj\j}rP(j]j]j]j]j]ujK'jhj]rP(j|)rP}rP(jX**Split Mode**j}rP(j]j]j]j]j]ujjPj]rPj%X Split ModerPrP}rP(jUjjPubajjubj%XR: This mode shouldn't be used as it doesn't support all peripherals on the device.rPrP}rP(jXR: This mode shouldn't be used as it doesn't support all peripherals on the device.jjPubeubeubeubj j^Mjj?j}rP(j]UlevelKj]j]rPjNPaUsourcej^Mj]j]UlineKUtypejAujKjhj]rPjX)rP}rP(jX+Duplicate implicit target name: "overview".j}rP(j]j]j]j]j]ujjHMj]rPj%X+Duplicate implicit target name: "overview".rPrP}rP(jUjjPubajj\ubaubh)rP}rP(jUjjXPj j^Mjj?j}rP(j]UlevelKj]j]rPj^PaUsourcej^Mj]j]UlineKUtypejAujKjhj]rPjX)rP}rP(jX/Duplicate implicit target name: "introduction".j}rP(j]j]j]j]j]ujjPj]rPj%X/Duplicate implicit target name: "introduction".rPrP}rP(jUjjPubajj\ubaubh)rP}rP(jUj}rP(j]UlevelKj]j]rPj}PaUsourcej j]j]UlineKQUtypejXujjxPj]rPjX)rP}rP(jX5Duplicate explicit target name: "modes-of-operation".j}rP(j]j]j]j]j]ujjPj]rPj%X5Duplicate explicit target name: "modes-of-operation".rPrP}rP(jUjjPubajj\ubajj?ubh)rP}rP(jUjjeMj j^Mjj?j}rP(j]UlevelKj]j]rPjkMaUsourcej^Mj]j]UlineK+UtypejAujK+jhj]rPjX)rP}rP(jX1Duplicate implicit target name: "user interface".j}rP(j]j]j]j]j]ujjPj]rPj%X1Duplicate implicit target name: "user interface".rPrP}rP(jUjjPubajj\ubaubh)rP}rP(jUjjuMj j^Mjj?j}rP(j]UlevelKj]j]rPj{MaUsourcej^Mj]j]UlineK.UtypejAujK.jhj]rPjX)rP}rP(jX7Duplicate implicit target name: "driver configuration".j}rP(j]j]j]j]j]ujjPj]rPj%X7Duplicate implicit target name: "driver configuration".rPrP}rP(jUjjPubajj\ubaubh)rP}rP(jUjjMj j^Mjj?j}rP(j]UlevelKj]j]rPjMaUsourcej^Mj]j]UlineK:UtypejAujK:jhj]rPjX)rP}rP(jX'Duplicate implicit target name: "apis".j}rP(j]j]j]j]j]ujjPj]rPj%X'Duplicate implicit target name: "apis".rPrP}rP(jUjjPubajj\ubaubh)rP}rP(jUjjMj j^Mjj?j}rP(j]UlevelKj]j]rPjMaUsourcej^Mj]j]UlineKGUtypejAujKGjhj]rPjX)rP}rP(jX.Duplicate implicit target name: "application".j}rP(j]j]j]j]j]ujjPj]rPj%X.Duplicate implicit target name: "application".rPrP}rP(jUjjPubajj\ubaubh)rP}rP(jUjjMj j^Mjj?j}rP(j]UlevelKj]j]rPjMaUsourcej^Mj]j]UlineKJUtypejAujKJjhj]rPjX)rP}rQ(jX+Duplicate implicit target name: "examples".j}rQ(j]j]j]j]j]ujjPj]rQj%X+Duplicate implicit target name: "examples".rQrQ}rQ(jUjjPubajj\ubaubh)rQ}rQ(jUj}rQ(j]UlevelKj]j]r QjNaUsourcej j]j]UlineKQUtypejXujjNj]r QjX)r Q}r Q(jX8Duplicate explicit target name: "sample-example-output".j}r Q(j]j]j]j]j]ujjQj]rQj%X8Duplicate explicit target name: "sample-example-output".rQrQ}rQ(jUjj Qubajj\ubajj?ubh)rQ}rQ(jUjjNj j^Mjj?j}rQ(j]UlevelKj]j]rQjNaUsourcej^Mj]j]UlineMNUtypejAujMNjhj]rQjX)rQ}rQ(jX,Duplicate implicit target name: "debug faq".j}rQ(j]j]j]j]j]ujjQj]rQj%X,Duplicate implicit target name: "debug faq".rQrQ}rQ(jUjjQubajj\ubaubh)rQ}rQ(jUjj9Oj j^Mjj?j}r Q(j]UlevelKj]j]r!Qj?OaUsourcej^Mj]j]UlineMzUtypejAujMzjhj]r"QjX)r#Q}r$Q(jX8Duplicate implicit target name: "additional references".j}r%Q(j]j]j]j]j]ujjQj]r&Qj%X8Duplicate implicit target name: "additional references".r'Qr(Q}r)Q(jUjj#Qubajj\ubaubh)r*Q}r+Q(jUjj)r,Q}r-Q(jUjKjj)r.Q}r/Q(jUjhj j jjj}r0Q(j]j]j]j]r1QUcppir2Qaj]r3QhlaujKWjhj]r4Q(j)r5Q}r6Q(jXCPPIr7Qjj.Qj j jj"j}r8Q(j]j]j]j]j]ujKWjhj]r9Qj%XCPPIr:Qr;Q}rQ(jX?http://processors.wiki.ti.com/index.php/Processor_SDK_RTOS_CPPIjj.Qj j,X=source/rtos/PDK_Platform_Software/Device_Drivers/CPPI.rst.incr?Qr@Q}rAQbjj0j}rBQ(j2j3j]j]j]j]j]ujKjhj]rCQj%X?http://processors.wiki.ti.com/index.php/Processor_SDK_RTOS_CPPIrDQrEQ}rFQ(jUjj=Qubaubj,Qj)rGQ}rHQ(jUjKjj.Qj j@Qjjj}rIQ(j]rJQXuser interfacerKQaj]j]j]rLQUid116rMQaj]ujKjhj]rNQ(j)rOQ}rPQ(jXUser InterfacerQQjjGQj j@Qjj"j}rRQ(j]j]j]j]j]ujKjhj]rSQj%XUser InterfacerTQrUQ}rVQ(jjQQjjOQubaubj)rWQ}rXQ(jUjKjjGQj j@Qjjj}rYQ(j]rZQXdriver configurationr[Qaj]j]j]r\QUid117r]Qaj]ujK jhj]r^Q(j)r_Q}r`Q(jXDriver ConfigurationraQjjWQj j@Qjj"j}rbQ(j]j]j]j]j]ujK jhj]rcQj%XDriver ConfigurationrdQreQ}rfQ(jjaQjj_QubaubjX)rgQ}rhQ(jXThe driver configures the CPPI subsystem using cppiGblCfgParams(system configuration) structure. The default global configuration per device is present under cppi_device.c file provided per device.riQjjWQj j@Qjj\j}rjQ(j]j]j]j]j]ujK"jhj]rkQj%XThe driver configures the CPPI subsystem using cppiGblCfgParams(system configuration) structure. The default global configuration per device is present under cppi_device.c file provided per device.rlQrmQ}rnQ(jjiQjjgQubaubjX)roQ}rpQ(jXFor details about individual fields of this structure, see the Doxygen help by opening PDK_INSTALL_DIR\CPPIckages\ti\drv\CPPI\docs\doxygen\html\index.html.jjWQj j@Qjj\j}rqQ(j]j]j]j]j]ujK&jhj]rrQj%XFor details about individual fields of this structure, see the Doxygen help by opening PDK_INSTALL_DIRCPPIckagestidrvCPPIdocsdoxygenhtmlindex.html.rsQrtQ}ruQ(jXFor details about individual fields of this structure, see the Doxygen help by opening PDK_INSTALL_DIR\CPPIckages\ti\drv\CPPI\docs\doxygen\html\index.html.jjoQubaubeubj)rvQ}rwQ(jUjKjjGQj j@Qjjj}rxQ(j]ryQXapisrzQaj]j]j]r{QUid118r|Qaj]ujK+jhj]r}Q(j)r~Q}rQ(jXAPIsrQjjvQj j@Qjj"j}rQ(j]j]j]j]j]ujK+jhj]rQj%XAPIsrQrQ}rQ(jjQjj~QubaubjX)rQ}rQ(jXAPI reference for application:rQjjvQj j@Qjj\j}rQ(j]j]j]j]j]ujK-jhj]rQj%XAPI reference for application:rQrQ}rQ(jjQjjQubaubj#)rQ}rQ(jX!#include jjvQj j@Qjj&j}rQ(j2j3j]j]j]j]j]ujMjhj]rQj%X!#include rQrQ}rQ(jUjjQubaubeubeubj)rQ}rQ(jUjKjj.Qj j@Qjjj}rQ(j]rQX applicationrQaj]j]j]rQUid119rQaj]ujK4jhj]rQ(j)rQ}rQ(jX ApplicationrQjjQj j@Qjj"j}rQ(j]j]j]j]j]ujK4jhj]rQj%X ApplicationrQrQ}rQ(jjQjjQubaubj)rQ}rQ(jUjKjjQj j@Qjjj}rQ(j]rQXexamplesrQaj]j]j]rQUid120rQaj]ujK7jhj]rQ(j)rQ}rQ(jXExamplesrQjjQj j@Qjj"j}rQ(j]j]j]j]j]ujK7jhj]rQj%XExamplesrQrQ}rQ(jjQjjQubaubj)rQ}rQ(jUjjQj j@Qjjj}rQ(j]j]j]j]j]ujNjhj]rQj)rQ}rQ(jUj}rQ(j]j]j]j]j]UcolsKujjQj]rQ(j)rQ}rQ(jUj}rQ(j]j]j]j]j]UcolwidthKujjQj]jjubj)rQ}rQ(jUj}rQ(j]j]j]j]j]UcolwidthKujjQj]jjubj)rQ}rQ(jUj}rQ(j]j]j]j]j]UcolwidthKujjQj]jjubj)rQ}rQ(jUj}rQ(j]j]j]j]j]ujjQj]rQj)rQ}rQ(jUj}rQ(j]j]j]j]j]ujjQj]rQ(j)rQ}rQ(jUj}rQ(j]j]j]j]j]ujjQj]rQjX)rQ}rQ(jXNamerQjjQj j@Qjj\j}rQ(j]j]j]j]j]ujK:j]rQj%XNamerQrQ}rQ(jjQjjQubaubajjubj)rQ}rQ(jUj}rQ(j]j]j]j]j]ujjQj]rQj)rQ}rQ(jUj}rQ(j]j]j]j]j]ujjQj]rQj)rQ}rQ(jX DescriptionrQjKjjQj j@Qjjj}rQ(j]j]j]j]j]ujKj]rQj%X DescriptionrQrQ}rQ(jjQjjQubaubajjubajjubj)rQ}rQ(jUj}rQ(j]j]j]j]j]ujjQj]rQjX)rQ}rQ(jXExpected ResultsrQjjQj j@Qjj\j}rQ(j]j]j]j]j]ujK:j]rQj%XExpected ResultsrQrQ}rQ(jjQjjQubaubajjubejjubajjubj)rQ}rQ(jUj}rQ(j]j]j]j]j]ujjQj]rQ(j)rQ}rQ(jUj}rQ(j]j]j]j]j]ujjQj]rQ(j)rQ}rQ(jUj}rR(j]j]j]j]j]ujjQj]rRjX)rR}rR(jXCPPI_Example applicationrRjjQj j@Qjj\j}rR(j]j]j]j]j]ujKR(j]j]j]j]j]ujKCj]r?Rj%XCPPI_UnitTestApplicat ionr@RrAR}rBR(jj=Rjj;Rubaubajjubj)rCR}rDR(jUj}rER(j]j]j]j]j]ujj3Rj]rFRj)rGR}rHR(jUj}rIR(j]j]j]j]j]ujjCRj]rJRj)rKR}rLR(jX&Unit Test application to test all APIsrMRjKjjGRj j@Qjjj}rNR(j]j]j]j]j]ujKj]rORj%X&Unit Test application to test all APIsrPRrQR}rRR(jjMRjjKRubaubajjubajjubj)rSR}rTR(jUj}rUR(j]j]j]j]j]ujj3Rj]rVRj)rWR}rXR(jUj}rYR(j]j]j]j]j]ujjSRj]rZRj)r[R}r\R(jX5User observes the output printed over the CCS consoler]RjKjjWRj j@Qjjj}r^R(j]j]j]j]j]ujKj]r_Rj%X5User observes the output printed over the CCS consoler`RraR}rbR(jj]Rjj[Rubaubajjubajjubejjubejjubejjubaubjb)rcR}rdR(jXSample Example outputreRjKjjQj j@Qjjfj}rfR(j]rgRUid121rhRaj]j]riRXsample-example-outputrjRaj]j]ujNjhj]rkRj%XSample Example outputrlRrmR}rnR(jjeRjjcRubaubjX)roR}rpR(jXThis came from k2k example:rqRjjQj j@Qjj\j}rrR(j]j]j]j]j]ujKKjhj]rsRj%XThis came from k2k example:rtRruR}rvR(jjqRjjoRubaubj#)rwR}rxR(jX%************************************************** *************** CPPI LLD usage example *********** ************************************************** ************************************************** *************** CPPI LLD usage example *********** ************************************************** ************************************************** ************************************************** *************** CPPI LLD usage example *********** *************** CPPI LLD usage example *********** ************************************************** ************************************************** *******Test running on Core 1 ******************* *******Test running on Core 0 ******************* *******Test running on Core 2 ******************* *******Test running on Core 3 ******************* Core 0 : L1D cache size 4. L2 cache size 0. Core 2 : Starting BIOS... Core 3 : Starting BIOS... Core 0 : Starting BIOS... Core 1 : Starting BIOS... Core 0 : Created RM packet heap Core 0 : Created IPC MessageQ heap Core 0 : Created receive Q for Client1 Core 1 : Opened RM packet heap Core 2 : Opened RM packet heap Core 3 : Opened RM packet heap Core 1 : Opened IPC MessageQ heap Core 2 : Opened IPC MessageQ heap Core 3 : Opened IPC MessageQ heap Core 1 : Created receive Q for Server Core 2 : Created receive Q for Server Core 3 : Created receive Q for Server Core 1 : Opened Server's receive Q Core 1 : Waiting for QMSS to be initialized... Core 0 : Opened Client1's receive Q for Server Core 0 : Created receive Q for Client2 Core 0 : Opened Client2's receive Q for Server Core 0 : Created receive Q for Client3 Core 2 : Opened Server's receive Q Core 2 : Waiting for QMSS to be initialized... Core 0 : Opened Client3's receive Q for Server Core 0 : QMSS initialization done Core 3 : Opened Server's receive Q Core 1 : QMSS initialization done Core 2 : QMSS initialization done Core 3 : Waiting for QMSS to be initialized... Core 3 : QMSS initialization done Core 0 : QMSS CPDMA Opened Core 1 : QMSS CPDMA Opened Core 0 : Memory region 0 inserted Core 0 : Number of descriptors requested : 8. Number of descriptors allocated : 8 Core 0 : Opened Rx channel : 0 Core 0 : Opened Tx channel : 0 Core 0 : Queue Number : 8192 opened Core 0 : Queue Number : 8193 opened Transmit Queue 8192 Entry Count : 1 Tx descriptor 0x@10853b20 Receive Queue 8193 Entry Count : 1 Rx descriptor 0x@10853b20 Transmit Queue 8192 Entry Count : 1 Tx descriptor 0x@10853b50 Receive Queue 8193 Entry Count : 1 Rx descriptor 0x@10853b50 Transmit Queue 8192 Entry Count : 1 Tx descriptor 0x@10853b80 Receive Queue 8193 Entry Count : 1 Rx descriptor 0x@10853b80 Transmit Queue 8192 Entry Count : 1 Tx descriptor 0x@10853bb0 Receive Queue 8193 Entry Count : 1 Rx descriptor 0x@10853bb0 Transmit Queue 8192 Entry Count : 1 Tx descriptor 0x@10853be0 Receive Queue 8193 Entry Count : 1 Rx descriptor 0x@10853be0 Transmit Queue 8192 Entry Count : 1 Tx descriptor 0x@10853c10 Receive Queue 8193 Entry Count : 1 Rx descriptor 0x@10853c10 Transmit Queue 8192 Entry Count : 1 Tx descriptor 0x@10853c40 Receive Queue 8193 Entry Count : 1 Rx descriptor 0x@10853c40 Transmit Queue 8192 Entry Count : 1 Tx descriptor 0x@10853c70 Receive Queue 8193 Entry Count : 1 Rx descriptor 0x@10853c70 Core 0 : Received host descriptor from Queue 897 Sucessfully Core 0 : Tx Channel closed successfully. Ref count :0 Core 0 : Rx Channel closed successfully. Ref count :0 Core 0 : Rx queue closed successfully. Ref count :0 Core 0 : Tx queue closed successfully. Ref count :0 Core 0 : Free queue closed successfully. Ref count :0 Core 0 : Closing CPPI CPDMA Ref count : 3 Core 0 : CPPI CPDMA closed successfully Core 1 : Memory region 1 inserted Core 1 : Number of descriptors requested : 8. Number of descriptors allocated : 8 Core 2 : QMSS CPDMA Opened Core 3 : QMSS CPDMA Opened Core 1 : Opened Rx channel : 0 Core 1 : Opened Tx channel : 0 Core 2 : Memory region 2 inserted Core 3 : Memory region 3 inserted Core 1 : Queue Number : 0 opened Core 2 : Number of descriptors requested : 8. Number of descriptors allocated : 8 Core 3 : Number of descriptors requested : 8. Number of descriptors allocated : 8 Core 1 : Queue Number : 1 opened Core 2 : Opened Rx channel : 1 Core 3 : Opened Rx channel : 2 Transmit Queue 0 Entry Count : 1 Tx descriptor 0x@11853b20 Core 2 : Opened Tx channel : 1 Core 3 : Opened Tx channel : 2 Receive Queue 1 Entry Count : 1 Rx descriptor 0x@11853b20 Core 2 : Queue Number : 8192 opened Core 3 : Queue Number : 8193 opened Transmit Queue 0 Entry Count : 1 Tx descriptor 0x@11853b50 Core 2 : Queue Number : 8194 opened Core 3 : Queue Number : 8195 opened Receive Queue 1 Entry Count : 1 Rx descriptor 0x@11853b50 Transmit Queue 8192 Entry Count : 1 Tx descriptor 0x@12853b20 Transmit Queue 8193 Entry Count : 1 Tx descriptor 0x@13853b20 Transmit Queue 0 Entry Count : 1 Tx descriptor 0x@11853b80 Receive Queue 8194 Entry Count : 1 Rx descriptor 0x@12853b20 Receive Queue 8195 Entry Count : 1 Rx descriptor 0x@13853b20 Receive Queue 1 Entry Count : 1 Rx descriptor 0x@11853b80 Transmit Queue 8192 Entry Count : 1 Tx descriptor 0x@12853b50 Transmit Queue 8193 Entry Count : 1 Tx descriptor 0x@13853b50 Transmit Queue 0 Entry Count : 1 Tx descriptor 0x@11853bb0 Receive Queue 8194 Entry Count : 1 Rx descriptor 0x@12853b50 Receive Queue 8195 Entry Count : 1 Rx descriptor 0x@13853b50 Receive Queue 1 Entry Count : 1 Rx descriptor 0x@11853bb0 Transmit Queue 8192 Entry Count : 1 Tx descriptor 0x@12853b80 Transmit Queue 8193 Entry Count : 1 Tx descriptor 0x@13853b80 Transmit Queue 0 Entry Count : 1 Tx descriptor 0x@11853be0 Receive Queue 8194 Entry Count : 1 Rx descriptor 0x@12853b80 Receive Queue 8195 Entry Count : 1 Rx descriptor 0x@13853b80 Receive Queue 1 Entry Count : 1 Rx descriptor 0x@11853be0 Transmit Queue 8192 Entry Count : 1 Tx descriptor 0x@12853bb0 Transmit Queue 8193 Entry Count : 1 Tx descriptor 0x@13853bb0 Transmit Queue 0 Entry Count : 1 Tx descriptor 0x@11853c10 Receive Queue 8194 Entry Count : 1 Rx descriptor 0x@12853bb0 Receive Queue 8195 Entry Count : 1 Rx descriptor 0x@13853bb0 Receive Queue 1 Entry Count : 1 Rx descriptor 0x@11853c10 Transmit Queue 8192 Entry Count : 1 Tx descriptor 0x@12853be0 Transmit Queue 8193 Entry Count : 1 Tx descriptor 0x@13853be0 Transmit Queue 0 Entry Count : 1 Tx descriptor 0x@11853c40 Receive Queue 8194 Entry Count : 1 Rx descriptor 0x@12853be0 Receive Queue 8195 Entry Count : 1 Rx descriptor 0x@13853be0 Receive Queue 1 Entry Count : 1 Rx descriptor 0x@11853c40 Transmit Queue 8192 Entry Count : 1 Tx descriptor 0x@12853c10 Transmit Queue 8193 Entry Count : 1 Tx descriptor 0x@13853c10 Transmit Queue 0 Entry Count : 1 Tx descriptor 0x@11853c70 Receive Queue 8194 Entry Count : 1 Rx descriptor 0x@12853c10 Receive Queue 8195 Entry Count : 1 Rx descriptor 0x@13853c10 Receive Queue 1 Entry Count : 1 Rx descriptor 0x@11853c70 Transmit Queue 8192 Entry Count : 1 Tx descriptor 0x@12853c40 Transmit Queue 8193 Entry Count : 1 Tx descriptor 0x@13853c40 Core 1 : Received host descriptor from Queue 896 Sucessfully Receive Queue 8194 Entry Count : 1 Rx descriptor 0x@12853c40 Receive Queue 8195 Entry Count : 1 Rx descriptor 0x@13853c40 Core 1 : Tx Channel closed successfully. Ref count :0 Transmit Queue 8192 Entry Count : 1 Tx descriptor 0x@12853c70 Transmit Queue 8193 Entry Count : 1 Tx descriptor 0x@13853c70 Core 1 : Rx Channel closed successfully. Ref count :0 Receive Queue 8194 Entry Count : 1 Rx descriptor 0x@12853c70 Receive Queue 8195 Entry Count : 1 Rx descriptor 0x@13853c70 Core 1 : Rx queue closed successfully. Ref count :0 Core 2 : Received host descriptor from Queue 9026 Sucessfully Core 3 : Received host descriptor from Queue 898 Sucessfully Core 1 : Tx queue closed successfully. Ref count :0 Core 2 : Tx Channel closed successfully. Ref count :0 Core 3 : Tx Channel closed successfully. Ref count :0 Core 1 : Free queue closed successfully. Ref count :0 Core 2 : Rx Channel closed successfully. Ref count :0 Core 3 : Rx Channel closed successfully. Ref count :0 Core 1 : Closing CPPI CPDMA Ref count : 2 Core 2 : Rx queue closed successfully. Ref count :0 Core 3 : Rx queue closed successfully. Ref count :0 Core 1 : CPPI CPDMA closed successfully Core 2 : Tx queue closed successfully. Ref count :0 Core 3 : Tx queue closed successfully. Ref count :0 Core 2 : Free queue closed successfully. Ref count :0 Core 3 : Free queue closed successfully. Ref count :0 Core 2 : Closing CPPI CPDMA Ref count : 1 Core 3 : CPPI CPDMA closed successfully Core 2 : CPPI CPDMA closed successfully Core 2 : CPPI exit successful ******************************************************* *************** CPPI LLD usage example Done *********** ******************************************************* Core 1 : CPPI exit successful Core 3 : CPPI exit successful ******************************************************* ******************************************************* *************** CPPI LLD usage example Done *********** *************** CPPI LLD usage example Done *********** ******************************************************* ******************************************************* Core 0 : CPPI exit successful Core 0: exit QMSS Instance name: RM_Server Handle: 0x00849ee8 Type: Server Resource Status: Core 0 : All resources freed successfully ******************************************************* *************** CPPI LLD usage example Done *********** *******************************************************jjQj j@Qjj&j}ryR(j2j3j]j]j]j]j]ujM4jhj]rzRj%X%************************************************** *************** CPPI LLD usage example *********** ************************************************** ************************************************** *************** CPPI LLD usage example *********** ************************************************** ************************************************** ************************************************** *************** CPPI LLD usage example *********** *************** CPPI LLD usage example *********** ************************************************** ************************************************** *******Test running on Core 1 ******************* *******Test running on Core 0 ******************* *******Test running on Core 2 ******************* *******Test running on Core 3 ******************* Core 0 : L1D cache size 4. L2 cache size 0. Core 2 : Starting BIOS... Core 3 : Starting BIOS... Core 0 : Starting BIOS... Core 1 : Starting BIOS... Core 0 : Created RM packet heap Core 0 : Created IPC MessageQ heap Core 0 : Created receive Q for Client1 Core 1 : Opened RM packet heap Core 2 : Opened RM packet heap Core 3 : Opened RM packet heap Core 1 : Opened IPC MessageQ heap Core 2 : Opened IPC MessageQ heap Core 3 : Opened IPC MessageQ heap Core 1 : Created receive Q for Server Core 2 : Created receive Q for Server Core 3 : Created receive Q for Server Core 1 : Opened Server's receive Q Core 1 : Waiting for QMSS to be initialized... Core 0 : Opened Client1's receive Q for Server Core 0 : Created receive Q for Client2 Core 0 : Opened Client2's receive Q for Server Core 0 : Created receive Q for Client3 Core 2 : Opened Server's receive Q Core 2 : Waiting for QMSS to be initialized... Core 0 : Opened Client3's receive Q for Server Core 0 : QMSS initialization done Core 3 : Opened Server's receive Q Core 1 : QMSS initialization done Core 2 : QMSS initialization done Core 3 : Waiting for QMSS to be initialized... Core 3 : QMSS initialization done Core 0 : QMSS CPDMA Opened Core 1 : QMSS CPDMA Opened Core 0 : Memory region 0 inserted Core 0 : Number of descriptors requested : 8. Number of descriptors allocated : 8 Core 0 : Opened Rx channel : 0 Core 0 : Opened Tx channel : 0 Core 0 : Queue Number : 8192 opened Core 0 : Queue Number : 8193 opened Transmit Queue 8192 Entry Count : 1 Tx descriptor 0x@10853b20 Receive Queue 8193 Entry Count : 1 Rx descriptor 0x@10853b20 Transmit Queue 8192 Entry Count : 1 Tx descriptor 0x@10853b50 Receive Queue 8193 Entry Count : 1 Rx descriptor 0x@10853b50 Transmit Queue 8192 Entry Count : 1 Tx descriptor 0x@10853b80 Receive Queue 8193 Entry Count : 1 Rx descriptor 0x@10853b80 Transmit Queue 8192 Entry Count : 1 Tx descriptor 0x@10853bb0 Receive Queue 8193 Entry Count : 1 Rx descriptor 0x@10853bb0 Transmit Queue 8192 Entry Count : 1 Tx descriptor 0x@10853be0 Receive Queue 8193 Entry Count : 1 Rx descriptor 0x@10853be0 Transmit Queue 8192 Entry Count : 1 Tx descriptor 0x@10853c10 Receive Queue 8193 Entry Count : 1 Rx descriptor 0x@10853c10 Transmit Queue 8192 Entry Count : 1 Tx descriptor 0x@10853c40 Receive Queue 8193 Entry Count : 1 Rx descriptor 0x@10853c40 Transmit Queue 8192 Entry Count : 1 Tx descriptor 0x@10853c70 Receive Queue 8193 Entry Count : 1 Rx descriptor 0x@10853c70 Core 0 : Received host descriptor from Queue 897 Sucessfully Core 0 : Tx Channel closed successfully. Ref count :0 Core 0 : Rx Channel closed successfully. Ref count :0 Core 0 : Rx queue closed successfully. Ref count :0 Core 0 : Tx queue closed successfully. Ref count :0 Core 0 : Free queue closed successfully. Ref count :0 Core 0 : Closing CPPI CPDMA Ref count : 3 Core 0 : CPPI CPDMA closed successfully Core 1 : Memory region 1 inserted Core 1 : Number of descriptors requested : 8. Number of descriptors allocated : 8 Core 2 : QMSS CPDMA Opened Core 3 : QMSS CPDMA Opened Core 1 : Opened Rx channel : 0 Core 1 : Opened Tx channel : 0 Core 2 : Memory region 2 inserted Core 3 : Memory region 3 inserted Core 1 : Queue Number : 0 opened Core 2 : Number of descriptors requested : 8. Number of descriptors allocated : 8 Core 3 : Number of descriptors requested : 8. Number of descriptors allocated : 8 Core 1 : Queue Number : 1 opened Core 2 : Opened Rx channel : 1 Core 3 : Opened Rx channel : 2 Transmit Queue 0 Entry Count : 1 Tx descriptor 0x@11853b20 Core 2 : Opened Tx channel : 1 Core 3 : Opened Tx channel : 2 Receive Queue 1 Entry Count : 1 Rx descriptor 0x@11853b20 Core 2 : Queue Number : 8192 opened Core 3 : Queue Number : 8193 opened Transmit Queue 0 Entry Count : 1 Tx descriptor 0x@11853b50 Core 2 : Queue Number : 8194 opened Core 3 : Queue Number : 8195 opened Receive Queue 1 Entry Count : 1 Rx descriptor 0x@11853b50 Transmit Queue 8192 Entry Count : 1 Tx descriptor 0x@12853b20 Transmit Queue 8193 Entry Count : 1 Tx descriptor 0x@13853b20 Transmit Queue 0 Entry Count : 1 Tx descriptor 0x@11853b80 Receive Queue 8194 Entry Count : 1 Rx descriptor 0x@12853b20 Receive Queue 8195 Entry Count : 1 Rx descriptor 0x@13853b20 Receive Queue 1 Entry Count : 1 Rx descriptor 0x@11853b80 Transmit Queue 8192 Entry Count : 1 Tx descriptor 0x@12853b50 Transmit Queue 8193 Entry Count : 1 Tx descriptor 0x@13853b50 Transmit Queue 0 Entry Count : 1 Tx descriptor 0x@11853bb0 Receive Queue 8194 Entry Count : 1 Rx descriptor 0x@12853b50 Receive Queue 8195 Entry Count : 1 Rx descriptor 0x@13853b50 Receive Queue 1 Entry Count : 1 Rx descriptor 0x@11853bb0 Transmit Queue 8192 Entry Count : 1 Tx descriptor 0x@12853b80 Transmit Queue 8193 Entry Count : 1 Tx descriptor 0x@13853b80 Transmit Queue 0 Entry Count : 1 Tx descriptor 0x@11853be0 Receive Queue 8194 Entry Count : 1 Rx descriptor 0x@12853b80 Receive Queue 8195 Entry Count : 1 Rx descriptor 0x@13853b80 Receive Queue 1 Entry Count : 1 Rx descriptor 0x@11853be0 Transmit Queue 8192 Entry Count : 1 Tx descriptor 0x@12853bb0 Transmit Queue 8193 Entry Count : 1 Tx descriptor 0x@13853bb0 Transmit Queue 0 Entry Count : 1 Tx descriptor 0x@11853c10 Receive Queue 8194 Entry Count : 1 Rx descriptor 0x@12853bb0 Receive Queue 8195 Entry Count : 1 Rx descriptor 0x@13853bb0 Receive Queue 1 Entry Count : 1 Rx descriptor 0x@11853c10 Transmit Queue 8192 Entry Count : 1 Tx descriptor 0x@12853be0 Transmit Queue 8193 Entry Count : 1 Tx descriptor 0x@13853be0 Transmit Queue 0 Entry Count : 1 Tx descriptor 0x@11853c40 Receive Queue 8194 Entry Count : 1 Rx descriptor 0x@12853be0 Receive Queue 8195 Entry Count : 1 Rx descriptor 0x@13853be0 Receive Queue 1 Entry Count : 1 Rx descriptor 0x@11853c40 Transmit Queue 8192 Entry Count : 1 Tx descriptor 0x@12853c10 Transmit Queue 8193 Entry Count : 1 Tx descriptor 0x@13853c10 Transmit Queue 0 Entry Count : 1 Tx descriptor 0x@11853c70 Receive Queue 8194 Entry Count : 1 Rx descriptor 0x@12853c10 Receive Queue 8195 Entry Count : 1 Rx descriptor 0x@13853c10 Receive Queue 1 Entry Count : 1 Rx descriptor 0x@11853c70 Transmit Queue 8192 Entry Count : 1 Tx descriptor 0x@12853c40 Transmit Queue 8193 Entry Count : 1 Tx descriptor 0x@13853c40 Core 1 : Received host descriptor from Queue 896 Sucessfully Receive Queue 8194 Entry Count : 1 Rx descriptor 0x@12853c40 Receive Queue 8195 Entry Count : 1 Rx descriptor 0x@13853c40 Core 1 : Tx Channel closed successfully. Ref count :0 Transmit Queue 8192 Entry Count : 1 Tx descriptor 0x@12853c70 Transmit Queue 8193 Entry Count : 1 Tx descriptor 0x@13853c70 Core 1 : Rx Channel closed successfully. Ref count :0 Receive Queue 8194 Entry Count : 1 Rx descriptor 0x@12853c70 Receive Queue 8195 Entry Count : 1 Rx descriptor 0x@13853c70 Core 1 : Rx queue closed successfully. Ref count :0 Core 2 : Received host descriptor from Queue 9026 Sucessfully Core 3 : Received host descriptor from Queue 898 Sucessfully Core 1 : Tx queue closed successfully. Ref count :0 Core 2 : Tx Channel closed successfully. Ref count :0 Core 3 : Tx Channel closed successfully. Ref count :0 Core 1 : Free queue closed successfully. Ref count :0 Core 2 : Rx Channel closed successfully. Ref count :0 Core 3 : Rx Channel closed successfully. Ref count :0 Core 1 : Closing CPPI CPDMA Ref count : 2 Core 2 : Rx queue closed successfully. Ref count :0 Core 3 : Rx queue closed successfully. Ref count :0 Core 1 : CPPI CPDMA closed successfully Core 2 : Tx queue closed successfully. Ref count :0 Core 3 : Tx queue closed successfully. Ref count :0 Core 2 : Free queue closed successfully. Ref count :0 Core 3 : Free queue closed successfully. Ref count :0 Core 2 : Closing CPPI CPDMA Ref count : 1 Core 3 : CPPI CPDMA closed successfully Core 2 : CPPI CPDMA closed successfully Core 2 : CPPI exit successful ******************************************************* *************** CPPI LLD usage example Done *********** ******************************************************* Core 1 : CPPI exit successful Core 3 : CPPI exit successful ******************************************************* ******************************************************* *************** CPPI LLD usage example Done *********** *************** CPPI LLD usage example Done *********** ******************************************************* ******************************************************* Core 0 : CPPI exit successful Core 0: exit QMSS Instance name: RM_Server Handle: 0x00849ee8 Type: Server Resource Status: Core 0 : All resources freed successfully ******************************************************* *************** CPPI LLD usage example Done *********** *******************************************************r{Rr|R}r}R(jUjjwRubaubjb)r~R}rR(jX Debug FAQrRjjQj j@Qjjfj}rR(j]rRUid122rRaj]j]j]j]rRhaujNjhj]rRj%X Debug FAQrRrR}rR(jjRjj~Rubaubj`)rR}rR(jUjjQj j@Qjjcj}rR(jeU.j]j]j]jfUj]j]jgjhujM%jhj]rR(j)rR}rR(jXCPPI Lockup #. CPPI can lock up if any pointer or length, including hint bits, are wrong. Use the User Guide (TRM) referenced below to verify every pointer and length in the descriptor. Also verify the hint bits (low 4 bits of each descriptor) which represents size of descriptor (not data) in 16-byte units. When using CPPI it should be at least 1 (32 bytes) if no extensions are used, or 2 (48 bytes) if some extensions are used. 0 (16 bytes) is likely to cause lock up!! jjRj Njj j}rR(j]j]j]j]j]ujNjhj]rR(jX)rR}rR(jX CPPI LockuprRjjRj j@Qjj\j}rR(j]j]j]j]j]ujM%j]rRj%X CPPI LockuprRrR}rR(jjRjjRubaubj`)rR}rR(jUj}rR(jeU.j]j]j]jfUj]j]jgjhujjRj]rRj)rR}rR(jXCPPI can lock up if any pointer or length, including hint bits, are wrong. Use the User Guide (TRM) referenced below to verify every pointer and length in the descriptor. Also verify the hint bits (low 4 bits of each descriptor) which represents size of descriptor (not data) in 16-byte units. When using CPPI it should be at least 1 (32 bytes) if no extensions are used, or 2 (48 bytes) if some extensions are used. 0 (16 bytes) is likely to cause lock up!! j}rR(j]j]j]j]j]ujjRj]rRjX)rR}rR(jXCPPI can lock up if any pointer or length, including hint bits, are wrong. Use the User Guide (TRM) referenced below to verify every pointer and length in the descriptor. Also verify the hint bits (low 4 bits of each descriptor) which represents size of descriptor (not data) in 16-byte units. When using CPPI it should be at least 1 (32 bytes) if no extensions are used, or 2 (48 bytes) if some extensions are used. 0 (16 bytes) is likely to cause lock up!!rRjjRj j@Qjj\j}rR(j]j]j]j]j]ujM'j]rRj%XCPPI can lock up if any pointer or length, including hint bits, are wrong. Use the User Guide (TRM) referenced below to verify every pointer and length in the descriptor. Also verify the hint bits (low 4 bits of each descriptor) which represents size of descriptor (not data) in 16-byte units. When using CPPI it should be at least 1 (32 bytes) if no extensions are used, or 2 (48 bytes) if some extensions are used. 0 (16 bytes) is likely to cause lock up!!rRrR}rR(jjRjjRubaubajj ubajjcubeubj)rR}rR(jX>See `QMSS Debug FAQ `__ for more. jjRj j@Qjj j}rR(j]j]j]j]j]ujNjhj]rRjX)rR}rR(jX=See `QMSS Debug FAQ `__ for more.jjRj j@Qjj\j}rR(j]j]j]j]j]ujM0j]rR(j%XSee rRrR}rR(jXSee jjRubj)rR}rR(jX/`QMSS Debug FAQ `__j}rR(UnameXQMSS Debug FAQjXindex_device_drv.html#qmssj]j]j]j]j]ujjRj]rRj%XQMSS Debug FAQrRrR}rR(jUjjRubajjubj%X for more.rRrR}rR(jX for more.jjRubeubaubeubeubeubj)rR}rR(jUjKjj.Qj j@Qjjj}rR(j]rRXadditional referencesrRaj]j]j]rRUid123rRaj]ujM3jhj]rR(j)rR}rR(jXAdditional ReferencesrRjjRj j@Qjj"j}rR(j]j]j]j]j]ujM3jhj]rRj%XAdditional ReferencesrRrR}rR(jjRjjRubaubj)rR}rR(jUjjRj j@Qjjj}rR(j]j]j]j]j]ujNjhj]rRj)rR}rR(jUj}rR(j]j]j]j]j]UcolsKujjRj]rR(j)rR}rR(jUj}rR(j]j]j]j]j]UcolwidthK#ujjRj]jjubj)rR}rR(jUj}rR(j]j]j]j]j]UcolwidthK#ujjRj]jjubj)rR}rR(jUj}rR(j]j]j]j]j]ujjRj]rR(j)rR}rR(jUj}rR(j]j]j]j]j]ujjRj]rR(j)rR}rR(jUj}rR(j]j]j]j]j]ujjRj]rRjX)rR}rR(jX **Document**rRjjRj j@Qjj\j}rR(j]j]j]j]j]ujM6j]rRj|)rR}rR(jjRj}rR(j]j]j]j]j]ujjRj]rRj%XDocumentrRrR}rR(jUjjRubajjubaubajjubj)rR}rR(jUj}rR(j]j]j]j]j]ujjRj]rRjX)rR}rR(jX **Location**rRjjRj j@Qjj\j}rR(j]j]j]j]j]ujM6j]rRj|)rR}rR(jjRj}rR(j]j]j]j]j]ujjRj]rSj%XLocationrSrS}rS(jUjjRubajjubaubajjubejjubj)rS}rS(jUj}rS(j]j]j]j]j]ujjRj]rS(j)rS}r S(jUj}r S(j]j]j]j]j]ujjSj]r SjX)r S}r S(jXAPI Reference ManualrSjjSj j@Qjj\j}rS(j]j]j]j]j]ujM8j]rSj%XAPI Reference ManualrSrS}rS(jjSjj Subaubajjubj)rS}rS(jUj}rS(j]j]j]j]j]ujjSj]rSjX)rS}rS(jXI$(TI_PDK_INSTALL_DIR)/packages/ti /drv/CPPI/docs/doxygen/html/index .htmlrSjjSj j@Qjj\j}rS(j]j]j]j]j]ujM8j]rSj%XI$(TI_PDK_INSTALL_DIR)/packages/ti /drv/CPPI/docs/doxygen/html/index .htmlrSrS}rS(jjSjjSubaubajjubejjubj)r S}r!S(jUj}r"S(j]j]j]j]j]ujjRj]r#S(j)r$S}r%S(jUj}r&S(j]j]j]j]j]ujj Sj]r'SjX)r(S}r)S(jX Release Notesr*Sjj$Sj j@Qjj\j}r+S(j]j]j]j]j]ujM<j]r,Sj%X Release Notesr-Sr.S}r/S(jj*Sjj(Subaubajjubj)r0S}r1S(jUj}r2S(j]j]j]j]j]ujj Sj]r3SjX)r4S}r5S(jXK$(TI_PDK_INSTALL_DIR)/packages/ti /drv/CPPI/docs/ReleaseNotes_CPPI_ LLD.pdfjj0Sj j@Qjj\j}r6S(j]j]j]j]j]ujM<j]r7S(j%X1$(TI_PDK_INSTALL_DIR)/packages/ti /drv/CPPI/docs/r8Sr9S}r:S(jX1$(TI_PDK_INSTALL_DIR)/packages/ti /drv/CPPI/docs/jj4Subjg-)r;S}rS(j]r?SUid293r@Saj]j]j]j]UrefidUid292rASujj4Sj]rBSj%XReleaseNotes_CPPI_rCSrDS}rES(jUjj;Subajjs-ubj%X LLD.pdfrFSrGS}rHS(jX LLD.pdfjj4Subeubajjubejjubj)rIS}rJS(jUj}rKS(j]j]j]j]j]ujjRj]rLS(j)rMS}rNS(jUj}rOS(j]j]j]j]j]ujjISj]rPSjX)rQS}rRS(jXHardware Userguide/TRMrSSjjMSj j@Qjj\j}rTS(j]j]j]j]j]ujM@j]rUSj%XHardware Userguide/TRMrVSrWS}rXS(jjSSjjQSubaubajjubj)rYS}rZS(jUj}r[S(j]j]j]j]j]ujjISj]r\SjX)r]S}r^S(jX/`UG TRM PDF `__r_SjjYSj j@Qjj\j}r`S(j]j]j]j]j]ujM@j]raSj)rbS}rcS(jj_Sj}rdS(UnameX UG TRM PDFjXhttp://www.ti.com/lit/sprugr9j]j]j]j]j]ujj]Sj]reSj%X UG TRM PDFrfSrgS}rhS(jUjjbSubajjubaubajjubejjubj)riS}rjS(jUj}rkS(j]j]j]j]j]ujjRj]rlS(j)rmS}rnS(jUj}roS(j]j]j]j]j]ujjiSj]rpSjX)rqS}rrS(jX*QMSS LLD (Navigator/Queueing HW component)rsSjjmSj j@Qjj\j}rtS(j]j]j]j]j]ujMDj]ruSj%X*QMSS LLD (Navigator/Queueing HW component)rvSrwS}rxS(jjsSjjqSubaubajjubj)ryS}rzS(jUj}r{S(j]j]j]j]j]ujjiSj]r|SjX)r}S}r~S(jX `QMSS LLD`_rSjjySj j@Qjj\j}rS(j]j]j]j]j]ujMDj]rSj)rS}rS(jjSjqKjj}Sjjj}rS(UnameXQMSS LLDjXindex_device_drv.html#qmssrSj]j]j]j]j]uj]rSj%XQMSS LLDrSrS}rS(jUjjSubaubaubajjubejjubejjubejjubaubj)rS}rS(jX).. _QMSS LLD: index_device_drv.html#qmssjKjjRj j@Qjjj}rS(jjSj]rSUqmss-lldrSaj]j]j]j]rShaujM-jhj]ubj)rS}rS(jUjjRj j@Qjjj}rS(j]j]j]j]j]ujMJjhj]rSj)rS}rS(jUjKjjSj j@Qjjj}rS(j]j]j]j]j]ujKjhj]ubaubeubeubj j@Qjjj}rS(j]rSXoverviewrSaj]j]j]rSUid114rSaj]ujKjhj]rS(j)rS}rS(jXOverviewrSjj,Qj j@Qjj"j}rS(j]j]j]j]j]ujKjhj]rSj%XOverviewrSrS}rS(jjSjjSubaubj)rS}rS(jUjKjj,Qj j@Qjjj}rS(j]rSX introductionrSaj]j]j]rSUid115rSaj]ujKjhj]rS(j)rS}rS(jX IntroductionrSjjSj j@Qjj"j}rS(j]j]j]j]j]ujKjhj]rSj%X IntroductionrSrS}rS(jjSjjSubaubjX)rS}rS(jXCPPI offers developers a common way of handling different protocol interfaces that may require multiple priorities and multiple channels on a single port. CPPI defines the register set, data structures, interrupts and buffer handling for all peripherals, regardless of protocol.rSjjSj j@Qjj\j}rS(j]j]j]j]j]ujK jhj]rSj%XCPPI offers developers a common way of handling different protocol interfaces that may require multiple priorities and multiple channels on a single port. CPPI defines the register set, data structures, interrupts and buffer handling for all peripherals, regardless of protocol.rSrS}rS(jjSjjSubaubjX)rS}rS(jXLCPPI is based on a buffer scatter/gather scheme, in which individual packets are broken up and then stored into small buffers, from which they are retrieved and reassembled (as opposed to using buffers that are located contiguously in memory). When protocol translation is required, a packet header can be appended in a small buffer, saving the CPU from having to rewrite the entire packet and header by performing a copy from one large buffer to another. The considerable savings in CPU cycles that result make buffer scatter/gathering the most efficient scheme for bridging and routing.rSjjSj j@Qjj\j}rS(j]j]j]j]j]ujKjhj]rSj%XLCPPI is based on a buffer scatter/gather scheme, in which individual packets are broken up and then stored into small buffers, from which they are retrieved and reassembled (as opposed to using buffers that are located contiguously in memory). When protocol translation is required, a packet header can be appended in a small buffer, saving the CPU from having to rewrite the entire packet and header by performing a copy from one large buffer to another. The considerable savings in CPU cycles that result make buffer scatter/gathering the most efficient scheme for bridging and routing.rSrS}rS(jjSjjSubaubjX)rS}rS(jXbThe LLD provides resource management for descriptors, receive/transmit channels and receive flows.rSjjSj j@Qjj\j}rS(j]j]j]j]j]ujKjhj]rSj%XbThe LLD provides resource management for descriptors, receive/transmit channels and receive flows.rSrS}rS(jjSjjSubaubeubeubj j@Qjj?j}rS(j]UlevelKj]j]rSjSaUsourcej@Qj]j]UlineKUtypejAujKjhj]rSjX)rS}rS(jX+Duplicate implicit target name: "overview".j}rS(j]j]j]j]j]ujj*Qj]rSj%X+Duplicate implicit target name: "overview".rSrS}rS(jUjjSubajj\ubaubh)rS}rS(jUjjSj j@Qjj?j}rS(j]UlevelKj]j]rSjSaUsourcej@Qj]j]UlineKUtypejAujKjhj]rSjX)rS}rS(jX/Duplicate implicit target name: "introduction".j}rS(j]j]j]j]j]ujjSj]rSj%X/Duplicate implicit target name: "introduction".rSrS}rS(jUjjSubajj\ubaubh)rS}rS(jUjjGQj j@Qjj?j}rS(j]UlevelKj]j]rSjMQaUsourcej@Qj]j]UlineKUtypejAujKjhj]rSjX)rS}rS(jX1Duplicate implicit target name: "user interface".j}rS(j]j]j]j]j]ujjSj]rSj%X1Duplicate implicit target name: "user interface".rSrS}rS(jUjjSubajj\ubaubh)rS}rS(jUjjWQj j@Qjj?j}rS(j]UlevelKj]j]rSj]QaUsourcej@Qj]j]UlineK UtypejAujK jhj]rSjX)rS}rS(jX7Duplicate implicit target name: "driver configuration".j}rS(j]j]j]j]j]ujjSj]rSj%X7Duplicate implicit target name: "driver configuration".rSrS}rS(jUjjSubajj\ubaubh)rS}rS(jUjjvQj j@Qjj?j}rS(j]UlevelKj]j]rSj|QaUsourcej@Qj]j]UlineK+UtypejAujK+jhj]rSjX)rT}rT(jX'Duplicate implicit target name: "apis".j}rT(j]j]j]j]j]ujjSj]rTj%X'Duplicate implicit target name: "apis".rTrT}rT(jUjjTubajj\ubaubh)rT}rT(jUjjQj j@Qjj?j}r T(j]UlevelKj]j]r TjQaUsourcej@Qj]j]UlineK4UtypejAujK4jhj]r TjX)r T}r T(jX.Duplicate implicit target name: "application".j}rT(j]j]j]j]j]ujjTj]rTj%X.Duplicate implicit target name: "application".rTrT}rT(jUjj Tubajj\ubaubh)rT}rT(jUjjQj j@Qjj?j}rT(j]UlevelKj]j]rTjQaUsourcej@Qj]j]UlineK7UtypejAujK7jhj]rTjX)rT}rT(jX+Duplicate implicit target name: "examples".j}rT(j]j]j]j]j]ujjTj]rTj%X+Duplicate implicit target name: "examples".rTrT}rT(jUjjTubajj\ubaubh)rT}r T(jUj}r!T(j]UlevelKj]j]r"TjhRaUsourcej j]j]UlineKWUtypejXujjcRj]r#TjX)r$T}r%T(jX8Duplicate explicit target name: "sample-example-output".j}r&T(j]j]j]j]j]ujjTj]r'Tj%X8Duplicate explicit target name: "sample-example-output".r(Tr)T}r*T(jUjj$Tubajj\ubajj?ubh)r+T}r,T(jUjjRj j@Qjj?j}r-T(j]UlevelKj]j]r.TjRaUsourcej@Qj]j]UlineM3UtypejAujM3jhj]r/TjX)r0T}r1T(jX8Duplicate implicit target name: "additional references".j}r2T(j]j]j]j]j]ujj+Tj]r3Tj%X8Duplicate implicit target name: "additional references".r4Tr5T}r6T(jUjj0Tubajj\ubaubh)r7T}r8T(jUjj)r9T}r:T(jUjKjj)r;T}rTUpar?Taj]r@ThaujK]jhj]rAT(j)rBT}rCT(jXPArDTjj;Tj j jj"j}rET(j]j]j]j]j]ujK]jhj]rFTj%XPArGTrHT}rIT(jjDTjjBTubaubj))rJT}rKT(jX=http://processors.wiki.ti.com/index.php/Processor_SDK_RTOS_PAjj;Tj j,X;source/rtos/PDK_Platform_Software/Device_Drivers/PA.rst.incrLTrMT}rNTbjj0j}rOT(j2j3j]j]j]j]j]ujKjhj]rPTj%X=http://processors.wiki.ti.com/index.php/Processor_SDK_RTOS_PArQTrRT}rST(jUjjJTubaubj9Tj)rTT}rUT(jUjKjj;Tj jMTjjj}rVT(j]rWTX applicationrXTaj]j]j]rYTUid128rZTaj]ujK(jhj]r[T(j)r\T}r]T(jX Applicationr^TjjTTj jMTjj"j}r_T(j]j]j]j]j]ujK(jhj]r`Tj%X ApplicationraTrbT}rcT(jj^Tjj\Tubaubj)rdT}reT(jUjKjjTTj jMTjjj}rfT(j]rgTXexamplesrhTaj]j]j]riTUid129rjTaj]ujK+jhj]rkT(j)rlT}rmT(jXExamplesrnTjjdTj jMTjj"j}roT(j]j]j]j]j]ujK+jhj]rpTj%XExamplesrqTrrT}rsT(jjnTjjlTubaubj)rtT}ruT(jUjjdTj jMTjjj}rvT(j]j]j]j]j]ujNjhj]rwTj)rxT}ryT(jUj}rzT(j]j]j]j]j]UcolsKujjtTj]r{T(j)r|T}r}T(jUj}r~T(j]j]j]j]j]UcolwidthKujjxTj]jjubj)rT}rT(jUj}rT(j]j]j]j]j]UcolwidthKujjxTj]jjubj)rT}rT(jUj}rT(j]j]j]j]j]UcolwidthKujjxTj]jjubj)rT}rT(jUj}rT(j]j]j]j]j]ujjxTj]rTj)rT}rT(jUj}rT(j]j]j]j]j]ujjTj]rT(j)rT}rT(jUj}rT(j]j]j]j]j]ujjTj]rTjX)rT}rT(jXNamerTjjTj jMTjj\j}rT(j]j]j]j]j]ujK.j]rTj%XNamerTrT}rT(jjTjjTubaubajjubj)rT}rT(jUj}rT(j]j]j]j]j]ujjTj]rTjX)rT}rT(jX DescriptionrTjjTj jMTjj\j}rT(j]j]j]j]j]ujK.j]rTj%X DescriptionrTrT}rT(jjTjjTubaubajjubj)rT}rT(jUj}rT(j]j]j]j]j]ujjTj]rTjX)rT}rT(jXExpected ResultsrTjjTj jMTjj\j}rT(j]j]j]j]j]ujK.j]rTj%XExpected ResultsrTrT}rT(jjTjjTubaubajjubejjubajjubj)rT}rT(jUj}rT(j]j]j]j]j]ujjxTj]rT(j)rT}rT(jUj}rT(j]j]j]j]j]ujjTj]rT(j)rT}rT(jUj}rT(j]j]j]j]j]ujjTj]rTjX)rT}rT(jXPA_Example applicationrTjjTj jMTjj\j}rT(j]j]j]j]j]ujK0j]rTj%XPA_Example applicationrTrT}rT(jjTjjTubaubajjubj)rT}rT(jUj}rT(j]j]j]j]j]ujjTj]rTj)rT}rT(jUj}rT(j]j]j]j]j]ujjTj]rTj)rT}rT(jXWExample demonstrating *simple emac loopback* use case. Reference example for developersjKjjTj jMTjjj}rT(j]j]j]j]j]ujKj]rT(j%XExample demonstrating rTrT}rT(jXExample demonstrating jjTubj<)rT}rT(jX*simple emac loopback*j}rT(j]j]j]j]j]ujjTj]rTj%Xsimple emac loopbackrTrT}rT(jUjjTubajjDubj%X+ use case. Reference example for developersrTrT}rT(jX+ use case. Reference example for developersjjTubeubajjubajjubj)rT}rT(jUj}rT(j]j]j]j]j]ujjTj]rTj)rT}rT(jUj}rT(j]j]j]j]j]ujjTj]rTj)rT}rT(jX5User observes the output printed over the CCS consolerTjKjjTj jMTjjj}rT(j]j]j]j]j]ujKj]rTj%X5User observes the output printed over the CCS consolerTrT}rT(jjTjjTubaubajjubajjubejjubj)rT}rT(jUj}rT(j]j]j]j]j]ujjTj]rT(j)rT}rT(jUj}rT(j]j]j]j]j]ujjTj]rTjX)rT}rT(jXPA_UnitTestApplicatio nrTjjTj jMTjj\j}rT(j]j]j]j]j]ujK7j]rTj%XPA_UnitTestApplicatio nrTrT}rT(jjTjjTubaubajjubj)rT}rT(jUj}rU(j]j]j]j]j]ujjTj]rUj)rU}rU(jUj}rU(j]j]j]j]j]ujjTj]rUj)rU}rU(jX&Unit Test application to test all APIsrUjKjjUj jMTjjj}r U(j]j]j]j]j]ujKj]r Uj%X&Unit Test application to test all APIsr Ur U}r U(jjUjjUubaubajjubajjubj)rU}rU(jUj}rU(j]j]j]j]j]ujjTj]rUj)rU}rU(jUj}rU(j]j]j]j]j]ujjUj]rUj)rU}rU(jX5User observes the output printed over the CCS consolerUjKjjUj jMTjjj}rU(j]j]j]j]j]ujKj]rUj%X5User observes the output printed over the CCS consolerUrU}rU(jjUjjUubaubajjubajjubejjubj)rU}rU(jUj}r U(j]j]j]j]j]ujjTj]r!U(j)r"U}r#U(jUj}r$U(j]j]j]j]j]ujjUj]r%UjX)r&U}r'U(jXPA_PktCapTestApplicat ionr(Ujj"Uj jMTjj\j}r)U(j]j]j]j]j]ujK;j]r*Uj%XPA_PktCapTestApplicat ionr+Ur,U}r-U(jj(Ujj&Uubaubajjubj)r.U}r/U(jUj}r0U(j]j]j]j]j]ujjUj]r1Uj)r2U}r3U(jUj}r4U(j]j]j]j]j]ujj.Uj]r5Uj)r6U}r7U(jX%Packet Capture Unit Test application.r8UjKjj2Uj jMTjjj}r9U(j]j]j]j]j]ujKj]r:Uj%X%Packet Capture Unit Test application.r;UrU}r?U(jUj}r@U(j]j]j]j]j]ujjUj]rAUj)rBU}rCU(jUj}rDU(j]j]j]j]j]ujj>Uj]rEUj)rFU}rGU(jX5User observes the output printed over the CCS consolerHUjKjjBUj jMTjjj}rIU(j]j]j]j]j]ujKj]rJUj%X5User observes the output printed over the CCS consolerKUrLU}rMU(jjHUjjFUubaubajjubajjubejjubejjubejjubaubeubeubj)rNU}rOU(jUjKjj;Tj jMTjjj}rPU(j]rQUXfaqrRUaj]j]j]rSUUid130rTUaj]ujKAjhj]rUU(j)rVU}rWU(jXFAQrXUjjNUj jMTjj"j}rYU(j]j]j]j]j]ujKAjhj]rZUj%XFAQr[Ur\U}r]U(jjXUjjVUubaubjb)r^U}r_U(jXGWhat is the difference between internal loopback and external loopback?r`UjjNUj jMTjjfj}raU(j]rbUUFwhat-is-the-difference-between-internal-loopback-and-external-loopbackrcUaj]j]j]j]rdUhUaujNjhj]reUj%XGWhat is the difference between internal loopback and external loopback?rfUrgU}rhU(jj`Ujj^Uubaubj)riU}rjU(jUjjNUj jMTjjj}rkU(jX-j]j]j]j]j]ujKGjhj]rlU(j)rmU}rnU(jXsCPSW_LOOPBACK_INTERNAL (default): The transmitted packet is loopbacked at the SGMII through SGMII internal loopbackjjiUj jMTjj j}roU(j]j]j]j]j]ujNjhj]rpUjX)rqU}rrU(jXsCPSW_LOOPBACK_INTERNAL (default): The transmitted packet is loopbacked at the SGMII through SGMII internal loopbackrsUjjmUj jMTjj\j}rtU(j]j]j]j]j]ujKGj]ruUj%XsCPSW_LOOPBACK_INTERNAL (default): The transmitted packet is loopbacked at the SGMII through SGMII internal loopbackrvUrwU}rxU(jjsUjjqUubaubaubj)ryU}rzU(jXyCPSW_LOOPBACK_EXTERNAL: The transmitted packet should be loopbacked by an application outside of the SOC, e.g., PC, PHY. jjiUj jMTjj j}r{U(j]j]j]j]j]ujNjhj]r|UjX)r}U}r~U(jXxCPSW_LOOPBACK_EXTERNAL: The transmitted packet should be loopbacked by an application outside of the SOC, e.g., PC, PHY.rUjjyUj jMTjj\j}rU(j]j]j]j]j]ujKIj]rUj%XxCPSW_LOOPBACK_EXTERNAL: The transmitted packet should be loopbacked by an application outside of the SOC, e.g., PC, PHY.rUrU}rU(jjUjj}Uubaubaubeubjb)rU}rU(jX&How to test PA EMAC example with a PC?rUjjNUj jMTjjfj}rU(j]rUU%how-to-test-pa-emac-example-with-a-pcrUaj]j]j]j]rUhmaujNjhj]rUj%X&How to test PA EMAC example with a PC?rUrU}rU(jjUjjUubaubjX)rU}rU(jXThe EVM has to be connected to PC via RJ-45 port. By default, the PA example uses the internal loopback mode, please change code: int cpswLpbkMode = CPSW_LOOPBACK_INTERNAL to CPSW_LOOPBACK_EXTERNAL.rUjjNUj jMTjj\j}rU(j]j]j]j]j]ujKOjhj]rUj%XThe EVM has to be connected to PC via RJ-45 port. By default, the PA example uses the internal loopback mode, please change code: int cpswLpbkMode = CPSW_LOOPBACK_INTERNAL to CPSW_LOOPBACK_EXTERNAL.rUrU}rU(jjUjjUubaubjX)rU}rU(jX)To test the egress path (from SOC to PC):rUjjNUj jMTjj\j}rU(j]j]j]j]j]ujKSjhj]rUj%X)To test the egress path (from SOC to PC):rUrU}rU(jjUjjUubaubj)rU}rU(jUjjNUj jMTjjj}rU(jX-j]j]j]j]j]ujKUjhj]rU(j)rU}rU(jX&Rebuilt the CCS project, load and run.rUjjUj jMTjj j}rU(j]j]j]j]j]ujNjhj]rUjX)rU}rU(jjUjjUj jMTjj\j}rU(j]j]j]j]j]ujKUj]rUj%X&Rebuilt the CCS project, load and run.rUrU}rU(jjUjjUubaubaubj)rU}rU(jXThe PC should receive 10 identical UDP packets sending out by the PA example, the packet is defined by an array pktMatch[] in the code. jjUj jMTjj j}rU(j]j]j]j]j]ujNjhj]rUjX)rU}rU(jXThe PC should receive 10 identical UDP packets sending out by the PA example, the packet is defined by an array pktMatch[] in the code.rUjjUj jMTjj\j}rU(j]j]j]j]j]ujKVj]rUj%XThe PC should receive 10 identical UDP packets sending out by the PA example, the packet is defined by an array pktMatch[] in the code.rUrU}rU(jjUjjUubaubaubeubjX)rU}rU(jXTo test the ingress direction (from PC to SOC): The PC needs a tool to send out packets with controlled MAC address, IP address and UDP port matching the PA layer 2, 3 and 4 classifications, defined by the following functions:rUjjNUj jMTjj\j}rU(j]j]j]j]j]ujKYjhj]rUj%XTo test the ingress direction (from PC to SOC): The PC needs a tool to send out packets with controlled MAC address, IP address and UDP port matching the PA layer 2, 3 and 4 classifications, defined by the following functions:rUrU}rU(jjUjjUubaubj)rU}rU(jUjjNUj jMTjjj}rU(jX-j]j]j]j]j]ujK^jhj]rU(j)rU}rU(jXAdd_MACAddress(): ethInfo.dstrUjjUj jMTjj j}rU(j]j]j]j]j]ujNjhj]rUjX)rU}rU(jjUjjUj jMTjj\j}rU(j]j]j]j]j]ujK^j]rUj%XAdd_MACAddress(): ethInfo.dstrUrU}rU(jjUjjUubaubaubj)rU}rU(jXAdd_IPAddress(): ipInfo.dstrUjjUj jMTjj j}rU(j]j]j]j]j]ujNjhj]rUjX)rU}rU(jjUjjUj jMTjj\j}rU(j]j]j]j]j]ujK_j]rUj%XAdd_IPAddress(): ipInfo.dstrUrU}rU(jjUjjUubaubaubj)rU}rU(jXAdd_Port (): ports jjUj jMTjj j}rU(j]j]j]j]j]ujNjhj]rUjX)rU}rU(jXAdd_Port (): portsrUjjUj jMTjj\j}rU(j]j]j]j]j]ujK`j]rUj%XAdd_Port (): portsrUrU}rU(jjUjjUubaubaubeubjb)rU}rU(jXEHow to use PA EMAC example to test other Ethernet ports than default?rUjjNUj jMTjjfj}rU(j]rUUDhow-to-use-pa-emac-example-to-test-other-ethernet-ports-than-defaultrUaj]j]j]j]rUhaujNjhj]rUj%XEHow to use PA EMAC example to test other Ethernet ports than default?rUrU}rU(jjUjjUubaubjX)rU}rU(jXThe Keystone devices may have multiple Ethernet ports, connected through an internal GbE switch with a host port. There is a pre-defined symbol "NUM_PORTS" in the text file when creating the PA project. This controls how many ports used in loopback mode test. In non-loopback case, the port number may be hardcoded by gNum_Mac_Ports. This has to be changed for the test. On EVMs, those additional Ethernet ports may be accessed by various ways: Rear-Transition Module – Breakout Card (RTM-BOC) or Advanced Mezzanine Card – Breakout Card (AMC-BOC), or AMC backplane, they are EVM hardware dependent. For example, K2E has 8 SGMII ports. In the K2E EVM, two Ethernet PHYs (PHY1 and PHY2) are connected to SoC SGMII 0 and 1 respectively, to provide a copper interface and routed to a Gigabit RJ-45 connector. The SGMII 2 and 3 of SoC are routed to Port 0 and 1 of the AMC edge connector backplane interface. The SGMII 4 to 7 are routed to RTM connector which can be accessed by RTM BOC. The PA EMAC example by default tests all 8 ports in loopback. To test additional ports in non-loopback, check/modify the gNum_Mac_Ports defined to include the SGMII testing port.rUjjNUj jMTjj\j}rU(j]j]j]j]j]ujKfjhj]rUj%XThe Keystone devices may have multiple Ethernet ports, connected through an internal GbE switch with a host port. There is a pre-defined symbol "NUM_PORTS" in the text file when creating the PA project. This controls how many ports used in loopback mode test. In non-loopback case, the port number may be hardcoded by gNum_Mac_Ports. This has to be changed for the test. On EVMs, those additional Ethernet ports may be accessed by various ways: Rear-Transition Module – Breakout Card (RTM-BOC) or Advanced Mezzanine Card – Breakout Card (AMC-BOC), or AMC backplane, they are EVM hardware dependent. For example, K2E has 8 SGMII ports. In the K2E EVM, two Ethernet PHYs (PHY1 and PHY2) are connected to SoC SGMII 0 and 1 respectively, to provide a copper interface and routed to a Gigabit RJ-45 connector. The SGMII 2 and 3 of SoC are routed to Port 0 and 1 of the AMC edge connector backplane interface. The SGMII 4 to 7 are routed to RTM connector which can be accessed by RTM BOC. The PA EMAC example by default tests all 8 ports in loopback. To test additional ports in non-loopback, check/modify the gNum_Mac_Ports defined to include the SGMII testing port.rUrU}rU(jjUjjUubaubjb)rU}rV(jX7Can PA be used to forward all incoming packets to host?rVjjNUj jMTjjfj}rV(j]rVU6can-pa-be-used-to-forward-all-incoming-packets-to-hostrVaj]j]j]j]rVh(aujNjhj]rVj%X7Can PA be used to forward all incoming packets to host?rVrV}r V(jjVjjUubaubjX)r V}r V(jXThe design of PA is to use firmware to offload host for classifying packets, the PA has layer 2, 3 and 4 classifications. PA LLD supports two APIs to add MAC LUT1 classification and routing. The application can call either the first generation API Pa_addMac() or the second generation Pa_addMac2() APIs. When using the first API, initialize all the elements of paEthInfo_t with zero and update the routing info paRouteInfo_t with pa_DEST_HOST. When using the second generation API, paEthInfo2_t with validBitMap = 0 and paRouteInfo2_t (in paParamDesc) with pa_DEST_HOST can be passed. Please refer to Pa_addMac and Pa_addMac2() API explanations as provided under the doxygen folder of PA (Or refer to Pa.h interface header file).r VjjNUj jMTjj\j}r V(j]j]j]j]j]ujK{jhj]rVj%XThe design of PA is to use firmware to offload host for classifying packets, the PA has layer 2, 3 and 4 classifications. PA LLD supports two APIs to add MAC LUT1 classification and routing. The application can call either the first generation API Pa_addMac() or the second generation Pa_addMac2() APIs. When using the first API, initialize all the elements of paEthInfo_t with zero and update the routing info paRouteInfo_t with pa_DEST_HOST. When using the second generation API, paEthInfo2_t with validBitMap = 0 and paRouteInfo2_t (in paParamDesc) with pa_DEST_HOST can be passed. Please refer to Pa_addMac and Pa_addMac2() API explanations as provided under the doxygen folder of PA (Or refer to Pa.h interface header file).rVrV}rV(jj Vjj Vubaubjb)rV}rV(jXWWhat are the right PA/NETCP/Ethernet user guides to use for different keystone devices?rVjjNUj jMTjjfj}rV(j]rVUVwhat-are-the-right-pa-netcp-ethernet-user-guides-to-use-for-different-keystone-devicesrVaj]j]j]j]rVhaujNjhj]rVj%XWWhat are the right PA/NETCP/Ethernet user guides to use for different keystone devices?rVrV}rV(jjVjjVubaubj)rV}rV(jUjjNUj jMTjjj}rV(jX-j]j]j]j]j]ujKjhj]r V(j)r!V}r"V(jXAll Keystone I (C665x, C667x) devices use the same Serdes and documented in respective datasheets (See Device State Control Registers)r#VjjVj jMTjj j}r$V(j]j]j]j]j]ujNjhj]r%VjX)r&V}r'V(jj#Vjj!Vj jMTjj\j}r(V(j]j]j]j]j]ujKj]r)Vj%XAll Keystone I (C665x, C667x) devices use the same Serdes and documented in respective datasheets (See Device State Control Registers)r*Vr+V}r,V(jj#Vjj&Vubaubaubj)r-V}r.V(jXxAll Keystone II (K2H, K2K, K2G, K2E, K2L) device use the same Serdes and documented in http://www.ti.com/lit/pdf/SPRUHO3r/VjjVj jMTjj j}r0V(j]j]j]j]j]ujNjhj]r1VjX)r2V}r3V(jj/Vjj-Vj jMTjj\j}r4V(j]j]j]j]j]ujKj]r5V(j%XWAll Keystone II (K2H, K2K, K2G, K2E, K2L) device use the same Serdes and documented in r6Vr7V}r8V(jXWAll Keystone II (K2H, K2K, K2G, K2E, K2L) device use the same Serdes and documented in jj2Vubj)r9V}r:V(jX!http://www.ti.com/lit/pdf/SPRUHO3r;Vj}rVr?V}r@V(jUjj9Vubajjubeubaubj)rAV}rBV(jX>For Keystone I, C667x has PA and NETCP GEN1, C665x has neitherrCVjjVj jMTjj j}rDV(j]j]j]j]j]ujNjhj]rEVjX)rFV}rGV(jjCVjjAVj jMTjj\j}rHV(j]j]j]j]j]ujKj]rIVj%X>For Keystone I, C667x has PA and NETCP GEN1, C665x has neitherrJVrKV}rLV(jjCVjjFVubaubaubj)rMV}rNV(jXmFor Keystone II, K2H/K2K use the same PA and NETCP GEN1 as C667x, K2E/K2L uses a different PA2 and NETCP GEN2rOVjjVj jMTjj j}rPV(j]j]j]j]j]ujNjhj]rQVjX)rRV}rSV(jjOVjjMVj jMTjj\j}rTV(j]j]j]j]j]ujKj]rUVj%XmFor Keystone II, K2H/K2K use the same PA and NETCP GEN1 as C667x, K2E/K2L uses a different PA2 and NETCP GEN2rVVrWV}rXV(jjOVjjRVubaubaubj)rYV}rZV(jX.For Keystone II, K2G has neither PA nor NETCP jjVj jMTjj j}r[V(j]j]j]j]j]ujNjhj]r\VjX)r]V}r^V(jX-For Keystone II, K2G has neither PA nor NETCPr_VjjYVj jMTjj\j}r`V(j]j]j]j]j]ujKj]raVj%X-For Keystone II, K2G has neither PA nor NETCPrbVrcV}rdV(jj_Vjj]VubaubaubeubjX)reV}rfV(jX To summarize:rgVjjNUj jMTjj\j}rhV(j]j]j]j]j]ujKjhj]riVj%X To summarize:rjVrkV}rlV(jjgVjjeVubaubj)rmV}rnV(jUjjNUj jMTjjj}roV(j]j]j]j]j]ujNjhj]rpVj)rqV}rrV(jUj}rsV(j]j]j]j]j]UcolsKujjmVj]rtV(j)ruV}rvV(jUj}rwV(j]j]j]j]j]UcolwidthKujjqVj]jjubj)rxV}ryV(jUj}rzV(j]j]j]j]j]UcolwidthKujjqVj]jjubj)r{V}r|V(jUj}r}V(j]j]j]j]j]UcolwidthK"ujjqVj]jjubj)r~V}rV(jUj}rV(j]j]j]j]j]UcolwidthK"ujjqVj]jjubj)rV}rV(jUj}rV(j]j]j]j]j]UcolwidthK"ujjqVj]jjubj)rV}rV(jUj}rV(j]j]j]j]j]ujjqVj]rV(j)rV}rV(jUj}rV(j]j]j]j]j]ujjVj]rV(j)rV}rV(jUj}rV(j]j]j]j]j]ujjVj]rVjX)rV}rV(jXSOCrVjjVj jMTjj\j}rV(j]j]j]j]j]ujKj]rVj%XSOCrVrV}rV(jjVjjVubaubajjubj)rV}rV(jUj}rV(j]j]j]j]j]ujjVj]rVjX)rV}rV(jXSerdesrVjjVj jMTjj\j}rV(j]j]j]j]j]ujKj]rVj%XSerdesrVrV}rV(jjVjjVubaubajjubj)rV}rV(jUj}rV(j]j]j]j]j]ujjVj]rVjX)rV}rV(jXEthernetrVjjVj jMTjj\j}rV(j]j]j]j]j]ujKj]rVj%XEthernetrVrV}rV(jjVjjVubaubajjubj)rV}rV(jUj}rV(j]j]j]j]j]ujjVj]rVjX)rV}rV(jXPArVjjVj jMTjj\j}rV(j]j]j]j]j]ujKj]rVj%XPArVrV}rV(jjVjjVubaubajjubj)rV}rV(jUj}rV(j]j]j]j]j]ujjVj]rVjX)rV}rV(jXNetcprVjjVj jMTjj\j}rV(j]j]j]j]j]ujKj]rVj%XNetcprVrV}rV(jjVjjVubaubajjubejjubj)rV}rV(jUj}rV(j]j]j]j]j]ujjVj]rV(j)rV}rV(jUj}rV(j]j]j]j]j]ujjVj]rVjX)rV}rV(jXC665xrVjjVj jMTjj\j}rV(j]j]j]j]j]ujKj]rVj%XC665xrVrV}rV(jjVjjVubaubajjubj)rV}rV(jUj}rV(j]j]j]j]j]ujjVj]rVjX)rV}rV(jX See datasheetrVjjVj jMTjj\j}rV(j]j]j]j]j]ujKj]rVj%X See datasheetrVrV}rV(jjVjjVubaubajjubj)rV}rV(jUj}rV(j]j]j]j]j]ujjVj]rVjX)rV}rV(jX!http://www.ti.com/lit/pdf/SPRUHH1rVjjVj jMTjj\j}rV(j]j]j]j]j]ujKj]rVj)rV}rV(jjVj}rV(UrefurijVj]j]j]j]j]ujjVj]rVj%X!http://www.ti.com/lit/pdf/SPRUHH1rVrV}rV(jUjjVubajjubaubajjubj)rV}rV(jUj}rV(j]j]j]j]j]ujjVj]rVjX)rV}rV(jXN/ArVjjVj jMTjj\j}rV(j]j]j]j]j]ujKj]rVj%XN/ArVrV}rV(jjVjjVubaubajjubj)rW}rW(jUj}rW(j]j]j]j]j]ujjVj]rWjX)rW}rW(jXN/ArWjjWj jMTjj\j}rW(j]j]j]j]j]ujKj]rWj%XN/Ar Wr W}r W(jjWjjWubaubajjubejjubj)r W}r W(jUj}rW(j]j]j]j]j]ujjVj]rW(j)rW}rW(jUj}rW(j]j]j]j]j]ujj Wj]rWjX)rW}rW(jXC667xrWjjWj jMTjj\j}rW(j]j]j]j]j]ujKj]rWj%XC667xrWrW}rW(jjWjjWubaubajjubj)rW}rW(jUj}rW(j]j]j]j]j]ujj Wj]rWjX)r W}r!W(jX See datasheetr"WjjWj jMTjj\j}r#W(j]j]j]j]j]ujKj]r$Wj%X See datasheetr%Wr&W}r'W(jj"Wjj Wubaubajjubj)r(W}r)W(jUj}r*W(j]j]j]j]j]ujj Wj]r+WjX)r,W}r-W(jX!http://www.ti.com/lit/pdf/SPRUGV9r.Wjj(Wj jMTjj\j}r/W(j]j]j]j]j]ujKj]r0Wj)r1W}r2W(jj.Wj}r3W(Urefurij.Wj]j]j]j]j]ujj,Wj]r4Wj%X!http://www.ti.com/lit/pdf/SPRUGV9r5Wr6W}r7W(jUjj1Wubajjubaubajjubj)r8W}r9W(jUj}r:W(j]j]j]j]j]ujj Wj]r;WjX)r\ti.drv.pajj8Wj jMTjj\j}r>W(j]j]j]j]j]ujKj]r?W(j)r@W}rAW(jX!http://www.ti.com/lit/pdf/SPRUGS4rBWj}rCW(UrefurijBWj]j]j]j]j]ujjti.drv.parHWrIW}rJW(jX Driver: lib\\ti.drv.pajjhttp://www.ti.com/lit/pdf/SPRUHZ2 Driver: lib\\ti.drv.pa2jjXj jMTjj\j}rX(j]j]j]j]j]ujKj]rX(j)rX}rX(jX!http://www.ti.com/lit/pdf/SPRUHZ2rXj}rX(UrefurijXj]j]j]j]j]ujjXj]rXj%X!http://www.ti.com/lit/pdf/SPRUHZ2rXr X}r!X(jUjjXubajjubj%X Driver: libti.drv.pa2r"Xr#X}r$X(jX Driver: lib\\ti.drv.pa2jjXubeubajjubj)r%X}r&X(jUj}r'X(j]j]j]j]j]ujjWj]r(XjX)r)X}r*X(jX!http://www.ti.com/lit/pdf/SPRUHZ0r+Xjj%Xj jMTjj\j}r,X(j]j]j]j]j]ujKj]r-Xj)r.X}r/X(jj+Xj}r0X(Urefurij+Xj]j]j]j]j]ujj)Xj]r1Xj%X!http://www.ti.com/lit/pdf/SPRUHZ0r2Xr3X}r4X(jUjj.Xubajjubaubajjubejjubejjubejjubaubeubj)r5X}r6X(jUjKjj;Tj jMTjjj}r7X(j]r8XXadditional referencesr9Xaj]j]j]r:XUid131r;Xaj]ujKjhj]rX(jXAdditional Referencesr?Xjj5Xj jMTjj"j}r@X(j]j]j]j]j]ujKjhj]rAXj%XAdditional ReferencesrBXrCX}rDX(jj?Xjj=Xubaubj)rEX}rFX(jUjj5Xj jMTjjj}rGX(j]j]j]j]j]ujNjhj]rHXj)rIX}rJX(jUj}rKX(j]j]j]j]j]UcolsKujjEXj]rLX(j)rMX}rNX(jUj}rOX(j]j]j]j]j]UcolwidthK#ujjIXj]jjubj)rPX}rQX(jUj}rRX(j]j]j]j]j]UcolwidthK)ujjIXj]jjubj)rSX}rTX(jUj}rUX(j]j]j]j]j]ujjIXj]rVX(j)rWX}rXX(jUj}rYX(j]j]j]j]j]ujjSXj]rZX(j)r[X}r\X(jUj}r]X(j]j]j]j]j]ujjWXj]r^XjX)r_X}r`X(jX **Document**raXjj[Xj jMTjj\j}rbX(j]j]j]j]j]ujKj]rcXj|)rdX}reX(jjaXj}rfX(j]j]j]j]j]ujj_Xj]rgXj%XDocumentrhXriX}rjX(jUjjdXubajjubaubajjubj)rkX}rlX(jUj}rmX(j]j]j]j]j]ujjWXj]rnXjX)roX}rpX(jX **Location**rqXjjkXj jMTjj\j}rrX(j]j]j]j]j]ujKj]rsXj|)rtX}ruX(jjqXj}rvX(j]j]j]j]j]ujjoXj]rwXj%XLocationrxXryX}rzX(jUjjtXubajjubaubajjubejjubj)r{X}r|X(jUj}r}X(j]j]j]j]j]ujjSXj]r~X(j)rX}rX(jUj}rX(j]j]j]j]j]ujj{Xj]rXjX)rX}rX(jXAPI Reference ManualrXjjXj jMTjj\j}rX(j]j]j]j]j]ujKj]rXj%XAPI Reference ManualrXrX}rX(jjXjjXubaubajjubj)rX}rX(jUj}rX(j]j]j]j]j]ujj{Xj]rXjX)rX}rX(jXO$(TI_PDK_INSTALL_DIR)\\packages\\ti \\drv\\PA\\docs\\doxygen\\html\\index.h tmljjXj jMTjj\j}rX(j]j]j]j]j]ujKj]rXj%XG$(TI_PDK_INSTALL_DIR)\packages\ti \drv\PA\docs\doxygen\html\index.h tmlrXrX}rX(jXO$(TI_PDK_INSTALL_DIR)\\packages\\ti \\drv\\PA\\docs\\doxygen\\html\\index.h tmljjXubaubajjubejjubj)rX}rX(jUj}rX(j]j]j]j]j]ujjSXj]rX(j)rX}rX(jUj}rX(j]j]j]j]j]ujjXj]rXjX)rX}rX(jX Release NotesrXjjXj jMTjj\j}rX(j]j]j]j]j]ujKj]rXj%X Release NotesrXrX}rX(jjXjjXubaubajjubj)rX}rX(jUj}rX(j]j]j]j]j]ujjXj]rXjX)rX}rX(jXM$(TI_PDK_INSTALL_DIR)\\packages\\ti \\drv\\PA\\docs\\ReleaseNotes_PA_LLD. pdfjjXj jMTjj\j}rX(j]j]j]j]j]ujKj]rXj%XG$(TI_PDK_INSTALL_DIR)\packages\ti \drv\PA\docs\ReleaseNotes_PA_LLD. pdfrXrX}rX(jXM$(TI_PDK_INSTALL_DIR)\\packages\\ti \\drv\\PA\\docs\\ReleaseNotes_PA_LLD. pdfjjXubaubajjubejjubejjubejjubaubj)rX}rX(jUjj5Xj jMTjjj}rX(j]j]j]j]j]ujKjhj]rXj)rX}rX(jUjKjjXj jMTjjj}rX(j]j]j]j]j]ujKjhj]ubaubeubeubj jMTjjj}rX(j]rXXoverviewrXaj]j]j]rXUid124rXaj]ujKjhj]rX(j)rX}rX(jXOverviewrXjj9Tj jMTjj"j}rX(j]j]j]j]j]ujKjhj]rXj%XOverviewrXrX}rX(jjXjjXubaubj)rX}rX(jUjKjj9Tj jMTjjj}rX(j]rXX introductionrXaj]j]j]rXUid125rXaj]ujKjhj]rX(j)rX}rX(jX IntroductionrXjjXj jMTjj"j}rX(j]j]j]j]j]ujKjhj]rXj%X IntroductionrXrX}rX(jjXjjXubaubjX)rX}rX(jXThe packet accelerator (PA) is one of the main components of the network coprocessor (NETCP) peripheral in KeyStone devices, including C6678, K2H/K/E/L. The PA works together with the security accelerator (SA) and the gigabit Ethernet switch subsystem to form a network processing solution. The purpose of PA in the NETCP is to perform packet processing operations such as packet header classification, checksum generation, and multi-queue routing.rXjjXj jMTjj\j}rX(j]j]j]j]j]ujK jhj]rXj%XThe packet accelerator (PA) is one of the main components of the network coprocessor (NETCP) peripheral in KeyStone devices, including C6678, K2H/K/E/L. The PA works together with the security accelerator (SA) and the gigabit Ethernet switch subsystem to form a network processing solution. The purpose of PA in the NETCP is to perform packet processing operations such as packet header classification, checksum generation, and multi-queue routing.rXrX}rX(jjXjjXubaubeubcdocutils.nodes transition rX)rX}rX(jX--------------rXjj9Tj jMTjU transitionrXj}rX(j]j]j]j]j]ujKjhj]ubj)rX}rX(jUjKjj9Tj jMTjjj}rX(j]rXXdriver configurationrXaj]j]j]rXUid126rXaj]ujKjhj]rX(j)rX}rX(jXDriver ConfigurationrXjjXj jMTjj"j}rX(j]j]j]j]j]ujKjhj]rXj%XDriver ConfigurationrXrX}rX(jjXjjXubaubjX)rX}rX(jXThe driver configures the PASS subsystem using Pa_config_t structure. This structure must be initialized before the Pa_create() function is called and cannot be changed afterwards. Also, there are bunch of system/global configurations and per entry configurations for PA. For details about individual fields of this structure and other configuration API structures, see the Doxygen help by opening PDK_INSTALL_DIR\\packages\\ti\\drv\\PA\\docs\\doxygen\\html\\index.html.jjXj jMTjj\j}rX(j]j]j]j]j]ujKjhj]rXj%XThe driver configures the PASS subsystem using Pa_config_t structure. This structure must be initialized before the Pa_create() function is called and cannot be changed afterwards. Also, there are bunch of system/global configurations and per entry configurations for PA. For details about individual fields of this structure and other configuration API structures, see the Doxygen help by opening PDK_INSTALL_DIR\packages\ti\drv\PA\docs\doxygen\html\index.html.rXrX}rX(jXThe driver configures the PASS subsystem using Pa_config_t structure. This structure must be initialized before the Pa_create() function is called and cannot be changed afterwards. Also, there are bunch of system/global configurations and per entry configurations for PA. For details about individual fields of this structure and other configuration API structures, see the Doxygen help by opening PDK_INSTALL_DIR\\packages\\ti\\drv\\PA\\docs\\doxygen\\html\\index.html.jjXubaubeubj)rX}rX(jUjKjj9Tj jMTjjj}rX(j]rXXapisrXaj]j]j]rYUid127rYaj]ujKjhj]rY(j)rY}rY(jXAPIsrYjjXj jMTjj"j}rY(j]j]j]j]j]ujKjhj]rYj%XAPIsrYr Y}r Y(jjYjjYubaubjX)r Y}r Y(jX9API reference for application can be found in below file:r YjjXj jMTjj\j}rY(j]j]j]j]j]ujK!jhj]rYj%X9API reference for application can be found in below file:rYrY}rY(jj Yjj Yubaubj#)rY}rY(jX#include jjXj jMTjj&j}rY(j2j3j]j]j]j]j]ujM]jhj]rYj%X#include rYrY}rY(jUjjYubaubeubeubj jMTjj?j}rY(j]UlevelKj]j]rYjXaUsourcejMTj]j]UlineKUtypejAujKjhj]rYjX)rY}rY(jX+Duplicate implicit target name: "overview".j}rY(j]j]j]j]j]ujj7Tj]r Yj%X+Duplicate implicit target name: "overview".r!Yr"Y}r#Y(jUjjYubajj\ubaubh)r$Y}r%Y(jUjjXj jMTjj?j}r&Y(j]UlevelKj]j]r'YjXaUsourcejMTj]j]UlineKUtypejAujKjhj]r(YjX)r)Y}r*Y(jX/Duplicate implicit target name: "introduction".j}r+Y(j]j]j]j]j]ujj$Yj]r,Yj%X/Duplicate implicit target name: "introduction".r-Yr.Y}r/Y(jUjj)Yubajj\ubaubh)r0Y}r1Y(jUjjXj jMTjj?j}r2Y(j]UlevelKj]j]r3YjXaUsourcejMTj]j]UlineKUtypejAujKjhj]r4YjX)r5Y}r6Y(jX7Duplicate implicit target name: "driver configuration".j}r7Y(j]j]j]j]j]ujj0Yj]r8Yj%X7Duplicate implicit target name: "driver configuration".r9Yr:Y}r;Y(jUjj5Yubajj\ubaubh)rY(j]UlevelKj]j]r?YjYaUsourcejMTj]j]UlineKUtypejAujKjhj]r@YjX)rAY}rBY(jX'Duplicate implicit target name: "apis".j}rCY(j]j]j]j]j]ujjjjYj jYjj&j}rY(j2j3j]j]j]j]j]ujM(jhj]rYj%X#include rYrY}rY(jUjjYubaubeubeubj)rY}rY(jUjKjj|Yj jYjjj}rY(j]rYX applicationrYaj]j]j]rYUid138rYaj]ujK6jhj]rY(j)rY}rY(jX ApplicationrYjjYj jYjj"j}rY(j]j]j]j]j]ujK6jhj]rYj%X ApplicationrYrY}rY(jjYjjYubaubj)rY}rY(jUjKjjYj jYjjj}rY(j]rYXexamplesrYaj]j]j]rYUid139rYaj]ujK9jhj]rY(j)rY}rY(jXExamplesrYjjYj jYjj"j}rY(j]j]j]j]j]ujK9jhj]rYj%XExamplesrZrZ}rZ(jjYjjYubaubj)rZ}rZ(jUjjYj jYjjj}rZ(j]j]j]j]j]ujNjhj]rZj)rZ}rZ(jUj}r Z(j]j]j]j]j]UcolsKujjZj]r Z(j)r Z}r Z(jUj}r Z(j]j]j]j]j]UcolwidthKujjZj]jjubj)rZ}rZ(jUj}rZ(j]j]j]j]j]UcolwidthKujjZj]jjubj)rZ}rZ(jUj}rZ(j]j]j]j]j]UcolwidthKujjZj]jjubj)rZ}rZ(jUj}rZ(j]j]j]j]j]UcolwidthK"ujjZj]jjubj)rZ}rZ(jUj}rZ(j]j]j]j]j]UcolwidthK"ujjZj]jjubj)rZ}rZ(jUj}rZ(j]j]j]j]j]ujjZj]rZj)rZ}rZ(jUj}r Z(j]j]j]j]j]ujjZj]r!Z(j)r"Z}r#Z(jUj}r$Z(j]j]j]j]j]ujjZj]r%ZjX)r&Z}r'Z(jXNamer(Zjj"Zj jYjj\j}r)Z(j]j]j]j]j]ujKZ}r?Z(jUj}r@Z(j]j]j]j]j]ujjZj]rAZj)rBZ}rCZ(jUj}rDZ(j]j]j]j]j]ujj>Zj]rEZj)rFZ}rGZ(jXExpected ResultsrHZjKjjBZj jYjjj}rIZ(j]j]j]j]j]ujKj]rJZj%XExpected ResultsrKZrLZ}rMZ(jjHZjjFZubaubajjubajjubj)rNZ}rOZ(jUj}rPZ(j]j]j]j]j]ujjZj]rQZ(j)rRZ}rSZ(jUj}rTZ(j]j]j]j]j]ujjNZj]rUZj)rVZ}rWZ(jXList of SOCs withrXZjKjjRZj jYjjj}rYZ(j]j]j]j]j]ujKj]rZZj%XList of SOCs withr[Zr\Z}r]Z(jjXZjjVZubaubajjubjX)r^Z}r_Z(jX Application Build Support as CCSr`ZjjNZj jYjj\j}raZ(j]j]j]j]j]ujK=j]rbZj%X Application Build Support as CCSrcZrdZ}reZ(jj`Zjj^Zubaubejjubj)rfZ}rgZ(jUj}rhZ(j]j]j]j]j]ujjZj]riZ(j)rjZ}rkZ(jUj}rlZ(j]j]j]j]j]ujjfZj]rmZj)rnZ}roZ(jXList of SOCs withrpZjKjjjZj jYjjj}rqZ(j]j]j]j]j]ujKj]rrZj%XList of SOCs withrsZrtZ}ruZ(jjpZjjnZubaubajjubjX)rvZ}rwZ(jXApplications Build Support MakerxZjjfZj jYjj\j}ryZ(j]j]j]j]j]ujK=j]rzZj%XApplications Build Support Maker{Zr|Z}r}Z(jjxZjjvZubaubejjubejjubajjubj)r~Z}rZ(jUj}rZ(j]j]j]j]j]ujjZj]rZ(j)rZ}rZ(jUj}rZ(j]j]j]j]j]ujj~Zj]rZ(j)rZ}rZ(jUj}rZ(j]j]j]j]j]ujjZj]rZjX)rZ}rZ(jXSA_Example applicationrZjjZj jYjj\j}rZ(j]j]j]j]j]ujK?j]rZj%XSA_Example applicationrZrZ}rZ(jjZjjZubaubajjubj)rZ}rZ(jUj}rZ(j]j]j]j]j]ujjZj]rZj)rZ}rZ(jUj}rZ(j]j]j]j]j]ujjZj]rZj)rZ}rZ(jX[CCS Project Example demonstrating *simple IPSec* use case. Reference example for developersjKjjZj jYjjj}rZ(j]j]j]j]j]ujKj]rZ(j%X"CCS Project Example demonstrating rZrZ}rZ(jX"CCS Project Example demonstrating jjZubj<)rZ}rZ(jX*simple IPSec*j}rZ(j]j]j]j]j]ujjZj]rZj%X simple IPSecrZrZ}rZ(jUjjZubajjDubj%X+ use case. Reference example for developersrZrZ}rZ(jX+ use case. Reference example for developersjjZubeubajjubajjubj)rZ}rZ(jUj}rZ(j]j]j]j]j]ujjZj]rZj)rZ}rZ(jUj}rZ(j]j]j]j]j]ujjZj]rZj)rZ}rZ(jX5User observes the output printed over the CCS consolerZjKjjZj jYjjj}rZ(j]j]j]j]j]ujKj]rZj%X5User observes the output printed over the CCS consolerZrZ}rZ(jjZjjZubaubajjubajjubj)rZ}rZ(jUj}rZ(j]j]j]j]j]ujjZj]rZj)rZ}rZ(jUj}rZ(j]j]j]j]j]ujjZj]rZj)rZ}rZ(jXK2HK, K2L, K2E, C6678rZjKjjZj jYjjj}rZ(j]j]j]j]j]ujKj]rZj%XK2HK, K2L, K2E, C6678rZrZ}rZ(jjZjjZubaubajjubajjubj)rZ}rZ(jUj}rZ(j]j]j]j]j]ujjZj]rZjX)rZ}rZ(jXNonerZjjZj jYjj\j}rZ(j]j]j]j]j]ujK?j]rZj%XNonerZrZ}rZ(jjZjjZubaubajjubejjubj)rZ}rZ(jUj}rZ(j]j]j]j]j]ujj~Zj]rZ(j)rZ}rZ(jUj}rZ(j]j]j]j]j]ujjZj]rZjX)rZ}rZ(jXSA_UnitTestApplicationrZjjZj jYjj\j}rZ(j]j]j]j]j]ujKFj]rZj%XSA_UnitTestApplicationrZrZ}rZ(jjZjjZubaubajjubj)rZ}rZ(jUj}rZ(j]j]j]j]j]ujjZj]rZj)rZ}rZ(jUj}rZ(j]j]j]j]j]ujjZj]rZj)rZ}rZ(jX&Unit Test application to test all APIsrZjKjjZj jYjjj}rZ(j]j]j]j]j]ujKj]rZj%X&Unit Test application to test all APIsrZrZ}rZ(jjZjjZubaubajjubajjubj)rZ}rZ(jUj}rZ(j]j]j]j]j]ujjZj]rZj)rZ}rZ(jUj}rZ(j]j]j]j]j]ujjZj]rZj)rZ}r[(jX5User observes the output printed over the CCS consoler[jKjjZj jYjjj}r[(j]j]j]j]j]ujKj]r[j%X5User observes the output printed over the CCS consoler[r[}r[(jj[jjZubaubajjubajjubj)r[}r[(jUj}r [(j]j]j]j]j]ujjZj]r [j)r [}r [(jUj}r [(j]j]j]j]j]ujj[j]r[j)r[}r[(jXK2HK, K2L, K2E, C6678, K2Gr[jKjj [j jYjjj}r[(j]j]j]j]j]ujKj]r[j%XK2HK, K2L, K2E, C6678, K2Gr[r[}r[(jj[jj[ubaubajjubajjubj)r[}r[(jUj}r[(j]j]j]j]j]ujjZj]r[jX)r[}r[(jXAM65XXr[jj[j jYjj\j}r[(j]j]j]j]j]ujKFj]r[j%XAM65XXr [r![}r"[(jj[jjbaubajjubejjubejjubejjubaubjX)r#[}r$[(jX}**NOTE** : SA Unit Test applications are makefile based for AM65XX. Note that the application built, can be loaded on to CCS.jjYj jYjj\j}r%[(j]j]j]j]j]ujKKjhj]r&[(j|)r'[}r([(jX**NOTE**j}r)[(j]j]j]j]j]ujj#[j]r*[j%XNOTEr+[r,[}r-[(jUjj'[ubajjubj%Xu : SA Unit Test applications are makefile based for AM65XX. Note that the application built, can be loaded on to CCS.r.[r/[}r0[(jXu : SA Unit Test applications are makefile based for AM65XX. Note that the application built, can be loaded on to CCS.jj#[ubeubeubj)r1[}r2[(jUjjYj jYjjj}r3[(j]j]j]j]r4[Ubuilding-sa-examples-unit-testr5[aj]r6[h^aujKOjhj]r7[(j)r8[}r9[(jXBuilding SA Examples/Unit Testr:[jj1[j jYjj"j}r;[(j]j]j]j]j]ujKOjhj]r<[j%XBuilding SA Examples/Unit Testr=[r>[}r?[(jj:[jj8[ubaubj)r@[}rA[(jUjj1[j jYjjj}rB[(jX-j]j]j]j]j]ujKQjhj]rC[(j)rD[}rE[(jXSetup the build environment `SetupBuildEnvironment `__rF[jj@[j jYjj j}rG[(j]j]j]j]j]ujNjhj]rH[jX)rI[}rJ[(jjF[jjD[j jYjj\j}rK[(j]j]j]j]j]ujKQj]rL[(j%XSetup the build environment rM[rN[}rO[(jXSetup the build environment jjI[ubj)rP[}rQ[(jX`SetupBuildEnvironment `__j}rR[(UnameXSetupBuildEnvironmentjXghttp://software-dl.ti.com/processor-sdk-rtos/esd/docs/latest/rtos/index_overview.html#setup-environmentj]j]j]j]j]ujjI[j]rS[j%XSetupBuildEnvironmentrT[rU[}rV[(jUjjP[ubajjubeubaubj)rW[}rX[(jXFollow the steps `SDK example and test CCS Project Creation `__ for creating the CCS based example and test projects creationrY[jj@[j jYjj j}rZ[(j]j]j]j]j]ujNjhj]r[[jX)r\[}r][(jjY[jjW[j jYjj\j}r^[(j]j]j]j]j]ujKRj]r_[(j%XFollow the steps r`[ra[}rb[(jXFollow the steps jj\[ubj)rc[}rd[(jX`SDK example and test CCS Project Creation `__j}re[(UnameX)SDK example and test CCS Project CreationjX{http://software-dl.ti.com/processor-sdk-rtos/esd/docs/latest/rtos/index_overview.html#pdk-example-and-test-project-creationj]j]j]j]j]ujj\[j]rf[j%X)SDK example and test CCS Project Creationrg[rh[}ri[(jUjjc[ubajjubj%X? for creating the CCS based example and test projects creationrj[rk[}rl[(jX? for creating the CCS based example and test projects creationjj\[ubeubaubj)rm[}rn[(jXzCreate make based test application executables following the link `Building the component and make based test application `__. Once the build environment is set, issue the following commands: - cd /packages/ - To build: make sa - To clean: make sa_clean jj@[j Njj j}ro[(j]j]j]j]j]ujNjhj]rp[j )rq[}rr[(jUj}rs[(j]j]j]j]j]ujjm[j]rt[j )ru[}rv[(jXtCreate make based test application executables following the link `Building the component and make based test application `__. Once the build environment is set, issue the following commands: - cd /packages/ - To build: make sa - To clean: make sa_clean jjq[j jYjj j}rw[(j]j]j]j]j]ujKWj]rx[(j )ry[}rz[(jX,Create make based test application executables following the link `Building the component and make based test application `__. Once the build environment is set, issue the following commands:jju[j jYjj j}r{[(j]j]j]j]j]ujKWj]r|[(j%XBCreate make based test application executables following the link r}[r~[}r[(jXBCreate make based test application executables following the link jjy[ubj)r[}r[(jX`Building the component and make based test application `__j}r[(UnameX6Building the component and make based test applicationjXkhttp://software-dl.ti.com/processor-sdk-rtos/esd/docs/latest/rtos/index_overview.html#rebuilding-componentsj]j]j]j]j]ujjy[j]r[j%X6Building the component and make based test applicationr[r[}r[(jUjj[ubajjubj%XB. Once the build environment is set, issue the following commands:r[r[}r[(jXB. Once the build environment is set, issue the following commands:jjy[ubeubj )r[}r[(jUj}r[(j]j]j]j]j]ujju[j]r[j)r[}r[(jUj}r[(jX-j]j]j]j]j]ujj[j]r[(j)r[}r[(jXcd /packages/r[j}r[(j]j]j]j]j]ujj[j]r[jX)r[}r[(jj[jj[j jYjj\j}r[(j]j]j]j]j]ujKTj]r[j%Xcd /packages/r[r[}r[(jj[jj[ubaubajj ubj)r[}r[(jXTo build: make sar[j}r[(j]j]j]j]j]ujj[j]r[jX)r[}r[(jj[jj[j jYjj\j}r[(j]j]j]j]j]ujKUj]r[j%XTo build: make sar[r[}r[(jj[jj[ubaubajj ubj)r[}r[(jXTo clean: make sa_clean j}r[(j]j]j]j]j]ujj[j]r[jX)r[}r[(jXTo clean: make sa_cleanr[jj[j jYjj\j}r[(j]j]j]j]j]ujKVj]r[j%XTo clean: make sa_cleanr[r[}r[(jj[jj[ubaubajj ubejjubajj ubeubajj ubaubeubeubeubj)r[}r[(jUjKjj|Yj jYjjj}r[(j]r[Xadditional referencesr[aj]j]j]r[Uid140r[aj]ujKZjhj]r[(j)r[}r[(jXAdditional Referencesr[jj[j jYjj"j}r[(j]j]j]j]j]ujKZjhj]r[j%XAdditional Referencesr[r[}r[(jj[jj[ubaubj)r[}r[(jUjj[j jYjjj}r[(j]j]j]j]j]ujNjhj]r[j)r[}r[(jUj}r[(j]j]j]j]j]UcolsKujj[j]r[(j)r[}r[(jUj}r[(j]j]j]j]j]UcolwidthK#ujj[j]jjubj)r[}r[(jUj}r[(j]j]j]j]j]UcolwidthK)ujj[j]jjubj)r[}r[(jUj}r[(j]j]j]j]j]ujj[j]r[(j)r[}r[(jUj}r[(j]j]j]j]j]ujj[j]r[(j)r[}r[(jUj}r[(j]j]j]j]j]ujj[j]r[jX)r[}r[(jX **Document**r[jj[j jYjj\j}r[(j]j]j]j]j]ujK]j]r[j|)r[}r[(jj[j}r[(j]j]j]j]j]ujj[j]r[j%XDocumentr[r[}r[(jUjj[ubajjubaubajjubj)r[}r[(jUj}r[(j]j]j]j]j]ujj[j]r[jX)r[}r[(jX **Location**r[jj[j jYjj\j}r[(j]j]j]j]j]ujK]j]r[j|)r[}r[(jj[j}r[(j]j]j]j]j]ujj[j]r[j%XLocationr[r[}r[(jUjj[ubajjubaubajjubejjubj)r[}r[(jUj}r[(j]j]j]j]j]ujj[j]r[(j)r\}r\(jUj}r\(j]j]j]j]j]ujj[j]r\jX)r\}r\(jXAPI Reference Manualr\jj\j jYjj\j}r\(j]j]j]j]j]ujK_j]r\j%XAPI Reference Manualr \r \}r \(jj\jj\ubaubajjubj)r \}r \(jUj}r\(j]j]j]j]j]ujj[j]r\jX)r\}r\(jXO$(TI_PDK_INSTALL_DIR)\\packages\\ti \\drv\\sa\\docs\\doxygen\\html\\index.h tmljj \j jYjj\j}r\(j]j]j]j]j]ujK_j]r\j%XG$(TI_PDK_INSTALL_DIR)\packages\ti \drv\sa\docs\doxygen\html\index.h tmlr\r\}r\(jXO$(TI_PDK_INSTALL_DIR)\\packages\\ti \\drv\\sa\\docs\\doxygen\\html\\index.h tmljj\ubaubajjubejjubj)r\}r\(jUj}r\(j]j]j]j]j]ujj[j]r\(j)r\}r\(jUj}r\(j]j]j]j]j]ujj\j]r\jX)r\}r \(jX Release Notesr!\jj\j jYjj\j}r"\(j]j]j]j]j]ujKcj]r#\j%X Release Notesr$\r%\}r&\(jj!\jj\ubaubajjubj)r'\}r(\(jUj}r)\(j]j]j]j]j]ujj\j]r*\jX)r+\}r,\(jXM$(TI_PDK_INSTALL_DIR)\\packages\\ti \\drv\\sa\\docs\\ReleaseNotes_SA_LLD. pdfjj'\j jYjj\j}r-\(j]j]j]j]j]ujKcj]r.\j%XG$(TI_PDK_INSTALL_DIR)\packages\ti \drv\sa\docs\ReleaseNotes_SA_LLD. pdfr/\r0\}r1\(jXM$(TI_PDK_INSTALL_DIR)\\packages\\ti \\drv\\sa\\docs\\ReleaseNotes_SA_LLD. pdfjj+\ubaubajjubejjubejjubejjubaubj\)r2\}r3\(jXAlthough SASS supports 3GPP specific Ciphering and Authentication algorithms such as Kasumi F8/F9 and Snow3G F8, those algorithms are locked out in this standard SA LLD distribution. In order to access 3GPP specific functionalities, one must obtain ETSI licensing as described at http://www.etsi.org/services/security-algorithms/cellular-algorithms and then download the SASS 3GPP Enabler package from TI from the link http://software-dl.ti.com/libs/sa_3gpp_enabler/latest/index_FDS.htmljj[j jYjj_j}r4\(j]j]j]j]j]ujNjhj]r5\jX)r6\}r7\(jXAlthough SASS supports 3GPP specific Ciphering and Authentication algorithms such as Kasumi F8/F9 and Snow3G F8, those algorithms are locked out in this standard SA LLD distribution. In order to access 3GPP specific functionalities, one must obtain ETSI licensing as described at http://www.etsi.org/services/security-algorithms/cellular-algorithms and then download the SASS 3GPP Enabler package from TI from the link http://software-dl.ti.com/libs/sa_3gpp_enabler/latest/index_FDS.htmljj2\j jYjj\j}r8\(j]j]j]j]j]ujKjj]r9\(j%XAlthough SASS supports 3GPP specific Ciphering and Authentication algorithms such as Kasumi F8/F9 and Snow3G F8, those algorithms are locked out in this standard SA LLD distribution. In order to access 3GPP specific functionalities, one must obtain ETSI licensing as described at r:\r;\}r<\(jXAlthough SASS supports 3GPP specific Ciphering and Authentication algorithms such as Kasumi F8/F9 and Snow3G F8, those algorithms are locked out in this standard SA LLD distribution. In order to access 3GPP specific functionalities, one must obtain ETSI licensing as described at jj6\ubj)r=\}r>\(jXDhttp://www.etsi.org/services/security-algorithms/cellular-algorithmsr?\j}r@\(Urefurij?\j]j]j]j]j]ujj6\j]rA\j%XDhttp://www.etsi.org/services/security-algorithms/cellular-algorithmsrB\rC\}rD\(jUjj=\ubajjubj%XG and then download the SASS 3GPP Enabler package from TI from the link rE\rF\}rG\(jXG and then download the SASS 3GPP Enabler package from TI from the link jj6\ubj)rH\}rI\(jXDhttp://software-dl.ti.com/libs/sa_3gpp_enabler/latest/index_FDS.htmlrJ\j}rK\(UrefurijJ\j]j]j]j]j]ujj6\j]rL\j%XDhttp://software-dl.ti.com/libs/sa_3gpp_enabler/latest/index_FDS.htmlrM\rN\}rO\(jUjjH\ubajjubeubaubjX)rP\}rQ\(jXrDue to export control restrictions, the SA 3GPP Enabler is a seperate download from the rest of the PROCESSOR-SDK.rR\jj[j jYjj\j}rS\(j]j]j]j]j]ujKtjhj]rT\j%XrDue to export control restrictions, the SA 3GPP Enabler is a seperate download from the rest of the PROCESSOR-SDK.rU\rV\}rW\(jjR\jjP\ubaubj)rX\}rY\(jUjj[j jYjjj}rZ\(j]j]j]j]j]ujKwjhj]r[\j)r\\}r]\(jUjKjjX\j jYjjj}r^\(j]j]j]j]j]ujKjhj]ubaubeubeubj jYjjj}r_\(j]r`\Xoverviewra\aj]j]j]rb\Uid132rc\aj]ujKjhj]rd\(j)re\}rf\(jXOverviewrg\jjzYj jYjj"j}rh\(j]j]j]j]j]ujKjhj]ri\j%XOverviewrj\rk\}rl\(jjg\jje\ubaubj)rm\}rn\(jUjKjjzYj jYjjj}ro\(j]rp\X introductionrq\aj]j]j]rr\Uid133rs\aj]ujKjhj]rt\(j)ru\}rv\(jX Introductionrw\jjm\j jYjj"j}rx\(j]j]j]j]j]ujKjhj]ry\j%X Introductionrz\r{\}r|\(jjw\jju\ubaubjX)r}\}r~\(jX8The Security Accelerator (SA) also known as cp_ace (Adaptive Cryptographic Engine) is designed to provide packet security as part of IPSEC, SRTP, and 3GPP industry standards. The security accelerator low level driver (referred to as the module) provides APIs for the configuration and control of the security accelerator sub-system. The SA low level driver provides an abstraction layer between the application and the Security Accelerator Sub System (SASS). It provides both the system level interface and the channel-level interface with a set of APIs in the driver.r\jjm\j jYjj\j}r\(j]j]j]j]j]ujK jhj]r\j%X8The Security Accelerator (SA) also known as cp_ace (Adaptive Cryptographic Engine) is designed to provide packet security as part of IPSEC, SRTP, and 3GPP industry standards. The security accelerator low level driver (referred to as the module) provides APIs for the configuration and control of the security accelerator sub-system. The SA low level driver provides an abstraction layer between the application and the Security Accelerator Sub System (SASS). It provides both the system level interface and the channel-level interface with a set of APIs in the driver.r\r\}r\(jj\jj}\ubaubjb)r\}r\(jXModes of Operationr\jKjjm\j jYjjfj}r\(j]r\Uid134r\aj]j]r\Xmodes-of-operationr\aj]j]ujNjhj]r\j%XModes of Operationr\r\}r\(jj\jj\ubaubjX)r\}r\(jX=Security accelerator library (ti.drv.sa) supports below modesr\jjm\j jYjj\j}r\(j]j]j]j]j]ujKjhj]r\j%X=Security accelerator library (ti.drv.sa) supports below modesr\r\}r\(jj\jj\ubaubjX)r\}r\(jX**Protocol Specific Mode**: In this mode, standards such as Ipv4/Ipv6 and 3gpp protocols are supported, where command labels are created based on the protocols.jjm\j jYjj\j}r\(j]j]j]j]j]ujKjhj]r\(j|)r\}r\(jX**Protocol Specific Mode**j}r\(j]j]j]j]j]ujj\j]r\j%XProtocol Specific Moder\r\}r\(jUjj\ubajjubj%X: In this mode, standards such as Ipv4/Ipv6 and 3gpp protocols are supported, where command labels are created based on the protocols.r\r\}r\(jX: In this mode, standards such as Ipv4/Ipv6 and 3gpp protocols are supported, where command labels are created based on the protocols.jj\ubeubjX)r\}r\(jX{**Data Mode**: In this mode, user can implement a custom/proprietary protocol mode with the help of APIs provided by SA LLDjjm\j jYjj\j}r\(j]j]j]j]j]ujKjhj]r\(j|)r\}r\(jX **Data Mode**j}r\(j]j]j]j]j]ujj\j]r\j%X Data Moder\r\}r\(jUjj\ubajjubj%Xn: In this mode, user can implement a custom/proprietary protocol mode with the help of APIs provided by SA LLDr\r\}r\(jXn: In this mode, user can implement a custom/proprietary protocol mode with the help of APIs provided by SA LLDjj\ubeubeubeubj jYjj?j}r\(j]UlevelKj]j]r\jc\aUsourcejYj]j]UlineKUtypejAujKjhj]r\jX)r\}r\(jX+Duplicate implicit target name: "overview".j}r\(j]j]j]j]j]ujjxYj]r\j%X+Duplicate implicit target name: "overview".r\r\}r\(jUjj\ubajj\ubaubh)r\}r\(jUjjm\j jYjj?j}r\(j]UlevelKj]j]r\js\aUsourcejYj]j]UlineKUtypejAujKjhj]r\jX)r\}r\(jX/Duplicate implicit target name: "introduction".j}r\(j]j]j]j]j]ujj\j]r\j%X/Duplicate implicit target name: "introduction".r\r\}r\(jUjj\ubajj\ubaubh)r\}r\(jUj}r\(j]UlevelKj]j]r\j\aUsourcej j]j]UlineKcUtypejXujj\j]r\jX)r\}r\(jX5Duplicate explicit target name: "modes-of-operation".j}r\(j]j]j]j]j]ujj\j]r\j%X5Duplicate explicit target name: "modes-of-operation".r\r\}r\(jUjj\ubajj\ubajj?ubh)r\}r\(jUjjYj jYjj?j}r\(j]UlevelKj]j]r\jYaUsourcejYj]j]UlineK UtypejAujK jhj]r\jX)r\}r\(jX1Duplicate implicit target name: "user interface".j}r\(j]j]j]j]j]ujj\j]r\j%X1Duplicate implicit target name: "user interface".r\r\}r\(jUjj\ubajj\ubaubh)r\}r\(jUjjYj jYjj?j}r\(j]UlevelKj]j]r\jYaUsourcejYj]j]UlineK#UtypejAujK#jhj]r\jX)r\}r\(jX7Duplicate implicit target name: "driver configuration".j}r\(j]j]j]j]j]ujj\j]r\j%X7Duplicate implicit target name: "driver configuration".r\r\}r\(jUjj\ubajj\ubaubh)r\}r\(jUjjYj jYjj?j}r\(j]UlevelKj]j]r\jYaUsourcejYj]j]UlineK-UtypejAujK-jhj]r\jX)r\}r\(jX'Duplicate implicit target name: "apis".j}r\(j]j]j]j]j]ujj\j]r\j%X'Duplicate implicit target name: "apis".r\r\}r\(jUjj\ubajj\ubaubh)r\}r\(jUjjYj jYjj?j}r\(j]UlevelKj]j]r\jYaUsourcejYj]j]UlineK6UtypejAujK6jhj]r\jX)r]}r](jX.Duplicate implicit target name: "application".j}r](j]j]j]j]j]ujj\j]r]j%X.Duplicate implicit target name: "application".r]r]}r](jUjj]ubajj\ubaubh)r]}r](jUjjYj jYjj?j}r ](j]UlevelKj]j]r ]jYaUsourcejYj]j]UlineK9UtypejAujK9jhj]r ]jX)r ]}r ](jX+Duplicate implicit target name: "examples".j}r](j]j]j]j]j]ujj]j]r]j%X+Duplicate implicit target name: "examples".r]r]}r](jUjj ]ubajj\ubaubh)r]}r](jUj}r](j]UlevelKj]j]UsourcejYj]j]UlineK>UtypejXujjNZj]r]jX)r]}r](jX%Line block ends without a blank line.j}r](j]j]j]j]j]ujj]j]r]j%X%Line block ends without a blank line.r]r]}r](jUjj]ubajj\ubajj?ubh)r]}r](jUj}r ](j]UlevelKj]j]UsourcejYj]j]UlineK>UtypejXujjfZj]r!]jX)r"]}r#](jX%Line block ends without a blank line.j}r$](j]j]j]j]j]ujj]j]r%]j%X%Line block ends without a blank line.r&]r']}r(](jUjj"]ubajj\ubajj?ubh)r)]}r*](jUjj[j jYjj?j}r+](j]UlevelKj]j]r,]j[aUsourcejYj]j]UlineKZUtypejAujKZjhj]r-]jX)r.]}r/](jX8Duplicate implicit target name: "additional references".j}r0](j]j]j]j]j]ujj)]j]r1]j%X8Duplicate implicit target name: "additional references".r2]r3]}r4](jUjj.]ubajj\ubaubh)r5]}r6](jUjj)r7]}r8](jUjKjj)r9]}r:](jUjhj j jjj}r;](j]j]j]j]r<]Usrior=]aj]r>]haujKijhj]r?](j)r@]}rA](jXSRIOrB]jj9]j j jj"j}rC](j]j]j]j]j]ujKijhj]rD]j%XSRIOrE]rF]}rG](jjB]jj@]ubaubj))rH]}rI](jX?http://processors.wiki.ti.com/index.php/Processor_SDK_RTOS_SRIOjj9]j j,X=source/rtos/PDK_Platform_Software/Device_Drivers/SRIO.rst.incrJ]rK]}rL]bjj0j}rM](j2j3j]j]j]j]j]ujKjhj]rN]j%X?http://processors.wiki.ti.com/index.php/Processor_SDK_RTOS_SRIOrO]rP]}rQ](jUjjH]ubaubj7]j)rR]}rS](jUjKjj9]j jK]jjj}rT](j]rU]Xuser interfacerV]aj]j]j]rW]Uid144rX]aj]ujK!jhj]rY](j)rZ]}r[](jXUser Interfacer\]jjR]j jK]jj"j}r]](j]j]j]j]j]ujK!jhj]r^]j%XUser Interfacer_]r`]}ra](jj\]jjZ]ubaubj)rb]}rc](jUjKjjR]j jK]jjj}rd](j]re]Xdriver configurationrf]aj]j]j]rg]Uid145rh]aj]ujK$jhj]ri](j)rj]}rk](jXDriver Configurationrl]jjb]j jK]jj"j}rm](j]j]j]j]j]ujK$jhj]rn]j%XDriver Configurationro]rp]}rq](jjl]jjj]ubaubjb)rr]}rs](jX **Board Specific Configuration**rt]jKjjb]j jK]jjfj}ru](j]rv]Uid146rw]aj]j]rx]Xboard-specific-configurationry]aj]j]ujNjhj]rz]j|)r{]}r|](jjt]j}r}](j]j]j]j]j]ujjr]j]r~]j%XBoard Specific Configurationr]r]}r](jUjj{]ubajjubaubjX)r]}r](jXAll board specific configurations eg:enabling and configuring the SRIO SERDES registers and SRIO lane configurations (communication rates, device IDs, etc) are required before calling any driver APIs. Template functions for configuring the SRIO IP and SERDES registers are provided in PDK_INSTALL_DIR\\packages\\ti\\drv\\srio\\device\\\\src\\. A template function is provided for each soc that supports SRIO.jjb]j jK]jj\j}r](j]j]j]j]j]ujK)jhj]r]j%XAll board specific configurations eg:enabling and configuring the SRIO SERDES registers and SRIO lane configurations (communication rates, device IDs, etc) are required before calling any driver APIs. Template functions for configuring the SRIO IP and SERDES registers are provided in PDK_INSTALL_DIR\packages\ti\drv\srio\device\\src\. A template function is provided for each soc that supports SRIO.r]r]}r](jXAll board specific configurations eg:enabling and configuring the SRIO SERDES registers and SRIO lane configurations (communication rates, device IDs, etc) are required before calling any driver APIs. Template functions for configuring the SRIO IP and SERDES registers are provided in PDK_INSTALL_DIR\\packages\\ti\\drv\\srio\\device\\\\src\\. A template function is provided for each soc that supports SRIO.jj]ubaubeubj)r]}r](jUjKjjR]j jK]jjj}r](j]r]Xapisr]aj]j]j]r]Uid147r]aj]ujK1jhj]r](j)r]}r](jXAPIsr]jj]j jK]jj"j}r](j]j]j]j]j]ujK1jhj]r]j%XAPIsr]r]}r](jj]jj]ubaubjX)r]}r](jXAPI reference for application:r]jj]j jK]jj\j}r](j]j]j]j]j]ujK3jhj]r]j%XAPI reference for application:r]r]}r](jj]jj]ubaubj#)r]}r](jX!#include jj]j jK]jj&j}r](j2j3j]j]j]j]j]ujMjhj]r]j%X!#include r]r]}r](jUjj]ubaubjX)r]}r](jX#OSAL API reference for application:r]jj]j jK]jj\j}r](j]j]j]j]j]ujK9jhj]r]j%X#OSAL API reference for application:r]r]}r](jj]jj]ubaubj#)r]}r](jX"#include jj]j jK]jj&j}r](j2j3j]j]j]j]j]ujMjhj]r]j%X"#include r]r]}r](jUjj]ubaubjb)r]}r](jX Init SRIOr]jj]j jK]jjfj}r](j]r]U init-srior]aj]j]j]j]r]haujNjhj]r]j%X Init SRIOr]r]}r](jj]jj]ubaubj#)r]}r](jX#Initialize QMSS and CPPI modules...jj]j jK]jj&j}r](j2j3j]j]j]j]j]ujMjhj]r]j%X#Initialize QMSS and CPPI modules...r]r]}r](jUjj]ubaubj#)r]}r](jX... SrioDevice_init(); Srio_init (); ... /* Start the application Managed SRIO Driver. Refer example/test for appCfg fields */ hAppManagedSrioDrv = Srio_start (&appCfg);jj]j jK]jj&j}r](j2j3j]j]j]j]j]ujMjhj]r]j%X... SrioDevice_init(); Srio_init (); ... /* Start the application Managed SRIO Driver. Refer example/test for appCfg fields */ hAppManagedSrioDrv = Srio_start (&appCfg);r]r]}r](jUjj]ubaubjX)r]}r](jX_At this point SRIO driver is ready for data transfer on specific instance identified by handle.r]jj]j jK]jj\j}r](j]j]j]j]j]ujKOjhj]r]j%X_At this point SRIO driver is ready for data transfer on specific instance identified by handle.r]r]}r](jj]jj]ubaubjb)r]}r](jXSend/Receive APIsr]jj]j jK]jjfj}r](j]r]Usendreceive-apisr]aj]j]j]j]r]h~aujNjhj]r]j%XSend/Receive APIsr]r]}r](jj]jj]ubaubjX)r]}r](jX**Direct IO**:r]jj]j jK]jj\j}r](j]j]j]j]j]ujKUjhj]r](j|)r]}r](jX **Direct IO**j}r](j]j]j]j]j]ujj]j]r]j%X Direct IOr]r]}r](jUjj]ubajjubj%X:r]}r](jX:jj]ubeubj#)r]}r](jXjSrio_sockSend_DIO(Srio_SockHandle srioSock, Srio_DrvBuffer hBuffer, uint32_t size, Srio_SockAddrInfo* to);jj]j jK]jj&j}r](j2j3j]j]j]j]j]ujMjhj]r]j%XjSrio_sockSend_DIO(Srio_SockHandle srioSock, Srio_DrvBuffer hBuffer, uint32_t size, Srio_SockAddrInfo* to);r]r]}r](jUjj]ubaubjX)r]}r](jX **Type 9**:r]jj]j jK]jj\j}r](j]j]j]j]j]ujK[jhj]r](j|)r]}r](jX **Type 9**j}r](j]j]j]j]j]ujj]j]r^j%XType 9r^r^}r^(jUjj]ubajjubj%X:r^}r^(jX:jj]ubeubj#)r^}r^(jXoSrio_sockSend_TYPE9 (Srio_SockHandle srioSock, Srio_DrvBuffer hBuffer, uint32_t size, Srio_SockAddrInfo* to);jj]j jK]jj&j}r^(j2j3j]j]j]j]j]ujMjhj]r ^j%XoSrio_sockSend_TYPE9 (Srio_SockHandle srioSock, Srio_DrvBuffer hBuffer, uint32_t size, Srio_SockAddrInfo* to);r ^r ^}r ^(jUjj^ubaubjX)r ^}r^(jX **Type 11**:r^jj]j jK]jj\j}r^(j]j]j]j]j]ujKajhj]r^(j|)r^}r^(jX **Type 11**j}r^(j]j]j]j]j]ujj ^j]r^j%XType 11r^r^}r^(jUjj^ubajjubj%X:r^}r^(jX:jj ^ubeubj#)r^}r^(jXoSrio_sockSend_TYPE11 (Srio_SockHandle srioSock, Srio_DrvBuffer hBuffer, uint32_t size, Srio_SockAddrInfo* to);jj]j jK]jj&j}r^(j2j3j]j]j]j]j]ujMjhj]r^j%XoSrio_sockSend_TYPE11 (Srio_SockHandle srioSock, Srio_DrvBuffer hBuffer, uint32_t size, Srio_SockAddrInfo* to);r^r ^}r!^(jUjj^ubaubjX)r"^}r#^(jX **Receive**:r$^jj]j jK]jj\j}r%^(j]j]j]j]j]ujKgjhj]r&^(j|)r'^}r(^(jX **Receive**j}r)^(j]j]j]j]j]ujj"^j]r*^j%XReceiver+^r,^}r-^(jUjj'^ubajjubj%X:r.^}r/^(jX:jj"^ubeubj#)r0^}r1^(jXeSrio_sockRecv (Srio_SockHandle srioSock, Srio_DrvBuffer* hDrvBuffer,Srio_SockAddrInfo* from);jj]j jK]jj&j}r2^(j2j3j]j]j]j]j]ujMjhj]r3^j%XeSrio_sockRecv (Srio_SockHandle srioSock, Srio_DrvBuffer* hDrvBuffer,Srio_SockAddrInfo* from);r4^r5^}r6^(jUjj0^ubaubeubeubj)r7^}r8^(jUjKjj9]j jK]jjj}r9^(j]r:^X applicationr;^aj]j]j]r<^Uid148r=^aj]ujKnjhj]r>^(j)r?^}r@^(jX ApplicationrA^jj7^j jK]jj"j}rB^(j]j]j]j]j]ujKnjhj]rC^j%X ApplicationrD^rE^}rF^(jjA^jj?^ubaubj)rG^}rH^(jUjKjj7^j jK]jjj}rI^(j]rJ^XexamplesrK^aj]j]j]rL^Uid149rM^aj]ujKqjhj]rN^(j)rO^}rP^(jXExamplesrQ^jjG^j jK]jj"j}rR^(j]j]j]j]j]ujKqjhj]rS^j%XExamplesrT^rU^}rV^(jjQ^jjO^ubaubj)rW^}rX^(jUjjG^j jK]jjj}rY^(j]j]j]j]j]ujNjhj]rZ^j)r[^}r\^(jUj}r]^(j]j]j]j]j]UcolsKujjW^j]r^^(j)r_^}r`^(jUj}ra^(j]j]j]j]j]UcolwidthKujj[^j]jjubj)rb^}rc^(jUj}rd^(j]j]j]j]j]UcolwidthKujj[^j]jjubj)re^}rf^(jUj}rg^(j]j]j]j]j]UcolwidthKujj[^j]jjubj)rh^}ri^(jUj}rj^(j]j]j]j]j]ujj[^j]rk^j)rl^}rm^(jUj}rn^(j]j]j]j]j]ujjh^j]ro^(j)rp^}rq^(jUj}rr^(j]j]j]j]j]ujjl^j]rs^jX)rt^}ru^(jXNamerv^jjp^j jK]jj\j}rw^(j]j]j]j]j]ujKtj]rx^j%XNamery^rz^}r{^(jjv^jjt^ubaubajjubj)r|^}r}^(jUj}r~^(j]j]j]j]j]ujjl^j]r^j)r^}r^(jUj}r^(j]j]j]j]j]ujj|^j]r^j)r^}r^(jX Descriptionr^jKjj^j jK]jjj}r^(j]j]j]j]j]ujKj]r^j%X Descriptionr^r^}r^(jj^jj^ubaubajjubajjubj)r^}r^(jUj}r^(j]j]j]j]j]ujjl^j]r^jX)r^}r^(jXExpected Resultsr^jj^j jK]jj\j}r^(j]j]j]j]j]ujKtj]r^j%XExpected Resultsr^r^}r^(jj^jj^ubaubajjubejjubajjubj)r^}r^(jUj}r^(j]j]j]j]j]ujj[^j]r^(j)r^}r^(jUj}r^(j]j]j]j]j]ujj^j]r^(j)r^}r^(jUj}r^(j]j]j]j]j]ujj^j]r^jX)r^}r^(jX Loopback DIO ISR Example Projectr^jj^j jK]jj\j}r^(j]j]j]j]j]ujKvj]r^j%X Loopback DIO ISR Example Projectr^r^}r^(jj^jj^ubaubajjubj)r^}r^(jUj}r^(j]j]j]j]j]ujj^j]r^(j)r^}r^(jUj}r^(j]j]j]j]j]ujj^j]r^j)r^}r^(jXThe example is a demonstration of the SRIO driver running the SRIO IP Block in loopback mode. The example showcases the use of SRIO DIO sockets using LSU interrupts to indicate the completion of packet transfer.r^jKjj^j jK]jjj}r^(j]j]j]j]j]ujKj]r^j%XThe example is a demonstration of the SRIO driver running the SRIO IP Block in loopback mode. The example showcases the use of SRIO DIO sockets using LSU interrupts to indicate the completion of packet transfer.r^r^}r^(jj^jj^ubaubajjubj)r^}r^(jUj}r^(j]j]j]j]j]ujj^j]r^j)r^}r^(jXIt is shown how multiple sockets with different Source IDs can post transactions and process the pending interrupt raised by SRIO device.r^jKjj^j jK]jjj}r^(j]j]j]j]j]ujKj]r^j%XIt is shown how multiple sockets with different Source IDs can post transactions and process the pending interrupt raised by SRIO device.r^r^}r^(jj^jj^ubaubajjubejjubj)r^}r^(jUj}r^(j]j]j]j]j]ujj^j]r^jX)r^}r^(jXThe application will run through a set of DIO tests. Upon successful completion the following string will be printed "DIO with Interrupts example completed successfully."r^jj^j jK]jj\j}r^(j]j]j]j]j]ujKvj]r^j%XThe application will run through a set of DIO tests. Upon successful completion the following string will be printed "DIO with Interrupts example completed successfully."r^r^}r^(jj^jj^ubaubajjubejjubj)r^}r^(jUj}r^(j]j]j]j]j]ujj^j]r^(j)r^}r^(jUj}r^(j]j]j]j]j]ujj^j]r^jX)r^}r^(jX"Multicore Loopback Example Projectr^jj^j jK]jj\j}r^(j]j]j]j]j]ujKj]r^j%X"Multicore Loopback Example Projectr^r^}r^(jj^jj^ubaubajjubj)r^}r^(jUj}r^(j]j]j]j]j]ujj^j]r^(j)r^}r^(jUj}r^(j]j]j]j]j]ujj^j]r^j)r^}r^(jX;The example is a demonstration of the SRIO driver while operating in a Multicore environment by running the SRIO IP Block in loopback mode. The test case here showcases the SRIO Driver API being multicore safe and using the SRIO IP peripheral to exchange messages between different cores running on the same device.r^jKjj^j jK]jjj}r^(j]j]j]j]j]ujKj]r^j%X;The example is a demonstration of the SRIO driver while operating in a Multicore environment by running the SRIO IP Block in loopback mode. The test case here showcases the SRIO Driver API being multicore safe and using the SRIO IP peripheral to exchange messages between different cores running on the same device.r^r^}r^(jj^jj^ubaubajjubj)r^}r^(jUj}r^(j]j]j]j]j]ujj^j]r^j)r^}r^(jXnIn this test case each core performs the role of a producer and consumer. The test starts with Core 1 sending data to Core 2. Core 2 receives and validates the data and sends another data message to Core3; which receives and validates the data and sends another different data message to Core 0. Core 0 then sends a message to Core 1 which is received and validated.r^jKjj^j jK]jjj}r^(j]j]j]j]j]ujKj]r^j%XnIn this test case each core performs the role of a producer and consumer. The test starts with Core 1 sending data to Core 2. Core 2 receives and validates the data and sends another data message to Core3; which receives and validates the data and sends another different data message to Core 0. Core 0 then sends a message to Core 1 which is received and validated.r^r^}r^(jj^jj^ubaubajjubejjubj)r_}r_(jUj}r_(j]j]j]j]j]ujj^j]r_jX)r_}r_(jXThe application will run through a set of tests sending and receiving data between two cores over SRIO. Upon successful completion the following string will be printed "Multicore Test Passed" from each DSP core.r_jj_j jK]jj\j}r_(j]j]j]j]j]ujKj]r_j%XThe application will run through a set of tests sending and receiving data between two cores over SRIO. Upon successful completion the following string will be printed "Multicore Test Passed" from each DSP core.r _r _}r _(jj_jj_ubaubajjubejjubj)r _}r _(jUj}r_(j]j]j]j]j]ujj^j]r_(j)r_}r_(jUj}r_(j]j]j]j]j]ujj _j]r_jX)r_}r_(jX Loopback Testr_jj_j jK]jj\j}r_(j]j]j]j]j]ujKj]r_j%X Loopback Testr_r_}r_(jj_jj_ubaubajjubj)r_}r_(jUj}r_(j]j]j]j]j]ujj _j]r_j)r _}r!_(jUj}r"_(j]j]j]j]j]ujj_j]r#_j)r$_}r%_(jX&Unit Test application to test all APIsr&_jKjj _j jK]jjj}r'_(j]j]j]j]j]ujKj]r(_j%X&Unit Test application to test all APIsr)_r*_}r+_(jj&_jj$_ubaubajjubajjubj)r,_}r-_(jUj}r._(j]j]j]j]j]ujj _j]r/_jX)r0_}r1_(jXThe application will run through a set of tests to verify all SRIO LLD APIS. Upon successful completion the following string will be printed "Unit Testing completed successfully." from each DSP core.r2_jj,_j jK]jj\j}r3_(j]j]j]j]j]ujKj]r4_j%XThe application will run through a set of tests to verify all SRIO LLD APIS. Upon successful completion the following string will be printed "Unit Testing completed successfully." from each DSP core.r5_r6_}r7_(jj2_jj0_ubaubajjubejjubj)r8_}r9_(jUj}r:_(j]j]j]j]j]ujj^j]r;_(j)r<_}r=_(jUj}r>_(j]j]j]j]j]ujj8_j]r?_jX)r@_}rA_(jXSRIO Benchmarking TestrB_jj<_j jK]jj\j}rC_(j]j]j]j]j]ujKj]rD_j%XSRIO Benchmarking TestrE_rF_}rG_(jjB_jj@_ubaubajjubj)rH_}rI_(jUj}rJ_(j]j]j]j]j]ujj8_j]rK_j)rL_}rM_(jUj}rN_(j]j]j]j]j]ujjH_j]rO_j)rP_}rQ_(jX?The SRIO benchmarking example code is created to allow customers to run benchmarks on their own TI EVMs with code that utilizes the SRIO LLD APIs. The benchmarking example code allows the user to run core to core in loopback mode (internal or external) on a single EVM, or board to board using the external interface between two EVMs. This document’s purpose is to explain how measurements are obtained and how to configure the example code for different test scenarios. SRIO physical connectivity or external SRIO switch configuration is beyond the scope of this document.rR_jKjjL_j jK]jjj}rS_(j]j]j]j]j]ujKj]rT_j%X?The SRIO benchmarking example code is created to allow customers to run benchmarks on their own TI EVMs with code that utilizes the SRIO LLD APIs. The benchmarking example code allows the user to run core to core in loopback mode (internal or external) on a single EVM, or board to board using the external interface between two EVMs. This document’s purpose is to explain how measurements are obtained and how to configure the example code for different test scenarios. SRIO physical connectivity or external SRIO switch configuration is beyond the scope of this document.rU_rV_}rW_(jjR_jjP_ubaubajjubajjubj)rX_}rY_(jUj}rZ_(j]j]j]j]j]ujj8_j]r[_jX)r\_}r]_(jXReview the SRIO Benchmarking Example documentation located in PDK_INSTALL_DIR\\packa ges\\ti\\drv\\srio\\test\\ tput_benchmarking\\doc s\\SRIO_Benchmarking_E xample_Code_Guide.doc for more information on the tests pass/fail criteria.jjX_j jK]jj\j}r^_(j]j]j]j]j]ujKj]r__j%XReview the SRIO Benchmarking Example documentation located in PDK_INSTALL_DIR\packa ges\ti\drv\srio\test\ tput_benchmarking\doc s\SRIO_Benchmarking_E xample_Code_Guide.doc for more information on the tests pass/fail criteria.r`_ra_}rb_(jXReview the SRIO Benchmarking Example documentation located in PDK_INSTALL_DIR\\packa ges\\ti\\drv\\srio\\test\\ tput_benchmarking\\doc s\\SRIO_Benchmarking_E xample_Code_Guide.doc for more information on the tests pass/fail criteria.jj\_ubaubajjubejjubejjubejjubaubj)rc_}rd_(jUjjG^j jK]jjj}re_(j]j]j]j]j]ujKjhj]rf_j)rg_}rh_(jUjKjjc_j jK]jjj}ri_(j]j]j]j]j]ujKjhj]ubaubeubeubj)rj_}rk_(jUjKjj9]j jK]jjj}rl_(j]rm_Xadditional referencesrn_aj]j]j]ro_Uid150rp_aj]ujKjhj]rq_(j)rr_}rs_(jXAdditional Referencesrt_jjj_j jK]jj"j}ru_(j]j]j]j]j]ujKjhj]rv_j%XAdditional Referencesrw_rx_}ry_(jjt_jjr_ubaubj)rz_}r{_(jUjjj_j jK]jjj}r|_(j]j]j]j]j]ujNjhj]r}_j)r~_}r_(jUj}r_(j]j]j]j]j]UcolsKujjz_j]r_(j)r_}r_(jUj}r_(j]j]j]j]j]UcolwidthK#ujj~_j]jjubj)r_}r_(jUj}r_(j]j]j]j]j]UcolwidthK(ujj~_j]jjubj)r_}r_(jUj}r_(j]j]j]j]j]ujj~_j]r_(j)r_}r_(jUj}r_(j]j]j]j]j]ujj_j]r_(j)r_}r_(jUj}r_(j]j]j]j]j]ujj_j]r_jX)r_}r_(jX **Document**r_jj_j jK]jj\j}r_(j]j]j]j]j]ujKj]r_j|)r_}r_(jj_j}r_(j]j]j]j]j]ujj_j]r_j%XDocumentr_r_}r_(jUjj_ubajjubaubajjubj)r_}r_(jUj}r_(j]j]j]j]j]ujj_j]r_jX)r_}r_(jX **Location**r_jj_j jK]jj\j}r_(j]j]j]j]j]ujKj]r_j|)r_}r_(jj_j}r_(j]j]j]j]j]ujj_j]r_j%XLocationr_r_}r_(jUjj_ubajjubaubajjubejjubj)r_}r_(jUj}r_(j]j]j]j]j]ujj_j]r_(j)r_}r_(jUj}r_(j]j]j]j]j]ujj_j]r_jX)r_}r_(jXAPI Reference Manualr_jj_j jK]jj\j}r_(j]j]j]j]j]ujKj]r_j%XAPI Reference Manualr_r_}r_(jj_jj_ubaubajjubj)r_}r_(jUj}r_(j]j]j]j]j]ujj_j]r_jX)r_}r_(jXQ$(TI_PDK_INSTALL_DIR)\\packages\\ti \\drv\\srio\\docs\\doxygen\\html\\index .htmljj_j jK]jj\j}r_(j]j]j]j]j]ujKj]r_j%XI$(TI_PDK_INSTALL_DIR)\packages\ti \drv\srio\docs\doxygen\html\index .htmlr_r_}r_(jXQ$(TI_PDK_INSTALL_DIR)\\packages\\ti \\drv\\srio\\docs\\doxygen\\html\\index .htmljj_ubaubajjubejjubj)r_}r_(jUj}r_(j]j]j]j]j]ujj_j]r_(j)r_}r_(jUj}r_(j]j]j]j]j]ujj_j]r_jX)r_}r_(jX Release Notesr_jj_j jK]jj\j}r_(j]j]j]j]j]ujKj]r_j%X Release Notesr_r_}r_(jj_jj_ubaubajjubj)r_}r_(jUj}r_(j]j]j]j]j]ujj_j]r_jX)r_}r_(jXS$(TI_PDK_INSTALL_DIR)\\packages\\ti \\drv\\srio\\docs\\ReleaseNotes_SRIOD river.pdfjj_j jK]jj\j}r_(j]j]j]j]j]ujKj]r_j%XM$(TI_PDK_INSTALL_DIR)\packages\ti \drv\srio\docs\ReleaseNotes_SRIOD river.pdfr_r_}r_(jXS$(TI_PDK_INSTALL_DIR)\\packages\\ti \\drv\\srio\\docs\\ReleaseNotes_SRIOD river.pdfjj_ubaubajjubejjubejjubejjubaubj)r_}r_(jUjjj_j jK]jjj}r_(j]j]j]j]j]ujKjhj]r_j)r_}r_(jUjKjj_j jK]jjj}r_(j]j]j]j]j]ujKjhj]ubaubeubeubj jK]jjj}r_(j]r_Xoverviewr_aj]j]j]r_Uid141r_aj]ujKjhj]r_(j)r_}r_(jXOverviewr_jj7]j jK]jj"j}r_(j]j]j]j]j]ujKjhj]r_j%XOverviewr_r_}r_(jj_jj_ubaubj)r_}r_(jUjKjj7]j jK]jjj}r_(j]r_X introductionr_aj]j]j]r`Uid142r`aj]ujKjhj]r`(j)r`}r`(jX Introductionr`jj_j jK]jj"j}r`(j]j]j]j]j]ujKjhj]r`j%X Introductionr`r `}r `(jj`jj`ubaubjX)r `}r `(jXDriver enables the high-bandwidth system level interconnects. It is intended to offer Gigabyte per second performance levels for chip-to-chip and board-to-board communication.r `jj_j jK]jj\j}r`(j]j]j]j]j]ujK jhj]r`j%XDriver enables the high-bandwidth system level interconnects. It is intended to offer Gigabyte per second performance levels for chip-to-chip and board-to-board communication.r`r`}r`(jj `jj `ubaubjb)r`}r`(jXModes of Operationr`jKjj_j jK]jjfj}r`(j]r`Uid143r`aj]j]r`Xmodes-of-operationr`aj]j]ujNjhj]r`j%XModes of Operationr`r`}r`(jj`jj`ubaubjX)r`}r `(jX+Following modes of operations are supportedr!`jj_j jK]jj\j}r"`(j]j]j]j]j]ujKjhj]r#`j%X+Following modes of operations are supportedr$`r%`}r&`(jj!`jj`ubaubjX)r'`}r(`(jX**Direct I/O**: The SRIO packet contains the specific address where the data should be stored or read in the destination device. This means that the source device must have detailed knowledge of the available memory space within the destination device.jj_j jK]jj\j}r)`(j]j]j]j]j]ujKjhj]r*`(j|)r+`}r,`(jX**Direct I/O**j}r-`(j]j]j]j]j]ujj'`j]r.`j%X Direct I/Or/`r0`}r1`(jUjj+`ubajjubj%X: The SRIO packet contains the specific address where the data should be stored or read in the destination device. This means that the source device must have detailed knowledge of the available memory space within the destination device.r2`r3`}r4`(jX: The SRIO packet contains the specific address where the data should be stored or read in the destination device. This means that the source device must have detailed knowledge of the available memory space within the destination device.jj'`ubeubjX)r5`}r6`(jX**Type 9**: A destination address is not specified. Instead the Stream ID is used to map the request to a specific memory region by the local (destination) device. TI IP additionally uses Class of Service (COS) as well to further classify the mapping of a request to a memory region.jj_j jK]jj\j}r7`(j]j]j]j]j]ujKjhj]r8`(j|)r9`}r:`(jX **Type 9**j}r;`(j]j]j]j]j]ujj5`j]r<`j%XType 9r=`r>`}r?`(jUjj9`ubajjubj%X: A destination address is not specified. Instead the Stream ID is used to map the request to a specific memory region by the local (destination) device. TI IP additionally uses Class of Service (COS) as well to further classify the mapping of a request to a memory region.r@`rA`}rB`(jX: A destination address is not specified. Instead the Stream ID is used to map the request to a specific memory region by the local (destination) device. TI IP additionally uses Class of Service (COS) as well to further classify the mapping of a request to a memory region.jj5`ubeubjX)rC`}rD`(jX**Type 11**: A destination address is not specified, instead, a mailbox identifier is used within the SRIO packet. The mailbox is controlled and mapped to memory by the local (destination) device.jj_j jK]jj\j}rE`(j]j]j]j]j]ujKjhj]rF`(j|)rG`}rH`(jX **Type 11**j}rI`(j]j]j]j]j]ujjC`j]rJ`j%XType 11rK`rL`}rM`(jUjjG`ubajjubj%X: A destination address is not specified, instead, a mailbox identifier is used within the SRIO packet. The mailbox is controlled and mapped to memory by the local (destination) device.rN`rO`}rP`(jX: A destination address is not specified, instead, a mailbox identifier is used within the SRIO packet. The mailbox is controlled and mapped to memory by the local (destination) device.jjC`ubeubeubeubj jK]jj?j}rQ`(j]UlevelKj]j]rR`j_aUsourcejK]j]j]UlineKUtypejAujKjhj]rS`jX)rT`}rU`(jX+Duplicate implicit target name: "overview".j}rV`(j]j]j]j]j]ujj5]j]rW`j%X+Duplicate implicit target name: "overview".rX`rY`}rZ`(jUjjT`ubajj\ubaubh)r[`}r\`(jUjj_j jK]jj?j}r]`(j]UlevelKj]j]r^`j`aUsourcejK]j]j]UlineKUtypejAujKjhj]r_`jX)r``}ra`(jX/Duplicate implicit target name: "introduction".j}rb`(j]j]j]j]j]ujj[`j]rc`j%X/Duplicate implicit target name: "introduction".rd`re`}rf`(jUjj``ubajj\ubaubh)rg`}rh`(jUj}ri`(j]UlevelKj]j]rj`j`aUsourcej j]j]UlineKiUtypejXujj`j]rk`jX)rl`}rm`(jX5Duplicate explicit target name: "modes-of-operation".j}rn`(j]j]j]j]j]ujjg`j]ro`j%X5Duplicate explicit target name: "modes-of-operation".rp`rq`}rr`(jUjjl`ubajj\ubajj?ubh)rs`}rt`(jUjjR]j jK]jj?j}ru`(j]UlevelKj]j]rv`jX]aUsourcejK]j]j]UlineK!UtypejAujK!jhj]rw`jX)rx`}ry`(jX1Duplicate implicit target name: "user interface".j}rz`(j]j]j]j]j]ujjs`j]r{`j%X1Duplicate implicit target name: "user interface".r|`r}`}r~`(jUjjx`ubajj\ubaubh)r`}r`(jUjjb]j jK]jj?j}r`(j]UlevelKj]j]r`jh]aUsourcejK]j]j]UlineK$UtypejAujK$jhj]r`jX)r`}r`(jX7Duplicate implicit target name: "driver configuration".j}r`(j]j]j]j]j]ujj`j]r`j%X7Duplicate implicit target name: "driver configuration".r`r`}r`(jUjj`ubajj\ubaubh)r`}r`(jUj}r`(j]UlevelKj]j]r`jw]aUsourcej j]j]UlineKiUtypejXujjr]j]r`jX)r`}r`(jX?Duplicate explicit target name: "board-specific-configuration".j}r`(j]j]j]j]j]ujj`j]r`j%X?Duplicate explicit target name: "board-specific-configuration".r`r`}r`(jUjj`ubajj\ubajj?ubh)r`}r`(jUjj]j jK]jj?j}r`(j]UlevelKj]j]r`j]aUsourcejK]j]j]UlineK1UtypejAujK1jhj]r`jX)r`}r`(jX'Duplicate implicit target name: "apis".j}r`(j]j]j]j]j]ujj`j]r`j%X'Duplicate implicit target name: "apis".r`r`}r`(jUjj`ubajj\ubaubh)r`}r`(jUjj7^j jK]jj?j}r`(j]UlevelKj]j]r`j=^aUsourcejK]j]j]UlineKnUtypejAujKnjhj]r`jX)r`}r`(jX.Duplicate implicit target name: "application".j}r`(j]j]j]j]j]ujj`j]r`j%X.Duplicate implicit target name: "application".r`r`}r`(jUjj`ubajj\ubaubh)r`}r`(jUjjG^j jK]jj?j}r`(j]UlevelKj]j]r`jM^aUsourcejK]j]j]UlineKqUtypejAujKqjhj]r`jX)r`}r`(jX+Duplicate implicit target name: "examples".j}r`(j]j]j]j]j]ujj`j]r`j%X+Duplicate implicit target name: "examples".r`r`}r`(jUjj`ubajj\ubaubh)r`}r`(jUjjj_j jK]jj?j}r`(j]UlevelKj]j]r`jp_aUsourcejK]j]j]UlineKUtypejAujKjhj]r`jX)r`}r`(jX8Duplicate implicit target name: "additional references".j}r`(j]j]j]j]j]ujj`j]r`j%X8Duplicate implicit target name: "additional references".r`r`}r`(jUjj`ubajj\ubaubh)r`}r`(jUjj)r`}r`(jUjKjj)r`}r`(jUjhj j jjj}r`(j]j]j]j]r`Uhyplnkr`aj]r`haujKojhj]r`(j)r`}r`(jXHYPLNKr`jj`j j jj"j}r`(j]j]j]j]j]ujKojhj]r`j%XHYPLNKr`r`}r`(jj`jj`ubaubj))r`}r`(jXAhttp://processors.wiki.ti.com/index.php/Processor_SDK_RTOS_HYPLNKjj`j j,X?source/rtos/PDK_Platform_Software/Device_Drivers/HYPLNK.rst.incr`r`}r`bjj0j}r`(j2j3j]j]j]j]j]ujKjhj]r`j%XAhttp://processors.wiki.ti.com/index.php/Processor_SDK_RTOS_HYPLNKr`r`}r`(jUjj`ubaubj`j)r`}r`(jUjKjj`j j`jjj}r`(j]r`Xuser interfacer`aj]j]j]r`Uid155r`aj]ujK#jhj]r`(j)r`}r`(jXUser Interfacer`jj`j j`jj"j}r`(j]j]j]j]j]ujK#jhj]r`j%XUser Interfacer`r`}r`(jj`jj`ubaubj)r`}r`(jUjKjj`j j`jjj}r`(j]r`Xdriver configurationr`aj]j]j]r`Uid156r`aj]ujK&jhj]r`(j)r`}r`(jXDriver Configurationr`jj`j j`jj"j}r`(j]j]j]j]j]ujK&jhj]raj%XDriver Configurationrara}ra(jj`jj`ubaubjX)ra}ra(jXThe driver itself is entirely configured via API at runtime. However, the examples are configured using compiler flags that are in hyplnkPlatCfg.h and hyplnkLLDCfg.h.rajj`j j`jj\j}ra(j]j]j]j]j]ujK(jhj]raj%XThe driver itself is entirely configured via API at runtime. However, the examples are configured using compiler flags that are in hyplnkPlatCfg.h and hyplnkLLDCfg.h.r ar a}r a(jjajjaubaubjb)r a}r a(jX!Hyperlink configuration structurerajj`j j`jjfj}ra(j]raU!hyperlink-configuration-structureraaj]j]j]j]rahaujNjhj]raj%X!Hyperlink configuration structurerara}ra(jjajj aubaubjX)ra}ra(jX~The hyplnk_device.c binds the driver to the hardware on the board. It is passed into the driver via the call to Hyplnk_init().rajj`j j`jj\j}ra(j]j]j]j]j]ujK/jhj]raj%X~The hyplnk_device.c binds the driver to the hardware on the board. It is passed into the driver via the call to Hyplnk_init().rara}ra(jjajjaubaubeubj)ra}r a(jUjKjj`j j`jjj}r!a(j]r"aXapisr#aaj]j]j]r$aUid157r%aaj]ujK3jhj]r&a(j)r'a}r(a(jXAPIsr)ajjaj j`jj"j}r*a(j]j]j]j]j]ujK3jhj]r+aj%XAPIsr,ar-a}r.a(jj)ajj'aubaubjb)r/a}r0a(jX API Call Flowr1ajKjjaj j`jjfj}r2a(j]r3aUid158r4aaj]j]r5aX api-call-flowr6aaj]j]ujNjhj]r7aj%X API Call Flowr8ar9a}r:a(jj1ajj/aubaubjX)r;a}raj%XKThe API call flow is covered in examplememoryMappedExamplesrchyplnkExample.r?ar@a}rAa(jXNThe API call flow is covered in example\memoryMappedExample\src\hyplnkExample.jj;aubaubjX)rBa}rCa(jXThey key parts are:rDajjaj j`jj\j}rEa(j]j]j]j]j]ujK;jhj]rFaj%XThey key parts are:rGarHa}rIa(jjDajjBaubaubj`)rJa}rKa(jUjjaj j`jjcj}rLa(jeU.j]j]j]jfUj]j]jgjhujK=jhj]rMa(j)rNa}rOa(jX%Initialize the LLD via Hyplnk_init().rPajjJaj j`jj j}rQa(j]j]j]j]j]ujNjhj]rRajX)rSa}rTa(jjPajjNaj j`jj\j}rUa(j]j]j]j]j]ujK=j]rVaj%X%Initialize the LLD via Hyplnk_init().rWarXa}rYa(jjPajjSaubaubaubj)rZa}r[a(jXUConfigure PLL, PSC and memories via hyplnkExampleSysSetup() which is all example codejjJaj j`jj j}r\a(j]j]j]j]j]ujNjhj]r]ajX)r^a}r_a(jXUConfigure PLL, PSC and memories via hyplnkExampleSysSetup() which is all example coder`ajjZaj j`jj\j}raa(j]j]j]j]j]ujK>j]rbaj%XUConfigure PLL, PSC and memories via hyplnkExampleSysSetup() which is all example codercarda}rea(jj`ajj^aubaubaubj)rfa}rga(jXInstall ISR(s)rhajjJaj j`jj j}ria(j]j]j]j]j]ujNjhj]rjajX)rka}rla(jjhajjfaj j`jj\j}rma(j]j]j]j]j]ujK@j]rnaj%XInstall ISR(s)roarpa}rqa(jjhajjkaubaubaubj)rra}rsa(jXBEnable the peripheral using sequence in hyplnkExamplePeriphSetup()rtajjJaj j`jj j}rua(j]j]j]j]j]ujNjhj]rvajX)rwa}rxa(jjtajjraj j`jj\j}rya(j]j]j]j]j]ujKAj]rzaj%XBEnable the peripheral using sequence in hyplnkExamplePeriphSetup()r{ar|a}r}a(jjtajjwaubaubaubj)r~a}ra(jX8Open memory maps using hyplnkExampleAddrMap() as a guiderajjJaj j`jj j}ra(j]j]j]j]j]ujNjhj]rajX)ra}ra(jjajj~aj j`jj\j}ra(j]j]j]j]j]ujKBj]raj%X8Open memory maps using hyplnkExampleAddrMap() as a guiderara}ra(jjajjaubaubaubj)ra}ra(jX]Exchange data with memcpy or EDMA using mapped address (returned from hyplnkExampleAddrMap). jjJaj j`jj j}ra(j]j]j]j]j]ujNjhj]rajX)ra}ra(jX\Exchange data with memcpy or EDMA using mapped address (returned from hyplnkExampleAddrMap).rajjaj j`jj\j}ra(j]j]j]j]j]ujKCj]raj%X\Exchange data with memcpy or EDMA using mapped address (returned from hyplnkExampleAddrMap).rara}ra(jjajjaubaubaubeubj)ra}ra(jUjjaj j`jjj}ra(j]j]j]j]j]ujKFjhj]raj)ra}ra(jUjKjjaj j`jjj}ra(j]j]j]j]j]ujKjhj]ubaubeubeubj)ra}ra(jUjKjj`j j`jjj}ra(j]raX applicationraaj]j]j]raUid159raaj]ujKIjhj]ra(j)ra}ra(jX Applicationrajjaj j`jj"j}ra(j]j]j]j]j]ujKIjhj]raj%X Applicationrara}ra(jjajjaubaubj)ra}ra(jUjKjjaj j`jjj}ra(j]raXexamplesraaj]j]j]raUid160raaj]ujKLjhj]ra(j)ra}ra(jXExamplesrajjaj j`jj"j}ra(j]j]j]j]j]ujKLjhj]raj%XExamplesrara}ra(jjajjaubaubjX)ra}ra(jXzHyperlink/hyplnk is supported only on Keystone devices. It is available on 6678, 6657, K2H, K2K, K2E. All examples can be used in either loopback (on any EVM without any special cables or breakout cards) or with two boards. For 6678 or 6657, the required cable is `HL5CABLE `__. For K2H/K2K/K2E, the breakout card is `RTM-BOCRT `__, and the cable is also required. Below is a picture showing how a K2H EVM is connected to a 6678 EVM via breakout card and cable.jjaj j`jj\j}ra(j]j]j]j]j]ujKNjhj]ra(j%XHyperlink/hyplnk is supported only on Keystone devices. It is available on 6678, 6657, K2H, K2K, K2E. All examples can be used in either loopback (on any EVM without any special cables or breakout cards) or with two boards. For 6678 or 6657, the required cable is rara}ra(jXHyperlink/hyplnk is supported only on Keystone devices. It is available on 6678, 6657, K2H, K2K, K2E. All examples can be used in either loopback (on any EVM without any special cables or breakout cards) or with two boards. For 6678 or 6657, the required cable is jjaubj)ra}ra(jXG`HL5CABLE `__j}ra(UnameXHL5CABLEjX8https://store.ti.com/HL5CABLE-Hyperlink-Cable-P2888.aspxj]j]j]j]j]ujjaj]raj%XHL5CABLErara}ra(jUjjaubajjubj%X(. For K2H/K2K/K2E, the breakout card is rara}ra(jX(. For K2H/K2K/K2E, the breakout card is jjaubj)ra}ra(jX`RTM-BOCRT `__j}ra(UnameX RTM-BOCRTjXqhttp://www.ti.com/devnet/docs/catalog/endequipmentproductfolder.tsp?actionPerformed=productFolder&productId=17440j]j]j]j]j]ujjaj]raj%X RTM-BOCRTrara}ra(jUjjaubajjubj%X, and the cable is also required. Below is a picture showing how a K2H EVM is connected to a 6678 EVM via breakout card and cable.rara}ra(jX, and the cable is also required. Below is a picture showing how a K2H EVM is connected to a 6678 EVM via breakout card and cable.jjaubeubj^)ra}ra(jX&.. Image:: ../images/K2-k1-hyplnk.jpg jjaj j`jjaj}ra(UuriXrtos/../images/K2-k1-hyplnk.jpgraj]j]j]j]jd}raU*jasj]ujKZjhj]ubj)ra}ra(jUjjaj j`jjj}ra(j]j]j]j]j]ujNjhj]raj)ra}ra(jUj}ra(j]j]j]j]j]UcolsKujjaj]ra(j)ra}ra(jUj}ra(j]j]j]j]j]UcolwidthKujjaj]jjubj)ra}ra(jUj}ra(j]j]j]j]j]UcolwidthKujjaj]jjubj)ra}ra(jUj}ra(j]j]j]j]j]UcolwidthKujjaj]jjubj)ra}ra(jUj}ra(j]j]j]j]j]UcolwidthKujjaj]jjubj)ra}ra(jUj}ra(j]j]j]j]j]ujjaj]raj)ra}ra(jUj}ra(j]j]j]j]j]ujjaj]ra(j)ra}ra(jUj}ra(j]j]j]j]j]ujjaj]rajX)ra}ra(jXNamerajjaj j`jj\j}rb(j]j]j]j]j]ujK\j]rbj%XNamerbrb}rb(jjajjaubaubajjubj)rb}rb(jUj}rb(j]j]j]j]j]ujjaj]rbjX)r b}r b(jX Descriptionr bjjbj j`jj\j}r b(j]j]j]j]j]ujK\j]r bj%X Descriptionrbrb}rb(jj bjj bubaubajjubj)rb}rb(jUj}rb(j]j]j]j]j]ujjaj]rbjX)rb}rb(jXEVM Configurationrbjjbj j`jj\j}rb(j]j]j]j]j]ujK\j]rbj%XEVM Configurationrbrb}rb(jjbjjbubaubajjubj)rb}rb(jUj}rb(j]j]j]j]j]ujjaj]r bjX)r!b}r"b(jXExpected Resultsr#bjjbj j`jj\j}r$b(j]j]j]j]j]ujK\j]r%bj%XExpected Resultsr&br'b}r(b(jj#bjj!bubaubajjubejjubajjubj)r)b}r*b(jUj}r+b(j]j]j]j]j]ujjaj]r,b(j)r-b}r.b(jUj}r/b(j]j]j]j]j]ujj)bj]r0b(j)r1b}r2b(jUj}r3b(j]j]j]j]j]ujj-bj]r4bjX)r5b}r6b(jXmemoryMappedExa mpler7bjj1bj j`jj\j}r8b(j]j]j]j]j]ujK_j]r9bj%XmemoryMappedExa mpler:br;b}rb(jUj}r?b(j]j]j]j]j]ujj-bj]r@bjX)rAb}rBb(jX6Memory mapped data exchange with loopback or 2 devicesrCbjj=bj j`jj\j}rDb(j]j]j]j]j]ujK_j]rEbj%X6Memory mapped data exchange with loopback or 2 devicesrFbrGb}rHb(jjCbjjAbubaubajjubj)rIb}rJb(jUj}rKb(j]j]j]j]j]ujj-bj]rLbjX)rMb}rNb(jX^Loopback runs without any extra hardware. See below for details on configuring board-to-board.rObjjIbj j`jj\j}rPb(j]j]j]j]j]ujK_j]rQbj%X^Loopback runs without any extra hardware. See below for details on configuring board-to-board.rRbrSb}rTb(jjObjjMbubaubajjubj)rUb}rVb(jUj}rWb(j]j]j]j]j]ujj-bj]rXbjX)rYb}rZb(jX*Link is established and data is exchanged.r[bjjUbj j`jj\j}r\b(j]j]j]j]j]ujK_j]r]bj%X*Link is established and data is exchanged.r^br_b}r`b(jj[bjjYbubaubajjubejjubj)rab}rbb(jUj}rcb(j]j]j]j]j]ujj)bj]rdb(j)reb}rfb(jUj}rgb(j]j]j]j]j]ujjabj]rhbjX)rib}rjb(jXcicInterruptExa mplerkbjjebj j`jj\j}rlb(j]j]j]j]j]ujKgj]rmbj%XcicInterruptExa mplernbrob}rpb(jjkbjjibubaubajjubj)rqb}rrb(jUj}rsb(j]j]j]j]j]ujjabj]rtbjX)rub}rvb(jXCIC-based interrupt exchange.rwbjjqbj j`jj\j}rxb(j]j]j]j]j]ujKgj]rybj%XCIC-based interrupt exchange.rzbr{b}r|b(jjwbjjububaubajjubj)r}b}r~b(jUj}rb(j]j]j]j]j]ujjabj]rbjX)rb}rb(jX^Loopback runs without any extra hardware. See below for details on configuring board-to-board.rbjj}bj j`jj\j}rb(j]j]j]j]j]ujKgj]rbj%X^Loopback runs without any extra hardware. See below for details on configuring board-to-board.rbrb}rb(jjbjjbubaubajjubj)rb}rb(jUj}rb(j]j]j]j]j]ujjabj]rbjX)rb}rb(jX9Interrupts are sent between ARM Linux Userspace and DSPs.rbjjbj j`jj\j}rb(j]j]j]j]j]ujKgj]rbj%X9Interrupts are sent between ARM Linux Userspace and DSPs.rbrb}rb(jjbjjbubaubajjubejjubejjubejjubaubjb)rb}rb(jX/Setup of multiple EVMs with one instance of CCSrbjjaj j`jjfj}rb(j]rbU/setup-of-multiple-evms-with-one-instance-of-ccsrbaj]j]j]j]rbh[aujNjhj]rbj%X/Setup of multiple EVMs with one instance of CCSrbrb}rb(jjbjjbubaubjX)rb}rb(jXThis is only needed for 2 board use cases. See `Multi-Emulator_Debug_with_CCS `__ for general configuration of multiple EVMs/emulators within one instance of CCS.jjaj j`jj\j}rb(j]j]j]j]j]ujKsjhj]rb(j%X/This is only needed for 2 board use cases. See rbrb}rb(jX/This is only needed for 2 board use cases. See jjbubj)rb}rb(jXi`Multi-Emulator_Debug_with_CCS `__j}rb(UnameXMulti-Emulator_Debug_with_CCSjXEhttp://processors.wiki.ti.com/index.php/Multi-Emulator_Debug_with_CCSj]j]j]j]j]ujjbj]rbj%XMulti-Emulator_Debug_with_CCSrbrb}rb(jUjjbubajjubj%XQ for general configuration of multiple EVMs/emulators within one instance of CCS.rbrb}rb(jXQ for general configuration of multiple EVMs/emulators within one instance of CCS.jjbubeubjb)rb}rb(jX0Detailed instructions to run memoryMappedExamplerbjjaj j`jjfj}rb(j]rbU0detailed-instructions-to-run-memorymappedexamplerbaj]j]j]j]rbhaujNjhj]rbj%X0Detailed instructions to run memoryMappedExamplerbrb}rb(jjbjjbubaubjX)rb}rb(jXIf running with one board, enable loopback via uncommenting hyplnk_EXAMPLE_LOOPBACK in PDK_INSTALL_DIR/packages/ti/drv/hyplnk/example/common/hyplnkLLDCfg.h.rbjjaj j`jj\j}rb(j]j]j]j]j]ujK{jhj]rbj%XIf running with one board, enable loopback via uncommenting hyplnk_EXAMPLE_LOOPBACK in PDK_INSTALL_DIR/packages/ti/drv/hyplnk/example/common/hyplnkLLDCfg.h.rbrb}rb(jjbjjbubaubjX)rb}rb(jX7Compile the project for the specific device/evm in use.rbjjaj j`jj\j}rb(j]j]j]j]j]ujKjhj]rbj%X7Compile the project for the specific device/evm in use.rbrb}rb(jjbjjbubaubjX)rb}rb(jX}For loopback: Load the example with hyplnk_EXAMPLE_LOOPBACK definined onto one board and run. The results should be as below.rbjjaj j`jj\j}rb(j]j]j]j]j]ujKjhj]rbj%X}For loopback: Load the example with hyplnk_EXAMPLE_LOOPBACK definined onto one board and run. The results should be as below.rbrb}rb(jjbjjbubaubjX)rb}rb(jXFor 2 board: Make sure the both boards configuration match each other by checking PDK_INSTALL_DIR/packages/ti/drv/hyplnk/example/common/hyplnkLLDCfg.h:rbjjaj j`jj\j}rb(j]j]j]j]j]ujKjhj]rbj%XFor 2 board: Make sure the both boards configuration match each other by checking PDK_INSTALL_DIR/packages/ti/drv/hyplnk/example/common/hyplnkLLDCfg.h:rbrb}rb(jjbjjbubaubj#)rb}rb(jXhyplnk_EXAMPLE_PORT --> which port to use for K2H/K2K/K2E hyplnk_EXAMPLE_ALLOW_x_LANES --> 0, 1 or 4 lanes hyplnk_EXAMPLE_SERRATE_xxpxxx --> serdes rate setupjjaj j`jj&j}rb(j2j3j]j]j]j]j]ujMjhj]rbj%Xhyplnk_EXAMPLE_PORT --> which port to use for K2H/K2K/K2E hyplnk_EXAMPLE_ALLOW_x_LANES --> 0, 1 or 4 lanes hyplnk_EXAMPLE_SERRATE_xxpxxx --> serdes rate setuprbrb}rb(jUjjbubaubjX)rb}rb(jXLoad the same example on both boards. It is fulling symmetric. No special configuration is needed to distinguish side A and side B. Each side should generate output similar to below.rbjjaj j`jj\j}rb(j]j]j]j]j]ujKjhj]rbj%XLoad the same example on both boards. It is fulling symmetric. No special configuration is needed to distinguish side A and side B. Each side should generate output similar to below.rbrb}rb(jjbjjbubaubjb)rb}rb(jX0Detailed instructions to run cicInterruptExamplerbjjaj j`jjfj}rb(j]rbU0detailed-instructions-to-run-cicinterruptexamplerbaj]j]j]j]rbhjaujNjhj]rbj%X0Detailed instructions to run cicInterruptExamplerbrb}rb(jjbjjbubaubjX)rb}rb(jXThis only works on devices with A15 running Linux (K2H, K2K, K2E). See PDK_INSTALL_DIR/packages/ti/drv/hyplnk/example/cicInterruptExample/Readme.txt for instructions.rbjjaj j`jj\j}rb(j]j]j]j]j]ujKjhj]rbj%XThis only works on devices with A15 running Linux (K2H, K2K, K2E). See PDK_INSTALL_DIR/packages/ti/drv/hyplnk/example/cicInterruptExample/Readme.txt for instructions.rbrb}rb(jjbjjbubaubjb)rb}rb(jXSample example outputrcjKjjaj j`jjfj}rc(j]rcUid161rcaj]j]rcXsample-example-outputrcaj]j]ujNjhj]rcj%XSample example outputrcrc}r c(jjcjjbubaubjX)r c}r c(jX.This came from k2h device running in loopback.r cjjaj j`jj\j}r c(j]j]j]j]j]ujKjhj]rcj%X.This came from k2h device running in loopback.rcrc}rc(jj cjj cubaubj#)rc}rc(jX Version #: 0x02010005; string HYPLNK LLD Revision: 02.01.00.05:Dec 24 2015:17:48:28 About to do system setup (PLL, PSC, and DDR) Power domain is already enabled. You probably re-ran without device reset (which is OK) Constructed SERDES configs: PLL=0x00000228; RX=0x0046c495; TX=0x000ccf95 system setup worked About to set up HyperLink Peripheral ============================Hyperlink Testing Port 0 ========================================== begin registers before initialization =========== Revision register contents: Raw = 0x4e902101 Status register contents: Raw = 0x00003004 Link status register contents: Raw = 0x00000000 Control register contents: Raw = 0x00000000 Control register contents: Raw = 0x00000000 ============== end registers before initialization =========== Hyperlink Serdes Common Init Complete Hyperlink Serdes Lane 0 Init Complete Hyperlink Serdes Lane 1 Init Complete Hyperlink Serdes Lane 2 Init Complete Hyperlink Serdes Lane 3 Init Complete ============== begin registers after initialization =========== Status register contents: Raw = 0x04402005 Link status register contents: Raw = 0xfdf0bdf0 Control register contents: Raw = 0x00006206 ============== end registers after initialization =========== Waiting 5 seconds to check link stability Precursors 1 Postcursors: 19 Link seems stable About to try to read remote registers ============== begin REMOTE registers after initialization =========== Status register contents: Raw = 0x0440080f Link status register contents: Raw = 0xfdf0bdf0 Control register contents: Raw = 0x00006202 ============== end REMOTE registers after initialization =========== Peripheral setup worked About to read/write once Single write test passed About to pass 65536 tokens; iteration = 0 === this is not an optimized example === Link Speed is 4 * 3.125 Gbps Passed 65536 tokens round trip (read+write through hyplnk) in 16829 Mcycles Approximately 256799 cycles per round-trip === this is not an optimized example === Checking statistics About to pass 65536 tokens; iteration = 1 === this is not an optimized example === Link Speed is 4 * 3.125 Gbps Passed 65536 tokens round trip (read+write through hyplnk) in 16829 Mcycles Approximately 256799 cycles per round-trip === this is not an optimized example === Checking statistics About to pass 65536 tokens; iteration = 2 . . .jjaj j`jj&j}rc(j2j3j]j]j]j]j]ujMjhj]rcj%X Version #: 0x02010005; string HYPLNK LLD Revision: 02.01.00.05:Dec 24 2015:17:48:28 About to do system setup (PLL, PSC, and DDR) Power domain is already enabled. You probably re-ran without device reset (which is OK) Constructed SERDES configs: PLL=0x00000228; RX=0x0046c495; TX=0x000ccf95 system setup worked About to set up HyperLink Peripheral ============================Hyperlink Testing Port 0 ========================================== begin registers before initialization =========== Revision register contents: Raw = 0x4e902101 Status register contents: Raw = 0x00003004 Link status register contents: Raw = 0x00000000 Control register contents: Raw = 0x00000000 Control register contents: Raw = 0x00000000 ============== end registers before initialization =========== Hyperlink Serdes Common Init Complete Hyperlink Serdes Lane 0 Init Complete Hyperlink Serdes Lane 1 Init Complete Hyperlink Serdes Lane 2 Init Complete Hyperlink Serdes Lane 3 Init Complete ============== begin registers after initialization =========== Status register contents: Raw = 0x04402005 Link status register contents: Raw = 0xfdf0bdf0 Control register contents: Raw = 0x00006206 ============== end registers after initialization =========== Waiting 5 seconds to check link stability Precursors 1 Postcursors: 19 Link seems stable About to try to read remote registers ============== begin REMOTE registers after initialization =========== Status register contents: Raw = 0x0440080f Link status register contents: Raw = 0xfdf0bdf0 Control register contents: Raw = 0x00006202 ============== end REMOTE registers after initialization =========== Peripheral setup worked About to read/write once Single write test passed About to pass 65536 tokens; iteration = 0 === this is not an optimized example === Link Speed is 4 * 3.125 Gbps Passed 65536 tokens round trip (read+write through hyplnk) in 16829 Mcycles Approximately 256799 cycles per round-trip === this is not an optimized example === Checking statistics About to pass 65536 tokens; iteration = 1 === this is not an optimized example === Link Speed is 4 * 3.125 Gbps Passed 65536 tokens round trip (read+write through hyplnk) in 16829 Mcycles Approximately 256799 cycles per round-trip === this is not an optimized example === Checking statistics About to pass 65536 tokens; iteration = 2 . . .rcrc}rc(jUjjcubaubeubeubj)rc}rc(jUjKjj`j j`jjj}rc(j]rcX debug faqrcaj]j]j]rcUid162rcaj]ujKjhj]r c(j)r!c}r"c(jX Debug FAQr#cjjcj j`jj"j}r$c(j]j]j]j]j]ujKjhj]r%cj%X Debug FAQr&cr'c}r(c(jj#cjj!cubaubj`)r)c}r*c(jUjjcj j`jjcj}r+c(jeU.j]j]j]jfUj]j]jgjhujKjhj]r,c(j)r-c}r.c(jX.If it seems to not work, check for lError and rError in the status register (hyplnkStatusReg_s). If these appear, it means double ecc error occurred and the link is non functional. This is fatal error. Next look at hyplnkECCErrorReg_s for single (corrected) bit errors. After startup these should increment slowly (order of minutes, hours, days, not seconds or less). If they are incrementing quickly (several times per minute or second), then it means the SERDES coefficients should be calibrated by following the Keystone SERDES UG. See references section.jj)cj j`jj j}r/c(j]j]j]j]j]ujNjhj]r0cjX)r1c}r2c(jX.If it seems to not work, check for lError and rError in the status register (hyplnkStatusReg_s). If these appear, it means double ecc error occurred and the link is non functional. This is fatal error. Next look at hyplnkECCErrorReg_s for single (corrected) bit errors. After startup these should increment slowly (order of minutes, hours, days, not seconds or less). If they are incrementing quickly (several times per minute or second), then it means the SERDES coefficients should be calibrated by following the Keystone SERDES UG. See references section.r3cjj-cj j`jj\j}r4c(j]j]j]j]j]ujKj]r5cj%X.If it seems to not work, check for lError and rError in the status register (hyplnkStatusReg_s). If these appear, it means double ecc error occurred and the link is non functional. This is fatal error. Next look at hyplnkECCErrorReg_s for single (corrected) bit errors. After startup these should increment slowly (order of minutes, hours, days, not seconds or less). If they are incrementing quickly (several times per minute or second), then it means the SERDES coefficients should be calibrated by following the Keystone SERDES UG. See references section.r6cr7c}r8c(jj3cjj1cubaubaubj)r9c}r:c(jXNote that if the link goes down (uncorrectable ECC error) it is possible for the entire interconnect to lock up. If this occurs, it will not be possible to access any memory even through the JTAG interface (CCS will return errors instead of reading memory, and often disconnect the target). Thus the primary cause of this lockup should be avoided by carefully following the shutdown/reset requirement in section 2.9 of the Hyperlink UG (which is to invoke serial stop, and wait for it to take effect before resetting either endpoint).jj)cj j`jj j}r;c(j]j]j]j]j]ujNjhj]rc(jXNote that if the link goes down (uncorrectable ECC error) it is possible for the entire interconnect to lock up. If this occurs, it will not be possible to access any memory even through the JTAG interface (CCS will return errors instead of reading memory, and often disconnect the target). Thus the primary cause of this lockup should be avoided by carefully following the shutdown/reset requirement in section 2.9 of the Hyperlink UG (which is to invoke serial stop, and wait for it to take effect before resetting either endpoint).r?cjj9cj j`jj\j}r@c(j]j]j]j]j]ujKj]rAcj%XNote that if the link goes down (uncorrectable ECC error) it is possible for the entire interconnect to lock up. If this occurs, it will not be possible to access any memory even through the JTAG interface (CCS will return errors instead of reading memory, and often disconnect the target). Thus the primary cause of this lockup should be avoided by carefully following the shutdown/reset requirement in section 2.9 of the Hyperlink UG (which is to invoke serial stop, and wait for it to take effect before resetting either endpoint).rBcrCc}rDc(jj?cjj=cubaubaubj)rEc}rFc(jXAnother workaround for ECC single errors is to lower link rate and/or reduce to 1 lane. This can be done by adjusting the commented defines in PDK_INSTALL_DIR/packages/ti/drv/hyplnk/example/common/hyplnkLLDCfg.h. jj)cj j`jj j}rGc(j]j]j]j]j]ujNjhj]rHcjX)rIc}rJc(jXAnother workaround for ECC single errors is to lower link rate and/or reduce to 1 lane. This can be done by adjusting the commented defines in PDK_INSTALL_DIR/packages/ti/drv/hyplnk/example/common/hyplnkLLDCfg.h.rKcjjEcj j`jj\j}rLc(j]j]j]j]j]ujKj]rMcj%XAnother workaround for ECC single errors is to lower link rate and/or reduce to 1 lane. This can be done by adjusting the commented defines in PDK_INSTALL_DIR/packages/ti/drv/hyplnk/example/common/hyplnkLLDCfg.h.rNcrOc}rPc(jjKcjjIcubaubaubeubeubj)rQc}rRc(jUjKjj`j j`jjj}rSc(j]rTcXadditional referencesrUcaj]j]j]rVcUid163rWcaj]ujKjhj]rXc(j)rYc}rZc(jXAdditional Referencesr[cjjQcj j`jj"j}r\c(j]j]j]j]j]ujKjhj]r]cj%XAdditional Referencesr^cr_c}r`c(jj[cjjYcubaubjX)rac}rbc(jX)Additional documentation can be found in:rccjjQcj j`jj\j}rdc(j]j]j]j]j]ujMjhj]recj%X)Additional documentation can be found in:rfcrgc}rhc(jjccjjacubaubj)ric}rjc(jUjjQcj j`jjj}rkc(j]j]j]j]j]ujNjhj]rlcj)rmc}rnc(jUj}roc(j]j]j]j]j]UcolsKujjicj]rpc(j)rqc}rrc(jUj}rsc(j]j]j]j]j]UcolwidthK#ujjmcj]jjubj)rtc}ruc(jUj}rvc(j]j]j]j]j]UcolwidthK)ujjmcj]jjubj)rwc}rxc(jUj}ryc(j]j]j]j]j]ujjmcj]rzc(j)r{c}r|c(jUj}r}c(j]j]j]j]j]ujjwcj]r~c(j)rc}rc(jUj}rc(j]j]j]j]j]ujj{cj]rcjX)rc}rc(jX **Document**rcjjcj j`jj\j}rc(j]j]j]j]j]ujMj]rcj|)rc}rc(jjcj}rc(j]j]j]j]j]ujjcj]rcj%XDocumentrcrc}rc(jUjjcubajjubaubajjubj)rc}rc(jUj}rc(j]j]j]j]j]ujj{cj]rcjX)rc}rc(jX **Location**rcjjcj j`jj\j}rc(j]j]j]j]j]ujMj]rcj|)rc}rc(jjcj}rc(j]j]j]j]j]ujjcj]rcj%XLocationrcrc}rc(jUjjcubajjubaubajjubejjubj)rc}rc(jUj}rc(j]j]j]j]j]ujjwcj]rc(j)rc}rc(jUj}rc(j]j]j]j]j]ujjcj]rcjX)rc}rc(jX)Hardware Peripheral Hyperlink Users Guidercjjcj j`jj\j}rc(j]j]j]j]j]ujMj]rcj%X)Hardware Peripheral Hyperlink Users Guidercrc}rc(jjcjjcubaubajjubj)rc}rc(jUj}rc(j]j]j]j]j]ujjcj]rcjX)rc}rc(jX/`User Guide `__rcjjcj j`jj\j}rc(j]j]j]j]j]ujMj]rcj)rc}rc(jjcj}rc(UnameX User GuidejXhttp://www.ti.com/lit/sprugw8j]j]j]j]j]ujjcj]rcj%X User Guidercrc}rc(jUjjcubajjubaubajjubejjubj)rc}rc(jUj}rc(j]j]j]j]j]ujjwcj]rc(j)rc}rc(jUj}rc(j]j]j]j]j]ujjcj]rcjX)rc}rc(jXSerdes Users Guidercjjcj j`jj\j}rc(j]j]j]j]j]ujM j]rcj%XSerdes Users Guidercrc}rc(jjcjjcubaubajjubj)rc}rc(jUj}rc(j]j]j]j]j]ujjcj]rcjX)rc}rc(jX/`User Guide `__rcjjcj j`jj\j}rc(j]j]j]j]j]ujM j]rcj)rc}rc(jjcj}rc(UnameX User GuidejXhttp://www.ti.com/lit/spruho3j]j]j]j]j]ujjcj]rcj%X User Guidercrc}rc(jUjjcubajjubaubajjubejjubj)rc}rc(jUj}rc(j]j]j]j]j]ujjwcj]rc(j)rc}rc(jUj}rc(j]j]j]j]j]ujjcj]rcjX)rc}rc(jXCIC Peripheral Users Guidercjjcj j`jj\j}rc(j]j]j]j]j]ujM j]rcj%XCIC Peripheral Users Guidercrc}rc(jjcjjcubaubajjubj)rc}rc(jUj}rc(j]j]j]j]j]ujjcj]rcjX)rc}rc(jX3`CIC User Guide `__rcjjcj j`jj\j}rc(j]j]j]j]j]ujM j]rcj)rc}rc(jjcj}rc(UnameXCIC User GuidejXhttp://www.ti.com/lit/sprugw4j]j]j]j]j]ujjcj]rcj%XCIC User Guidercrc}rc(jUjjcubajjubaubajjubejjubj)rc}rd(jUj}rd(j]j]j]j]j]ujjwcj]rd(j)rd}rd(jUj}rd(j]j]j]j]j]ujjcj]rdjX)rd}rd(jXAPI Reference Manualr djjdj j`jj\j}r d(j]j]j]j]j]ujMj]r dj%XAPI Reference Manualr dr d}rd(jj djjdubaubajjubj)rd}rd(jUj}rd(j]j]j]j]j]ujjcj]rdjX)rd}rd(jXS$(TI_PDK_INSTALL_DIR)\\packages\\ti \\drv\\hyplnk\\docs\\doxygen\\html\\ind ex.htmljjdj j`jj\j}rd(j]j]j]j]j]ujMj]rdj%XK$(TI_PDK_INSTALL_DIR)\packages\ti \drv\hyplnk\docs\doxygen\html\ind ex.htmlrdrd}rd(jXS$(TI_PDK_INSTALL_DIR)\\packages\\ti \\drv\\hyplnk\\docs\\doxygen\\html\\ind ex.htmljjdubaubajjubejjubj)rd}rd(jUj}rd(j]j]j]j]j]ujjwcj]rd(j)rd}rd(jUj}r d(j]j]j]j]j]ujjdj]r!djX)r"d}r#d(jX Release Notesr$djjdj j`jj\j}r%d(j]j]j]j]j]ujMj]r&dj%X Release Notesr'dr(d}r)d(jj$djj"dubaubajjubj)r*d}r+d(jUj}r,d(j]j]j]j]j]ujjdj]r-djX)r.d}r/d(jXU$(TI_PDK_INSTALL_DIR)\\packages\\ti \\drv\\hyplnk\\docs\\ReleaseNotes_HYP LNK_LLD.pdfjj*dj j`jj\j}r0d(j]j]j]j]j]ujMj]r1dj%XO$(TI_PDK_INSTALL_DIR)\packages\ti \drv\hyplnk\docs\ReleaseNotes_HYP LNK_LLD.pdfr2dr3d}r4d(jXU$(TI_PDK_INSTALL_DIR)\\packages\\ti \\drv\\hyplnk\\docs\\ReleaseNotes_HYP LNK_LLD.pdfjj.dubaubajjubejjubejjubejjubaubj)r5d}r6d(jUjjQcj j`jjj}r7d(j]j]j]j]j]ujMjhj]r8dj)r9d}r:d(jUjKjj5dj j`jjj}r;d(j]j]j]j]j]ujKjhj]ubaubeubeubj j`jjj}rdaj]j]j]r?dUid151r@daj]ujKjhj]rAd(j)rBd}rCd(jXOverviewrDdjj`j j`jj"j}rEd(j]j]j]j]j]ujKjhj]rFdj%XOverviewrGdrHd}rId(jjDdjjBdubaubj)rJd}rKd(jUjKjj`j j`jjj}rLd(j]rMdX introductionrNdaj]j]j]rOdUid152rPdaj]ujKjhj]rQd(j)rRd}rSd(jX IntroductionrTdjjJdj j`jj"j}rUd(j]j]j]j]j]ujKjhj]rVdj%X IntroductionrWdrXd}rYd(jjTdjjRdubaubjX)rZd}r[d(jXHyperlink is a point-to-point peripheral. Each device has equal capability to operate on the address space of the other device. This also means that there is no complex enumeration in order to get started.r\djjJdj j`jj\j}r]d(j]j]j]j]j]ujK jhj]r^dj%XHyperlink is a point-to-point peripheral. Each device has equal capability to operate on the address space of the other device. This also means that there is no complex enumeration in order to get started.r_dr`d}rad(jj\djjZdubaubjb)rbd}rcd(jXModes of OperationrddjKjjJdj j`jjfj}red(j]rfdUid153rgdaj]j]rhdXmodes-of-operationridaj]j]ujNjhj]rjdj%XModes of Operationrkdrld}rmd(jjddjjbdubaubjX)rnd}rod(jXRThe LLD is intended to bring up the Hyperlink peripheral and open memory mappings.rpdjjJdj j`jj\j}rqd(j]j]j]j]j]ujKjhj]rrdj%XRThe LLD is intended to bring up the Hyperlink peripheral and open memory mappings.rsdrtd}rud(jjpdjjndubaubjb)rvd}rwd(jX InterruptsrxdjKjjJdj j`jjfj}ryd(j]rzdUid154r{daj]j]r|dj'aj]j]ujNjhj]r}dj%X Interruptsr~drd}rd(jjxdjjvdubaubjX)rd}rd(jXThere is an interrupt generation example (in PDK_INSTALL_DIR/packages/ti/drv/hyplnk/example/cicInterruptExample) which maps and pokes the other device's CIC (Chip/SOC level interrupt controller) to generate interrupts for data transfers.rdjjJdj j`jj\j}rd(j]j]j]j]j]ujKjhj]rdj%XThere is an interrupt generation example (in PDK_INSTALL_DIR/packages/ti/drv/hyplnk/example/cicInterruptExample) which maps and pokes the other device's CIC (Chip/SOC level interrupt controller) to generate interrupts for data transfers.rdrd}rd(jjdjjdubaubjX)rd}rd(jXwThe PDK_INSTALL_DIR/packages/ti/drv/hyplnk/example/common/hyplnkIsr.c monitors local interrupts to detect fatal errors. It can also be used for IO interrupts, but there is only one output event that has to be demuxed. Thus for multicore orthogonality, the cicInterruptExample is often better example (because each destination core can have completely independent interrupts).rdjjJdj j`jj\j}rd(j]j]j]j]j]ujKjhj]rdj%XwThe PDK_INSTALL_DIR/packages/ti/drv/hyplnk/example/common/hyplnkIsr.c monitors local interrupts to detect fatal errors. It can also be used for IO interrupts, but there is only one output event that has to be demuxed. Thus for multicore orthogonality, the cicInterruptExample is often better example (because each destination core can have completely independent interrupts).rdrd}rd(jjdjjdubaubeubeubj j`jj?j}rd(j]UlevelKj]j]rdj@daUsourcej`j]j]UlineKUtypejAujKjhj]rdjX)rd}rd(jX+Duplicate implicit target name: "overview".j}rd(j]j]j]j]j]ujj`j]rdj%X+Duplicate implicit target name: "overview".rdrd}rd(jUjjdubajj\ubaubh)rd}rd(jUjjJdj j`jj?j}rd(j]UlevelKj]j]rdjPdaUsourcej`j]j]UlineKUtypejAujKjhj]rdjX)rd}rd(jX/Duplicate implicit target name: "introduction".j}rd(j]j]j]j]j]ujjdj]rdj%X/Duplicate implicit target name: "introduction".rdrd}rd(jUjjdubajj\ubaubh)rd}rd(jUj}rd(j]UlevelKj]j]rdjgdaUsourcej j]j]UlineKoUtypejXujjbdj]rdjX)rd}rd(jX5Duplicate explicit target name: "modes-of-operation".j}rd(j]j]j]j]j]ujjdj]rdj%X5Duplicate explicit target name: "modes-of-operation".rdrd}rd(jUjjdubajj\ubajj?ubh)rd}rd(jUj}rd(j]UlevelKj]j]rdj{daUsourcej j]j]UlineKoUtypejXujjvdj]rdjX)rd}rd(jX-Duplicate explicit target name: "interrupts".j}rd(j]j]j]j]j]ujjdj]rdj%X-Duplicate explicit target name: "interrupts".rdrd}rd(jUjjdubajj\ubajj?ubh)rd}rd(jUjj`j j`jj?j}rd(j]UlevelKj]j]rdj`aUsourcej`j]j]UlineK#UtypejAujK#jhj]rdjX)rd}rd(jX1Duplicate implicit target name: "user interface".j}rd(j]j]j]j]j]ujjdj]rdj%X1Duplicate implicit target name: "user interface".rdrd}rd(jUjjdubajj\ubaubh)rd}rd(jUjj`j j`jj?j}rd(j]UlevelKj]j]rdj`aUsourcej`j]j]UlineK&UtypejAujK&jhj]rdjX)rd}rd(jX7Duplicate implicit target name: "driver configuration".j}rd(j]j]j]j]j]ujjdj]rdj%X7Duplicate implicit target name: "driver configuration".rdrd}rd(jUjjdubajj\ubaubh)rd}rd(jUjjaj j`jj?j}rd(j]UlevelKj]j]rdj%aaUsourcej`j]j]UlineK3UtypejAujK3jhj]rdjX)rd}rd(jX'Duplicate implicit target name: "apis".j}rd(j]j]j]j]j]ujjdj]rdj%X'Duplicate implicit target name: "apis".rdrd}rd(jUjjdubajj\ubaubh)rd}rd(jUj}rd(j]UlevelKj]j]rdj4aaUsourcej j]j]UlineKoUtypejXujj/aj]rdjX)rd}rd(jX0Duplicate explicit target name: "api-call-flow".j}rd(j]j]j]j]j]ujjdj]rdj%X0Duplicate explicit target name: "api-call-flow".rdrd}rd(jUjjdubajj\ubajj?ubh)rd}rd(jUjjaj j`jj?j}rd(j]UlevelKj]j]rdjaaUsourcej`j]j]UlineKIUtypejAujKIjhj]rdjX)rd}rd(jX.Duplicate implicit target name: "application".j}rd(j]j]j]j]j]ujjdj]rdj%X.Duplicate implicit target name: "application".rdrd}rd(jUjjdubajj\ubaubh)rd}rd(jUjjaj j`jj?j}rd(j]UlevelKj]j]rdjaaUsourcej`j]j]UlineKLUtypejAujKLjhj]rdjX)re}re(jX+Duplicate implicit target name: "examples".j}re(j]j]j]j]j]ujjdj]rej%X+Duplicate implicit target name: "examples".rere}re(jUjjeubajj\ubaubh)re}re(jUj}r e(j]UlevelKj]j]r ejcaUsourcej j]j]UlineKoUtypejXujjbj]r ejX)r e}r e(jX8Duplicate explicit target name: "sample-example-output".j}re(j]j]j]j]j]ujjej]rej%X8Duplicate explicit target name: "sample-example-output".rere}re(jUjj eubajj\ubajj?ubh)re}re(jUjjcj j`jj?j}re(j]UlevelKj]j]rejcaUsourcej`j]j]UlineKUtypejAujKjhj]rejX)re}re(jX,Duplicate implicit target name: "debug faq".j}re(j]j]j]j]j]ujjej]rej%X,Duplicate implicit target name: "debug faq".rere}re(jUjjeubajj\ubaubh)re}r e(jUjjQcj j`jj?j}r!e(j]UlevelKj]j]r"ejWcaUsourcej`j]j]UlineKUtypejAujKjhj]r#ejX)r$e}r%e(jX8Duplicate implicit target name: "additional references".j}r&e(j]j]j]j]j]ujjej]r'ej%X8Duplicate implicit target name: "additional references".r(er)e}r*e(jUjj$eubajj\ubaubh)r+e}r,e(jUjj)r-e}r.e(jUjKjj)r/e}r0e(jUjhj j jjj}r1e(j]j]j]j]r2eUtsipr3eaj]r4ehaujKujhj]r5e(j)r6e}r7e(jXTSIPr8ejj/ej j jj"j}r9e(j]j]j]j]j]ujKujhj]r:ej%XTSIPr;ere}r?e(jX?http://processors.wiki.ti.com/index.php/Processor_SDK_RTOS_TSIPjj/ej j,X=source/rtos/PDK_Platform_Software/Device_Drivers/TSIP.rst.incr@erAe}rBebjj0j}rCe(j2j3j]j]j]j]j]ujKjhj]rDej%X?http://processors.wiki.ti.com/index.php/Processor_SDK_RTOS_TSIPrEerFe}rGe(jUjj>eubaubj-ej)rHe}rIe(jUjKjj/ej jAejjj}rJe(j]rKeXuser interfacerLeaj]j]j]rMeUid166rNeaj]ujK&jhj]rOe(j)rPe}rQe(jXUser InterfacerRejjHej jAejj"j}rSe(j]j]j]j]j]ujK&jhj]rTej%XUser InterfacerUerVe}rWe(jjRejjPeubaubj)rXe}rYe(jUjKjjHej jAejjj}rZe(j]r[eXdriver configurationr\eaj]j]j]r]eUid167r^eaj]ujK)jhj]r_e(j)r`e}rae(jXDriver ConfigurationrbejjXej jAejj"j}rce(j]j]j]j]j]ujK)jhj]rdej%XDriver Configurationreerfe}rge(jjbejj`eubaubjX)rhe}rie(jXTSIP configuration involves configurations for desired stagger phase of a TSIP timeout, using Tsip_configPhase() API. For details about individual fields of this structure, see the Doxygen help by opening PDK_INSTALL_DIR\\Packages\\ti\\drv\\TSIP\\docs\\doxygen\\html\\index.html.jjXej jAejj\j}rje(j]j]j]j]j]ujK+jhj]rkej%XTSIP configuration involves configurations for desired stagger phase of a TSIP timeout, using Tsip_configPhase() API. For details about individual fields of this structure, see the Doxygen help by opening PDK_INSTALL_DIR\Packages\ti\drv\TSIP\docs\doxygen\html\index.html.rlerme}rne(jXTSIP configuration involves configurations for desired stagger phase of a TSIP timeout, using Tsip_configPhase() API. For details about individual fields of this structure, see the Doxygen help by opening PDK_INSTALL_DIR\\Packages\\ti\\drv\\TSIP\\docs\\doxygen\\html\\index.html.jjheubaubeubj)roe}rpe(jUjKjjHej jAejjj}rqe(j]rreXapisrseaj]j]j]rteUid168rueaj]ujK1jhj]rve(j)rwe}rxe(jXAPIsryejjoej jAejj"j}rze(j]j]j]j]j]ujK1jhj]r{ej%XAPIsr|er}e}r~e(jjyejjweubaubjX)re}re(jXAPI reference for application:rejjoej jAejj\j}re(j]j]j]j]j]ujK3jhj]rej%XAPI reference for application:rere}re(jjejjeubaubj#)re}re(jX#include jjoej jAejj&j}re(j2j3j]j]j]j]j]ujMjhj]rej%X#include rere}re(jUjjeubaubeubeubj)re}re(jUjKjj/ej jAejjj}re(j]reX applicationreaj]j]j]reUid169reaj]ujK:jhj]re(j)re}re(jX Applicationrejjej jAejj"j}re(j]j]j]j]j]ujK:jhj]rej%X Applicationrere}re(jjejjeubaubj)re}re(jUjKjjej jAejjj}re(j]reXexamplesreaj]j]j]reUid170reaj]ujK=jhj]re(j)re}re(jXExamplesrejjej jAejj"j}re(j]j]j]j]j]ujK=jhj]rej%XExamplesrere}re(jjejjeubaubj)re}re(jUjjej jAejjj}re(j]j]j]j]j]ujNjhj]rej)re}re(jUj}re(j]j]j]j]j]UcolsKujjej]re(j)re}re(jUj}re(j]j]j]j]j]UcolwidthKujjej]jjubj)re}re(jUj}re(j]j]j]j]j]UcolwidthKujjej]jjubj)re}re(jUj}re(j]j]j]j]j]UcolwidthKujjej]jjubj)re}re(jUj}re(j]j]j]j]j]ujjej]rej)re}re(jUj}re(j]j]j]j]j]ujjej]re(j)re}re(jUj}re(j]j]j]j]j]ujjej]rejX)re}re(jXNamerejjej jAejj\j}re(j]j]j]j]j]ujK@j]rej%XNamerere}re(jjejjeubaubajjubj)re}re(jUj}re(j]j]j]j]j]ujjej]rejX)re}re(jX Descriptionrejjej jAejj\j}re(j]j]j]j]j]ujK@j]rej%X Descriptionrere}re(jjejjeubaubajjubj)re}re(jUj}re(j]j]j]j]j]ujjej]rejX)re}re(jXExpected Resultsrejjej jAejj\j}re(j]j]j]j]j]ujK@j]rej%XExpected Resultsrere}re(jjejjeubaubajjubejjubajjubj)re}re(jUj}re(j]j]j]j]j]ujjej]re(j)re}re(jUj}re(j]j]j]j]j]ujjej]re(j)re}re(jUj}re(j]j]j]j]j]ujjej]rejX)re}re(jXtsip_Example applicationrejjej jAejj\j}re(j]j]j]j]j]ujKBj]rej%Xtsip_Example applicationrere}re(jjejjeubaubajjubj)re}rf(jUj}rf(j]j]j]j]j]ujjej]rfj)rf}rf(jUj}rf(j]j]j]j]j]ujjej]rfj)rf}rf(jXJExample demonstrating *sample tsip* test. Reference example for developersjKjjfj jAejjj}r f(j]j]j]j]j]ujKj]r f(j%XExample demonstrating r fr f}r f(jXExample demonstrating jjfubj<)rf}rf(jX *sample tsip*j}rf(j]j]j]j]j]ujjfj]rfj%X sample tsiprfrf}rf(jUjjfubajjDubj%X' test. Reference example for developersrfrf}rf(jX' test. Reference example for developersjjfubeubajjubajjubj)rf}rf(jUj}rf(j]j]j]j]j]ujjej]rfj)rf}rf(jUj}rf(j]j]j]j]j]ujjfj]rfj)r f}r!f(jX5User observes the output printed over the CCS consoler"fjKjjfj jAejjj}r#f(j]j]j]j]j]ujKj]r$fj%X5User observes the output printed over the CCS consoler%fr&f}r'f(jj"fjj fubaubajjubajjubejjubj)r(f}r)f(jUj}r*f(j]j]j]j]j]ujjej]r+f(j)r,f}r-f(jUj}r.f(j]j]j]j]j]ujj(fj]r/fjX)r0f}r1f(jXtsip_UnitTestApplicat ionr2fjj,fj jAejj\j}r3f(j]j]j]j]j]ujKHj]r4fj%Xtsip_UnitTestApplicat ionr5fr6f}r7f(jj2fjj0fubaubajjubj)r8f}r9f(jUj}r:f(j]j]j]j]j]ujj(fj]r;fj)rf(j]j]j]j]j]ujj8fj]r?fj)r@f}rAf(jX&Unit Test application to test all APIsrBfjKjjg(jUjj8gubajj\ubaubh)r?g}r@g(jUjjoej jAejj?j}rAg(j]UlevelKj]j]rBgjueaUsourcejAej]j]UlineK1UtypejAujK1jhj]rCgjX)rDg}rEg(jX'Duplicate implicit target name: "apis".j}rFg(j]j]j]j]j]ujj?gj]rGgj%X'Duplicate implicit target name: "apis".rHgrIg}rJg(jUjjDgubajj\ubaubh)rKg}rLg(jUjjej jAejj?j}rMg(j]UlevelKj]j]rNgjeaUsourcejAej]j]UlineK:UtypejAujK:jhj]rOgjX)rPg}rQg(jX.Duplicate implicit target name: "application".j}rRg(j]j]j]j]j]ujjKgj]rSgj%X.Duplicate implicit target name: "application".rTgrUg}rVg(jUjjPgubajj\ubaubh)rWg}rXg(jUjjej jAejj?j}rYg(j]UlevelKj]j]rZgjeaUsourcejAej]j]UlineK=UtypejAujK=jhj]r[gjX)r\g}r]g(jX+Duplicate implicit target name: "examples".j}r^g(j]j]j]j]j]ujjWgj]r_gj%X+Duplicate implicit target name: "examples".r`grag}rbg(jUjj\gubajj\ubaubh)rcg}rdg(jUjjXfj jAejj?j}reg(j]UlevelKj]j]rfgj^faUsourcejAej]j]UlineKNUtypejAujKNjhj]rggjX)rhg}rig(jX8Duplicate implicit target name: "additional references".j}rjg(j]j]j]j]j]ujjcgj]rkgj%X8Duplicate implicit target name: "additional references".rlgrmg}rng(jUjjhgubajj\ubaubh)rog}rpg(jUjj)rqg}rrg(jUjKjj)rsg}rtg(jUjhj j jjj}rug(j]j]j]j]rvgUmcbsprwgaj]rxghaujK{jhj]ryg(j)rzg}r{g(jXMCBSPr|gjjsgj j jj"j}r}g(j]j]j]j]j]ujK{jhj]r~gj%XMCBSPrgrg}rg(jj|gjjzgubaubj))rg}rg(jX@http://processors.wiki.ti.com/index.php/Processor_SDK_RTOS_MCBSPjjsgj j,X>source/rtos/PDK_Platform_Software/Device_Drivers/MCBSP.rst.incrgrg}rgbjj0j}rg(j2j3j]j]j]j]j]ujKjhj]rgj%X@http://processors.wiki.ti.com/index.php/Processor_SDK_RTOS_MCBSPrgrg}rg(jUjjgubaubjqgj)rg}rg(jUjKjjsgj jgjjj}rg(j]rgXuser interfacergaj]j]j]rgUid174rgaj]ujKjhj]rg(j)rg}rg(jXUser Interfacergjjgj jgjj"j}rg(j]j]j]j]j]ujKjhj]rgj%XUser Interfacergrg}rg(jjgjjgubaubj)rg}rg(jUjKjjgj jgjjj}rg(j]rgXdriver configurationrgaj]j]j]rgUid175rgaj]ujKjhj]rg(j)rg}rg(jXDriver Configurationrgjjgj jgjj"j}rg(j]j]j]j]j]ujKjhj]rgj%XDriver Configurationrgrg}rg(jjgjjgubaubjX)rg}rg(jXBThe MCBSP Driver initialization API needs to be called only once and it initializes the internal driver data structures like device objects. Application developers need to ensure that they call the MCBSP Driver Init API before they call the MCBSP Device Initialization. Following API is used to initialize the MCBSP Driverrgjjgj jgjj\j}rg(j]j]j]j]j]ujKjhj]rgj%XBThe MCBSP Driver initialization API needs to be called only once and it initializes the internal driver data structures like device objects. Application developers need to ensure that they call the MCBSP Driver Init API before they call the MCBSP Device Initialization. Following API is used to initialize the MCBSP Driverrgrg}rg(jjgjjgubaubj#)rg}rg(jXint32_t mcbspInit (void)jjgj jgjj&j}rg(j2j3j]j]j]j]j]ujMjhj]rgj%Xint32_t mcbspInit (void)rgrg}rg(jUjjgubaubjX)rg}rg(jXMCBSP Peripheral Configuration The MCBSP driver provides a sample implementation sequence which initializes the MCBSP IP block. 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The MCBSP Device initialization API is implemented as a sample prototype:rgrg}rg(jjgjjgubaubj#)rg}rg(jXvoid McbspDevice_init (void)jjgj jgjj&j}rg(j2j3j]j]j]j]j]ujM(jhj]rgj%Xvoid McbspDevice_init (void)rgrg}rg(jUjjgubaubjX)rg}rg(jXFor details about individual fields of this structure, see the Doxygen help by opening PDK_INSTALL_DIR\Packages\ti\drv\MCBSP\docs\doxygen\html\index.html.jjgj jgjj\j}rg(j]j]j]j]j]ujK0jhj]rgj%XFor details about individual fields of this structure, see the Doxygen help by opening PDK_INSTALL_DIRPackagestidrvMCBSPdocsdoxygenhtmlindex.html.rgrg}rg(jXFor details about individual fields of this structure, see the Doxygen help by opening PDK_INSTALL_DIR\Packages\ti\drv\MCBSP\docs\doxygen\html\index.html.jjgubaubeubj)rg}rg(jUjKjjgj jgjjj}rg(j]rgXapisrgaj]j]j]rgUid176rgaj]ujK5jhj]rg(j)rg}rg(jXAPIsrgjjgj jgjj"j}rg(j]j]j]j]j]ujK5jhj]rgj%XAPIsrgrg}rg(jjgjjgubaubjX)rg}rg(jXAPI reference for application:rgjjgj jgjj\j}rg(j]j]j]j]j]ujK7jhj]rgj%XAPI reference for application:rgrg}rg(jjgjjgubaubj#)rg}rg(jX##include jjgj jgjj&j}rg(j2j3j]j]j]j]j]ujM5jhj]rgj%X##include rgrg}rg(jUjjgubaubeubeubj)rg}rg(jUjKjjsgj jgjjj}rg(j]rgX applicationrgaj]j]j]rgUid177rgaj]ujK>jhj]rg(j)rg}rg(jX Applicationrgjjgj jgjj"j}rg(j]j]j]j]j]ujK>jhj]rgj%X Applicationrgrg}rg(jjgjjgubaubj)rh}rh(jUjKjjgj jgjjj}rh(j]rhXexamplesrhaj]j]j]rhUid178rhaj]ujKAjhj]rh(j)rh}r h(jXExamplesr hjjhj jgjj"j}r h(j]j]j]j]j]ujKAjhj]r hj%XExamplesr hrh}rh(jj hjjhubaubj)rh}rh(jUjjhj jgjjj}rh(j]j]j]j]j]ujNjhj]rhj)rh}rh(jUj}rh(j]j]j]j]j]UcolsKujjhj]rh(j)rh}rh(jUj}rh(j]j]j]j]j]UcolwidthKujjhj]jjubj)rh}rh(jUj}rh(j]j]j]j]j]UcolwidthKujjhj]jjubj)rh}rh(jUj}r h(j]j]j]j]j]ujjhj]r!hj)r"h}r#h(jUj}r$h(j]j]j]j]j]ujjhj]r%h(j)r&h}r'h(jUj}r(h(j]j]j]j]j]ujj"hj]r)hjX)r*h}r+h(jXNamer,hjj&hj jgjj\j}r-h(j]j]j]j]j]ujKDj]r.hj%XNamer/hr0h}r1h(jj,hjj*hubaubajjubj)r2h}r3h(jUj}r4h(j]j]j]j]j]ujj"hj]r5hjX)r6h}r7h(jX Descriptionr8hjj2hj jgjj\j}r9h(j]j]j]j]j]ujKDj]r:hj%X Descriptionr;hrh}r?h(jUj}r@h(j]j]j]j]j]ujjhj]rAhj)rBh}rCh(jUj}rDh(j]j]j]j]j]ujj>hj]rEh(j)rFh}rGh(jUj}rHh(j]j]j]j]j]ujjBhj]rIhjX)rJh}rKh(jXMCBSP_Example applicationrLhjjFhj jgjj\j}rMh(j]j]j]j]j]ujKFj]rNhj%XMCBSP_Example applicationrOhrPh}rQh(jjLhjjJhubaubajjubj)rRh}rSh(jUj}rTh(j]j]j]j]j]ujjBhj]rUhjX)rVh}rWh(jXTExample demonstrating *sample MCBSP loopback* test. Reference example for developersjjRhj jgjj\j}rXh(j]j]j]j]j]ujKFj]rYh(j%XExample demonstrating rZhr[h}r\h(jXExample demonstrating jjVhubj<)r]h}r^h(jX*sample MCBSP loopback*j}r_h(j]j]j]j]j]ujjVhj]r`hj%Xsample MCBSP loopbackrahrbh}rch(jUjj]hubajjDubj%X' test. Reference example for developersrdhreh}rfh(jX' test. Reference example for developersjjVhubeubajjubejjubajjubejjubaubeubeubj)rgh}rhh(jUjKjjsgj jgjjj}rih(j]rjhXadditional referencesrkhaj]j]j]rlhUid179rmhaj]ujKOjhj]rnh(j)roh}rph(jXAdditional Referencesrqhjjghj jgjj"j}rrh(j]j]j]j]j]ujKOjhj]rshj%XAdditional Referencesrthruh}rvh(jjqhjjohubaubj)rwh}rxh(jUjjghj jgjjj}ryh(j]j]j]j]j]ujNjhj]rzhj)r{h}r|h(jUj}r}h(j]j]j]j]j]UcolsKujjwhj]r~h(j)rh}rh(jUj}rh(j]j]j]j]j]UcolwidthK#ujj{hj]jjubj)rh}rh(jUj}rh(j]j]j]j]j]UcolwidthK)ujj{hj]jjubj)rh}rh(jUj}rh(j]j]j]j]j]ujj{hj]rh(j)rh}rh(jUj}rh(j]j]j]j]j]ujjhj]rh(j)rh}rh(jUj}rh(j]j]j]j]j]ujjhj]rhjX)rh}rh(jX **Document**rhjjhj jgjj\j}rh(j]j]j]j]j]ujKRj]rhj|)rh}rh(jjhj}rh(j]j]j]j]j]ujjhj]rhj%XDocumentrhrh}rh(jUjjhubajjubaubajjubj)rh}rh(jUj}rh(j]j]j]j]j]ujjhj]rhjX)rh}rh(jX **Location**rhjjhj jgjj\j}rh(j]j]j]j]j]ujKRj]rhj|)rh}rh(jjhj}rh(j]j]j]j]j]ujjhj]rhj%XLocationrhrh}rh(jUjjhubajjubaubajjubejjubj)rh}rh(jUj}rh(j]j]j]j]j]ujjhj]rh(j)rh}rh(jUj}rh(j]j]j]j]j]ujjhj]rhjX)rh}rh(jXAPI Reference Manualrhjjhj jgjj\j}rh(j]j]j]j]j]ujKTj]rhj%XAPI Reference Manualrhrh}rh(jjhjjhubaubajjubj)rh}rh(jUj}rh(j]j]j]j]j]ujjhj]rhjX)rh}rh(jXR$(TI_PDK_INSTALL_DIR)\\packages\\ti \\drv\\MCBSP\\docs\\doxygen\\html\\inde x.htmljjhj jgjj\j}rh(j]j]j]j]j]ujKTj]rhj%XJ$(TI_PDK_INSTALL_DIR)\packages\ti \drv\MCBSP\docs\doxygen\html\inde x.htmlrhrh}rh(jXR$(TI_PDK_INSTALL_DIR)\\packages\\ti \\drv\\MCBSP\\docs\\doxygen\\html\\inde x.htmljjhubaubajjubejjubj)rh}rh(jUj}rh(j]j]j]j]j]ujjhj]rh(j)rh}rh(jUj}rh(j]j]j]j]j]ujjhj]rhjX)rh}rh(jX Release Notesrhjjhj jgjj\j}rh(j]j]j]j]j]ujKXj]rhj%X Release Notesrhrh}rh(jjhjjhubaubajjubj)rh}rh(jUj}rh(j]j]j]j]j]ujjhj]rhjX)rh}rh(jXO$(TI_PDK_INSTALL_DIR)\\packages\\ti \\drv\\MCBSP\\docs\\ReleaseNotes_MCBS P.pdfjjhj jgjj\j}rh(j]j]j]j]j]ujKXj]rhj%XI$(TI_PDK_INSTALL_DIR)\packages\ti \drv\MCBSP\docs\ReleaseNotes_MCBS P.pdfrhrh}rh(jXO$(TI_PDK_INSTALL_DIR)\\packages\\ti \\drv\\MCBSP\\docs\\ReleaseNotes_MCBS P.pdfjjhubaubajjubejjubejjubejjubaubj)rh}rh(jUjjghj jgjjj}rh(j]j]j]j]j]ujK]jhj]rhj)rh}rh(jUjKjjhj jgjjj}rh(j]j]j]j]j]ujKjhj]ubaubeubeubj jgjjj}rh(j]rhXoverviewrhaj]j]j]rhUid172rhaj]ujKjhj]rh(j)rh}rh(jXOverviewrhjjqgj jgjj"j}rh(j]j]j]j]j]ujKjhj]rhj%XOverviewrhrh}rh(jjhjjhubaubj)rh}rh(jUjKjjqgj jgjjj}rh(j]rhX introductionrhaj]j]j]rhUid173rhaj]ujKjhj]rh(j)ri}ri(jX Introductionrijjhj jgjj"j}ri(j]j]j]j]j]ujKjhj]rij%X Introductionriri}ri(jjijjiubaubjX)ri}r i(jX2The multichannel buffered serial port (MCBSP) peripheral allows direct interface to other TI DSPs, codecs, and other devices in a system. The primary use for the MCBSP is for audio interface purposes. The following sub sections explain the hardware (MCBSP peripheral) and software context of the MCBSP LLD.r ijjhj jgjj\j}r i(j]j]j]j]j]ujK jhj]r ij%X2The multichannel buffered serial port (MCBSP) peripheral allows direct interface to other TI DSPs, codecs, and other devices in a system. The primary use for the MCBSP is for audio interface purposes. The following sub sections explain the hardware (MCBSP peripheral) and software context of the MCBSP LLD.r iri}ri(jj ijjiubaubjX)ri}ri(jXThe device driver exposes a set of well-defined APIs which are used by the application layer to send and receive data via the MCBSP peripheral. The driver also exposes a set of well-defined OS abstraction APIs which are used to ensure that the driver is OS independent and portable. The MCBSP driver uses the CSL MCBSP register layer for all MCBSP MMR access. The MCBSP driver also interfaces with the EDMA3 library to be able to transfer data to and from MCBSP peripheral and data memory.rijjhj jgjj\j}ri(j]j]j]j]j]ujKjhj]rij%XThe device driver exposes a set of well-defined APIs which are used by the application layer to send and receive data via the MCBSP peripheral. The driver also exposes a set of well-defined OS abstraction APIs which are used to ensure that the driver is OS independent and portable. The MCBSP driver uses the CSL MCBSP register layer for all MCBSP MMR access. The MCBSP driver also interfaces with the EDMA3 library to be able to transfer data to and from MCBSP peripheral and data memory.riri}ri(jjijjiubaubeubeubj jgjj?j}ri(j]UlevelKj]j]rijhaUsourcejgj]j]UlineKUtypejAujKjhj]rijX)ri}ri(jX+Duplicate implicit target name: "overview".j}ri(j]j]j]j]j]ujjogj]rij%X+Duplicate implicit target name: "overview".rir i}r!i(jUjjiubajj\ubaubh)r"i}r#i(jUjjhj jgjj?j}r$i(j]UlevelKj]j]r%ijhaUsourcejgj]j]UlineKUtypejAujKjhj]r&ijX)r'i}r(i(jX/Duplicate implicit target name: "introduction".j}r)i(j]j]j]j]j]ujj"ij]r*ij%X/Duplicate implicit target name: "introduction".r+ir,i}r-i(jUjj'iubajj\ubaubh)r.i}r/i(jUjjgj jgjj?j}r0i(j]UlevelKj]j]r1ijgaUsourcejgj]j]UlineKUtypejAujKjhj]r2ijX)r3i}r4i(jX1Duplicate implicit target name: "user interface".j}r5i(j]j]j]j]j]ujj.ij]r6ij%X1Duplicate implicit target name: "user interface".r7ir8i}r9i(jUjj3iubajj\ubaubh)r:i}r;i(jUjjgj jgjj?j}rijX)r?i}r@i(jX7Duplicate implicit target name: "driver configuration".j}rAi(j]j]j]j]j]ujj:ij]rBij%X7Duplicate implicit target name: "driver configuration".rCirDi}rEi(jUjj?iubajj\ubaubh)rFi}rGi(jUjjgj jgjj?j}rHi(j]UlevelKj]j]rIijgaUsourcejgj]j]UlineK5UtypejAujK5jhj]rJijX)rKi}rLi(jX'Duplicate implicit target name: "apis".j}rMi(j]j]j]j]j]ujjFij]rNij%X'Duplicate implicit target name: "apis".rOirPi}rQi(jUjjKiubajj\ubaubh)rRi}rSi(jUjjgj jgjj?j}rTi(j]UlevelKj]j]rUijgaUsourcejgj]j]UlineK>UtypejAujK>jhj]rVijX)rWi}rXi(jX.Duplicate implicit target name: "application".j}rYi(j]j]j]j]j]ujjRij]rZij%X.Duplicate implicit target name: "application".r[ir\i}r]i(jUjjWiubajj\ubaubh)r^i}r_i(jUjjhj jgjj?j}r`i(j]UlevelKj]j]raijhaUsourcejgj]j]UlineKAUtypejAujKAjhj]rbijX)rci}rdi(jX+Duplicate implicit target name: "examples".j}rei(j]j]j]j]j]ujj^ij]rfij%X+Duplicate implicit target name: "examples".rgirhi}rii(jUjjciubajj\ubaubh)rji}rki(jUjjghj jgjj?j}rli(j]UlevelKj]j]rmijmhaUsourcejgj]j]UlineKOUtypejAujKOjhj]rnijX)roi}rpi(jX8Duplicate implicit target name: "additional references".j}rqi(j]j]j]j]j]ujjjij]rrij%X8Duplicate implicit target name: "additional references".rsirti}rui(jUjjoiubajj\ubaubh)rvi}rwi(jUjj)rxi}ryi(jUjKjj)rzi}r{i(jUjhj j jjj}r|i(j]j]j]j]r}iUemacr~iaj]rihHaujKjhj]ri(j)ri}ri(jXEMACrijjzij j jj"j}ri(j]j]j]j]j]ujKjhj]rij%XEMACriri}ri(jjijjiubaubj))ri}ri(jXFhttp://http://processors.wiki.ti.com/index.php/Processor_SDK_RTOS_EMACjjzij j,X=source/rtos/PDK_Platform_Software/Device_Drivers/EMAC.rst.incriri}ribjj0j}ri(j2j3j]j]j]j]j]ujKjhj]rij%XFhttp://http://processors.wiki.ti.com/index.php/Processor_SDK_RTOS_EMACriri}ri(jUjjiubaubjxij)ri}ri(jUjKjjzij jijjj}ri(j]riXdriver configurationriaj]j]j]riUid181riaj]ujKjhj]ri(j)ri}ri(jXDriver Configurationrijjij jijj"j}ri(j]j]j]j]j]ujKjhj]rij%XDriver Configurationriri}ri(jjijjiubaubj)ri}ri(jUjKjjij jijjj}ri(j]rij&aj]j]j]riUid182riaj]ujKjhj]ri(j)ri}ri(jXBoard Specific Configurationrijjij jijj"j}ri(j]j]j]j]j]ujKjhj]rij%XBoard Specific Configurationriri}ri(jjijjiubaubjX)ri}ri(jX?All the board specific configurations eg:enabling and pin-mux of RGMII/MDIO pins should be performed before calling any driver APIs. By default Board_Init() API supports all initialization sequence for TI supported EVMs.Refer `Processor SDK RTOS Board Support `__ for additional details.jjij jijj\j}ri(j]j]j]j]j]ujKjhj]ri(j%XAll the board specific configurations eg:enabling and pin-mux of RGMII/MDIO pins should be performed before calling any driver APIs. By default Board_Init() API supports all initialization sequence for TI supported EVMs.Refer riri}ri(jXAll the board specific configurations eg:enabling and pin-mux of RGMII/MDIO pins should be performed before calling any driver APIs. By default Board_Init() API supports all initialization sequence for TI supported EVMs.Refer jjiubj)ri}ri(jXE`Processor SDK RTOS Board Support `__j}ri(UnameX Processor SDK RTOS Board SupportjXindex_board.html#board-supportj]j]j]j]j]ujjij]rij%X Processor SDK RTOS Board Supportriri}ri(jUjjiubajjubj%X for additional details.riri}ri(jX for additional details.jjiubeubjX)ri}ri(jXkOnce the board specific configuration is complete driver API emac_open() can be called to initialize driverrijjij jijj\j}ri(j]j]j]j]j]ujKjhj]rij%XkOnce the board specific configuration is complete driver API emac_open() can be called to initialize driverriri}ri(jjijjiubaubjb)ri}ri(jX **EMAC Configuration Structure**rijjij jijjfj}ri(j]riUemac-configuration-structureriaj]j]j]j]rihaujNjhj]rij|)ri}ri(jjij}ri(j]j]j]j]j]ujjij]rij%XEMAC Configuration Structureriri}ri(jUjjiubajjubaubjX)ri}ri(jXThe emac_soc.c file binds driver with hardware attributes on the board through EMAC_Cfg structure. This structure must be provided to EMAC driver. It must be initialized before the emac_open() function is called.rijjij jijj\j}ri(j]j]j]j]j]ujK jhj]rij%XThe emac_soc.c file binds driver with hardware attributes on the board through EMAC_Cfg structure. This structure must be provided to EMAC driver. It must be initialized before the emac_open() function is called.riri}ri(jjijjiubaubjX)ri}ri(jXFor details about individual fields of this structure, see the Doxygen help by opening PDK_INSTALL_DIR\\packages\\ti\\drv\\emac\\docs\\doxygen\\html\\index.html.jjij jijj\j}ri(j]j]j]j]j]ujK%jhj]rij%XFor details about individual fields of this structure, see the Doxygen help by opening PDK_INSTALL_DIR\packages\ti\drv\emac\docs\doxygen\html\index.html.riri}ri(jXFor details about individual fields of this structure, see the Doxygen help by opening PDK_INSTALL_DIR\\packages\\ti\\drv\\emac\\docs\\doxygen\\html\\index.html.jjiubaubeubeubj)ri}ri(jUjKjjzij jijjj}ri(j]riXapisriaj]j]j]riUid183riaj]ujK*jhj]ri(j)ri}ri(jXAPIsrijjij jijj"j}ri(j]j]j]j]j]ujK*jhj]rij%XAPIsriri}ri(jjijjiubaubjX)ri}ri(jXAPI reference for application:rijjij jijj\j}ri(j]j]j]j]j]ujK,jhj]rij%XAPI reference for application:riri}rj(jjijjiubaubj#)rj}rj(jX!#include jjij jijj&j}rj(j2j3j]j]j]j]j]ujMjhj]rjj%X!#include rjrj}rj(jUjjjubaubjb)rj}r j(jX API Call Flowr jjKjjij jijjfj}r j(j]r jUid184r jaj]j]rjX api-call-flowrjaj]j]ujNjhj]rjj%X API Call Flowrjrj}rj(jj jjjjubaubjX)rj}rj(jXThe below sequence indicates the calling sequence of EMAC driver APIs for a use case of an EMAC example which implements a single Ethernet MAC port. This example call flow is illustrated using port number 0.rjjjij jijj\j}rj(j]j]j]j]j]ujK5jhj]rjj%XThe below sequence indicates the calling sequence of EMAC driver APIs for a use case of an EMAC example which implements a single Ethernet MAC port. This example call flow is illustrated using port number 0.rjrj}rj(jjjjjjubaubj#)rj}rj(jXport_num = 0; Board_initCfg cfg = BOARD_INIT_UART_STDIO | BOARD_INIT_PINMUX_CONFIG | BOARD_INIT_MODULE_CLOCK | BOARD_INIT_ETH_PHY; Board_init(boardCfg); /* Update emac_cfg with SOC specific config required by the driver */ /* Do a socGet, update emac_cfg as required and followed by socSet */ EMAC_socGetInitCfg(port_num, &emac_cfg); ... EMAC_socSetInitCfg(port_num, &emac_cfg); ... /* For UDMA based DMA interface, init the UDMA driver */ retVal = Udma_init(&gUdmaDrvObj, &initPrms); .... /* Populate open_cfg structure with application specific configuration */ retVal = emac_open(port_num, &open_cfg) .... /* Provide RX filter configuration (currently only applicable for C6657 & OMAPL13x SOCs */ retVal = emac_config(port_num, &cfg_info); .... /* For SOCs with CPSW ports, query driver for CPSW statistics */ retVal = emac_get_statistics(port_num, &stats); .... /* For SOCs with ICSSG ports, query driver for ICSSG hardware statistics */ retVal = emac_get_statistics_icssg(port_num, &stats, clear);jjij jijj&j}rj(jj Xcj2j3j]j]j]j!}j]j]ujK:jhj]rjj%Xport_num = 0; Board_initCfg cfg = BOARD_INIT_UART_STDIO | BOARD_INIT_PINMUX_CONFIG | BOARD_INIT_MODULE_CLOCK | BOARD_INIT_ETH_PHY; Board_init(boardCfg); /* Update emac_cfg with SOC specific config required by the driver */ /* Do a socGet, update emac_cfg as required and followed by socSet */ EMAC_socGetInitCfg(port_num, &emac_cfg); ... EMAC_socSetInitCfg(port_num, &emac_cfg); ... /* For UDMA based DMA interface, init the UDMA driver */ retVal = Udma_init(&gUdmaDrvObj, &initPrms); .... /* Populate open_cfg structure with application specific configuration */ retVal = emac_open(port_num, &open_cfg) .... /* Provide RX filter configuration (currently only applicable for C6657 & OMAPL13x SOCs */ retVal = emac_config(port_num, &cfg_info); .... /* For SOCs with CPSW ports, query driver for CPSW statistics */ retVal = emac_get_statistics(port_num, &stats); .... /* For SOCs with ICSSG ports, query driver for ICSSG hardware statistics */ retVal = emac_get_statistics_icssg(port_num, &stats, clear);r jr!j}r"j(jUjjjubaubjX)r#j}r$j(jX?At this point EMAC driver is ready to send and receive packets.r%jjjij jijj\j}r&j(j]j]j]j]j]ujKXjhj]r'jj%X?At this point EMAC driver is ready to send and receive packets.r(jr)j}r*j(jj%jjj#jubaubj#)r+j}r,j(jX/* Provide a context to poll the driver for received packets, showing RTOS use case */ Task_create(app_test_task_poll_pkt, &taskParams, NULL); /* Sample implementation of task context */ app_test_task_pol_pkt(UArg arg0, UArg arg1) { while (1) { /* AM65xx supports optional mode of direct polling of RX queue for packets which can be configured at time of emac_open. This mode of operation does not use interrupts. Note that default mode is via use of interrupts*/ emac_poll_pkt(port_num); } } /* Provide a context to poll the driver for link status, showing RTOS use case */ Task_create(app_test_task_poll_link, &taskParams, NULL); /* Sample implementation of task context */ app_test_task_pol_link(UArg arg0, UArg arg1) { EMAC_LINK_INFO_T linkInfo; do { emac_poll(port_num, &linkInfo); Osal_delay(1000); UART_printf("Link for port %d is DOWN\n", port_num); } while(linkInfo.link_status == EMAC_LINKSTATUS_NOLINK); UART_printf("Link for port %d is UP\n", port_num); } /* Close port and release all resources allocated at time of emac_open */ retVal = emac_close(port_num);jjij jijj&j}r-j(jj Xcj2j3j]j]j]j!}j]j]ujKZjhj]r.jj%X/* Provide a context to poll the driver for received packets, showing RTOS use case */ Task_create(app_test_task_poll_pkt, &taskParams, NULL); /* Sample implementation of task context */ app_test_task_pol_pkt(UArg arg0, UArg arg1) { while (1) { /* AM65xx supports optional mode of direct polling of RX queue for packets which can be configured at time of emac_open. This mode of operation does not use interrupts. Note that default mode is via use of interrupts*/ emac_poll_pkt(port_num); } } /* Provide a context to poll the driver for link status, showing RTOS use case */ Task_create(app_test_task_poll_link, &taskParams, NULL); /* Sample implementation of task context */ app_test_task_pol_link(UArg arg0, UArg arg1) { EMAC_LINK_INFO_T linkInfo; do { emac_poll(port_num, &linkInfo); Osal_delay(1000); UART_printf("Link for port %d is DOWN\n", port_num); } while(linkInfo.link_status == EMAC_LINKSTATUS_NOLINK); UART_printf("Link for port %d is UP\n", port_num); } /* Close port and release all resources allocated at time of emac_open */ retVal = emac_close(port_num);r/jr0j}r1j(jUjj+jubaubj)r2j}r3j(jUjjij jijjj}r4j(j]j]j]j]j]ujK}jhj]r5jj)r6j}r7j(jUjKjj2jj jijjj}r8j(j]j]j]j]j]ujKjhj]ubaubeubj)r9j}r:j(jUjjzij jijjj}r;j(j]j]j]j]rjhaujKjhj]r?j(j)r@j}rAj(jXInterposer Card SupportrBjjj9jj jijj"j}rCj(j]j]j]j]j]ujKjhj]rDjj%XInterposer Card SupportrEjrFj}rGj(jjBjjj@jubaubjX)rHj}rIj(jXInterposer card is an ethernet wiring adapter to let 2 ICSSG subsystems drive 2 ethernet ports with DUAL MAC or SWITCH firmware. So that each direction (TX/RX) can be handled by one pair of PRU cores. The interposer card permits the power of two ICSSG instances to be used on a two port switch or dual EMAC as opposed to the two-port, single ICSSG configuration. The following diagrams show the PRU-ICSSG RGMII TX/RX mapping to the physical ports for Maxwell and then for Maxwell with interposer card configured. Interposer card functionality can be verified by running the icssg-emac DIAG test( Refer `Processor SDK RTOS Board Support `__ for additional details ) or the emac LLD test application (Emac_Icssg_TestApp described below). Note that prior to running these tests on Maxwell with interposer card, please hook up an ethernet cable between PHY0 and PHY1.jj9jj jijj\j}rJj(j]j]j]j]j]ujKjhj]rKj(j%XZInterposer card is an ethernet wiring adapter to let 2 ICSSG subsystems drive 2 ethernet ports with DUAL MAC or SWITCH firmware. So that each direction (TX/RX) can be handled by one pair of PRU cores. The interposer card permits the power of two ICSSG instances to be used on a two port switch or dual EMAC as opposed to the two-port, single ICSSG configuration. The following diagrams show the PRU-ICSSG RGMII TX/RX mapping to the physical ports for Maxwell and then for Maxwell with interposer card configured. Interposer card functionality can be verified by running the icssg-emac DIAG test( Refer rLjrMj}rNj(jXZInterposer card is an ethernet wiring adapter to let 2 ICSSG subsystems drive 2 ethernet ports with DUAL MAC or SWITCH firmware. So that each direction (TX/RX) can be handled by one pair of PRU cores. The interposer card permits the power of two ICSSG instances to be used on a two port switch or dual EMAC as opposed to the two-port, single ICSSG configuration. The following diagrams show the PRU-ICSSG RGMII TX/RX mapping to the physical ports for Maxwell and then for Maxwell with interposer card configured. Interposer card functionality can be verified by running the icssg-emac DIAG test( Refer jjHjubj)rOj}rPj(jXE`Processor SDK RTOS Board Support `__j}rQj(UnameX Processor SDK RTOS Board SupportjXindex_board.html#board-supportj]j]j]j]j]ujjHjj]rRjj%X Processor SDK RTOS Board SupportrSjrTj}rUj(jUjjOjubajjubj%X for additional details ) or the emac LLD test application (Emac_Icssg_TestApp described below). Note that prior to running these tests on Maxwell with interposer card, please hook up an ethernet cable between PHY0 and PHY1.rVjrWj}rXj(jX for additional details ) or the emac LLD test application (Emac_Icssg_TestApp described below). Note that prior to running these tests on Maxwell with interposer card, please hook up an ethernet cable between PHY0 and PHY1.jjHjubeubjb)rYj}rZj(jXInterposer Layoutr[jjj9jj jijjfj}r\j(j]r]jUinterposer-layoutr^jaj]j]j]j]r_jh5aujNjhj]r`jj%XInterposer Layoutrajrbj}rcj(jj[jjjYjubaubj^)rdj}rej(jX$.. Image:: ../images/Interposer.png jj9jj jijjaj}rfj(UuriXrtos/../images/Interposer.pngrgjj]j]j]j]jd}rhjU*jgjsj]ujKjhj]ubeubj)rij}rjj(jUjjzij jijjj}rkj(j]j]j]j]rljUexample-and-test-applicationsrmjaj]rnjhaujKjhj]roj(j)rpj}rqj(jXExample and Test Applicationsrrjjjijj jijj"j}rsj(j]j]j]j]j]ujKjhj]rtjj%XExample and Test Applicationsrujrvj}rwj(jjrjjjpjubaubj)rxj}ryj(jUjjijj jijjj}rzj(j]j]j]j]j]ujNjhj]r{jj)r|j}r}j(jUj}r~j(j]j]j]j]j]UcolsKujjxjj]rj(j)rj}rj(jUj}rj(j]j]j]j]j]UcolwidthKujj|jj]jjubj)rj}rj(jUj}rj(j]j]j]j]j]UcolwidthKujj|jj]jjubj)rj}rj(jUj}rj(j]j]j]j]j]UcolwidthKujj|jj]jjubj)rj}rj(jUj}rj(j]j]j]j]j]UcolwidthKujj|jj]jjubj)rj}rj(jUj}rj(j]j]j]j]j]UcolwidthKujj|jj]jjubj)rj}rj(jUj}rj(j]j]j]j]j]ujj|jj]rjj)rj}rj(jUj}rj(j]j]j]j]j]ujjjj]rj(j)rj}rj(jUj}rj(j]j]j]j]j]ujjjj]rjjX)rj}rj(jXNamerjjjjj jijj\j}rj(j]j]j]j]j]ujKj]rjj%XNamerjrj}rj(jjjjjjubaubajjubj)rj}rj(jUj}rj(j]j]j]j]j]ujjjj]rjjX)rj}rj(jX Descriptionrjjjjj jijj\j}rj(j]j]j]j]j]ujKj]rjj%X Descriptionrjrj}rj(jjjjjjubaubajjubj)rj}rj(jUj}rj(j]j]j]j]j]ujjjj]rjjX)rj}rj(jXExpected Resultsrjjjjj jijj\j}rj(j]j]j]j]j]ujKj]rjj%XExpected Resultsrjrj}rj(jjjjjjubaubajjubj)rj}rj(jUj}rj(j]j]j]j]j]ujjjj]rjjX)rj}rj(jXSOC Suppportedrjjjjj jijj\j}rj(j]j]j]j]j]ujKj]rjj%XSOC Suppportedrjrj}rj(jjjjjjubaubajjubj)rj}rj(jUj}rj(j]j]j]j]j]ujjjj]rjjX)rj}rj(jX Build Typerjjjjj jijj\j}rj(j]j]j]j]j]ujKj]rjj%X Build Typerjrj}rj(jjjjjjubaubajjubejjubajjubj)rj}rj(jUj}rj(j]j]j]j]j]ujj|jj]rj(j)rj}rj(jUj}rj(j]j]j]j]j]ujjjj]rj(j)rj}rj(jUj}rj(j]j]j]j]j]ujjjj]rjjX)rj}rj(jXEMAC_BasicExamplerjjjjj jijj\j}rj(j]j]j]j]j]ujKj]rjj%XEMAC_BasicExamplerjrj}rj(jjjjjjubaubajjubj)rj}rj(jUj}rj(j]j]j]j]j]ujjjj]rj(jX)rj}rj(jXMEMAC Loopback test at CPSW switch interface. Reference example for developersrjjjjj jijj\j}rj(j]j]j]j]j]ujKj]rjj%XMEMAC Loopback test at CPSW switch interface. Reference example for developersrjrj}rj(jjjjjjubaubjX)rj}rj(jXExample demonstrates loopback capability by sending dummy broadcast packet to CPSW switch. Unit test registers receive packet callback routine with LLD to be called for RX packet. Call back routine will extract packet received, perform simple memory comparison against packet sent for integrity check. Unit test will iterate over configured packet count for packet transmission and reception check.rjjjjj jijj\j}rj(j]j]j]j]j]ujKj]rjj%XExample demonstrates loopback capability by sending dummy broadcast packet to CPSW switch. Unit test registers receive packet callback routine with LLD to be called for RX packet. Call back routine will extract packet received, perform simple memory comparison against packet sent for integrity check. Unit test will iterate over configured packet count for packet transmission and reception check.rjrj}rj(jjjjjjubaubejjubj)rj}rj(jUj}rj(j]j]j]j]j]ujjjj]rjjX)rj}rk(jX>Unit Test will print "All tests have passed" via UART console.rkjjjj jijj\j}rk(j]j]j]j]j]ujKj]rkj%X>Unit Test will print "All tests have passed" via UART console.rkrk}rk(jjkjjjubaubajjubj)rk}rk(jUj}r k(j]j]j]j]j]ujjjj]r kjX)r k}r k(jX+AM335x, AM437x, AM572x, AM571x, AM574x, K2Gr kjjkj jijj\j}rk(j]j]j]j]j]ujKj]rkj%X+AM335x, AM437x, AM572x, AM571x, AM574x, K2Grkrk}rk(jj kjj kubaubajjubj)rk}rk(jUj}rk(j]j]j]j]j]ujjjj]rkjX)rk}rk(jX CCS projectrkjjkj jijj\j}rk(j]j]j]j]j]ujKj]rkj%X CCS projectrkrk}rk(jjkjjkubaubajjubejjubj)rk}r k(jUj}r!k(j]j]j]j]j]ujjjj]r"k(j)r#k}r$k(jUj}r%k(j]j]j]j]j]ujjkj]r&kjX)r'k}r(k(jXEMAC_SMP_BasicExampler)kjj#kj jijj\j}r*k(j]j]j]j]j]ujKj]r+kj%XEMAC_SMP_BasicExampler,kr-k}r.k(jj)kjj'kubaubajjubj)r/k}r0k(jUj}r1k(j]j]j]j]j]ujjkj]r2kjX)r3k}r4k(jXMEMAC Loopback test at CPSW switch interface with SMP enabled. (A15 core only)r5kjj/kj jijj\j}r6k(j]j]j]j]j]ujKj]r7kj%XMEMAC Loopback test at CPSW switch interface with SMP enabled. (A15 core only)r8kr9k}r:k(jj5kjj3kubaubajjubj)r;k}rkjX)r?k}r@k(jX>Unit Test will print "All tests have passed" via UART console.rAkjj;kj jijj\j}rBk(j]j]j]j]j]ujKj]rCkj%X>Unit Test will print "All tests have passed" via UART console.rDkrEk}rFk(jjAkjj?kubaubajjubj)rGk}rHk(jUj}rIk(j]j]j]j]j]ujjkj]rJkjX)rKk}rLk(jX AM572x-EVMrMkjjGkj jijj\j}rNk(j]j]j]j]j]ujKj]rOkj%X AM572x-EVMrPkrQk}rRk(jjMkjjKkubaubajjubj)rSk}rTk(jUj}rUk(j]j]j]j]j]ujjkj]rVkjX)rWk}rXk(jX CCS projectrYkjjSkj jijj\j}rZk(j]j]j]j]j]ujKj]r[kj%X CCS projectr\kr]k}r^k(jjYkjjWkubaubajjubejjubj)r_k}r`k(jUj}rak(j]j]j]j]j]ujjjj]rbk(j)rck}rdk(jUj}rek(j]j]j]j]j]ujj_kj]rfkjX)rgk}rhk(jXEMACLoopback_testProj ectrikjjckj jijj\j}rjk(j]j]j]j]j]ujKj]rkkj%XEMACLoopback_testProj ectrlkrmk}rnk(jjikjjgkubaubajjubj)rok}rpk(jUj}rqk(j]j]j]j]j]ujj_kj]rrk(jX)rsk}rtk(jXMEMAC Loopback test at CPSW switch interface. Reference example for developersrukjjokj jijj\j}rvk(j]j]j]j]j]ujKj]rwkj%XMEMAC Loopback test at CPSW switch interface. Reference example for developersrxkryk}rzk(jjukjjskubaubjX)r{k}r|k(jXExample demonstrates loopback capability by sending dummy broadcast packet to CPSW switch. Unit test registers receive packet callback routine with LLD to be called for RX packet. Call back routine will extract packet received, perform simple memory comparison against packet sent for integrity check. Unit test will iterate over configured packet count for packet transmission and reception check.r}kjjokj jijj\j}r~k(j]j]j]j]j]ujKj]rkj%XExample demonstrates loopback capability by sending dummy broadcast packet to CPSW switch. Unit test registers receive packet callback routine with LLD to be called for RX packet. Call back routine will extract packet received, perform simple memory comparison against packet sent for integrity check. Unit test will iterate over configured packet count for packet transmission and reception check.rkrk}rk(jj}kjj{kubaubjX)rk}rk(jXThis example needs to be run on the OMAPL137 and OMAPL138 platforms using external loopback cable. OMAPL137 EVM is having two Ethernet ports. Connect the loopback cable to the port 1 (ENET-P1) while running the loopback example.rkjjokj jijj\j}rk(j]j]j]j]j]ujKj]rkj%XThis example needs to be run on the OMAPL137 and OMAPL138 platforms using external loopback cable. OMAPL137 EVM is having two Ethernet ports. Connect the loopback cable to the port 1 (ENET-P1) while running the loopback example.rkrk}rk(jjkjjkubaubejjubj)rk}rk(jUj}rk(j]j]j]j]j]ujj_kj]rkjX)rk}rk(jXUnit Test will print "Loopback Test completed successfully on core 0" via CCS console for C6657 and on UART serial console for OMAPL13x.rkjjkj jijj\j}rk(j]j]j]j]j]ujKj]rkj%XUnit Test will print "Loopback Test completed successfully on core 0" via CCS console for C6657 and on UART serial console for OMAPL13x.rkrk}rk(jjkjjkubaubajjubj)rk}rk(jUj}rk(j]j]j]j]j]ujj_kj]rkjX)rk}rk(jX!C6657, DRA7xx, OMAPL137, OMAPL138rkjjkj jijj\j}rk(j]j]j]j]j]ujKj]rkj%X!C6657, DRA7xx, OMAPL137, OMAPL138rkrk}rk(jjkjjkubaubajjubj)rk}rk(jUj}rk(j]j]j]j]j]ujj_kj]rkjX)rk}rk(jX CCS projectrkjjkj jijj\j}rk(j]j]j]j]j]ujKj]rkj%X CCS projectrkrk}rk(jjkjjkubaubajjubejjubj)rk}rk(jUj}rk(j]j]j]j]j]ujjjj]rk(j)rk}rk(jUj}rk(j]j]j]j]j]ujjkj]rkjX)rk}rk(jXEMAC_PktInspectionExa mplerkjjkj jijj\j}rk(j]j]j]j]j]ujKj]rkj%XEMAC_PktInspectionExa mplerkrk}rk(jjkjjkubaubajjubj)rk}rk(jUj}rk(j]j]j]j]j]ujjkj]rk(jX)rk}rk(jX\This demonstrates how to write an application to filter Ethernet packets based on IP addressrkjjkj jijj\j}rk(j]j]j]j]j]ujKj]rkj%X\This demonstrates how to write an application to filter Ethernet packets based on IP addressrkrk}rk(jjkjjkubaubjX)rk}rk(jXPrerequisites:rkjjkj jijj\j}rk(j]j]j]j]j]ujKj]rkj%XPrerequisites:rkrk}rk(jjkjjkubaubj)rk}rk(jUj}rk(jX-j]j]j]j]j]ujjkj]rk(j)rk}rk(jXInstall the packETH utility (v 1.8.1) on a Linux PC. The packETH tool is available for Windows as well, but not all features are supportedj}rk(j]j]j]j]j]ujjkj]rkjX)rk}rk(jXInstall the packETH utility (v 1.8.1) on a Linux PC. The packETH tool is available for Windows as well, but not all features are supportedrkjjkj jijj\j}rk(j]j]j]j]j]ujKj]rkj%XInstall the packETH utility (v 1.8.1) on a Linux PC. The packETH tool is available for Windows as well, but not all features are supportedrkrk}rk(jjkjjkubaubajj ubj)rk}rk(jXDownload the test PCAP `files`_ and update the source and dest MAC address of the PC and EVM to be used in the test. The tcprewrite utility can be used to set the new MAC addresses (i.e. tcprewrite --enet-smac=`rkj]j]j]j]j]uj]rkj%Xfilesrkrk}rk(jUjjkubaubeubjX)rk}rk(jXand update the source and dest MAC address of the PC and EVM to be used in the test. The tcprewrite utility can be used to set the new MAC addresses (i.e. tcprewrite --enet-smac= --enet-dmac=r ljjlj jijj j}r l(j]j]j]j]j]ujMj]r lj%X C-address>r lr l}rl(jj ljjlubaubj )rl}rl(jUj}rl(j]j]j]j]j]ujjlj]rljX)rl}rl(jX--enet-dmac= -i ./ip1_test.pcap -o ./ip1_test.pcap) jjkj jijj j}rl(j]j]j]j]j]ujM j]rl(j )rl}r l(jX AC-address>r!ljjlj jijj j}r"l(j]j]j]j]j]ujM j]r#lj%X AC-address>r$lr%l}r&l(jj!ljjlubaubj )r'l}r(l(jUj}r)l(j]j]j]j]j]ujjlj]r*ljX)r+l}r,l(jX&-i ./ip1_test.pcap -o ./ip1_test.pcap)r-ljj'lj jijj\j}r.l(j]j]j]j]j]ujM j]r/lj%X&-i ./ip1_test.pcap -o ./ip1_test.pcap)r0lr1l}r2l(jj-ljj+lubaubajj ubeubejj ubjX)r3l}r4l(jXSteps:r5ljjkj jijj\j}r6l(j]j]j]j]j]ujM j]r7lj%XSteps:r8lr9l}r:l(jj5ljj3lubaubj)r;l}rl(j)r?l}r@l(jX@Launch the packETH utility on the Linux PC with root permissionsj}rAl(j]j]j]j]j]ujj;lj]rBljX)rCl}rDl(jX@Launch the packETH utility on the Linux PC with root permissionsrEljj?lj jijj\j}rFl(j]j]j]j]j]ujMj]rGlj%X@Launch the packETH utility on the Linux PC with root permissionsrHlrIl}rJl(jjEljjClubaubajj ubj)rKl}rLl(jXQGo to the "Gen-S" tab of the packETH utility and select the PCAP files to be usedj}rMl(j]j]j]j]j]ujj;lj]rNljX)rOl}rPl(jXQGo to the "Gen-S" tab of the packETH utility and select the PCAP files to be usedrQljjKlj jijj\j}rRl(j]j]j]j]j]ujMj]rSlj%XQGo to the "Gen-S" tab of the packETH utility and select the PCAP files to be usedrTlrUl}rVl(jjQljjOlubaubajj ubj)rWl}rXl(jXISet the transfer rate for each PCAP file (i.e. 200 Mbit/s and 150 Mbit/s)j}rYl(j]j]j]j]j]ujj;lj]rZljX)r[l}r\l(jXISet the transfer rate for each PCAP file (i.e. 200 Mbit/s and 150 Mbit/s)r]ljjWlj jijj\j}r^l(j]j]j]j]j]ujMj]r_lj%XISet the transfer rate for each PCAP file (i.e. 200 Mbit/s and 150 Mbit/s)r`lral}rbl(jj]ljj[lubaubajj ubj)rcl}rdl(jX+Set the total packets to transfer to 500000j}rel(j]j]j]j]j]ujj;lj]rfljX)rgl}rhl(jX+Set the total packets to transfer to 500000riljjclj jijj\j}rjl(j]j]j]j]j]ujMj]rklj%X+Set the total packets to transfer to 500000rllrml}rnl(jjiljjglubaubajj ubj)rol}rpl(jXDLoad and run the EMAC packet inspection application to the IPU1 corej}rql(j]j]j]j]j]ujj;lj]rrljX)rsl}rtl(jXDLoad and run the EMAC packet inspection application to the IPU1 coreruljjolj jijj\j}rvl(j]j]j]j]j]ujM j]rwlj%XDLoad and run the EMAC packet inspection application to the IPU1 corerxlryl}rzl(jjuljjslubaubajj ubj)r{l}r|l(jX?Hit the "Send" button on the packETH utility to start streamingj}r}l(j]j]j]j]j]ujj;lj]r~ljX)rl}rl(jX?Hit the "Send" button on the packETH utility to start streamingrljj{lj jijj\j}rl(j]j]j]j]j]ujM%j]rlj%X?Hit the "Send" button on the packETH utility to start streamingrlrl}rl(jjljjlubaubajj ubj)rl}rl(jX0The packet streaming should last for few secondsj}rl(j]j]j]j]j]ujj;lj]rljX)rl}rl(jX0The packet streaming should last for few secondsrljjlj jijj\j}rl(j]j]j]j]j]ujM)j]rlj%X0The packet streaming should last for few secondsrlrl}rl(jjljjlubaubajj ubejjubejjubj)rl}rl(jUj}rl(j]j]j]j]j]ujjkj]rl(jX)rl}rl(jXPass criteria:rljjlj jijj\j}rl(j]j]j]j]j]ujKj]rlj%XPass criteria:rlrl}rl(jjljjlubaubj)rl}rl(jUj}rl(jX-j]j]j]j]j]ujjlj]rl(j)rl}rl(jXThe total packet sent for each stream is shown at the bottom of the packETH widow. The packet stream statistics must match the packet statistics printed by the DUT via serial portj}rl(j]j]j]j]j]ujjlj]rl(jX)rl}rl(jXCThe total packet sent for each stream is shown at the bottom of therljjlj jijj\j}rl(j]j]j]j]j]ujKj]rlj%XCThe total packet sent for each stream is shown at the bottom of therlrl}rl(jjljjlubaubjX)rl}rl(jXopackETH widow. The packet stream statistics must match the packet statistics printed by the DUT via serial portrljjlj jijj\j}rl(j]j]j]j]j]ujKj]rlj%XopackETH widow. The packet stream statistics must match the packet statistics printed by the DUT via serial portrlrl}rl(jjljjlubaubejj ubj)rl}rl(jXThe packet inspection utility periodically prints the EMAC statistics, which include DMA overruns, underruns and other error. No errors should be seen during the transfer. j}rl(j]j]j]j]j]ujjlj]rljX)rl}rl(jXThe packet inspection utility periodically prints the EMAC statistics, which include DMA overruns, underruns and other error. No errors should be seen during the transfer.rljjlj jijj\j}rl(j]j]j]j]j]ujKj]rlj%XThe packet inspection utility periodically prints the EMAC statistics, which include DMA overruns, underruns and other error. No errors should be seen during the transfer.rlrl}rl(jjljjlubaubajj ubejjubjX)rl}rl(jXFail criteria:rljjlj jijj\j}rl(j]j]j]j]j]ujMj]rlj%XFail criteria:rlrl}rl(jjljjlubaubj)rl}rl(jUj}rl(jX-j]j]j]j]j]ujjlj]rl(j)rl}rl(jXTPacket count mismatch between packETH utility and counters from the IPU1 applicationj}rl(j]j]j]j]j]ujjlj]rljX)rl}rl(jXTPacket count mismatch between packETH utility and counters from the IPU1 applicationrljjlj jijj\j}rl(j]j]j]j]j]ujMj]rlj%XTPacket count mismatch between packETH utility and counters from the IPU1 applicationrlrl}rl(jjljjlubaubajj ubj)rl}rl(jXRAny EMAC errors reported by the IPU1 application j}rl(j]j]j]j]j]ujjlj]rljX)rl}rl(jX0Any EMAC errors reported by the IPU1 applicationrljjlj jijj\j}rl(j]j]j]j]j]ujMj]rlj%X0Any EMAC errors reported by the IPU1 applicationrlrl}rl(jjljjlubaubajj ubejjubejjubj)rl}rl(jUj}rl(j]j]j]j]j]ujjkj]rljX)rl}rl(jXDRA7xxrljjlj jijj\j}rl(j]j]j]j]j]ujKj]rlj%XDRA7xxrlrl}rl(jjljjlubaubajjubj)rl}rl(jUj}rl(j]j]j]j]j]ujjkj]rljX)rl}rl(jX CCS projectrljjlj jijj\j}rl(j]j]j]j]j]ujKj]rlj%X CCS projectrlrl}rl(jjljjlubaubajjubejjubj)rl}rm(jUj}rm(j]j]j]j]j]ujjjj]rm(j)rm}rm(jUj}rm(j]j]j]j]j]ujjlj]rmjX)rm}rm(jXEmac_Cpsw_TestAppr mjjmj jijj\j}r m(j]j]j]j]j]ujM.j]r mj%XEmac_Cpsw_TestAppr mr m}rm(jj mjjmubaubajjubj)rm}rm(jUj}rm(j]j]j]j]j]ujjlj]rm(jX)rm}rm(jXQEMAC Loopback test at CPSW switch interface. Reference application for developersrmjjmj jijj\j}rm(j]j]j]j]j]ujM.j]rmj%XQEMAC Loopback test at CPSW switch interface. Reference application for developersrmrm}rm(jjmjjmubaubjX)rm}rm(jXTestApp demonstrates loopback capability by sending packets to CPSW switch. Unit test registers receive packet callback routine with LLD to be called for RX packet. Call back routine will extract packet received, perform simple memory comparison against packet sent for integrity check. Unit test will iterate over configured packet count for packet transmission and reception check.rmjjmj jijj\j}rm(j]j]j]j]j]ujM4j]rmj%XTestApp demonstrates loopback capability by sending packets to CPSW switch. Unit test registers receive packet callback routine with LLD to be called for RX packet. Call back routine will extract packet received, perform simple memory comparison against packet sent for integrity check. Unit test will iterate over configured packet count for packet transmission and reception check.r mr!m}r"m(jjmjjmubaubejjubj)r#m}r$m(jUj}r%m(j]j]j]j]j]ujjlj]r&mjX)r'm}r(m(jX>Unit Test will print "All tests have passed" via UART console.r)mjj#mj jijj\j}r*m(j]j]j]j]j]ujM.j]r+mj%X>Unit Test will print "All tests have passed" via UART console.r,mr-m}r.m(jj)mjj'mubaubajjubj)r/m}r0m(jUj}r1m(j]j]j]j]j]ujjlj]r2mjX)r3m}r4m(jX AM65xx, J721Er5mjj/mj jijj\j}r6m(j]j]j]j]j]ujM.j]r7mj%X AM65xx, J721Er8mr9m}r:m(jj5mjj3mubaubajjubj)r;m}rmjX)r?m}r@m(jXmakefilerAmjj;mj jijj\j}rBm(j]j]j]j]j]ujM.j]rCmj%XmakefilerDmrEm}rFm(jjAmjj?mubaubajjubejjubj)rGm}rHm(jUj}rIm(j]j]j]j]j]ujjjj]rJm(j)rKm}rLm(jUj}rMm(j]j]j]j]j]ujjGmj]rNmjX)rOm}rPm(jXEmac_Cpsw_SMP_TestApprQmjjKmj jijj\j}rRm(j]j]j]j]j]ujMIj]rSmj%XEmac_Cpsw_SMP_TestApprTmrUm}rVm(jjQmjjOmubaubajjubj)rWm}rXm(jUj}rYm(j]j]j]j]j]ujjGmj]rZmjX)r[m}r\m(jXLEMAC Loopback test at CPSW switch interface with SMP enabled (A53 core only)r]mjjWmj jijj\j}r^m(j]j]j]j]j]ujMIj]r_mj%XLEMAC Loopback test at CPSW switch interface with SMP enabled (A53 core only)r`mram}rbm(jj]mjj[mubaubajjubj)rcm}rdm(jUj}rem(j]j]j]j]j]ujjGmj]rfmjX)rgm}rhm(jX>Unit Test will print "All tests have passed" via UART console.rimjjcmj jijj\j}rjm(j]j]j]j]j]ujMIj]rkmj%X>Unit Test will print "All tests have passed" via UART console.rlmrmm}rnm(jjimjjgmubaubajjubj)rom}rpm(jUj}rqm(j]j]j]j]j]ujjGmj]rrmjX)rsm}rtm(jXAM65xxrumjjomj jijj\j}rvm(j]j]j]j]j]ujMIj]rwmj%XAM65xxrxmrym}rzm(jjumjjsmubaubajjubj)r{m}r|m(jUj}r}m(j]j]j]j]j]ujjGmj]r~mjX)rm}rm(jXmakefilermjj{mj jijj\j}rm(j]j]j]j]j]ujMIj]rmj%Xmakefilermrm}rm(jjmjjmubaubajjubejjubj)rm}rm(jUj}rm(j]j]j]j]j]ujjjj]rm(j)rm}rm(jUj}rm(j]j]j]j]j]ujjmj]rmjX)rm}rm(jXEmac_Icssg_TestApprmjjmj jijj\j}rm(j]j]j]j]j]ujMPj]rmj%XEmac_Icssg_TestApprmrm}rm(jjmjjmubaubajjubj)rm}rm(jUj}rm(j]j]j]j]j]ujjmj]rm(jX)rm}rm(jXOEMAC port 2 port test between ICSSG ports. Reference application for developersrmjjmj jijj\j}rm(j]j]j]j]j]ujMPj]rmj%XOEMAC port 2 port test between ICSSG ports. Reference application for developersrmrm}rm(jjmjjmubaubjX)rm}rm(jX[Prior to running this test, please connect the ICSSG ports as follows with ethernet cables:rmjjmj jijj\j}rm(j]j]j]j]j]ujMUj]rmj%X[Prior to running this test, please connect the ICSSG ports as follows with ethernet cables:rmrm}rm(jjmjjmubaubjX)rm}rm(jX PHY0 to PHY1rmjjmj jijj\j}rm(j]j]j]j]j]ujM[j]rmj%X PHY0 to PHY1rmrm}rm(jjmjjmubaubjX)rm}rm(jX PHY2 to PHY3rmjjmj jijj\j}rm(j]j]j]j]j]ujM]j]rmj%X PHY2 to PHY3rmrm}rm(jjmjjmubaubjX)rm}rm(jX PHY4 to PHY5rmjjmj jijj\j}rm(j]j]j]j]j]ujM_j]rmj%X PHY4 to PHY5rmrm}rm(jjmjjmubaubjX)rm}rm(jXTest app demonstrates packet TX/RX between 2 ICSSG ports. All 6 ICSSG ports will be tested for am65xx-idk. PRU2 ports will be tested for am65xx-evm. Unit test registers receive packet callback routine with LLD to be called for RX packet. Call back routine will extract packet received, perform simple memory comparison against packet sent for integrity check. Unit test will iterate over configured packet count for packet transmission and reception check.rmjjmj jijj\j}rm(j]j]j]j]j]ujMaj]rmj%XTest app demonstrates packet TX/RX between 2 ICSSG ports. All 6 ICSSG ports will be tested for am65xx-idk. PRU2 ports will be tested for am65xx-evm. Unit test registers receive packet callback routine with LLD to be called for RX packet. Call back routine will extract packet received, perform simple memory comparison against packet sent for integrity check. Unit test will iterate over configured packet count for packet transmission and reception check.rmrm}rm(jjmjjmubaubejjubj)rm}rm(jUj}rm(j]j]j]j]j]ujjmj]rmjX)rm}rm(jX=Unit Test will print "All tests have passed" via UART consolermjjmj jijj\j}rm(j]j]j]j]j]ujMPj]rmj%X=Unit Test will print "All tests have passed" via UART consolermrm}rm(jjmjjmubaubajjubj)rm}rm(jUj}rm(j]j]j]j]j]ujjmj]rmjX)rm}rm(jXAM65xxrmjjmj jijj\j}rm(j]j]j]j]j]ujMPj]rmj%XAM65xxrmrm}rm(jjmjjmubaubajjubj)rm}rm(jUj}rm(j]j]j]j]j]ujjmj]rmjX)rm}rm(jXmakefilermjjmj jijj\j}rm(j]j]j]j]j]ujMPj]rmj%Xmakefilermrm}rm(jjmjjmubaubajjubejjubj)rm}rm(jUj}rm(j]j]j]j]j]ujjjj]rm(j)rm}rm(jUj}rm(j]j]j]j]j]ujjmj]rmjX)rm}rm(jXEmac_Icssg_Switch_TestApprmjjmj jijj\j}rm(j]j]j]j]j]ujMyj]rmj%XEmac_Icssg_Switch_TestApprmrm}rm(jjmjjmubaubajjubj)rm}rn(jUj}rn(j]j]j]j]j]ujjmj]rn(jX)rn}rn(jXQSwitch port 2 port test between ICSSG ports. Reference application for developersrnjjmj jijj\j}rn(j]j]j]j]j]ujMyj]rnj%XQSwitch port 2 port test between ICSSG ports. Reference application for developersrnr n}r n(jjnjjnubaubjX)r n}r n(jX[Prior to running this test, please connect the ICSSG ports as follows with ethernet cables:r njjmj jijj\j}rn(j]j]j]j]j]ujMj]rnj%X[Prior to running this test, please connect the ICSSG ports as follows with ethernet cables:rnrn}rn(jj njj nubaubjX)rn}rn(jX PHY0 to PHY1rnjjmj jijj\j}rn(j]j]j]j]j]ujMj]rnj%X PHY0 to PHY1rnrn}rn(jjnjjnubaubjX)rn}rn(jXtTest app demonstrates packet TX/RX between 2 ICSSG Switch ports. Unit test registers receive packet callback routine with LLD to be called for RX packet. Call back routine will extract packet received, perform simple memory comparison against packet sent for integrity check. Unit test will iterate over configured packet count for packet transmission and reception check.rnjjmj jijj\j}rn(j]j]j]j]j]ujMj]rnj%XtTest app demonstrates packet TX/RX between 2 ICSSG Switch ports. Unit test registers receive packet callback routine with LLD to be called for RX packet. Call back routine will extract packet received, perform simple memory comparison against packet sent for integrity check. Unit test will iterate over configured packet count for packet transmission and reception check.r nr!n}r"n(jjnjjnubaubejjubj)r#n}r$n(jUj}r%n(j]j]j]j]j]ujjmj]r&n(jX)r'n}r(n(jXUnit Test will print "All testsr)njj#nj jijj\j}r*n(j]j]j]j]j]ujMyj]r+nj%XUnit Test will print "All testsr,nr-n}r.n(jj)njj'nubaubjX)r/n}r0n(jXhave passed" via UART consoler1njj#nj jijj\j}r2n(j]j]j]j]j]ujM|j]r3nj%Xhave passed" via UART consoler4nr5n}r6n(jj1njj/nubaubejjubj)r7n}r8n(jUj}r9n(j]j]j]j]j]ujjmj]r:njX)r;n}rn(j]j]j]j]j]ujMyj]r?nj%XAM65xxr@nrAn}rBn(jj=njj;nubaubajjubj)rCn}rDn(jUj}rEn(j]j]j]j]j]ujjmj]rFnjX)rGn}rHn(jXmakefilerInjjCnj jijj\j}rJn(j]j]j]j]j]ujMyj]rKnj%XmakefilerLnrMn}rNn(jjInjjGnubaubajjubejjubejjubejjubaubeubj)rOn}rPn(jUjKjjzij jijjj}rQn(j]rRnj0aj]j]j]rSnUid185rTnaj]ujMjhj]rUn(j)rVn}rWn(jXSupport for Benchmark TestingrXnjjOnj jijj"j}rYn(j]j]j]j]j]ujMjhj]rZnj%XSupport for Benchmark Testingr[nr\n}r]n(jjXnjjVnubaubj)r^n}r_n(jUjjOnj jijjj}r`n(j]j]j]j]j]ujNjhj]ranj)rbn}rcn(jUj}rdn(j]j]j]j]j]UcolsKujj^nj]ren(j)rfn}rgn(jUj}rhn(j]j]j]j]j]UcolwidthKujjbnj]jjubj)rin}rjn(jUj}rkn(j]j]j]j]j]UcolwidthKujjbnj]jjubj)rln}rmn(jUj}rnn(j]j]j]j]j]UcolwidthKujjbnj]jjubj)ron}rpn(jUj}rqn(j]j]j]j]j]UcolwidthKujjbnj]jjubj)rrn}rsn(jUj}rtn(j]j]j]j]j]UcolwidthKujjbnj]jjubj)run}rvn(jUj}rwn(j]j]j]j]j]ujjbnj]rxnj)ryn}rzn(jUj}r{n(j]j]j]j]j]ujjunj]r|n(j)r}n}r~n(jUj}rn(j]j]j]j]j]ujjynj]rnjX)rn}rn(jXNamernjj}nj jijj\j}rn(j]j]j]j]j]ujMj]rnj%XNamernrn}rn(jjnjjnubaubajjubj)rn}rn(jUj}rn(j]j]j]j]j]ujjynj]rnjX)rn}rn(jX Descriptionrnjjnj jijj\j}rn(j]j]j]j]j]ujMj]rnj%X Descriptionrnrn}rn(jjnjjnubaubajjubj)rn}rn(jUj}rn(j]j]j]j]j]ujjynj]rnjX)rn}rn(jXExpected Resultsrnjjnj jijj\j}rn(j]j]j]j]j]ujMj]rnj%XExpected Resultsrnrn}rn(jjnjjnubaubajjubj)rn}rn(jUj}rn(j]j]j]j]j]ujjynj]rnjX)rn}rn(jXSOC Suppportedrnjjnj jijj\j}rn(j]j]j]j]j]ujMj]rnj%XSOC Suppportedrnrn}rn(jjnjjnubaubajjubj)rn}rn(jUj}rn(j]j]j]j]j]ujjynj]rnjX)rn}rn(jX Build Typernjjnj jijj\j}rn(j]j]j]j]j]ujMj]rnj%X Build Typernrn}rn(jjnjjnubaubajjubejjubajjubj)rn}rn(jUj}rn(j]j]j]j]j]ujjbnj]rn(j)rn}rn(jUj}rn(j]j]j]j]j]ujjnj]rn(j)rn}rn(jUj}rn(j]j]j]j]j]ujjnj]rnjX)rn}rn(jXEmac_Icssg_TestApprnjjnj jijj\j}rn(j]j]j]j]j]ujMj]rnj%XEmac_Icssg_TestApprnrn}rn(jjnjjnubaubajjubj)rn}rn(jUj}rn(j]j]j]j]j]ujjnj]rn(jX)rn}rn(jXITest application with modifications can used for performance benchmarkingrnjjnj jijj\j}rn(j]j]j]j]j]ujMj]rnj%XITest application with modifications can used for performance benchmarkingrnrn}rn(jjnjjnubaubjX)rn}rn(jXIn order to run the test application in benchamrk mode you need to update ti/drv/emac/test/ EmacLoopbackTest/ test_loc.h to enable EMAC_BENCHMARK macrornjjnj jijj\j}rn(j]j]j]j]j]ujMj]rnj%XIn order to run the test application in benchamrk mode you need to update ti/drv/emac/test/ EmacLoopbackTest/ test_loc.h to enable EMAC_BENCHMARK macrornrn}rn(jjnjjnubaubjX)rn}rn(jX*Connect external packet generator to PHY4.rnjjnj jijj\j}rn(j]j]j]j]j]ujMj]rnj%X*Connect external packet generator to PHY4.rnrn}rn(jjnjjnubaubjX)rn}rn(jXThe unit test will poll the RX packet channel/ring for the port being testing and will loop the packet back to the external traffic generator with "no touch" to the packetrnjjnj jijj\j}rn(j]j]j]j]j]ujMj]rnj%XThe unit test will poll the RX packet channel/ring for the port being testing and will loop the packet back to the external traffic generator with "no touch" to the packetrnrn}rn(jjnjjnubaubejjubj)rn}rn(jUj}rn(j]j]j]j]j]ujjnj]rn(jX)rn}rn(jXOTest applicaiton will print "polling rx packets on port 4" via the UART consolernjjnj jijj\j}rn(j]j]j]j]j]ujMj]rnj%XOTest applicaiton will print "polling rx packets on port 4" via the UART consolernrn}rn(jjnjjnubaubjX)rn}rn(jXUEvery 60 seconds, a sub-set of hardware statistics will be displayed via UART consolernjjnj jijj\j}ro(j]j]j]j]j]ujMj]roj%XUEvery 60 seconds, a sub-set of hardware statistics will be displayed via UART consoleroro}ro(jjnjjnubaubejjubj)ro}ro(jUj}ro(j]j]j]j]j]ujjnj]rojX)r o}r o(jXam65xxr ojjoj jijj\j}r o(j]j]j]j]j]ujMj]r oj%Xam65xxroro}ro(jj ojj oubaubajjubj)ro}ro(jUj}ro(j]j]j]j]j]ujjnj]rojX)ro}ro(jXmakerojjoj jijj\j}ro(j]j]j]j]j]ujMj]roj%Xmakeroro}ro(jjojjoubaubajjubejjubj)ro}ro(jUj}ro(j]j]j]j]j]ujjnj]r o(j)r!o}r"o(jUj}r#o(j]j]j]j]j]ujjoj]r$ojX)r%o}r&o(jXEmac_Cpsw_TestAppr'ojj!oj jijj\j}r(o(j]j]j]j]j]ujMj]r)oj%XEmac_Cpsw_TestAppr*or+o}r,o(jj'ojj%oubaubajjubj)r-o}r.o(jUj}r/o(j]j]j]j]j]ujjoj]r0o(jX)r1o}r2o(jXITest application with modifications can used for performance benchmarkingr3ojj-oj jijj\j}r4o(j]j]j]j]j]ujMj]r5oj%XITest application with modifications can used for performance benchmarkingr6or7o}r8o(jj3ojj1oubaubjX)r9o}r:o(jXIn order to run the test application in benchamrk mode you need to update ti/drv/emac/test/ EmacLoopbackTest/ test_loc.h to enable EMAC_BENCHMARK macror;ojj-oj jijj\j}ror?o}r@o(jj;ojj9oubaubjX)rAo}rBo(jX=To benchmark ICSSG connect external packet generator to PHY4.rCojj-oj jijj\j}rDo(j]j]j]j]j]ujMj]rEoj%X=To benchmark ICSSG connect external packet generator to PHY4.rForGo}rHo(jjCojjAoubaubjX)rIo}rJo(jX@To benchmark CPSW connect external packet generator to CPSW portrKojj-oj jijj\j}rLo(j]j]j]j]j]ujMj]rMoj%X@To benchmark CPSW connect external packet generator to CPSW portrNorOo}rPo(jjKojjIoubaubjX)rQo}rRo(jXThe unit test will poll the RX packet channel/ring for the port being testing and will loop the packet back to the external traffic generator with "no touch" to the packetrSojj-oj jijj\j}rTo(j]j]j]j]j]ujMj]rUoj%XThe unit test will poll the RX packet channel/ring for the port being testing and will loop the packet back to the external traffic generator with "no touch" to the packetrVorWo}rXo(jjSojjQoubaubejjubj)rYo}rZo(jUj}r[o(j]j]j]j]j]ujjoj]r\o(jX)r]o}r^o(jXOTest application will print "polling rx packets on port 6" via the UART consoler_ojjYoj jijj\j}r`o(j]j]j]j]j]ujMj]raoj%XOTest application will print "polling rx packets on port 6" via the UART consolerborco}rdo(jj_ojj]oubaubjX)reo}rfo(jXUEvery 60 seconds, a sub-set of hardware statistics will be displayed via UART consolergojjYoj jijj\j}rho(j]j]j]j]j]ujMj]rioj%XUEvery 60 seconds, a sub-set of hardware statistics will be displayed via UART consolerjorko}rlo(jjgojjeoubaubejjubj)rmo}rno(jUj}roo(j]j]j]j]j]ujjoj]rpojX)rqo}rro(jXam65xxrsojjmoj jijj\j}rto(j]j]j]j]j]ujMj]ruoj%Xam65xxrvorwo}rxo(jjsojjqoubaubajjubj)ryo}rzo(jUj}r{o(j]j]j]j]j]ujjoj]r|ojX)r}o}r~o(jXmakerojjyoj jijj\j}ro(j]j]j]j]j]ujMj]roj%Xmakeroro}ro(jjojj}oubaubajjubejjubejjubejjubaubeubj)ro}ro(jUjjzij jijjj}ro(j]j]j]j]roU-building-emac-test-applications-via-makefilesroaj]rohaujMjhj]ro(j)ro}ro(jX-Building EMAC Test applications via makefilesrojjoj jijj"j}ro(j]j]j]j]j]ujMjhj]roj%X-Building EMAC Test applications via makefilesroro}ro(jjojjoubaubj)ro}ro(jUjjoj jijjj}ro(jX-j]j]j]j]j]ujMjhj]ro(j)ro}ro(jXYEMAC Test applications and dependent libraries are built from the top level emac makefilejjoj jijj j}ro(j]j]j]j]j]ujNjhj]rojX)ro}ro(jXYEMAC Test applications and dependent libraries are built from the top level emac makefilerojjoj jijj\j}ro(j]j]j]j]j]ujMj]roj%XYEMAC Test applications and dependent libraries are built from the top level emac makefileroro}ro(jjojjoubaubaubj)ro}ro(jX8Refer to the `Processor SDK RTOS Getting Started Guide `__ for details of how to setup the build environment. Once you have setup the build environment, issue the following commands: - cd /packages/ - To build: make emac - To clean: make emac_clean jjoj jijj j}ro(j]j]j]j]j]ujNjhj]ro(jX)ro}ro(jXRefer to the `Processor SDK RTOS Getting Started Guide `__ for details of how to setup the build environment. Once you have setup the build environment, issue the following commands:jjoj jijj\j}ro(j]j]j]j]j]ujMj]ro(j%X Refer to the roro}ro(jX Refer to the jjoubj)ro}ro(jXT`Processor SDK RTOS Getting Started Guide `__j}ro(UnameX(Processor SDK RTOS Getting Started GuidejX%index_overview.html#setup-environmentj]j]j]j]j]ujjoj]roj%X(Processor SDK RTOS Getting Started Guideroro}ro(jUjjoubajjubj%X} for details of how to setup the build environment. Once you have setup the build environment, issue the following commands:roro}ro(jX} for details of how to setup the build environment. Once you have setup the build environment, issue the following commands:jjoubeubj )ro}ro(jUj}ro(j]j]j]j]j]ujjoj]roj)ro}ro(jUj}ro(jX-j]j]j]j]j]ujjoj]ro(j)ro}ro(jXcd /packages/roj}ro(j]j]j]j]j]ujjoj]rojX)ro}ro(jjojjoj jijj\j}ro(j]j]j]j]j]ujMj]roj%Xcd /packages/roro}ro(jjojjoubaubajj ubj)ro}ro(jXTo build: make emacroj}ro(j]j]j]j]j]ujjoj]rojX)ro}ro(jjojjoj jijj\j}ro(j]j]j]j]j]ujMj]roj%XTo build: make emacroro}ro(jjojjoubaubajj ubj)ro}ro(jXTo clean: make emac_clean j}ro(j]j]j]j]j]ujjoj]rojX)ro}ro(jXTo clean: make emac_cleanrojjoj jijj\j}ro(j]j]j]j]j]ujMj]roj%XTo clean: make emac_cleanroro}ro(jjojjoubaubajj ubejjubajj ubeubj)ro}ro(jXSimilarly, to build at the module level, issue the following commands for rebuilding : - cd /packages/ti/drv/emac - To build: make all - To clean: make clean jjoj jijj j}ro(j]j]j]j]j]ujNjhj]ro(jX)ro}ro(jXVSimilarly, to build at the module level, issue the following commands for rebuilding :rojjoj jijj\j}ro(j]j]j]j]j]ujMj]roj%XVSimilarly, to build at the module level, issue the following commands for rebuilding :roro}ro(jjojjoubaubj )ro}ro(jUj}ro(j]j]j]j]j]ujjoj]roj)ro}ro(jUj}ro(jX-j]j]j]j]j]ujjoj]ro(j)ro}ro(jXcd /packages/ti/drv/emacroj}ro(j]j]j]j]j]ujjoj]rojX)ro}ro(jjojjoj jijj\j}rp(j]j]j]j]j]ujMj]rpj%Xcd /packages/ti/drv/emacrprp}rp(jjojjoubaubajj ubj)rp}rp(jXTo build: make allrpj}rp(j]j]j]j]j]ujjoj]r pjX)r p}r p(jjpjjpj jijj\j}r p(j]j]j]j]j]ujMj]r pj%XTo build: make allrprp}rp(jjpjj pubaubajj ubj)rp}rp(jXTo clean: make clean j}rp(j]j]j]j]j]ujjoj]rpjX)rp}rp(jXTo clean: make cleanrpjjpj jijj\j}rp(j]j]j]j]j]ujMj]rpj%XTo clean: make cleanrprp}rp(jjpjjpubaubajj ubejjubajj ubeubeubeubj)rp}rp(jUjjzij jijjj}rp(j]j]j]j]r pU+running-emac-examples-and-test-applicationsr!paj]r"phaujMjhj]r#p(j)r$p}r%p(jX+Running EMAC Examples and Test applicationsr&pjjpj jijj"j}r'p(j]j]j]j]j]ujMjhj]r(pj%X+Running EMAC Examples and Test applicationsr)pr*p}r+p(jj&pjj$pubaubjb)r,p}r-p(jX *Description*r.pjKjjpj jijjfj}r/p(j]r0pU descriptionr1paj]j]r2pX descriptionr3paj]j]ujNjhj]r4pj<)r5p}r6p(jj.pj}r7p(j]j]j]j]j]ujj,pj]r8pj%X Descriptionr9pr:p}r;p(jUjj5pubajjDubaubjX)rpjjpj jijj\j}r?p(j]j]j]j]j]ujMjhj]r@pj%XCEMAC Test applications demonstrates the key features of the driver.rAprBp}rCp(jj>pjj`__jjpj jijj\j}rp(j]j]j]j]j]ujMjhj]rp(j%XEMAC Test applications can also be run via SBL. To run via SBL, please following the instructions as specified in the following link: rprp}rp(jXEMAC Test applications can also be run via SBL. To run via SBL, please following the instructions as specified in the following link: jjpubj)rp}rp(jX`SBL User Guide `__j}rp(UnameXSBL User GuidejXhttp://software-dl.ti.com/processor-sdk-rtos/esd/docs/latest/rtos/index_Foundational_Components.html#am655x-compiling-apps-for-sblj]j]j]j]j]ujjpj]rpj%XSBL User Guiderprp}rp(jUjjpubajjubeubj)rp}rp(jX+.. _files: :download:`<../images/Pcap.zip>`jKjjpj jijjj}rp(jjkj]rpUfilesrpaj]j]j]j]rphaujMtjhj]ubeubj)rp}rp(jUjKjjzij jijjj}rp(j]rpXadditional referencesrpaj]j]j]rpUid186rpaj]ujMjhj]rp(j)rp}rp(jXAdditional Referencesrpjjpj jijj"j}rp(j]j]j]j]j]ujMjhj]rpj%XAdditional Referencesrprp}rp(jjpjjpubaubj)rp}rp(jUjjpj jijjj}rp(j]j]j]j]j]ujNjhj]rpj)rp}rp(jUj}rp(j]j]j]j]j]UcolsKujjpj]rp(j)rp}rp(jUj}rp(j]j]j]j]j]UcolwidthK#ujjpj]jjubj)rp}rp(jUj}rp(j]j]j]j]j]UcolwidthK)ujjpj]jjubj)rp}rp(jUj}rp(j]j]j]j]j]ujjpj]rp(j)rp}rp(jUj}rp(j]j]j]j]j]ujjpj]rp(j)rp}rp(jUj}rp(j]j]j]j]j]ujjpj]rpjX)rp}rp(jX **Document**rpjjpj jijj\j}rp(j]j]j]j]j]ujMj]rpj|)rp}rp(jjpj}rp(j]j]j]j]j]ujjpj]rpj%XDocumentrprp}rp(jUjjpubajjubaubajjubj)rp}rp(jUj}rp(j]j]j]j]j]ujjpj]rpjX)rp}rp(jX **Location**rpjjpj jijj\j}rp(j]j]j]j]j]ujMj]rpj|)rp}rp(jjpj}rp(j]j]j]j]j]ujjpj]rqj%XLocationrqrq}rq(jUjjpubajjubaubajjubejjubj)rq}rq(jUj}rq(j]j]j]j]j]ujjpj]rq(j)rq}r q(jUj}r q(j]j]j]j]j]ujjqj]r qjX)r q}r q(jXAPI Reference Manualrqjjqj jijj\j}rq(j]j]j]j]j]ujMj]rqj%XAPI Reference Manualrqrq}rq(jjqjj qubaubajjubj)rq}rq(jUj}rq(j]j]j]j]j]ujjqj]rqjX)rq}rq(jXQ$(TI_PDK_INSTALL_DIR)\\packages\\ti \\drv\\emac\\docs\\doxygen\\html\\index .htmljjqj jijj\j}rq(j]j]j]j]j]ujMj]rqj%XI$(TI_PDK_INSTALL_DIR)\packages\ti \drv\emac\docs\doxygen\html\index .htmlrqrq}rq(jXQ$(TI_PDK_INSTALL_DIR)\\packages\\ti \\drv\\emac\\docs\\doxygen\\html\\index .htmljjqubaubajjubejjubj)rq}r q(jUj}r!q(j]j]j]j]j]ujjpj]r"q(j)r#q}r$q(jUj}r%q(j]j]j]j]j]ujjqj]r&qjX)r'q}r(q(jX Release Notesr)qjj#qj jijj\j}r*q(j]j]j]j]j]ujM j]r+qj%X Release Notesr,qr-q}r.q(jj)qjj'qubaubajjubj)r/q}r0q(jUj}r1q(j]j]j]j]j]ujjqj]r2qjX)r3q}r4q(jXQ$(TI_PDK_INSTALL_DIR)\\packages\\ti \\drv\\emac\\docs\\ReleaseNotes_EMAC_ LLD.pdfjj/qj jijj\j}r5q(j]j]j]j]j]ujM j]r6qj%XK$(TI_PDK_INSTALL_DIR)\packages\ti \drv\emac\docs\ReleaseNotes_EMAC_ LLD.pdfr7qr8q}r9q(jXQ$(TI_PDK_INSTALL_DIR)\\packages\\ti \\drv\\emac\\docs\\ReleaseNotes_EMAC_ LLD.pdfjj3qubaubajjubejjubj)r:q}r;q(jUj}rq}r?q(jUj}r@q(j]j]j]j]j]ujj:qj]rAqjX)rBq}rCq(jXSoftware DesignrDqjj>qj jijj\j}rEq(j]j]j]j]j]ujM$j]rFqj%XSoftware DesignrGqrHq}rIq(jjDqjjBqubaubajjubj)rJq}rKq(jUj}rLq(j]j]j]j]j]ujj:qj]rMqjX)rNq}rOq(jXF$(TI_PDK_INSTALL_DIR)\\packages\\ti \\drv\\emac\\docs\\EMAC_LLD_SD.pdfjjJqj jijj\j}rPq(j]j]j]j]j]ujM$j]rQqj%X@$(TI_PDK_INSTALL_DIR)\packages\ti \drv\emac\docs\EMAC_LLD_SD.pdfrRqrSq}rTq(jXF$(TI_PDK_INSTALL_DIR)\\packages\\ti \\drv\\emac\\docs\\EMAC_LLD_SD.pdfjjNqubaubajjubejjubejjubejjubaubeubeubj jijjj}rUq(j]rVqX introductionrWqaj]j]j]rXqUid180rYqaj]ujKjhj]rZq(j)r[q}r\q(jX Introductionr]qjjxij jijj"j}r^q(j]j]j]j]j]ujKjhj]r_qj%X Introductionr`qraq}rbq(jj]qjj[qubaubjX)rcq}rdq(jXiEMAC driver provides a well defined API layer which allows applications to use the EMAC peripheral to control the flow of packet data from the processor to the PHY and the MDIO module to control PHY configuration and status monitoring. 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EMAC driver is a common driver for supporting all 1 Gigabit Network interfaces including CPSW and ICSSG for applicable SOC's.rhqriq}rjq(jjeqjjcqubaubeubj jijj?j}rkq(j]UlevelKj]j]rlqjYqaUsourcejij]j]UlineKUtypejAujKjhj]rmqjX)rnq}roq(jX/Duplicate implicit target name: "introduction".j}rpq(j]j]j]j]j]ujjvij]rqqj%X/Duplicate implicit target name: "introduction".rrqrsq}rtq(jUjjnqubajj\ubaubh)ruq}rvq(jUjjij jijj?j}rwq(j]UlevelKj]j]rxqjiaUsourcejij]j]UlineKUtypejAujKjhj]ryqjX)rzq}r{q(jX7Duplicate implicit target name: "driver configuration".j}r|q(j]j]j]j]j]ujjuqj]r}qj%X7Duplicate implicit target name: "driver configuration".r~qrq}rq(jUjjzqubajj\ubaubh)rq}rq(jUjjij jijj?j}rq(j]UlevelKj]j]rqjiaUsourcejij]j]UlineKUtypejAujKjhj]rqjX)rq}rq(jX?Duplicate implicit target name: "board specific configuration".j}rq(j]j]j]j]j]ujjqj]rqj%X?Duplicate implicit target name: "board specific configuration".rqrq}rq(jUjjqubajj\ubaubh)rq}rq(jUjjij jijj?j}rq(j]UlevelKj]j]rqjiaUsourcejij]j]UlineK*UtypejAujK*jhj]rqjX)rq}rq(jX'Duplicate implicit target name: "apis".j}rq(j]j]j]j]j]ujjqj]rqj%X'Duplicate implicit target name: "apis".rqrq}rq(jUjjqubajj\ubaubh)rq}rq(jUj}rq(j]UlevelKj]j]rqj jaUsourcej j]j]UlineKUtypejXujjjj]rqjX)rq}rq(jX0Duplicate explicit target name: "api-call-flow".j}rq(j]j]j]j]j]ujjqj]rqj%X0Duplicate explicit target name: "api-call-flow".rqrq}rq(jUjjqubajj\ubajj?ubh)rq}rq(jUj}rq(j]UlevelKj]j]Usourcejij]j]UlineMUtypejXujjkj]rqjX)rq}rq(jX;Bullet list ends without a blank line; unexpected unindent.j}rq(j]j]j]j]j]ujjqj]rqj%X;Bullet list ends without a blank line; unexpected unindent.rqrq}rq(jUjjqubajj\ubajj?ubh)rq}rq(jUjjOnj jijj?j}rq(j]UlevelKj]j]rqjTnaUsourcejij]j]UlineMUtypejAujMjhj]rqjX)rq}rq(jX@Duplicate implicit target name: "support for benchmark testing".j}rq(j]j]j]j]j]ujjqj]rqj%X@Duplicate implicit target name: "support for benchmark testing".rqrq}rq(jUjjqubajj\ubaubh)rq}rq(jUj}rq(j]UlevelKj]j]Usourcejij]j]UlineMUtypejujjoj]rqjX)rq}rq(jXUnexpected indentation.j}rq(j]j]j]j]j]ujjqj]rqj%XUnexpected indentation.rqrq}rq(jUjjqubajj\ubajj?ubh)rq}rq(jUjjpj jijj?j}rq(j]UlevelKj]j]rqjpaUsourcejij]j]UlineMUtypejAujMjhj]rqjX)rq}rq(jX8Duplicate implicit target name: "additional references".j}rq(j]j]j]j]j]ujjqj]rqj%X8Duplicate implicit target name: "additional references".rqrq}rq(jUjjqubajj\ubaubh)rq}rq(jUjjpj XTinternal padding after source/rtos/PDK_Platform_Software/Device_Drivers/EMAC.rst.incrqjj?j}rq(j]UlevelKj]j]Usourcejij]j]UlineM)UtypejujM*jhj]rq(jX)rq}rq(jX;Content block expected for the "raw" directive; none found.j}rq(j]j]j]j]j]ujjqj]rqj%X;Content block expected for the "raw" directive; none found.rqrq}rq(jUjjqubajj\ubj#)rq}rq(jX.. raw:: html j}rq(j2j3j]j]j]j]j]ujjqj]rqj%X.. raw:: html rqrq}rq(jUjjqubajj&ubeubh)rq}rq(jUjj)rq}rq(jUjKjj)rq}rq(jUjhj j jjj}rq(j]j]j]j]rqUmcasprqaj]rqhEaujKjhj]rq(j)rq}rq(jXMCASPrqjjqj j jj"j}rq(j]j]j]j]j]ujKjhj]rqj%XMCASPrqrq}rq(jjqjjqubaubj))rq}rq(jX@http://processors.wiki.ti.com/index.php/Processor_SDK_RTOS_MCASPjjqj j,X>source/rtos/PDK_Platform_Software/Device_Drivers/MCASP.rst.incrqrq}rqbjj0j}rq(j2j3j]j]j]j]j]ujKjhj]rqj%X@http://processors.wiki.ti.com/index.php/Processor_SDK_RTOS_MCASPrrrr}rr(jUjjqubaubjqj)rr}rr(jUjKjjqj jqjjj}rr(j]rrXuser interfacerraj]j]j]rrUid189r raj]ujKjhj]r r(j)r r}r r(jXUser Interfacer rjjrj jqjj"j}rr(j]j]j]j]j]ujKjhj]rrj%XUser Interfacerrrr}rr(jj rjj rubaubj)rr}rr(jUjKjjrj jqjjj}rr(j]rrXdriver configurationrraj]j]j]rrUid190rraj]ujKjhj]rr(j)rr}rr(jXDriver Configurationrrjjrj jqjj"j}rr(j]j]j]j]j]ujKjhj]rrj%XDriver Configurationr rr!r}r"r(jjrjjrubaubjX)r#r}r$r(jXThe McASP driver provides a sample implementation sequence which initializes the MCASP IP block. The McASP Device initialization API is implemented as a sample prototype:r%rjjrj jqjj\j}r&r(j]j]j]j]j]ujK!jhj]r'rj%XThe McASP driver provides a sample implementation sequence which initializes the MCASP IP block. The McASP Device initialization API is implemented as a sample prototype:r(rr)r}r*r(jj%rjj#rubaubj#)r+r}r,r(jXvoid McaspDevice_init (void)jjrj jqjj&j}r-r(j2j3j]j]j]j]j]ujMjhj]r.rj%Xvoid McaspDevice_init (void)r/rr0r}r1r(jUjj+rubaubjX)r2r}r3r(jXThe function initializes all the instance specific information like base address of instance CFG registers, FIFO address for the instance, TX and RX CPU event numbers, TX and RX EDMA event numbers etc.r4rjjrj jqjj\j}r5r(j]j]j]j]j]ujK)jhj]r6rj%XThe function initializes all the instance specific information like base address of instance CFG registers, FIFO address for the instance, TX and RX CPU event numbers, TX and RX EDMA event numbers etc.r7rr8r}r9r(jj4rjj2rubaubjX)r:r}r;r(jXFor details about individual fields of this structure, see the Doxygen help by opening PDK_INSTALL_DIR\Packages\ti\drv\mcasp\docs\doxygen\html\index.html.jjrj jqjj\j}rrr?r}r@r(jXFor details about individual fields of this structure, see the Doxygen help by opening PDK_INSTALL_DIR\Packages\ti\drv\mcasp\docs\doxygen\html\index.html.jj:rubaubj#)rAr}rBr(jX>int32_t Mcasp_socGetInitCfg(uint32_t index, Mcasp_HwInfo *cfg)jjrj jqjj&j}rCr(j2j3j]j]j]j]j]ujMjhj]rDrj%X>int32_t Mcasp_socGetInitCfg(uint32_t index, Mcasp_HwInfo *cfg)rErrFr}rGr(jUjjArubaubjX)rHr}rIr(jXrThe function obtains the soc configuration parameters such as interrupt numbers, mux configuration parameters etc.rJrjjrj jqjj\j}rKr(j]j]j]j]j]ujK5jhj]rLrj%XrThe function obtains the soc configuration parameters such as interrupt numbers, mux configuration parameters etc.rMrrNr}rOr(jjJrjjHrubaubj#)rPr}rQr(jXDint32_t Mcasp_socSetInitCfg(uint32_t index, const Mcasp_HwInfo *cfg)jjrj jqjj&j}rRr(j2j3j]j]j]j]j]ujMjhj]rSrj%XDint32_t Mcasp_socSetInitCfg(uint32_t index, const Mcasp_HwInfo *cfg)rTrrUr}rVr(jUjjPrubaubjX)rWr}rXr(jXnThe function set the soc configuration parameters such as interrupt numbers, mux configuration parameters etc.rYrjjrj jqjj\j}rZr(j]j]j]j]j]ujK #include jj_rj jqjj&j}ryr(j2j3j]j]j]j]j]ujMjhj]rzrj%XK#include #include r{rr|r}r}r(jUjjwrubaubjb)r~r}rr(jXMcASP Buffer formatsrrjj_rj jqjjfj}rr(j]rrUmcasp-buffer-formatsrraj]j]j]j]rrhaujNjhj]rrj%XMcASP Buffer formatsrrrr}rr(jjrjj~rubaubjX)rr}rr(jXThe McASP driver provides various buffer formats for sending the data to/from the audio device. The differences between these formats arise from the way the audio samples are collected from various serializers and their timeslots and arranged in the system's memory. This way the application can choose to run audio processing algorithms over the data without the need for re-arranging those data every frame. The buffer format is provided in the **Mcasp_ChanParams.dataFormat** in the form of **Mcasp_BufferFormat** defined in mcasp_drv.h The below section provides an overview of the various formats. In the explanatory diagrams in each section, McASP controller recieves samples in frame intervals denoted by t1,t2..tn. The McASP driver collects these and arranges those samples in the memory in various formats in to the host's System memory. We have chosen 32 bit samples and 32-bit word addresses throughout for simplicity.jj_rj jqjj\j}rr(j]j]j]j]j]ujKLjhj]rr(j%XThe McASP driver provides various buffer formats for sending the data to/from the audio device. The differences between these formats arise from the way the audio samples are collected from various serializers and their timeslots and arranged in the system's memory. This way the application can choose to run audio processing algorithms over the data without the need for re-arranging those data every frame. The buffer format is provided in the rrrr}rr(jXThe McASP driver provides various buffer formats for sending the data to/from the audio device. The differences between these formats arise from the way the audio samples are collected from various serializers and their timeslots and arranged in the system's memory. This way the application can choose to run audio processing algorithms over the data without the need for re-arranging those data every frame. The buffer format is provided in the jjrubj|)rr}rr(jX**Mcasp_ChanParams.dataFormat**j}rr(j]j]j]j]j]ujjrj]rrj%XMcasp_ChanParams.dataFormatrrrr}rr(jUjjrubajjubj%X in the form of rrrr}rr(jX in the form of jjrubj|)rr}rr(jX**Mcasp_BufferFormat**j}rr(j]j]j]j]j]ujjrj]rrj%XMcasp_BufferFormatrrrr}rr(jUjjrubajjubj%X defined in mcasp_drv.h The below section provides an overview of the various formats. In the explanatory diagrams in each section, McASP controller recieves samples in frame intervals denoted by t1,t2..tn. The McASP driver collects these and arranges those samples in the memory in various formats in to the host's System memory. We have chosen 32 bit samples and 32-bit word addresses throughout for simplicity.rrrr}rr(jX defined in mcasp_drv.h The below section provides an overview of the various formats. In the explanatory diagrams in each section, McASP controller recieves samples in frame intervals denoted by t1,t2..tn. The McASP driver collects these and arranges those samples in the memory in various formats in to the host's System memory. We have chosen 32 bit samples and 32-bit word addresses throughout for simplicity.jjrubeubjb)rr}rr(jXMcasp_BufferFormat_1SER_1SLOTrrjj_rj jqjjfj}rr(j]rrUmcasp-bufferformat-1ser-1slotrraj]j]j]j]rrhaujNjhj]rrj%XMcasp_BufferFormat_1SER_1SLOTrrrr}rr(jjrjjrubaubjX)rr}rr(jXThis is applicable if only one serializer and one timeslot is used. The samples are ordered in the order they received or sent.rrjj_rj jqjj\j}rr(j]j]j]j]j]ujK^jhj]rrj%XThis is applicable if only one serializer and one timeslot is used. The samples are ordered in the order they received or sent.rrrr}rr(jjrjjrubaubj^)rr}rr(jX$.. Image:: ../images/1SLOT_1SER.PNG jj_rj jqjjaj}rr(UuriXrtos/../images/1SLOT_1SER.PNGrrj]j]j]j]jd}rrU*jrsj]ujKbjhj]ubjb)rr}rr(jX-Mcasp_BufferFormat_1SER_MULTISLOT_INTERLEAVEDrrjj_rj jqjjfj}rr(j]rrU-mcasp-bufferformat-1ser-multislot-interleavedrraj]j]j]j]rrh@aujNjhj]rrj%X-Mcasp_BufferFormat_1SER_MULTISLOT_INTERLEAVEDrrrr}rr(jjrjjrubaubjX)rr}rr(jX'This is applicable if multiple slots are used with one serializer. The samples from the different timeslots are stored interleaved in the memory as below. Different timeslots' samples are denoted by different colors and are labelled t1,t2..tn according to the time they arrive at the serializer.rrjj_rj jqjj\j}rr(j]j]j]j]j]ujKfjhj]rrj%X'This is applicable if multiple slots are used with one serializer. The samples from the different timeslots are stored interleaved in the memory as below. Different timeslots' samples are denoted by different colors and are labelled t1,t2..tn according to the time they arrive at the serializer.rrrr}rr(jjrjjrubaubj^)rr}rr(jX4.. Image:: ../images/1SER_MULTISLOT_INTERLEAVED.PNG jj_rj jqjjaj}rr(UuriX-rtos/../images/1SER_MULTISLOT_INTERLEAVED.PNGrrj]j]j]j]jd}rrU*jrsj]ujKmjhj]ubjb)rr}rr(jX1Mcasp_BufferFormat_1SER_MULTISLOT_NON_INTERLEAVEDrrjj_rj jqjjfj}rr(j]rrU1mcasp-bufferformat-1ser-multislot-non-interleavedrraj]j]j]j]rrhnaujNjhj]rrj%X1Mcasp_BufferFormat_1SER_MULTISLOT_NON_INTERLEAVEDrrrr}rr(jjrjjrubaubjX)rr}rr(jXSThis is applicable if multiple slots are used with one serializer. The samples from the different timeslots are grouped together on the basis of the timeslot and stored in the memory as shown below. Different timeslots' samples are denoted by different colors and are labelled t1,t2..tn according to the time they arrive at the serializer.rrjj_rj jqjj\j}rr(j]j]j]j]j]ujKqjhj]rrj%XSThis is applicable if multiple slots are used with one serializer. The samples from the different timeslots are grouped together on the basis of the timeslot and stored in the memory as shown below. Different timeslots' samples are denoted by different colors and are labelled t1,t2..tn according to the time they arrive at the serializer.rrrr}rr(jjrjjrubaubj^)rr}rr(jX8.. Image:: ../images/1SER_MULTISLOT_NON_INTERLEAVED.PNG jj_rj jqjjaj}rr(UuriX1rtos/../images/1SER_MULTISLOT_NON_INTERLEAVED.PNGrrj]j]j]j]jd}rrU*jrsj]ujKxjhj]ubjX)rr}rr(jXiNOTE: if the non-interleaved format is used, the Mcasp_ChanParams-> hwFifoEventDMARatio must be set to 1.rrjj_rj jqjj\j}rr(j]j]j]j]j]ujKyjhj]rrj%XiNOTE: if the non-interleaved format is used, the Mcasp_ChanParams-> hwFifoEventDMARatio must be set to 1.rrrr}rr(jjrjjrubaubjb)rr}rr(jX1Mcasp_BufferFormat_MULTISER_1SLOT_SER_INTERLEAVEDrrjj_rj jqjjfj}rr(j]rrU1mcasp-bufferformat-multiser-1slot-ser-interleavedrraj]j]j]j]rrhaujNjhj]rrj%X1Mcasp_BufferFormat_MULTISER_1SLOT_SER_INTERLEAVEDrrrr}rr(jjrjjrubaubjX)rr}rs(jXdThis is applicable if multiple serializers are used with one time slot is used for each of the serializers. The samples from the different serializers are stored in the memory in interleaved fashion as shown below Different serializers' samples are denoted by different colors and are labelled S1,S2..Sn according to the time they arrive at the serializer.rsjj_rj jqjj\j}rs(j]j]j]j]j]ujKjhj]rsj%XdThis is applicable if multiple serializers are used with one time slot is used for each of the serializers. The samples from the different serializers are stored in the memory in interleaved fashion as shown below Different serializers' samples are denoted by different colors and are labelled S1,S2..Sn according to the time they arrive at the serializer.rsrs}rs(jjsjjrubaubj^)rs}rs(jX?.. Image:: ../images/1SER_MULTISER_1SLOT_SER_INTERLEAVED_2.PNG jj_rj jqjjaj}r s(UuriX8rtos/../images/1SER_MULTISER_1SLOT_SER_INTERLEAVED_2.PNGr sj]j]j]j]jd}r sU*j ssj]ujKjhj]ubj)r s}r s(jUjj_rj jqjjj}rs(j]j]j]j]j]ujKjhj]rsj)rs}rs(jUjKjj sj jqjjj}rs(j]j]j]j]j]ujKjhj]ubaubjb)rs}rs(jX5Mcasp_BufferFormat_MULTISER_1SLOT_SER_NON_INTERLEAVEDrsjj_rj jqjjfj}rs(j]rsU5mcasp-bufferformat-multiser-1slot-ser-non-interleavedrsaj]j]j]j]rshaujNjhj]rsj%X5Mcasp_BufferFormat_MULTISER_1SLOT_SER_NON_INTERLEAVEDrsrs}rs(jjsjjsubaubjX)rs}rs(jXoThis is applicable if multiple serializers are used with one timeslots each per serializer. The samples from the different timeslots are grouped together on the basis of the serializer and stored in the memory as shown below Different serializers' samples are denoted by different colors and are labelled S1,S2..Sn according to the time they arrive at the serializer.r sjj_rj jqjj\j}r!s(j]j]j]j]j]ujKjhj]r"sj%XoThis is applicable if multiple serializers are used with one timeslots each per serializer. The samples from the different timeslots are grouped together on the basis of the serializer and stored in the memory as shown below Different serializers' samples are denoted by different colors and are labelled S1,S2..Sn according to the time they arrive at the serializer.r#sr$s}r%s(jj sjjsubaubj^)r&s}r's(jXA.. Image:: ../images/1SER_MULTISER_1SLOT_SER_NON_INTERLEAVED.PNG jj_rj jqjjaj}r(s(UuriX:rtos/../images/1SER_MULTISER_1SLOT_SER_NON_INTERLEAVED.PNGr)sj]j]j]j]jd}r*sU*j)ssj]ujKjhj]ubjb)r+s}r,s(jX8Mcasp_BufferFormat_MULTISER_MULTISLOT_SEMI_INTERLEAVED_1r-sjj_rj jqjjfj}r.s(j]r/sU8mcasp-bufferformat-multiser-multislot-semi-interleaved-1r0saj]j]j]j]r1shaujNjhj]r2sj%X8Mcasp_BufferFormat_MULTISER_MULTISLOT_SEMI_INTERLEAVED_1r3sr4s}r5s(jj-sjj+subaubjX)r6s}r7s(jXThis is applicable if multiple serializers are used and each serializer containing multiple timeslots. The samples are stored in the memory interleaved based on serializer and timeslots as shown below. In this example, there are 3 serializers and 2 timeslots per serializers whose samples are noted by Ln (left) and Rn (right). Different serializers' samples are denoted by different colors.r8sjj_rj jqjj\j}r9s(j]j]j]j]j]ujKjhj]r:sj%XThis is applicable if multiple serializers are used and each serializer containing multiple timeslots. The samples are stored in the memory interleaved based on serializer and timeslots as shown below. In this example, there are 3 serializers and 2 timeslots per serializers whose samples are noted by Ln (left) and Rn (right). Different serializers' samples are denoted by different colors.r;srs}r?s(jXL.. Image:: ../images/1SER_MULTISER_MULTISLOT_SEMI_INTERLEAVED_1_UPDATED.PNG jj_rj jqjjaj}r@s(UuriXErtos/../images/1SER_MULTISER_MULTISLOT_SEMI_INTERLEAVED_1_UPDATED.PNGrAsj]j]j]j]jd}rBsU*jAssj]ujKjhj]ubjb)rCs}rDs(jX8Mcasp_BufferFormat_MULTISER_MULTISLOT_SEMI_INTERLEAVED_2rEsjj_rj jqjjfj}rFs(j]rGsU8mcasp-bufferformat-multiser-multislot-semi-interleaved-2rHsaj]j]j]j]rIshaujNjhj]rJsj%X8Mcasp_BufferFormat_MULTISER_MULTISLOT_SEMI_INTERLEAVED_2rKsrLs}rMs(jjEsjjCsubaubjX)rNs}rOs(jXThis is applicable if multiple serializers are used and each serializer containing multiple timeslots. The samples are grouped based on the serializer and within one serializer, the timeslots are interleaved as shown below. In this example, there are 3 serializers and 2 timeslots per serializers whose samples are noted by Ln (left) and Rn (right).Different serializers' samples are denoted by different colors.rPsjj_rj jqjj\j}rQs(j]j]j]j]j]ujKjhj]rRsj%XThis is applicable if multiple serializers are used and each serializer containing multiple timeslots. The samples are grouped based on the serializer and within one serializer, the timeslots are interleaved as shown below. In this example, there are 3 serializers and 2 timeslots per serializers whose samples are noted by Ln (left) and Rn (right).Different serializers' samples are denoted by different colors.rSsrTs}rUs(jjPsjjNsubaubj^)rVs}rWs(jXD.. Image:: ../images/1SER_MULTISER_MULTISLOT_SEMI_INTERLEAVED_2.PNG jj_rj jqjjaj}rXs(UuriX=rtos/../images/1SER_MULTISER_MULTISLOT_SEMI_INTERLEAVED_2.PNGrYsj]j]j]j]jd}rZsU*jYssj]ujKjhj]ubjX)r[s}r\s(jXiNOTE: if the non-interleaved format is used, the Mcasp_ChanParams-> hwFifoEventDMARatio must be set to 1.r]sjj_rj jqjj\j}r^s(j]j]j]j]j]ujKjhj]r_sj%XiNOTE: if the non-interleaved format is used, the Mcasp_ChanParams-> hwFifoEventDMARatio must be set to 1.r`sras}rbs(jj]sjj[subaubjb)rcs}rds(jXMcasp WordBits Selectionresjj_rj jqjjfj}rfs(j]rgsUmcasp-wordbits-selectionrhsaj]j]j]j]rishaujNjhj]rjsj%XMcasp WordBits Selectionrksrls}rms(jjesjjcsubaubjX)rns}ros(jXPWith all the frame formats explained above, there is an option to choose which bits to pack from the 32-bit serializer data obtained from/to the McASP serializer, when the word size is less than the slot size. This option is exercised by setting the Mcasp_chanParams->wordBitsSelect to Mcasp_wordBitsSelect_LSB/Mcasp_wordBitsSelect_MSB.rpsjj_rj jqjj\j}rqs(j]j]j]j]j]ujKjhj]rrsj%XPWith all the frame formats explained above, there is an option to choose which bits to pack from the 32-bit serializer data obtained from/to the McASP serializer, when the word size is less than the slot size. This option is exercised by setting the Mcasp_chanParams->wordBitsSelect to Mcasp_wordBitsSelect_LSB/Mcasp_wordBitsSelect_MSB.rssrts}rus(jjpsjjnsubaubjX)rvs}rws(jXhIf the default Mcasp_wordBitsSelect_LSB option is selected, the LSBs are packed in to the system memory.rxsjj_rj jqjj\j}rys(j]j]j]j]j]ujKjhj]rzsj%XhIf the default Mcasp_wordBitsSelect_LSB option is selected, the LSBs are packed in to the system memory.r{sr|s}r}s(jjxsjjvsubaubjX)r~s}rs(jXBelow is an example of word size = 16bits and slot size = 32 bits and the Mcasp_wordBitsSelect_LSB option is used. On the receiving side, the serializer holds the 32 bit data whose LSB 16 bits are picked up and packed in to the system memory. The MSB 16 bits are ignored.rsjj_rj jqjj\j}rs(j]j]j]j]j]ujKjhj]rsj%XBelow is an example of word size = 16bits and slot size = 32 bits and the Mcasp_wordBitsSelect_LSB option is used. On the receiving side, the serializer holds the 32 bit data whose LSB 16 bits are picked up and packed in to the system memory. The MSB 16 bits are ignored.rsrs}rs(jjsjj~subaubj^)rs}rs(jX(.. Image:: ../images/WordSelect_LSB.PNG jj_rj jqjjaj}rs(UuriX!rtos/../images/WordSelect_LSB.PNGrsj]j]j]j]jd}rsU*jssj]ujKjhj]ubjX)rs}rs(jXIf the Mcasp_wordBitsSelect_MSB option is used, the serializer's MSB-16bits are packed in to the system memory. The LSBs are ignored.rsjj_rj jqjj\j}rs(j]j]j]j]j]ujKjhj]rsj%XIf the Mcasp_wordBitsSelect_MSB option is used, the serializer's MSB-16bits are packed in to the system memory. The LSBs are ignored.rsrs}rs(jjsjjsubaubj^)rs}rs(jX(.. Image:: ../images/WordSelect_MSB.PNG jj_rj jqjjaj}rs(UuriX!rtos/../images/WordSelect_MSB.PNGrsj]j]j]j]jd}rsU*jssj]ujKjhj]ubjb)rs}rs(jXPrimingrsjj_rj jqjjfj}rs(j]rsUprimingrsaj]j]j]j]rshaujNjhj]rsj%XPrimingrsrs}rs(jjsjjsubaubjX)rs}rs(jXApplications using McASP driver often might send/receive one or two transfers via McASP before sending the application data in/out of McASP through the driver. This would internally set up transfer request queues so that the application can seamlessly send/receive data without the possibility of underrun. This process, a.k.a priming is used in the example application provided with the Processor SDK. In this example two frames are sent/received prior to submitting the application's audio data to the McASP driver. The number of transfer requests to prime is application dependent and some applications where there may be a lot of delay between transfer requests, enough to cause an underrun, the priming factor could be higher.rsjj_rj jqjj\j}rs(j]j]j]j]j]ujKjhj]rsj%XApplications using McASP driver often might send/receive one or two transfers via McASP before sending the application data in/out of McASP through the driver. This would internally set up transfer request queues so that the application can seamlessly send/receive data without the possibility of underrun. This process, a.k.a priming is used in the example application provided with the Processor SDK. In this example two frames are sent/received prior to submitting the application's audio data to the McASP driver. The number of transfer requests to prime is application dependent and some applications where there may be a lot of delay between transfer requests, enough to cause an underrun, the priming factor could be higher.rsrs}rs(jjsjjsubaubeubeubj)rs}rs(jUjKjjqj jqjjj}rs(j]rsX applicationrsaj]j]j]rsUid192rsaj]ujKjhj]rs(j)rs}rs(jX Applicationrsjjsj jqjj"j}rs(j]j]j]j]j]ujKjhj]rsj%X Applicationrsrs}rs(jjsjjsubaubj)rs}rs(jUjKjjsj jqjjj}rs(j]rsjDaj]j]j]rsUid193rsaj]ujKjhj]rs(j)rs}rs(jXExamples & Unit testsrsjjsj jqjj"j}rs(j]j]j]j]j]ujKjhj]rsj%XExamples & Unit testsrsrs}rs(jjsjjsubaubj)rs}rs(jUjjsj jqjjj}rs(j]j]j]j]j]ujNjhj]rsj)rs}rs(jUj}rs(j]j]j]j]j]UcolsKujjsj]rs(j)rs}rs(jUj}rs(j]j]j]j]j]UcolwidthK$ujjsj]jjubj)rs}rs(jUj}rs(j]j]j]j]j]UcolwidthKujjsj]jjubj)rs}rs(jUj}rs(j]j]j]j]j]UcolwidthKujjsj]jjubj)rs}rs(jUj}rs(j]j]j]j]j]UcolwidthK ujjsj]jjubj)rs}rs(jUj}rs(j]j]j]j]j]UcolwidthK ujjsj]jjubj)rs}rs(jUj}rs(j]j]j]j]j]ujjsj]rsj)rs}rs(jUj}rs(j]j]j]j]j]ujjsj]rs(j)rs}rs(jUj}rs(j]j]j]j]j]ujjsj]rsjX)rs}rs(jXNamersjjsj jqjj\j}rs(j]j]j]j]j]ujKj]rsj%XNamersrs}rs(jjsjjsubaubajjubj)rs}rs(jUj}rs(j]j]j]j]j]ujjsj]rsj)rs}rs(jUj}rs(j]j]j]j]j]ujjsj]rsj)rs}rs(jX DescriptionrsjKjjsj jqjjj}rt(j]j]j]j]j]ujKj]rtj%X Descriptionrtrt}rt(jjsjjsubaubajjubajjubj)rt}rt(jUj}rt(j]j]j]j]j]ujjsj]rtj)r t}r t(jUj}r t(j]j]j]j]j]ujjtj]r tj)r t}rt(jXExpected ResultsrtjKjj tj jqjjj}rt(j]j]j]j]j]ujKj]rtj%XExpected Resultsrtrt}rt(jjtjj tubaubajjubajjubj)rt}rt(jUj}rt(j]j]j]j]j]ujjsj]rtjX)rt}rt(jXSOCsrtjjtj jqjj\j}rt(j]j]j]j]j]ujKj]rtj%XSOCsrtrt}r t(jjtjjtubaubajjubj)r!t}r"t(jUj}r#t(j]j]j]j]j]ujjsj]r$tjX)r%t}r&t(jX Build typer'tjj!tj jqjj\j}r(t(j]j]j]j]j]ujKj]r)tj%X Build typer*tr+t}r,t(jj'tjj%tubaubajjubejjubajjubj)r-t}r.t(jUj}r/t(j]j]j]j]j]ujjsj]r0t(j)r1t}r2t(jUj}r3t(j]j]j]j]j]ujj-tj]r4t(j)r5t}r6t(jUj}r7t(j]j]j]j]j]ujj1tj]r8tjX)r9t}r:t(jXAudio_ExampleProjectr;tjj5tj jqjj\j}rtr?t}r@t(jj;tjj9tubaubajjubj)rAt}rBt(jUj}rCt(j]j]j]j]j]ujj1tj]rDtj)rEt}rFt(jUj}rGt(j]j]j]j]j]ujjAtj]rHtj)rIt}rJt(jX_Example demonstrating sample McASP loopback using AIC31 codec. Reference example for developersrKtjKjjEtj jqjjj}rLt(j]j]j]j]j]ujKj]rMtj%X_Example demonstrating sample McASP loopback using AIC31 codec. Reference example for developersrNtrOt}rPt(jjKtjjItubaubajjubajjubj)rQt}rRt(jUj}rSt(j]j]j]j]j]ujj1tj]rTtj)rUt}rVt(jUj}rWt(j]j]j]j]j]ujjQtj]rXtj)rYt}rZt(jXJAudio sent in to the EVM being played out via the stereo output of the EVMr[tjKjjUtj jqjjj}r\t(j]j]j]j]j]ujKj]r]tj%XJAudio sent in to the EVM being played out via the stereo output of the EVMr^tr_t}r`t(jj[tjjYtubaubajjubajjubj)rat}rbt(jUj}rct(j]j]j]j]j]ujj1tj]rdtjX)ret}rft(jX*AM335X AM437x AM572x K2G OMAPL137 OMAPL138rgtjjatj jqjj\j}rht(j]j]j]j]j]ujKj]ritj%X*AM335X AM437x AM572x K2G OMAPL137 OMAPL138rjtrkt}rlt(jjgtjjetubaubajjubj)rmt}rnt(jUj}rot(j]j]j]j]j]ujj1tj]rptjX)rqt}rrt(jX CCS Projectrstjjmtj jqjj\j}rtt(j]j]j]j]j]ujKj]rutj%X CCS Projectrvtrwt}rxt(jjstjjqtubaubajjubejjubj)ryt}rzt(jUj}r{t(j]j]j]j]j]ujj-tj]r|t(j)r}t}r~t(jUj}rt(j]j]j]j]j]ujjytj]rtjX)rt}rt(jXAudio_SMP_ExampleProjectrtjj}tj jqjj\j}rt(j]j]j]j]j]ujKj]rtj%XAudio_SMP_ExampleProjectrtrt}rt(jjtjjtubaubajjubj)rt}rt(jUj}rt(j]j]j]j]j]ujjytj]rtj)rt}rt(jUj}rt(j]j]j]j]j]ujjtj]rtj)rt}rt(jXExample demonstrating sample McASP loopback using AIC31 codec. Reference example for developers with SMP enabled.(A15 core only)rtjKjjtj jqjjj}rt(j]j]j]j]j]ujKj]rtj%XExample demonstrating sample McASP loopback using AIC31 codec. Reference example for developers with SMP enabled.(A15 core only)rtrt}rt(jjtjjtubaubajjubajjubj)rt}rt(jUj}rt(j]j]j]j]j]ujjytj]rtj)rt}rt(jUj}rt(j]j]j]j]j]ujjtj]rtj)rt}rt(jXJAudio sent in to the EVM being played out via the stereo output of the EVMrtjKjjtj jqjjj}rt(j]j]j]j]j]ujKj]rtj%XJAudio sent in to the EVM being played out via the stereo output of the EVMrtrt}rt(jjtjjtubaubajjubajjubj)rt}rt(jUj}rt(j]j]j]j]j]ujjytj]rtjX)rt}rt(jX AM572x- EVMrtjjtj jqjj\j}rt(j]j]j]j]j]ujKj]rtj%X AM572x- EVMrtrt}rt(jjtjjtubaubajjubj)rt}rt(jUj}rt(j]j]j]j]j]ujjytj]rtjX)rt}rt(jX CCS Projectrtjjtj jqjj\j}rt(j]j]j]j]j]ujKj]rtj%X CCS Projectrtrt}rt(jjtjjtubaubajjubejjubj)rt}rt(jUj}rt(j]j]j]j]j]ujj-tj]rt(j)rt}rt(jUj}rt(j]j]j]j]j]ujjtj]rtjX)rt}rt(jXDeviceLoopback_ExampleProjectrtjjtj jqjj\j}rt(j]j]j]j]j]ujKj]rtj%XDeviceLoopback_ExampleProjectrtrt}rt(jjtjjtubaubajjubj)rt}rt(jUj}rt(j]j]j]j]j]ujjtj]rtj)rt}rt(jUj}rt(j]j]j]j]j]ujjtj]rtj)rt}rt(jXUExample demonstrating sample McASP device loopback . Reference example for developersrtjKjjtj jqjjj}rt(j]j]j]j]j]ujKj]rtj%XUExample demonstrating sample McASP device loopback . Reference example for developersrtrt}rt(jjtjjtubaubajjubajjubj)rt}rt(jUj}rt(j]j]j]j]j]ujjtj]rtj)rt}rt(jUj}rt(j]j]j]j]j]ujjtj]rtj)rt}rt(jX[Digital ramp pattern sent to McASP and getting looped back internally using device loopbackrtjKjjtj jqjjj}rt(j]j]j]j]j]ujKj]rtj%X[Digital ramp pattern sent to McASP and getting looped back internally using device loopbackrtrt}rt(jjtjjtubaubajjubajjubj)rt}rt(jUj}rt(j]j]j]j]j]ujjtj]rtjX)rt}rt(jX&AM335X AM437x AM571x AM572x AM574x K2Grtjjtj jqjj\j}rt(j]j]j]j]j]ujKj]rtj%X&AM335X AM437x AM571x AM572x AM574x K2Grtrt}rt(jjtjjtubaubajjubj)rt}rt(jUj}rt(j]j]j]j]j]ujjtj]rujX)ru}ru(jX CCS Projectrujjtj jqjj\j}ru(j]j]j]j]j]ujKj]ruj%X CCS Projectruru}ru(jjujjuubaubajjubejjubj)r u}r u(jUj}r u(j]j]j]j]j]ujj-tj]r u(j)r u}ru(jUj}ru(j]j]j]j]j]ujj uj]rujX)ru}ru(jXAudioEQ_ExampleProjectrujj uj jqjj\j}ru(j]j]j]j]j]ujKj]ruj%XAudioEQ_ExampleProjectruru}ru(jjujjuubaubajjubj)ru}ru(jUj}ru(j]j]j]j]j]ujj uj]ruj)ru}ru(jUj}ru(j]j]j]j]j]ujjuj]r uj)r!u}r"u(jX|Example demonstrating stereo audio using biquad filters . Reference design for developers. **TI Design Guide**: `TIDEP0069`_jKjjuj jqjjj}r#u(j]j]j]j]j]ujKj]r$u(j%X[Example demonstrating stereo audio using biquad filters . Reference design for developers. r%ur&u}r'u(jX[Example demonstrating stereo audio using biquad filters . Reference design for developers. jj!uubj|)r(u}r)u(jX**TI Design Guide**j}r*u(j]j]j]j]j]ujj!uj]r+uj%XTI Design Guider,ur-u}r.u(jUjj(uubajjubj%X: r/ur0u}r1u(jX: jj!uubj)r2u}r3u(jX `TIDEP0069`_jqKjj!ujjj}r4u(UnameX TIDEP0069jX,http://www.ti.com/lit/ug/tidubq2/tidubq2.pdfr5uj]j]j]j]j]uj]r6uj%X TIDEP0069r7ur8u}r9u(jUjj2uubaubeubajjubajjubj)r:u}r;u(jUj}ru}r?u(jUj}r@u(j]j]j]j]j]ujj:uj]rAuj)rBu}rCu(jX_Three band Equalization of stereo channel filters with gain control using serial console inputsrDujKjj>uj jqjjj}rEu(j]j]j]j]j]ujKj]rFuj%X_Three band Equalization of stereo channel filters with gain control using serial console inputsrGurHu}rIu(jjDujjBuubaubajjubajjubj)rJu}rKu(jUj}rLu(j]j]j]j]j]ujj uj]rMujX)rNu}rOu(jX AM572x K2GrPujjJuj jqjj\j}rQu(j]j]j]j]j]ujKj]rRuj%X AM572x K2GrSurTu}rUu(jjPujjNuubaubajjubj)rVu}rWu(jUj}rXu(j]j]j]j]j]ujj uj]rYujX)rZu}r[u(jX CCS Projectr\ujjVuj jqjj\j}r]u(j]j]j]j]j]ujKj]r^uj%X CCS Projectr_ur`u}rau(jj\ujjZuubaubajjubejjubj)rbu}rcu(jUj}rdu(j]j]j]j]j]ujj-tj]reu(j)rfu}rgu(jUj}rhu(j]j]j]j]j]ujjbuj]riujX)rju}rku(jXDeviceLoopback_TestApprlujjfuj jqjj\j}rmu(j]j]j]j]j]ujMj]rnuj%XDeviceLoopback_TestApprourpu}rqu(jjlujjjuubaubajjubj)rru}rsu(jUj}rtu(j]j]j]j]j]ujjbuj]ruuj)rvu}rwu(jUj}rxu(j]j]j]j]j]ujjruj]ryuj)rzu}r{u(jX6Unit test demonstrating sample McASP device loopback .r|ujKjjvuj jqjjj}r}u(j]j]j]j]j]ujKj]r~uj%X6Unit test demonstrating sample McASP device loopback .ruru}ru(jj|ujjzuubaubajjubajjubj)ru}ru(jUj}ru(j]j]j]j]j]ujjbuj]ruj)ru}ru(jUj}ru(j]j]j]j]j]ujjuj]ruj)ru}ru(jX:Digital ramp pattern sent to McASP and getting looped backrujKjjuj jqjjj}ru(j]j]j]j]j]ujKj]ruj%X:Digital ramp pattern sent to McASP and getting looped backruru}ru(jjujjuubaubajjubajjubj)ru}ru(jUj}ru(j]j]j]j]j]ujjbuj]rujX)ru}ru(jX AM65x J721erujjuj jqjj\j}ru(j]j]j]j]j]ujMj]ruj%X AM65x J721eruru}ru(jjujjuubaubajjubj)ru}ru(jUj}ru(j]j]j]j]j]ujjbuj]rujX)ru}ru(jXMakefilerujjuj jqjj\j}ru(j]j]j]j]j]ujMj]ruj%XMakefileruru}ru(jjujjuubaubajjubejjubj)ru}ru(jUj}ru(j]j]j]j]j]ujj-tj]ru(j)ru}ru(jUj}ru(j]j]j]j]j]ujjuj]rujX)ru}ru(jXDeviceLoopback_SMP_TestApprujjuj jqjj\j}ru(j]j]j]j]j]ujMj]ruj%XDeviceLoopback_SMP_TestAppruru}ru(jjujjuubaubajjubj)ru}ru(jUj}ru(j]j]j]j]j]ujjuj]ruj)ru}ru(jUj}ru(j]j]j]j]j]ujjuj]ruj)ru}ru(jXVUnit test demonstrating sample McASP device loopback with SMP enabled (A53 core only).rujKjjuj jqjjj}ru(j]j]j]j]j]ujKj]ruj%XVUnit test demonstrating sample McASP device loopback with SMP enabled (A53 core only).ruru}ru(jjujjuubaubajjubajjubj)ru}ru(jUj}ru(j]j]j]j]j]ujjuj]ruj)ru}ru(jUj}ru(j]j]j]j]j]ujjuj]ruj)ru}ru(jX:Digital ramp pattern sent to McASP and getting looped backrujKjjuj jqjjj}ru(j]j]j]j]j]ujKj]ruj%X:Digital ramp pattern sent to McASP and getting looped backruru}ru(jjujjuubaubajjubajjubj)ru}ru(jUj}ru(j]j]j]j]j]ujjuj]rujX)ru}ru(jX AM65x J721erujjuj jqjj\j}ru(j]j]j]j]j]ujMj]ruj%X AM65x J721eruru}ru(jjujjuubaubajjubj)ru}ru(jUj}ru(j]j]j]j]j]ujjuj]rujX)ru}ru(jXMakefilerujjuj jqjj\j}ru(j]j]j]j]j]ujMj]ruj%XMakefileruru}ru(jjujjuubaubajjubejjubj)ru}ru(jUj}ru(j]j]j]j]j]ujj-tj]ru(j)ru}ru(jUj}ru(j]j]j]j]j]ujjuj]rujX)ru}ru(jX!DeviceLoopback_Regression_TestApprujjuj jqjj\j}ru(j]j]j]j]j]ujM j]ruj%X!DeviceLoopback_Regression_TestApprurv}rv(jjujjuubaubajjubj)rv}rv(jUj}rv(j]j]j]j]j]ujjuj]rvj)rv}rv(jUj}rv(j]j]j]j]j]ujjvj]r vj)r v}r v(jXzRegression unit test which tests various features/configurations of the MCASP driver This is a menu based test applicationr vjKjjvj jqjjj}r v(j]j]j]j]j]ujKj]rvj%XzRegression unit test which tests various features/configurations of the MCASP driver This is a menu based test applicationrvrv}rv(jj vjj vubaubajjubajjubj)rv}rv(jUj}rv(j]j]j]j]j]ujjuj]rvj)rv}rv(jUj}rv(j]j]j]j]j]ujjvj]rvj)rv}rv(jXWMenu Driven test sending digital ramp and getting looped back in various configurationsrvjKjjvj jqjjj}rv(j]j]j]j]j]ujKj]rvj%XWMenu Driven test sending digital ramp and getting looped back in various configurationsrvr v}r!v(jjvjjvubaubajjubajjubj)r"v}r#v(jUj}r$v(j]j]j]j]j]ujjuj]r%vjX)r&v}r'v(jX AM65x J721er(vjj"vj jqjj\j}r)v(j]j]j]j]j]ujM j]r*vj%X AM65x J721er+vr,v}r-v(jj(vjj&vubaubajjubj)r.v}r/v(jUj}r0v(j]j]j]j]j]ujjuj]r1vjX)r2v}r3v(jXMakefiler4vjj.vj jqjj\j}r5v(j]j]j]j]j]ujM j]r6vj%XMakefiler7vr8v}r9v(jj4vjj2vubaubajjubejjubejjubejjubaubeubeubj)r:v}r;v(jUjKjjqj jqjjj}rvaj]j]j]r?vUid194r@vaj]ujMjhj]rAv(j)rBv}rCv(jX$Building CCS projects based examplesrDvjj:vj jqjj"j}rEv(j]j]j]j]j]ujMjhj]rFvj%X$Building CCS projects based examplesrGvrHv}rIv(jjDvjjBvubaubjX)rJv}rKv(jXCCS Projects mentioned in the above table are built using pdkProjectCreate.bat/sh as explained in `PDK Example and Test Project Creation `__jj:vj jqjj\j}rLv(j]j]j]j]j]ujMjhj]rMv(j%XbCCS Projects mentioned in the above table are built using pdkProjectCreate.bat/sh as explained in rNvrOv}rPv(jXbCCS Projects mentioned in the above table are built using pdkProjectCreate.bat/sh as explained in jjJvubj)rQv}rRv(jXe`PDK Example and Test Project Creation `__j}rSv(UnameX%PDK Example and Test Project CreationjX9index_overview.html#pdk-example-and-test-project-creationj]j]j]j]j]ujjJvj]rTvj%X%PDK Example and Test Project CreationrUvrVv}rWv(jUjjQvubajjubeubeubj)rXv}rYv(jUjjqj jqjjj}rZv(j]j]j]j]r[vU.building-mcasp-test-applications-via-makefilesr\vaj]r]vh_aujMjhj]r^v(j)r_v}r`v(jX.Building MCASP Test applications via makefilesravjjXvj jqjj"j}rbv(j]j]j]j]j]ujMjhj]rcvj%X.Building MCASP Test applications via makefilesrdvrev}rfv(jjavjj_vubaubj)rgv}rhv(jUjjXvj jqjjj}riv(jX-j]j]j]j]j]ujMjhj]rjv(j)rkv}rlv(jX[MCASP Test applications and dependent libraries are built from the top level mcasp makefilermvjjgvj jqjj j}rnv(j]j]j]j]j]ujNjhj]rovjX)rpv}rqv(jjmvjjkvj jqjj\j}rrv(j]j]j]j]j]ujMj]rsvj%X[MCASP Test applications and dependent libraries are built from the top level mcasp makefilertvruv}rvv(jjmvjjpvubaubaubj)rwv}rxv(jX:Refer to the `Processor SDK RTOS Getting Started Guide `__ for details of how to setup the build environment. Once you have setup the build environment, issue the following commands: - cd /packages/ - To build: make mcasp - To clean: make mcasp_clean jjgvj jqjj j}ryv(j]j]j]j]j]ujNjhj]rzv(jX)r{v}r|v(jXRefer to the `Processor SDK RTOS Getting Started Guide `__ for details of how to setup the build environment. Once you have setup the build environment, issue the following commands:jjwvj jqjj\j}r}v(j]j]j]j]j]ujMj]r~v(j%X Refer to the rvrv}rv(jX Refer to the jj{vubj)rv}rv(jXT`Processor SDK RTOS Getting Started Guide `__j}rv(UnameX(Processor SDK RTOS Getting Started GuidejX%index_overview.html#setup-environmentj]j]j]j]j]ujj{vj]rvj%X(Processor SDK RTOS Getting Started Guidervrv}rv(jUjjvubajjubj%X} for details of how to setup the build environment. Once you have setup the build environment, issue the following commands:rvrv}rv(jX} for details of how to setup the build environment. Once you have setup the build environment, issue the following commands:jj{vubeubj )rv}rv(jUj}rv(j]j]j]j]j]ujjwvj]rvj)rv}rv(jUj}rv(jX-j]j]j]j]j]ujjvj]rv(j)rv}rv(jXcd /packages/rvj}rv(j]j]j]j]j]ujjvj]rvjX)rv}rv(jjvjjvj jqjj\j}rv(j]j]j]j]j]ujM j]rvj%Xcd /packages/rvrv}rv(jjvjjvubaubajj ubj)rv}rv(jXTo build: make mcasprvj}rv(j]j]j]j]j]ujjvj]rvjX)rv}rv(jjvjjvj jqjj\j}rv(j]j]j]j]j]ujM!j]rvj%XTo build: make mcasprvrv}rv(jjvjjvubaubajj ubj)rv}rv(jXTo clean: make mcasp_clean j}rv(j]j]j]j]j]ujjvj]rvjX)rv}rv(jXTo clean: make mcasp_cleanrvjjvj jqjj\j}rv(j]j]j]j]j]ujM"j]rvj%XTo clean: make mcasp_cleanrvrv}rv(jjvjjvubaubajj ubejjubajj ubeubj)rv}rv(jXSimilarly, to build at the module level, issue the following commands for rebuilding : - cd /packages/ti/drv/mcasp - To build: make all - To clean: make clean jjgvj jqjj j}rv(j]j]j]j]j]ujNjhj]rv(jX)rv}rv(jXVSimilarly, to build at the module level, issue the following commands for rebuilding :rvjjvj jqjj\j}rv(j]j]j]j]j]ujM$j]rvj%XVSimilarly, to build at the module level, issue the following commands for rebuilding :rvrv}rv(jjvjjvubaubj )rv}rv(jUj}rv(j]j]j]j]j]ujjvj]rvj)rv}rv(jUj}rv(jX-j]j]j]j]j]ujjvj]rv(j)rv}rv(jXcd /packages/ti/drv/mcasprvj}rv(j]j]j]j]j]ujjvj]rvjX)rv}rv(jjvjjvj jqjj\j}rv(j]j]j]j]j]ujM&j]rvj%Xcd /packages/ti/drv/mcasprvrv}rv(jjvjjvubaubajj ubj)rv}rv(jXTo build: make allrvj}rv(j]j]j]j]j]ujjvj]rvjX)rv}rv(jjvjjvj jqjj\j}rv(j]j]j]j]j]ujM'j]rvj%XTo build: make allrvrv}rv(jjvjjvubaubajj ubj)rv}rv(jXTo clean: make clean j}rv(j]j]j]j]j]ujjvj]rvjX)rv}rv(jXTo clean: make cleanrvjjvj jqjj\j}rv(j]j]j]j]j]ujM(j]rvj%XTo clean: make cleanrvrv}rv(jjvjjvubaubajj ubejjubajj ubeubeubj)rv}rv(jX5.. _AudioEQ example: http://www.ti.com/tool/tidep0069jjXvj jqjjj}rv(jX http://www.ti.com/tool/tidep0069j]rvUaudioeq-examplervaj]j]j]j]rvh aujMjhj]ubj)rv}rv(jX;.. _TIDEP0069: http://www.ti.com/lit/ug/tidubq2/tidubq2.pdfjKjjXvj jqjjj}rv(jj5uj]rvU tidep0069rvaj]j]j]j]rvhaujMjhj]ubjb)rv}rv(jX IntroductionrvjKjjXvj jqjjfj}rv(j]rwUintroduction-1rwaj]j]rwXintroduction-1rwaj]j]ujNjhj]rwj%X Introductionrwrw}rw(jjvjjvubaubjX)rw}r w(jX5The sample application demonstrates the use of the MCASP driver for audio playback. The application uses McASP LLD, and programs the AIC codec on the EVM to send and receive the audio input. The audio received from the AIC codec is loop back-ed at the application and sent back to the AIC codec via MCASP LLD.r wjjXvj jqjj\j}r w(j]j]j]j]j]ujM2jhj]r wj%X5The sample application demonstrates the use of the MCASP driver for audio playback. The application uses McASP LLD, and programs the AIC codec on the EVM to send and receive the audio input. The audio received from the AIC codec is loop back-ed at the application and sent back to the AIC codec via MCASP LLD.r wrw}rw(jj wjjwubaubjb)rw}rw(jXAudio test setuprwjjXvj jqjjfj}rw(j]rwUaudio-test-setuprwaj]j]j]j]rwhaujNjhj]rwj%XAudio test setuprwrw}rw(jjwjjwubaubjX)rw}rw(jX/Please ensure the below before running the demorwjjXvj jqjj\j}rw(j]j]j]j]j]ujM;jhj]rwj%X/Please ensure the below before running the demor wr!w}r"w(jjwjjwubaubj`)r#w}r$w(jUjjXvj jqjjcj}r%w(jeU.j]j]j]jfUj]j]jgjhujM=jhj]r&w(j)r'w}r(w(jXHConnect the EVM’s stereo audio input to the PC’s stereo audio outputr)wjj#wj jqjj j}r*w(j]j]j]j]j]ujNjhj]r+wjX)r,w}r-w(jj)wjj'wj jqjj\j}r.w(j]j]j]j]j]ujM=j]r/wj%XHConnect the EVM’s stereo audio input to the PC’s stereo audio outputr0wr1w}r2w(jj)wjj,wubaubaubj)r3w}r4w(jXConnect the EVM’s stereo audio output to powered speakers. Please make sure the amplification on the speakers is high enough for the audio output to be heard jj#wj jqjj j}r5w(j]j]j]j]j]ujNjhj]r6wjX)r7w}r8w(jXConnect the EVM’s stereo audio output to powered speakers. Please make sure the amplification on the speakers is high enough for the audio output to be heardr9wjj3wj jqjj\j}r:w(j]j]j]j]j]ujM>j]r;wj%XConnect the EVM’s stereo audio output to powered speakers. Please make sure the amplification on the speakers is high enough for the audio output to be heardrw(jj9wjj7wubaubaubeubjb)r?w}r@w(jX Building and running the ExamplerAwjjXvj jqjjfj}rBw(j]rCwU building-and-running-the-examplerDwaj]j]j]j]rEwhaujNjhj]rFwj%X Building and running the ExamplerGwrHw}rIw(jjAwjj?wubaubj`)rJw}rKw(jUjjXvj jqjjcj}rLw(jeU.j]j]j]jfUj]j]jgjhujMEjhj]rMw(j)rNw}rOw(jXKRun pdkProjectCreate to create the MCASP_Audio__ExampleProjectjjJwj jqjj j}rPw(j]j]j]j]j]ujNjhj]rQwjX)rRw}rSw(jXKRun pdkProjectCreate to create the MCASP_Audio__ExampleProjectrTwjjNwj jqjj\j}rUw(j]j]j]j]j]ujMEj]rVwj%XKRun pdkProjectCreate to create the MCASP_Audio__ExampleProjectrWwrXw}rYw(jjTwjjRwubaubaubj)rZw}r[w(jX.Load the project on to CCS and build the same.r\wjjJwj jqjj j}r]w(j]j]j]j]j]ujNjhj]r^wjX)r_w}r`w(jj\wjjZwj jqjj\j}raw(j]j]j]j]j]ujMGj]rbwj%X.Load the project on to CCS and build the same.rcwrdw}rew(jj\wjj_wubaubaubj)rfw}rgw(jXBuild the examplerhwjjJwj jqjj j}riw(j]j]j]j]j]ujNjhj]rjwjX)rkw}rlw(jjhwjjfwj jqjj\j}rmw(j]j]j]j]j]ujMHj]rnwj%XBuild the examplerowrpw}rqw(jjhwjjkwubaubaubj)rrw}rsw(jX1Load the MCASP_Audio__ExampleProjectrtwjjJwj jqjj j}ruw(j]j]j]j]j]ujNjhj]rvwjX)rww}rxw(jjtwjjrwj jqjj\j}ryw(j]j]j]j]j]ujMIj]rzwj%X1Load the MCASP_Audio__ExampleProjectr{wr|w}r}w(jjtwjjwwubaubaubj)r~w}rw(jXRun the example jjJwj jqjj j}rw(j]j]j]j]j]ujNjhj]rwjX)rw}rw(jXRun the examplerwjj~wj jqjj\j}rw(j]j]j]j]j]ujMJj]rwj%XRun the examplerwrw}rw(jjwjjwubaubaubeubjb)rw}rw(jXTesting the examplerwjKjjXvj jqjjfj}rw(j]rwUtesting-the-examplerwaj]j]rwXtesting-the-examplerwaj]j]ujNjhj]rwj%XTesting the examplerwrw}rw(jjwjjwubaubj`)rw}rw(jUjjXvj jqjjcj}rw(jeU.j]j]j]jfUj]j]jgjhujMOjhj]rw(j)rw}rw(jXPlay an audio file on the PC.rwjjwj jqjj j}rw(j]j]j]j]j]ujNjhj]rwjX)rw}rw(jjwjjwj jqjj\j}rw(j]j]j]j]j]ujMOj]rwj%XPlay an audio file on the PC.rwrw}rw(jjwjjwubaubaubj)rw}rw(jXYou should be able to hear the same audio on the speakers connected to the EVM. It is the PC’s audio output which is loop backed at the EVM’s MCASP example outputted to the speakers. jjwj jqjj j}rw(j]j]j]j]j]ujNjhj]rwjX)rw}rw(jXYou should be able to hear the same audio on the speakers connected to the EVM. It is the PC’s audio output which is loop backed at the EVM’s MCASP example outputted to the speakers.rwjjwj jqjj\j}rw(j]j]j]j]j]ujMPj]rwj%XYou should be able to hear the same audio on the speakers connected to the EVM. It is the PC’s audio output which is loop backed at the EVM’s MCASP example outputted to the speakers.rwrw}rw(jjwjjwubaubaubeubjX)rw}rw(jX`NOTE: Please make sure the speakers’ output volume is high enough for the audio to be audible.rwjjXvj jqjj\j}rw(j]j]j]j]j]ujMTjhj]rwj%X`NOTE: Please make sure the speakers’ output volume is high enough for the audio to be audible.rwrw}rw(jjwjjwubaubeubj)rw}rw(jUjKjjqj jqjjj}rw(j]rwXadditional referencesrwaj]j]j]rwUid195rwaj]ujMXjhj]rw(j)rw}rw(jXAdditional Referencesrwjjwj jqjj"j}rw(j]j]j]j]j]ujMXjhj]rwj%XAdditional Referencesrwrw}rw(jjwjjwubaubj)rw}rw(jUjjwj jqjjj}rw(j]j]j]j]j]ujNjhj]rwj)rw}rw(jUj}rw(j]j]j]j]j]UcolsKujjwj]rw(j)rw}rw(jUj}rw(j]j]j]j]j]UcolwidthK#ujjwj]jjubj)rw}rw(jUj}rw(j]j]j]j]j]UcolwidthK(ujjwj]jjubj)rw}rw(jUj}rw(j]j]j]j]j]ujjwj]rw(j)rw}rw(jUj}rw(j]j]j]j]j]ujjwj]rw(j)rw}rw(jUj}rw(j]j]j]j]j]ujjwj]rwjX)rw}rw(jX **Document**rwjjwj jqjj\j}rw(j]j]j]j]j]ujM[j]rwj|)rw}rw(jjwj}rw(j]j]j]j]j]ujjwj]rwj%XDocumentrwrw}rw(jUjjwubajjubaubajjubj)rw}rw(jUj}rw(j]j]j]j]j]ujjwj]rwjX)rw}rw(jX **Location**rwjjwj jqjj\j}rw(j]j]j]j]j]ujM[j]rwj|)rw}rw(jjwj}rw(j]j]j]j]j]ujjwj]rwj%XLocationrwrw}rw(jUjjwubajjubaubajjubejjubj)rx}rx(jUj}rx(j]j]j]j]j]ujjwj]rx(j)rx}rx(jUj}rx(j]j]j]j]j]ujjxj]rxjX)rx}r x(jXAPI Reference Manualr xjjxj jqjj\j}r x(j]j]j]j]j]ujM]j]r xj%XAPI Reference Manualr xrx}rx(jj xjjxubaubajjubj)rx}rx(jUj}rx(j]j]j]j]j]ujjxj]rxjX)rx}rx(jXR$(TI_PDK_INSTALL_DIR)\\packages\\ti \\drv\\mcasp\\docs\\doxygen\\html\\inde x.htmljjxj jqjj\j}rx(j]j]j]j]j]ujM]j]rxj%XJ$(TI_PDK_INSTALL_DIR)\packages\ti \drv\mcasp\docs\doxygen\html\inde x.htmlrxrx}rx(jXR$(TI_PDK_INSTALL_DIR)\\packages\\ti \\drv\\mcasp\\docs\\doxygen\\html\\inde x.htmljjxubaubajjubejjubj)rx}rx(jUj}rx(j]j]j]j]j]ujjwj]rx(j)rx}r x(jUj}r!x(j]j]j]j]j]ujjxj]r"xjX)r#x}r$x(jX Release Notesr%xjjxj jqjj\j}r&x(j]j]j]j]j]ujMaj]r'xj%X Release Notesr(xr)x}r*x(jj%xjj#xubaubajjubj)r+x}r,x(jUj}r-x(j]j]j]j]j]ujjxj]r.xjX)r/x}r0x(jXS$(TI_PDK_INSTALL_DIR)\\packages\\ti \\drv\\mcasp\\docs\\ReleaseNotes_MCAS P_LLD.pdfjj+xj jqjj\j}r1x(j]j]j]j]j]ujMaj]r2xj%XM$(TI_PDK_INSTALL_DIR)\packages\ti \drv\mcasp\docs\ReleaseNotes_MCAS P_LLD.pdfr3xr4x}r5x(jXS$(TI_PDK_INSTALL_DIR)\\packages\\ti \\drv\\mcasp\\docs\\ReleaseNotes_MCAS P_LLD.pdfjj/xubaubajjubejjubj)r6x}r7x(jUj}r8x(j]j]j]j]j]ujjwj]r9x(j)r:x}r;x(jUj}rx}r?x(jXSoftware design Specificationr@xjj:xj jqjj\j}rAx(j]j]j]j]j]ujMej]rBxj%XSoftware design SpecificationrCxrDx}rEx(jj@xjj>xubaubajjubj)rFx}rGx(jUj}rHx(j]j]j]j]j]ujj6xj]rIxjX)rJx}rKx(jXI$(TI_PDK_INSTALL_DIR)\\packages\\ti \\drv\\mcasp\\docs\\MCASP_LLD_SDS.pdfjjFxj jqjj\j}rLx(j]j]j]j]j]ujMej]rMxj%XC$(TI_PDK_INSTALL_DIR)\packages\ti \drv\mcasp\docs\MCASP_LLD_SDS.pdfrNxrOx}rPx(jXI$(TI_PDK_INSTALL_DIR)\\packages\\ti \\drv\\mcasp\\docs\\MCASP_LLD_SDS.pdfjjJxubaubajjubejjubejjubejjubaubeubeubj jqjjj}rQx(j]rRxXoverviewrSxaj]j]j]rTxUid187rUxaj]ujKjhj]rVx(j)rWx}rXx(jXOverviewrYxjjqj jqjj"j}rZx(j]j]j]j]j]ujKjhj]r[xj%XOverviewr\xr]x}r^x(jjYxjjWxubaubj)r_x}r`x(jUjKjjqj jqjjj}rax(j]rbxX introductionrcxaj]j]j]rdxUid188rexaj]ujKjhj]rfx(j)rgx}rhx(jX Introductionrixjj_xj jqjj"j}rjx(j]j]j]j]j]ujKjhj]rkxj%X Introductionrlxrmx}rnx(jjixjjgxubaubjX)rox}rpx(jX1The multichannel audio serial port (McASP) functions as a general-purpose audio serial port optimized for the needs of multichannel audio applications. The McASP is useful for time-division multiplexed (TDM) stream, Inter-Integrated Sound (I2S) protocols, and intercomponent digital audio interface transmission (DIT).The multichannel buffered serial port (McASP) peripheral allows direct interface to other TI DSPs, codecs, and other devices in a system. The following sub sections explain the hardware (McASP peripheral) and software context of the McASP LLD.rqxjj_xj jqjj\j}rrx(j]j]j]j]j]ujK jhj]rsxj%X1The multichannel audio serial port (McASP) functions as a general-purpose audio serial port optimized for the needs of multichannel audio applications. The McASP is useful for time-division multiplexed (TDM) stream, Inter-Integrated Sound (I2S) protocols, and intercomponent digital audio interface transmission (DIT).The multichannel buffered serial port (McASP) peripheral allows direct interface to other TI DSPs, codecs, and other devices in a system. The following sub sections explain the hardware (McASP peripheral) and software context of the McASP LLD.rtxrux}rvx(jjqxjjoxubaubjX)rwx}rxx(jXThe device driver exposes a set of well-defined APIs which are used by the application layer to send and receive data via the McASP peripheral. The driver also exposes a set of well-defined OS abstraction APIs which are used to ensure that the driver is OS independent and portable. The McASP driver uses the CSL McASP register layer for all McASP MMR access. The McASP driver also interfaces with the EDMA3/UDMA library to be able to transfer data to and from McASP peripheral and data memory.ryxjj_xj jqjj\j}rzx(j]j]j]j]j]ujKjhj]r{xj%XThe device driver exposes a set of well-defined APIs which are used by the application layer to send and receive data via the McASP peripheral. The driver also exposes a set of well-defined OS abstraction APIs which are used to ensure that the driver is OS independent and portable. The McASP driver uses the CSL McASP register layer for all McASP MMR access. The McASP driver also interfaces with the EDMA3/UDMA library to be able to transfer data to and from McASP peripheral and data memory.r|xr}x}r~x(jjyxjjwxubaubeubeubj jqjj?j}rx(j]UlevelKj]j]rxjUxaUsourcejqj]j]UlineKUtypejAujKjhj]rxjX)rx}rx(jX+Duplicate implicit target name: "overview".j}rx(j]j]j]j]j]ujjqj]rxj%X+Duplicate implicit target name: "overview".rxrx}rx(jUjjxubajj\ubaubh)rx}rx(jUjj_xj jqjj?j}rx(j]UlevelKj]j]rxjexaUsourcejqj]j]UlineKUtypejAujKjhj]rxjX)rx}rx(jX/Duplicate implicit target name: "introduction".j}rx(j]j]j]j]j]ujjxj]rxj%X/Duplicate implicit target name: "introduction".rxrx}rx(jUjjxubajj\ubaubh)rx}rx(jUjjrj jqjj?j}rx(j]UlevelKj]j]rxj raUsourcejqj]j]UlineKUtypejAujKjhj]rxjX)rx}rx(jX1Duplicate implicit target name: "user interface".j}rx(j]j]j]j]j]ujjxj]rxj%X1Duplicate implicit target name: "user interface".rxrx}rx(jUjjxubajj\ubaubh)rx}rx(jUjjrj jqjj?j}rx(j]UlevelKj]j]rxjraUsourcejqj]j]UlineKUtypejAujKjhj]rxjX)rx}rx(jX7Duplicate implicit target name: "driver configuration".j}rx(j]j]j]j]j]ujjxj]rxj%X7Duplicate implicit target name: "driver configuration".rxrx}rx(jUjjxubajj\ubaubh)rx}rx(jUjj_rj jqjj?j}rx(j]UlevelKj]j]rxjeraUsourcejqj]j]UlineK@UtypejAujK@jhj]rxjX)rx}rx(jX'Duplicate implicit target name: "apis".j}rx(j]j]j]j]j]ujjxj]rxj%X'Duplicate implicit target name: "apis".rxrx}rx(jUjjxubajj\ubaubh)rx}rx(jUjjsj jqjj?j}rx(j]UlevelKj]j]rxjsaUsourcejqj]j]UlineKUtypejAujKjhj]rxjX)rx}rx(jX.Duplicate implicit target name: "application".j}rx(j]j]j]j]j]ujjxj]rxj%X.Duplicate implicit target name: "application".rxrx}rx(jUjjxubajj\ubaubh)rx}rx(jUjjsj jqjj?j}rx(j]UlevelKj]j]rxjsaUsourcejqj]j]UlineKUtypejAujKjhj]rxjX)rx}rx(jX8Duplicate implicit target name: "examples & unit tests".j}rx(j]j]j]j]j]ujjxj]rxj%X8Duplicate implicit target name: "examples & unit tests".rxrx}rx(jUjjxubajj\ubaubh)rx}rx(jUjj:vj jqjj?j}rx(j]UlevelKj]j]rxj@vaUsourcejqj]j]UlineMUtypejAujMjhj]rxjX)rx}rx(jXGDuplicate implicit target name: "building ccs projects based examples".j}rx(j]j]j]j]j]ujjxj]rxj%XGDuplicate implicit target name: "building ccs projects based examples".rxrx}rx(jUjjxubajj\ubaubh)rx}rx(jUj}rx(j]UlevelKj]j]Usourcejqj]j]UlineM Utypejujjwvj]rxjX)rx}rx(jXUnexpected indentation.j}rx(j]j]j]j]j]ujjxj]rxj%XUnexpected indentation.rxrx}rx(jUjjxubajj\ubajj?ubh)rx}rx(jUjjwj jqjj?j}rx(j]UlevelKj]j]rxjwaUsourcejqj]j]UlineMXUtypejAujMXjhj]rxjX)rx}rx(jX8Duplicate implicit target name: "additional references".j}rx(j]j]j]j]j]ujjxj]rxj%X8Duplicate implicit target name: "additional references".rxrx}rx(jUjjxubajj\ubaubh)rx}rx(jUjj)rx}rx(jUjKjj)rx}rx(jUjhj j jjj}rx(j]j]j]j]rxUdssrxaj]rxhWaujKjhj]rx(j)rx}ry(jXDSSryjjxj j jj"j}ry(j]j]j]j]j]ujKjhj]ryj%XDSSryry}ry(jjyjjxubaubj))ry}ry(jX>http://processors.wiki.ti.com/index.php/Processor_SDK_RTOS_DSSjjxj j,X<source/rtos/PDK_Platform_Software/Device_Drivers/DSS.rst.incr yr y}r ybjj0j}r y(j2j3j]j]j]j]j]ujKjhj]r yj%X>http://processors.wiki.ti.com/index.php/Processor_SDK_RTOS_DSSryry}ry(jUjjyubaubjxj)ry}ry(jUjKjjxj j yjjj}ry(j]ryXuser interfaceryaj]j]j]ryUid198ryaj]ujKjhj]ry(j)ry}ry(jXUser Interfaceryjjyj j yjj"j}ry(j]j]j]j]j]ujKjhj]ryj%XUser Interfaceryry}r y(jjyjjyubaubj)r!y}r"y(jUjKjjyj j yjjj}r#y(j]r$yXdriver configurationr%yaj]j]j]r&yUid199r'yaj]ujKjhj]r(y(j)r)y}r*y(jXDriver Configurationr+yjj!yj j yjj"j}r,y(j]j]j]j]j]ujKjhj]r-yj%XDriver Configurationr.yr/y}r0y(jj+yjj)yubaubjb)r1y}r2y(jX**DSS Configuration Structure**r3yjj!yj j yjjfj}r4y(j]r5yUdss-configuration-structurer6yaj]j]j]j]r7yhaujNjhj]r8yj|)r9y}r:y(jj3yj}r;y(j]j]j]j]j]ujj1yj]ry}r?y(jUjj9yubajjubaubjX)r@y}rAy(jXFor details about individual fields of DSS library structure, see the Doxygen help by opening PDK_INSTALL_DIR\\packages\\ti\\drv\\dss\\docs\\doxygen\\html\\index.html.jj!yj j yjj\j}rBy(j]j]j]j]j]ujKjhj]rCyj%XFor details about individual fields of DSS library structure, see the Doxygen help by opening PDK_INSTALL_DIR\packages\ti\drv\dss\docs\doxygen\html\index.html.rDyrEy}rFy(jXFor details about individual fields of DSS library structure, see the Doxygen help by opening PDK_INSTALL_DIR\\packages\\ti\\drv\\dss\\docs\\doxygen\\html\\index.html.jj@yubaubeubj)rGy}rHy(jUjKjjyj j yjjj}rIy(j]rJyXapisrKyaj]j]j]rLyUid200rMyaj]ujK$jhj]rNy(j)rOy}rPy(jXAPIsrQyjjGyj j yjj"j}rRy(j]j]j]j]j]ujK$jhj]rSyj%XAPIsrTyrUy}rVy(jjQyjjOyubaubjX)rWy}rXy(jXGThe DSS driver API can be broadly divided into the following categoriesrYyjjGyj j yjj\j}rZy(j]j]j]j]j]ujK&jhj]r[yj%XGThe DSS driver API can be broadly divided into the following categoriesr\yr]y}r^y(jjYyjjWyubaubj)r_y}r`y(jUjjGyj j yjjj}ray(jX-j]j]j]j]j]ujK(jhj]rby(j)rcy}rdy(jX/DSS Display API - API for video display driversreyjj_yj j yjj j}rfy(j]j]j]j]j]ujNjhj]rgyjX)rhy}riy(jjeyjjcyj j yjj\j}rjy(j]j]j]j]j]ujK(j]rkyj%X/DSS Display API - API for video display driversrlyrmy}rny(jjeyjjhyubaubaubj)roy}rpy(jXfDSS Display Controller API - API for controlling and configuring Video Ports in the display subsystem jj_yj j yjj j}rqy(j]j]j]j]j]ujNjhj]rryjX)rsy}rty(jXeDSS Display Controller API - API for controlling and configuring Video Ports in the display subsystemruyjjoyj j yjj\j}rvy(j]j]j]j]j]ujK)j]rwyj%XeDSS Display Controller API - API for controlling and configuring Video Ports in the display subsystemrxyryy}rzy(jjuyjjsyubaubaubeubjX)r{y}r|y(jXIn addition to above drivers the DSS package also includes many sample examples which show how to use the drivers in different ways. Many of these sample examples use a common set of APIs which a user may find useful to refer to for use in their final application.r}yjjGyj j yjj\j}r~y(j]j]j]j]j]ujK,jhj]ryj%XIn addition to above drivers the DSS package also includes many sample examples which show how to use the drivers in different ways. Many of these sample examples use a common set of APIs which a user may find useful to refer to for use in their final application.ryry}ry(jj}yjj{yubaubjX)ry}ry(jXAPI reference for application:ryjjGyj j yjj\j}ry(j]j]j]j]j]ujK1jhj]ryj%XAPI reference for application:ryry}ry(jjyjjyubaubj#)ry}ry(jX*#include .h>jjGyj j yjj&j}ry(j2j3j]j]j]j]j]ujM5jhj]ryj%X*#include .h>ryry}ry(jUjjyubaubeubeubj)ry}ry(jUjKjjxj j yjjj}ry(j]ryX applicationryaj]j]j]ryUid201ryaj]ujK8jhj]ry(j)ry}ry(jX Applicationryjjyj j yjj"j}ry(j]j]j]j]j]ujK8jhj]ryj%X Applicationryry}ry(jjyjjyubaubj)ry}ry(jUjKjjyj j yjjj}ry(j]ryXexamplesryaj]j]j]ryUid202ryaj]ujK;jhj]ry(j)ry}ry(jXExamplesryjjyj j yjj"j}ry(j]j]j]j]j]ujK;jhj]ryj%XExamplesryry}ry(jjyjjyubaubj)ry}ry(jUjjyj j yjjj}ry(j]j]j]j]j]ujNjhj]ryj)ry}ry(jUj}ry(j]j]j]j]j]UcolsKujjyj]ry(j)ry}ry(jUj}ry(j]j]j]j]j]UcolwidthKujjyj]jjubj)ry}ry(jUj}ry(j]j]j]j]j]UcolwidthKujjyj]jjubj)ry}ry(jUj}ry(j]j]j]j]j]UcolwidthKujjyj]jjubj)ry}ry(jUj}ry(j]j]j]j]j]ujjyj]ryj)ry}ry(jUj}ry(j]j]j]j]j]ujjyj]ry(j)ry}ry(jUj}ry(j]j]j]j]j]ujjyj]ryjX)ry}ry(jXNameryjjyj j yjj\j}ry(j]j]j]j]j]ujK>j]ryj%XNameryry}ry(jjyjjyubaubajjubj)ry}ry(jUj}ry(j]j]j]j]j]ujjyj]ryj)ry}ry(jUj}ry(j]j]j]j]j]ujjyj]ryj)ry}ry(jX DescriptionryjKjjyj j yjjj}ry(j]j]j]j]j]ujKj]ryj%X Descriptionryry}ry(jjyjjyubaubajjubajjubj)ry}ry(jUj}ry(j]j]j]j]j]ujjyj]ryj)ry}ry(jUj}ry(j]j]j]j]j]ujjyj]ryj)ry}ry(jXExpected ResultsryjKjjyj j yjjj}ry(j]j]j]j]j]ujKj]ryj%XExpected Resultsryry}ry(jjyjjyubaubajjubajjubejjubajjubj)ry}ry(jUj}ry(j]j]j]j]j]ujjyj]ry(j)ry}ry(jUj}ry(j]j]j]j]j]ujjyj]ry(j)ry}rz(jUj}rz(j]j]j]j]j]ujjyj]rzjX)rz}rz(jXDisplay Dss applicationrzjjyj j yjj\j}rz(j]j]j]j]j]ujK@j]rzj%XDisplay Dss applicationrzr z}r z(jjzjjzubaubajjubj)r z}r z(jUj}r z(j]j]j]j]j]ujjyj]rzj)rz}rz(jUj}rz(j]j]j]j]j]ujj zj]rzj)rz}rz(jXiExample demonstrating *simple* display bgra frames to the OLDI use case. Reference example for developersjKjjzj j yjjj}rz(j]j]j]j]j]ujKj]rz(j%XExample demonstrating rzrz}rz(jXExample demonstrating jjzubj<)rz}rz(jX*simple*j}rz(j]j]j]j]j]ujjzj]rzj%Xsimplerzrz}r z(jUjjzubajjDubj%XK display bgra frames to the OLDI use case. Reference example for developersr!zr"z}r#z(jXK display bgra frames to the OLDI use case. Reference example for developersjjzubeubajjubajjubj)r$z}r%z(jUj}r&z(j]j]j]j]j]ujjyj]r'zj)r(z}r)z(jUj}r*z(j]j]j]j]j]ujj$zj]r+zj)r,z}r-z(jXYApplication shows two different buffer on OLDI panel and success messages on CCS console.r.zjKjj(zj j yjjj}r/z(j]j]j]j]j]ujKj]r0zj%XYApplication shows two different buffer on OLDI panel and success messages on CCS console.r1zr2z}r3z(jj.zjj,zubaubajjubajjubejjubj)r4z}r5z(jUj}r6z(j]j]j]j]j]ujjyj]r7z(j)r8z}r9z(jUj}r:z(j]j]j]j]j]ujj4zj]r;zjX)rzjj8zj j yjj\j}r?z(j]j]j]j]j]ujKIj]r@zj%X$Display Dss application (Bare metal)rAzrBz}rCz(jj>zjj/packages/ti/drv/dssr{jj {j j yjj j}r {(j]j]j]j]j]ujNjhj]r!{jX)r"{}r#{(jj{jj{j j yjj\j}r${(j]j]j]j]j]ujKjj]r%{j%Xcd /packages/ti/drv/dssr&{r'{}r({(jj{jj"{ubaubaubj)r){}r*{(jX1To build: make -s PDK_INSTALL_PATH=/packagesr+{jj {j j yjj j}r,{(j]j]j]j]j]ujNjhj]r-{jX)r.{}r/{(jj+{jj){j j yjj\j}r0{(j]j]j]j]j]ujKkj]r1{j%X1To build: make -s PDK_INSTALL_PATH=/packagesr2{r3{}r4{(jj+{jj.{ubaubaubj)r5{}r6{(jX8To clean: make -s clean PDK_INSTALL_PATH=/packages jj {j j yjj j}r7{(j]j]j]j]j]ujNjhj]r8{jX)r9{}r:{(jX7To clean: make -s clean PDK_INSTALL_PATH=/packagesr;{jj5{j j yjj\j}r<{(j]j]j]j]j]ujKlj]r={j%X7To clean: make -s clean PDK_INSTALL_PATH=/packagesr>{r?{}r@{(jj;{jj9{ubaubaubeubeubj)rA{}rB{(jUjjxj j yjjj}rC{(j]j]j]j]rD{U dss-examplesrE{aj]rF{haujKojhj]rG{(j)rH{}rI{(jX DSS examplesrJ{jjA{j j yjj"j}rK{(j]j]j]j]j]ujKojhj]rL{j%X DSS examplesrM{rN{}rO{(jjJ{jjH{ubaubjb)rP{}rQ{(jX *Description*rR{jKjjA{j j yjjfj}rS{(j]rT{Uid204rU{aj]j]rV{j3paj]j]ujNjhj]rW{j<)rX{}rY{(jjR{j}rZ{(j]j]j]j]j]ujjP{j]r[{j%X Descriptionr\{r]{}r^{(jUjjX{ubajjDubaubjX)r_{}r`{(jXlDSS examples exploits the DISPC (Display Controller) and OLDI output available in the SoC. The example works on outputing pre-loaded video frames of BGRA8888 formats to OLDI interface. The example also demonstrates displaying videos combined from VID1 and VIDL1 pipelines to OLDI panel. The example is also enhanced to show the display controller scaling features.ra{jjA{j j yjj\j}rb{(j]j]j]j]j]ujKtjhj]rc{j%XlDSS examples exploits the DISPC (Display Controller) and OLDI output available in the SoC. The example works on outputing pre-loaded video frames of BGRA8888 formats to OLDI interface. The example also demonstrates displaying videos combined from VID1 and VIDL1 pipelines to OLDI panel. The example is also enhanced to show the display controller scaling features.rd{re{}rf{(jja{jj_{ubaubj)rg{}rh{(jUjjA{j j yjjj}ri{(j]j]j]j]j]ujK{jhj]rj{j)rk{}rl{(jUjKjjg{j j yjjj}rm{(j]j]j]j]j]ujKjhj]ubaubjb)rn{}ro{(jX **Running the Display examples**rp{jjA{j j yjjfj}rq{(j]rr{Urunning-the-display-examplesrs{aj]j]j]j]rt{haujNjhj]ru{j|)rv{}rw{(jjp{j}rx{(j]j]j]j]j]ujjn{j]ry{j%XRunning the Display examplesrz{r{{}r|{(jUjjv{ubajjubaubjX)r}{}r~{(jX**Configuring Display**:r{jjA{j j yjj\j}r{(j]j]j]j]j]ujKjhj]r{(j|)r{}r{(jX**Configuring Display**j}r{(j]j]j]j]j]ujj}{j]r{j%XConfiguring Displayr{r{}r{(jUjj{ubajjubj%X:r{}r{(jX:jj}{ubeubj)r{}r{(jUjjA{j j yjjj}r{(jX-j]j]j]j]j]ujKjhj]r{j)r{}r{(jXYMake sure the OLDI panel is connected to the base EVM before running the example binary. jj{j j yjj j}r{(j]j]j]j]j]ujNjhj]r{jX)r{}r{(jXXMake sure the OLDI panel is connected to the base EVM before running the example binary.r{jj{j j yjj\j}r{(j]j]j]j]j]ujKj]r{j%XXMake sure the OLDI panel is connected to the base EVM before running the example binary.r{r{}r{(jj{jj{ubaubaubaubjX)r{}r{(jX**CCS connection**:r{jjA{j j yjj\j}r{(j]j]j]j]j]ujKjhj]r{(j|)r{}r{(jX**CCS connection**j}r{(j]j]j]j]j]ujj{j]r{j%XCCS connectionr{r{}r{(jUjj{ubajjubj%X:r{}r{(jX:jj{ubeubj)r{}r{(jUjjA{j j yjjj}r{(jX-j]j]j]j]j]ujKjhj]r{(j)r{}r{(jX@Load the System firmware as specified in SCICLIENT documentationr{jj{j j yjj j}r{(j]j]j]j]j]ujNjhj]r{jX)r{}r{(jj{jj{j j yjj\j}r{(j]j]j]j]j]ujKj]r{j%X@Load the System firmware as specified in SCICLIENT documentationr{r{}r{(jj{jj{ubaubaubj)r{}r{(jX)Load the generated executable file in CCSr{jj{j j yjj j}r{(j]j]j]j]j]ujNjhj]r{jX)r{}r{(jj{jj{j j yjj\j}r{(j]j]j]j]j]ujKj]r{j%X)Load the generated executable file in CCSr{r{}r{(jj{jj{ubaubaubj)r{}r{(jXRun the application.r{jj{j j yjj j}r{(j]j]j]j]j]ujNjhj]r{jX)r{}r{(jj{jj{j j yjj\j}r{(j]j]j]j]j]ujKj]r{j%XRun the application.r{r{}r{(jj{jj{ubaubaubj)r{}r{(jX=Content will be displayed on the OLDI panel connected to EVM jj{j XSinternal padding after source/rtos/PDK_Platform_Software/Device_Drivers/DSS.rst.incr{jj j}r{(j]j]j]j]j]ujNjhj]r{jX)r{}r{(jX<Content will be displayed on the OLDI panel connected to EVMr{jj{j j yjj\j}r{(j]j]j]j]j]ujKj]r{j%X<Content will be displayed on the OLDI panel connected to EVMr{r{}r{(jj{jj{ubaubaubeubeubeubj j yjjj}r{(j]r{Xoverviewr{aj]j]j]r{Uid196r{aj]ujKjhj]r{(j)r{}r{(jXOverviewr{jjxj j yjj"j}r{(j]j]j]j]j]ujKjhj]r{j%XOverviewr{r{}r{(jj{jj{ubaubj)r{}r{(jUjKjjxj j yjjj}r{(j]r{X introductionr{aj]j]j]r{Uid197r{aj]ujKjhj]r{(j)r{}r{(jX Introductionr{jj{j j yjj"j}r{(j]j]j]j]j]ujKjhj]r{j%X Introductionr{r{}r{(jj{jj{ubaubjX)r{}r{(jXThe Display Subsystem (DSS) is a flexible, multi-pipeline subsystem that supports high-resolution display outputs. DSS includes input pipelines providing multi-layer blending with transparency to enable on-the-fly composition. Various pixel processing capabilities are supported, such as color space conversion and scaling, among others. DSS includes a DMA engine, which allows direct access to the frame buffer (device system memory). Display outputs can connect seamlessly to an Open LVDS Display Interface transmitter (OLDITX), or can directly drive device pads as a parallel video output interface. This document has detailed API description that user can use to make use of the DSS driver.r{jj{j j yjj\j}r{(j]j]j]j]j]ujK jhj]r|j%XThe Display Subsystem (DSS) is a flexible, multi-pipeline subsystem that supports high-resolution display outputs. DSS includes input pipelines providing multi-layer blending with transparency to enable on-the-fly composition. Various pixel processing capabilities are supported, such as color space conversion and scaling, among others. DSS includes a DMA engine, which allows direct access to the frame buffer (device system memory). Display outputs can connect seamlessly to an Open LVDS Display Interface transmitter (OLDITX), or can directly drive device pads as a parallel video output interface. This document has detailed API description that user can use to make use of the DSS driver.r|r|}r|(jj{jj{ubaubeubeubj j yjj?j}r|(j]UlevelKj]j]r|j{aUsourcej yj]j]UlineKUtypejAujKjhj]r|jX)r|}r|(jX+Duplicate implicit target name: "overview".j}r |(j]j]j]j]j]ujjxj]r |j%X+Duplicate implicit target name: "overview".r |r |}r |(jUjj|ubajj\ubaubh)r|}r|(jUjj{j j yjj?j}r|(j]UlevelKj]j]r|j{aUsourcej yj]j]UlineKUtypejAujKjhj]r|jX)r|}r|(jX/Duplicate implicit target name: "introduction".j}r|(j]j]j]j]j]ujj|j]r|j%X/Duplicate implicit target name: "introduction".r|r|}r|(jUjj|ubajj\ubaubh)r|}r|(jUjjyj j yjj?j}r|(j]UlevelKj]j]r|jyaUsourcej yj]j]UlineKUtypejAujKjhj]r|jX)r|}r |(jX1Duplicate implicit target name: "user interface".j}r!|(j]j]j]j]j]ujj|j]r"|j%X1Duplicate implicit target name: "user interface".r#|r$|}r%|(jUjj|ubajj\ubaubh)r&|}r'|(jUjj!yj j yjj?j}r(|(j]UlevelKj]j]r)|j'yaUsourcej yj]j]UlineKUtypejAujKjhj]r*|jX)r+|}r,|(jX7Duplicate implicit target name: "driver configuration".j}r-|(j]j]j]j]j]ujj&|j]r.|j%X7Duplicate implicit target name: "driver configuration".r/|r0|}r1|(jUjj+|ubajj\ubaubh)r2|}r3|(jUjjGyj j yjj?j}r4|(j]UlevelKj]j]r5|jMyaUsourcej yj]j]UlineK$UtypejAujK$jhj]r6|jX)r7|}r8|(jX'Duplicate implicit target name: "apis".j}r9|(j]j]j]j]j]ujj2|j]r:|j%X'Duplicate implicit target name: "apis".r;|r<|}r=|(jUjj7|ubajj\ubaubh)r>|}r?|(jUjjyj j yjj?j}r@|(j]UlevelKj]j]rA|jyaUsourcej yj]j]UlineK8UtypejAujK8jhj]rB|jX)rC|}rD|(jX.Duplicate implicit target name: "application".j}rE|(j]j]j]j]j]ujj>|j]rF|j%X.Duplicate implicit target name: "application".rG|rH|}rI|(jUjjC|ubajj\ubaubh)rJ|}rK|(jUjjyj j yjj?j}rL|(j]UlevelKj]j]rM|jyaUsourcej yj]j]UlineK;UtypejAujK;jhj]rN|jX)rO|}rP|(jX+Duplicate implicit target name: "examples".j}rQ|(j]j]j]j]j]ujjJ|j]rR|j%X+Duplicate implicit target name: "examples".rS|rT|}rU|(jUjjO|ubajj\ubaubh)rV|}rW|(jUjjzj j yjj?j}rX|(j]UlevelKj]j]rY|jzaUsourcej yj]j]UlineK[UtypejAujK[jhj]rZ|jX)r[|}r\|(jX8Duplicate implicit target name: "additional references".j}r]|(j]j]j]j]j]ujjV|j]r^|j%X8Duplicate implicit target name: "additional references".r_|r`|}ra|(jUjj[|ubajj\ubaubh)rb|}rc|(jUj}rd|(j]UlevelKj]j]re|jU{aUsourcej j]j]UlineKUtypejXujjP{j]rf|jX)rg|}rh|(jX.Duplicate explicit target name: "description".j}ri|(j]j]j]j]j]ujjb|j]rj|j%X.Duplicate explicit target name: "description".rk|rl|}rm|(jUjjg|ubajj\ubajj?ubh)rn|}ro|(jUjj)rp|}rq|(jUjKjj)rr|}rs|(jUjhj j jjj}rt|(j]j]j]j]ru|Ucalrv|aj]rw|hbaujKjhj]rx|(j)ry|}rz|(jXCALr{|jjr|j j jj"j}r||(j]j]j]j]j]ujKjhj]r}|j%XCALr~|r|}r|(jj{|jjy|ubaubj))r|}r|(jX>http://processors.wiki.ti.com/index.php/Processor_SDK_RTOS_DSSjjr|j j,X<source/rtos/PDK_Platform_Software/Device_Drivers/CAL.rst.incr|r|}r|bjj0j}r|(j2j3j]j]j]j]j]ujKjhj]r|j%X>http://processors.wiki.ti.com/index.php/Processor_SDK_RTOS_DSSr|r|}r|(jUjj|ubaubjp|j)r|}r|(jUjKjjr|j j|jjj}r|(j]r|Xuser interfacer|aj]j]j]r|Uid207r|aj]ujKjhj]r|(j)r|}r|(jXUser Interfacer|jj|j j|jj"j}r|(j]j]j]j]j]ujKjhj]r|j%XUser Interfacer|r|}r|(jj|jj|ubaubj)r|}r|(jUjKjj|j j|jjj}r|(j]r|Xdriver configurationr|aj]j]j]r|Uid208r|aj]ujKjhj]r|(j)r|}r|(jXDriver Configurationr|jj|j j|jj"j}r|(j]j]j]j]j]ujKjhj]r|j%XDriver Configurationr|r|}r|(jj|jj|ubaubjb)r|}r|(jX**CAL Configuration Structure**r|jj|j j|jjfj}r|(j]r|Ucal-configuration-structurer|aj]j]j]j]r|hjj|j j|jj&j}r}(j2j3j]j]j]j]j]ujMjhj]r}j%X'#include r }r }}r }(jUjj}ubaubeubeubj)r }}r }(jUjKjjr|j j|jjj}r}(j]r}X applicationr}aj]j]j]r}Uid210r}aj]ujK2jhj]r}(j)r}}r}(jX Applicationr}jj }j j|jj"j}r}(j]j]j]j]j]ujK2jhj]r}j%X Applicationr}r}}r}(jj}jj}ubaubj)r}}r}(jUjKjj }j j|jjj}r}(j]r}Xexamplesr }aj]j]j]r!}Uid211r"}aj]ujK5jhj]r#}(j)r$}}r%}(jXExamplesr&}jj}j j|jj"j}r'}(j]j]j]j]j]ujK5jhj]r(}j%XExamplesr)}r*}}r+}(jj&}jj$}ubaubj)r,}}r-}(jUjj}j j|jjj}r.}(j]j]j]j]j]ujNjhj]r/}j)r0}}r1}(jUj}r2}(j]j]j]j]j]UcolsKujj,}j]r3}(j)r4}}r5}(jUj}r6}(j]j]j]j]j]UcolwidthKujj0}j]jjubj)r7}}r8}(jUj}r9}(j]j]j]j]j]UcolwidthKujj0}j]jjubj)r:}}r;}(jUj}r<}(j]j]j]j]j]UcolwidthKujj0}j]jjubj)r=}}r>}(jUj}r?}(j]j]j]j]j]ujj0}j]r@}j)rA}}rB}(jUj}rC}(j]j]j]j]j]ujj=}j]rD}(j)rE}}rF}(jUj}rG}(j]j]j]j]j]ujjA}j]rH}jX)rI}}rJ}(jXNamerK}jjE}j j|jj\j}rL}(j]j]j]j]j]ujK8j]rM}j%XNamerN}rO}}rP}(jjK}jjI}ubaubajjubj)rQ}}rR}(jUj}rS}(j]j]j]j]j]ujjA}j]rT}j)rU}}rV}(jUj}rW}(j]j]j]j]j]ujjQ}j]rX}j)rY}}rZ}(jX Descriptionr[}jKjjU}j j|jjj}r\}(j]j]j]j]j]ujKj]r]}j%X Descriptionr^}r_}}r`}(jj[}jjY}ubaubajjubajjubj)ra}}rb}(jUj}rc}(j]j]j]j]j]ujjA}j]rd}j)re}}rf}(jUj}rg}(j]j]j]j]j]ujja}j]rh}j)ri}}rj}(jXExpected Resultsrk}jKjje}j j|jjj}rl}(j]j]j]j]j]ujKj]rm}j%XExpected Resultsrn}ro}}rp}(jjk}jji}ubaubajjubajjubejjubajjubj)rq}}rr}(jUj}rs}(j]j]j]j]j]ujj0}j]rt}(j)ru}}rv}(jUj}rw}(j]j]j]j]j]ujjq}j]rx}(j)ry}}rz}(jUj}r{}(j]j]j]j]j]ujju}j]r|}jX)r}}}r~}(jXCapture Color Bar from UB954r}jjy}j j|jj\j}r}(j]j]j]j]j]ujK:j]r}j%XCapture Color Bar from UB954r}r}}r}(jj}jj}}ubaubajjubj)r}}r}(jUj}r}(j]j]j]j]j]ujju}j]r}j)r}}r}(jUj}r}(j]j]j]j]j]ujj}j]r}j)r}}r}(jXGExample demonstrating Capture from UB954 This captures a Fixed pattern.r}jKjj}j j|jjj}r}(j]j]j]j]j]ujKj]r}j%XGExample demonstrating Capture from UB954 This captures a Fixed pattern.r}r}}r}(jj}jj}ubaubajjubajjubj)r}}r}(jUj}r}(j]j]j]j]j]ujju}j]r}j)r}}r}(jUj}r}(j]j]j]j]j]ujj}j]r}j)r}}r}(jXExample captures required frames from UB954 and runs till completion. The Captured buffers can be saved on PC using the load raw commands.r}jKjj}j j|jjj}r}(j]j]j]j]j]ujKj]r}j%XExample captures required frames from UB954 and runs till completion. The Captured buffers can be saved on PC using the load raw commands.r}r}}r}(jj}jj}ubaubajjubajjubejjubj)r}}r}(jUj}r}(j]j]j]j]j]ujjq}j]r}(j)r}}r}(jUj}r}(j]j]j]j]j]ujj}j]r}jX)r}}r}(jX3Capture image from UB964 + SAT88 & OV10635 sensors.r}jj}j j|jj\j}r}(j]j]j]j]j]ujKCj]r}j%X3Capture image from UB964 + SAT88 & OV10635 sensors.r}r}}r}(jj}jj}ubaubajjubj)r}}r}(jUj}r}(j]j]j]j]j]ujj}j]r}j)r}}r}(jUj}r}(j]j]j]j]j]ujj}j]r}j)r}}r}(jX9Example demonstrates capturing the image from the sensor.r}jKjj}j j|jjj}r}(j]j]j]j]j]ujKj]r}j%X9Example demonstrates capturing the image from the sensor.r}r}}r}(jj}jj}ubaubajjubajjubj)r}}r}(jUj}r}(j]j]j]j]j]ujj}j]r}j)r}}r}(jUj}r}(j]j]j]j]j]ujj}j]r}j)r}}r}(jXExample captures required frames from the 4 Ov10635 sensors and runs till completion. The captured buffers can be saved on PC using the load raw commands.r}jKjj}j j|jjj}r}(j]j]j]j]j]ujKj]r}j%XExample captures required frames from the 4 Ov10635 sensors and runs till completion. The captured buffers can be saved on PC using the load raw commands.r}r}}r}(jj}jj}ubaubajjubajjubejjubejjubejjubaubeubeubj)r}}r}(jUjKjjr|j j|jjj}r}(j]r}Xadditional referencesr}aj]j]j]r}Uid212r}aj]ujKOjhj]r}(j)r}}r}(jXAdditional Referencesr}jj}j j|jj"j}r}(j]j]j]j]j]ujKOjhj]r}j%XAdditional Referencesr}r}}r}(jj}jj}ubaubj)r}}r}(jUjj}j j|jjj}r}(j]j]j]j]j]ujNjhj]r}j)r}}r}(jUj}r}(j]j]j]j]j]UcolsKujj}j]r}(j)r}}r}(jUj}r}(j]j]j]j]j]UcolwidthK#ujj}j]jjubj)r}}r}(jUj}r}(j]j]j]j]j]UcolwidthK(ujj}j]jjubj)r}}r}(jUj}r}(j]j]j]j]j]ujj}j]r}(j)r}}r}(jUj}r}(j]j]j]j]j]ujj}j]r}(j)r}}r}(jUj}r}(j]j]j]j]j]ujj}j]r}jX)r}}r~(jX **Document**r~jj}j j|jj\j}r~(j]j]j]j]j]ujKRj]r~j|)r~}r~(jj~j}r~(j]j]j]j]j]ujj}j]r~j%XDocumentr~r ~}r ~(jUjj~ubajjubaubajjubj)r ~}r ~(jUj}r ~(j]j]j]j]j]ujj}j]r~jX)r~}r~(jX **Location**r~jj ~j j|jj\j}r~(j]j]j]j]j]ujKRj]r~j|)r~}r~(jj~j}r~(j]j]j]j]j]ujj~j]r~j%XLocationr~r~}r~(jUjj~ubajjubaubajjubejjubj)r~}r~(jUj}r~(j]j]j]j]j]ujj}j]r~(j)r~}r ~(jUj}r!~(j]j]j]j]j]ujj~j]r"~jX)r#~}r$~(jXAPI Reference Manualr%~jj~j j|jj\j}r&~(j]j]j]j]j]ujKTj]r'~j%XAPI Reference Manualr(~r)~}r*~(jj%~jj#~ubaubajjubj)r+~}r,~(jUj}r-~(j]j]j]j]j]ujj~j]r.~jX)r/~}r0~(jXP$(TI_PDK_INSTALL_DIR)\\packages\\ti \\drv\\cal\\docs\\doxygen\\html\\index. htmljj+~j j|jj\j}r1~(j]j]j]j]j]ujKTj]r2~j%XH$(TI_PDK_INSTALL_DIR)\packages\ti \drv\cal\docs\doxygen\html\index. htmlr3~r4~}r5~(jXP$(TI_PDK_INSTALL_DIR)\\packages\\ti \\drv\\cal\\docs\\doxygen\\html\\index. htmljj/~ubaubajjubejjubejjubejjubaubeubj)r6~}r7~(jUjjr|j j|jjj}r8~(j]j]j]j]r9~Ubuilding-cal-examplesr:~aj]r;~haujKZjhj]r<~(j)r=~}r>~(jXBuilding CAL examplesr?~jj6~j j|jj"j}r@~(j]j]j]j]j]ujKZjhj]rA~j%XBuilding CAL examplesrB~rC~}rD~(jj?~jj=~ubaubj)rE~}rF~(jUjj6~j j|jjj}rG~(jX-j]j]j]j]j]ujK\jhj]rH~(j)rI~}rJ~(jXNCAL examples and dependent libraries are built from the top level cal makefilejjE~j j|jj j}rK~(j]j]j]j]j]ujNjhj]rL~jX)rM~}rN~(jXNCAL examples and dependent libraries are built from the top level cal makefilerO~jjI~j j|jj\j}rP~(j]j]j]j]j]ujK\j]rQ~j%XNCAL examples and dependent libraries are built from the top level cal makefilerR~rS~}rT~(jjO~jjM~ubaubaubj)rU~}rV~(jXcd /packages/ti/drv/calrW~jjE~j j|jj j}rX~(j]j]j]j]j]ujNjhj]rY~jX)rZ~}r[~(jjW~jjU~j j|jj\j}r\~(j]j]j]j]j]ujK^j]r]~j%Xcd /packages/ti/drv/calr^~r_~}r`~(jjW~jjZ~ubaubaubj)ra~}rb~(jX1To build: make -s PDK_INSTALL_PATH=/packagesrc~jjE~j j|jj j}rd~(j]j]j]j]j]ujNjhj]re~jX)rf~}rg~(jjc~jja~j j|jj\j}rh~(j]j]j]j]j]ujK_j]ri~j%X1To build: make -s PDK_INSTALL_PATH=/packagesrj~rk~}rl~(jjc~jjf~ubaubaubj)rm~}rn~(jX8To clean: make -s clean PDK_INSTALL_PATH=/packages jjE~j j|jj j}ro~(j]j]j]j]j]ujNjhj]rp~jX)rq~}rr~(jX7To clean: make -s clean PDK_INSTALL_PATH=/packagesrs~jjm~j j|jj\j}rt~(j]j]j]j]j]ujK`j]ru~j%X7To clean: make -s clean PDK_INSTALL_PATH=/packagesrv~rw~}rx~(jjs~jjq~ubaubaubeubeubj)ry~}rz~(jUjjr|j j|jjj}r{~(j]j]j]j]r|~U cal-examplesr}~aj]r~~hCaujKcjhj]r~(j)r~}r~(jX CAL examplesr~jjy~j j|jj"j}r~(j]j]j]j]j]ujKcjhj]r~j%X CAL examplesr~r~}r~(jj~jj~ubaubjb)r~}r~(jX *Description*r~jKjjy~j j|jjfj}r~(j]r~Uid213r~aj]j]r~X descriptionr~aj]j]ujNjhj]r~j<)r~}r~(jj~j}r~(j]j]j]j]j]ujj~j]r~j%X Descriptionr~r~}r~(jUjj~ubajjDubaubjX)r~}r~(jX\CAL examples uses the CSI2 Capture port present on the EVM which is connected to CAL. The sensors are connected to the CSI2 capture port. The examples supports capturing from either UB954 or UB964 + SAT88 + 4 OV10635 sensors connected over the FPD link. The Example captures the input frame data coming from CSI2 port and writes back to the memory.r~jjy~j j|jj\j}r~(j]j]j]j]j]ujKhjhj]r~j%X\CAL examples uses the CSI2 Capture port present on the EVM which is connected to CAL. The sensors are connected to the CSI2 capture port. The examples supports capturing from either UB954 or UB964 + SAT88 + 4 OV10635 sensors connected over the FPD link. The Example captures the input frame data coming from CSI2 port and writes back to the memory.r~r~}r~(jj~jj~ubaubj)r~}r~(jUjjy~j j|jjj}r~(j]j]j]j]j]ujKojhj]r~j)r~}r~(jUjKjj~j j|jjj}r~(j]j]j]j]j]ujKjhj]ubaubjb)r~}r~(jX**Running the Cal examples**r~jjy~j j|jjfj}r~(j]r~Urunning-the-cal-examplesr~aj]j]j]j]r~haujNjhj]r~j|)r~}r~(jj~j}r~(j]j]j]j]j]ujj~j]r~j%XRunning the Cal examplesr~r~}r~(jUjj~ubajjubaubjX)r~}r~(jX**Configuring Sensor**:r~jjy~j j|jj\j}r~(j]j]j]j]j]ujKtjhj]r~(j|)r~}r~(jX**Configuring Sensor**j}r~(j]j]j]j]j]ujj~j]r~j%XConfiguring Sensorr~r~}r~(jUjj~ubajjubj%X:r~}r~(jX:jj~ubeubj)r~}r~(jUjjy~j j|jjj}r~(jX-j]j]j]j]j]ujKvjhj]r~(j)r~}r~(jX{Make sure the UB954 Evm is connected to the CSI2 capture port and it is powered on before running the example for option 0.jj~j j|jj j}r~(j]j]j]j]j]ujNjhj]r~jX)r~}r~(jX{Make sure the UB954 Evm is connected to the CSI2 capture port and it is powered on before running the example for option 0.r~jj~j j|jj\j}r~(j]j]j]j]j]ujKvj]r~j%X{Make sure the UB954 Evm is connected to the CSI2 capture port and it is powered on before running the example for option 0.r~r~}r~(jj~jj~ubaubaubj)r~}r~(jXMake sure the UB964 Evm is connected to the CSI2 capture port along with 4 OV10635x cameras over the FPD link to the RIN0 to RIN3 ports and the EVM is powered on before running the example for option 1. jj~j j|jj j}r~(j]j]j]j]j]ujNjhj]r~jX)r~}r~(jXMake sure the UB964 Evm is connected to the CSI2 capture port along with 4 OV10635x cameras over the FPD link to the RIN0 to RIN3 ports and the EVM is powered on before running the example for option 1.r~jj~j j|jj\j}r~(j]j]j]j]j]ujKxj]r~j%XMake sure the UB964 Evm is connected to the CSI2 capture port along with 4 OV10635x cameras over the FPD link to the RIN0 to RIN3 ports and the EVM is powered on before running the example for option 1.r~r~}r~(jj~jj~ubaubaubeubjX)r~}r~(jX**CCS connection**:r~jjy~j j|jj\j}r~(j]j]j]j]j]ujK|jhj]r~(j|)r~}r~(jX**CCS connection**j}r~(j]j]j]j]j]ujj~j]r~j%XCCS connectionr~r~}r~(jUjj~ubajjubj%X:r~}r~(jX:jj~ubeubj)r~}r~(jUjjy~j j|jjj}r~(jX-j]j]j]j]j]ujK~jhj]r~(j)r~}r~(jX@Load the System firmware as specified in SCICLIENT documentationr~jj~j j|jj j}r~(j]j]j]j]j]ujNjhj]r~jX)r~}r~(jj~jj~j j|jj\j}r~(j]j]j]j]j]ujK~j]r~j%X@Load the System firmware as specified in SCICLIENT documentationr~r~}r~(jj~jj~ubaubaubj)r~}r~(jX)Load the generated executable file in CCSrjj~j j|jj j}r(j]j]j]j]j]ujNjhj]rjX)r}r(jjjj~j j|jj\j}r(j]j]j]j]j]ujKj]rj%X)Load the generated executable file in CCSrr}r (jjjjubaubaubj)r }r (jXRun the application.r jj~j j|jj j}r (j]j]j]j]j]ujNjhj]rjX)r}r(jj jj j j|jj\j}r(j]j]j]j]j]ujKj]rj%XRun the application.rr}r(jj jjubaubaubj)r}r(jX/select the input based on the sensor connected.rjj~j j|jj j}r(j]j]j]j]j]ujNjhj]rjX)r}r(jjjjj j|jj\j}r(j]j]j]j]j]ujKj]rj%X/select the input based on the sensor connected.rr }r!(jjjjubaubaubj)r"}r#(jX<Example will run till completion after capturing the frames.r$jj~j j|jj j}r%(j]j]j]j]j]ujNjhj]r&jX)r'}r((jj$jj"j j|jj\j}r)(j]j]j]j]j]ujKj]r*j%X<Example will run till completion after capturing the frames.r+r,}r-(jj$jj'ubaubaubj)r.}r/(jXGDump the buffers scripting console using the loadraw command specified.r0jj~j j|jj j}r1(j]j]j]j]j]ujNjhj]r2jX)r3}r4(jj0jj.j j|jj\j}r5(j]j]j]j]j]ujKj]r6j%XGDump the buffers scripting console using the loadraw command specified.r7r8}r9(jj0jj3ubaubaubj)r:}r;(jX8Verify the output by viewing the captured image on PC. jj~j XSinternal padding after source/rtos/PDK_Platform_Software/Device_Drivers/CAL.rst.incr<jj j}r=(j]j]j]j]j]ujNjhj]r>jX)r?}r@(jX6Verify the output by viewing the captured image on PC.rAjj:j j|jj\j}rB(j]j]j]j]j]ujKj]rCj%X6Verify the output by viewing the captured image on PC.rDrE}rF(jjAjj?ubaubaubeubeubeubj j|jjj}rG(j]rHXoverviewrIaj]j]j]rJUid205rKaj]ujKjhj]rL(j)rM}rN(jXOverviewrOjjp|j j|jj"j}rP(j]j]j]j]j]ujKjhj]rQj%XOverviewrRrS}rT(jjOjjMubaubj)rU}rV(jUjKjjp|j j|jjj}rW(j]rXX introductionrYaj]j]j]rZUid206r[aj]ujKjhj]r\(j)r]}r^(jX Introductionr_jjUj j|jj"j}r`(j]j]j]j]j]ujKjhj]raj%X Introductionrbrc}rd(jj_jj]ubaubjX)re}rf(jX}Camera Adapter Layer (CAL) is a very flexible subsystem that enables connection to multiple cameras supporting MIPI CSI-2 over D-PHY serial interface, a LVDS serial interface, and a traditional parallel interface. It also includes an internal write DMA engine connected to VBUSM interface. This document has detailed API description that user can use to make use of the CAL driver.rgjjUj j|jj\j}rh(j]j]j]j]j]ujK jhj]rij%X}Camera Adapter Layer (CAL) is a very flexible subsystem that enables connection to multiple cameras supporting MIPI CSI-2 over D-PHY serial interface, a LVDS serial interface, and a traditional parallel interface. It also includes an internal write DMA engine connected to VBUSM interface. This document has detailed API description that user can use to make use of the CAL driver.rjrk}rl(jjgjjeubaubeubeubj j|jj?j}rm(j]UlevelKj]j]rnjKaUsourcej|j]j]UlineKUtypejAujKjhj]rojX)rp}rq(jX+Duplicate implicit target name: "overview".j}rr(j]j]j]j]j]ujjn|j]rsj%X+Duplicate implicit target name: "overview".rtru}rv(jUjjpubajj\ubaubh)rw}rx(jUjjUj j|jj?j}ry(j]UlevelKj]j]rzj[aUsourcej|j]j]UlineKUtypejAujKjhj]r{jX)r|}r}(jX/Duplicate implicit target name: "introduction".j}r~(j]j]j]j]j]ujjwj]rj%X/Duplicate implicit target name: "introduction".rr}r(jUjj|ubajj\ubaubh)r}r(jUjj|j j|jj?j}r(j]UlevelKj]j]rj|aUsourcej|j]j]UlineKUtypejAujKjhj]rjX)r}r(jX1Duplicate implicit target name: "user interface".j}r(j]j]j]j]j]ujjj]rj%X1Duplicate implicit target name: "user interface".rr}r(jUjjubajj\ubaubh)r}r(jUjj|j j|jj?j}r(j]UlevelKj]j]rj|aUsourcej|j]j]UlineKUtypejAujKjhj]rjX)r}r(jX7Duplicate implicit target name: "driver configuration".j}r(j]j]j]j]j]ujjj]rj%X7Duplicate implicit target name: "driver configuration".rr}r(jUjjubajj\ubaubh)r}r(jUjj|j j|jj?j}r(j]UlevelKj]j]rj|aUsourcej|j]j]UlineKUtypejAujKjhj]rjX)r}r(jX'Duplicate implicit target name: "apis".j}r(j]j]j]j]j]ujjj]rj%X'Duplicate implicit target name: "apis".rr}r(jUjjubajj\ubaubh)r}r(jUjj }j j|jj?j}r(j]UlevelKj]j]rj}aUsourcej|j]j]UlineK2UtypejAujK2jhj]rjX)r}r(jX.Duplicate implicit target name: "application".j}r(j]j]j]j]j]ujjj]rj%X.Duplicate implicit target name: "application".rr}r(jUjjubajj\ubaubh)r}r(jUjj}j j|jj?j}r(j]UlevelKj]j]rj"}aUsourcej|j]j]UlineK5UtypejAujK5jhj]rjX)r}r(jX+Duplicate implicit target name: "examples".j}r(j]j]j]j]j]ujjj]rj%X+Duplicate implicit target name: "examples".rr}r(jUjjubajj\ubaubh)r}r(jUjj}j j|jj?j}r(j]UlevelKj]j]rj}aUsourcej|j]j]UlineKOUtypejAujKOjhj]rjX)r}r(jX8Duplicate implicit target name: "additional references".j}r(j]j]j]j]j]ujjj]rj%X8Duplicate implicit target name: "additional references".rr}r(jUjjubajj\ubaubh)r}r(jUj}r(j]UlevelKj]j]rj~aUsourcej j]j]UlineKUtypejXujj~j]rjX)r}r(jX.Duplicate explicit target name: "description".j}r(j]j]j]j]j]ujjj]rj%X.Duplicate explicit target name: "description".rr}r(jUjjubajj\ubajj?ubh)r}r(jUjj)r}r(jUjKjj)r}r(jUjhj j jjj}r(j]j]j]j]rUudmaraj]rhaujKjhj]r(j)r}r(jXUDMArjjj j jj"j}r(j]j]j]j]j]ujKjhj]rj%XUDMArr}r(jjjjubaubj))r}r(jX?http://processors.wiki.ti.com/index.php/Processor_SDK_RTOS_UDMAjjj j,X=source/rtos/PDK_Platform_Software/Device_Drivers/UDMA.rst.incrr}rbjj0j}r(j2j3j]j]j]j]j]ujKjhj]rj%X?http://processors.wiki.ti.com/index.php/Processor_SDK_RTOS_UDMArr}r(jUjjubaubjj)r}r(jUjKjjj jjjj}r(j]rXuser interfaceraj]j]j]rUid216raj]ujK(jhj]r(j)r}r(jXUser Interfacerjjj jjj"j}r(j]j]j]j]j]ujK(jhj]rj%XUser Interfacerr}r(jjjjubaubj)r}r(jUjKjjj jjjj}r(j]rXdriver configurationraj]j]j]r Uid217r aj]ujK+jhj]r (j)r }r (jXDriver Configurationrjjj jjj"j}r(j]j]j]j]j]ujK+jhj]rj%XDriver Configurationrr}r(jjjj ubaubjb)r}r(jX **UDMA Configuration Structure**rjjj jjjfj}r(j]rUudma-configuration-structureraj]j]j]j]rhaujNjhj]rj|)r}r(jjj}r(j]j]j]j]j]ujjj]rj%XUDMA Configuration Structurer r!}r"(jUjjubajjubaubjX)r#}r$(jXFor details about individual fields of UDMA library structure, see the Doxygen help by opening PDK_INSTALL_DIR\\packages\\ti\\drv\\udma\\docs\\doxygen\\html\\index.html.jjj jjj\j}r%(j]j]j]j]j]ujK0jhj]r&j%XFor details about individual fields of UDMA library structure, see the Doxygen help by opening PDK_INSTALL_DIR\packages\ti\drv\udma\docs\doxygen\html\index.html.r'r(}r)(jXFor details about individual fields of UDMA library structure, see the Doxygen help by opening PDK_INSTALL_DIR\\packages\\ti\\drv\\udma\\docs\\doxygen\\html\\index.html.jj#ubaubeubj)r*}r+(jUjKjjj jjjj}r,(j]r-Xapisr.aj]j]j]r/Uid218r0aj]ujK5jhj]r1(j)r2}r3(jXAPIsr4jj*j jjj"j}r5(j]j]j]j]j]ujK5jhj]r6j%XAPIsr7r8}r9(jj4jj2ubaubjX)r:}r;(jXHThe UDMA driver API can be broadly divided into the following categoriesr<jj*j jjj\j}r=(j]j]j]j]j]ujK7jhj]r>j%XHThe UDMA driver API can be broadly divided into the following categoriesr?r@}rA(jj<jj:ubaubj)rB}rC(jUjj*j jjjj}rD(jX-j]j]j]j]j]ujK9jhj]rE(j)rF}rG(jXUDMAP native channel APIrHjjBj jjj j}rI(j]j]j]j]j]ujNjhj]rJjX)rK}rL(jjHjjFj jjj\j}rM(j]j]j]j]j]ujK9j]rNj%XUDMAP native channel APIrOrP}rQ(jjHjjKubaubaubj)rR}rS(jXDRU (External UTC) channel APIrTjjBj jjj j}rU(j]j]j]j]j]ujNjhj]rVjX)rW}rX(jjTjjRj jjj\j}rY(j]j]j]j]j]ujK:j]rZj%XDRU (External UTC) channel APIr[r\}r](jjTjjWubaubaubj)r^}r_(jXPDMA channel operationsr`jjBj jjj j}ra(j]j]j]j]j]ujNjhj]rbjX)rc}rd(jj`jj^j jjj\j}re(j]j]j]j]j]ujK;j]rfj%XPDMA channel operationsrgrh}ri(jj`jjcubaubaubj)rj}rk(jXEvent and interrupt APIrljjBj jjj j}rm(j]j]j]j]j]ujNjhj]rnjX)ro}rp(jjljjjj jjj\j}rq(j]j]j]j]j]ujKjj*j jjj&j}r(j2j3j]j]j]j]j]ujMgjhj]rj%X#include rr}r(jUjjubaubeubeubj)r}r(jUjKjjj jjjj}r(j]rX applicationraj]j]j]rUid219raj]ujKKjhj]r(j)r}r(jX Applicationrjjj jjj"j}r(j]j]j]j]j]ujKKjhj]rj%X Applicationrr}r(jjjjubaubj)r}r(jUjKjjj jjjj}r(j]rXexamplesraj]j]j]rUid220raj]ujKNjhj]r(j)r}r(jXExamplesrjjj jjj"j}r(j]j]j]j]j]ujKNjhj]rj%XExamplesrr}r(jjjjubaubj)r}r(jUjjj jjjj}r(j]j]j]j]j]ujNjhj]rj)r}r(jUj}r(j]j]j]j]j]UcolsKujjj]r(j)r}r€(jUj}rÀ(j]j]j]j]j]UcolwidthKujjj]jjubj)rĀ}rŀ(jUj}rƀ(j]j]j]j]j]UcolwidthKujjj]jjubj)rǀ}rȀ(jUj}rɀ(j]j]j]j]j]UcolwidthKujjj]jjubj)rʀ}rˀ(jUj}r̀(j]j]j]j]j]ujjj]r̀j)r΀}rπ(jUj}rЀ(j]j]j]j]j]ujjʀj]rр(j)rҀ}rӀ(jUj}rԀ(j]j]j]j]j]ujj΀j]rՀjX)rր}r׀(jXNamer؀jjҀj jjj\j}rـ(j]j]j]j]j]ujKQj]rڀj%XNamerۀr܀}r݀(jj؀jjրubaubajjubj)rހ}r߀(jUj}r(j]j]j]j]j]ujj΀j]rj)r}r(jUj}r(j]j]j]j]j]ujjހj]rj)r}r(jX DescriptionrjKjjj jjjj}r(j]j]j]j]j]ujKj]rj%X Descriptionrr}r(jjjjubaubajjubajjubj)r}r(jUj}r(j]j]j]j]j]ujj΀j]rj)r}r(jUj}r(j]j]j]j]j]ujjj]rj)r}r(jXExpected ResultsrjKjjj jjjj}r(j]j]j]j]j]ujKj]rj%XExpected Resultsrr}r(jjjjubaubajjubajjubejjubajjubj)r}r(jUj}r(j]j]j]j]j]ujjj]r(j)r}r(jUj}r(j]j]j]j]j]ujjj]r(j)r}r(jUj}r(j]j]j]j]j]ujjj]r jX)r }r (jXUDMA ADC RX applicationr jjj jjj\j}r (j]j]j]j]j]ujKSj]rj%XUDMA ADC RX applicationrr}r(jj jj ubaubajjubj)r}r(jUj}r(j]j]j]j]j]ujjj]rj)r}r(jUj}r(j]j]j]j]j]ujjj]rj)r}r(jXThis performs PDMA RX data capture from ADC. ADC is configured in single shot mode and captures APP_ADC_NUM_CH channel of ADC data. The FIFO is configured to generate a DMA trigger after all channel data is capturedrjKjjj jjjj}r(j]j]j]j]j]ujKj]rj%XThis performs PDMA RX data capture from ADC. ADC is configured in single shot mode and captures APP_ADC_NUM_CH channel of ADC data. The FIFO is configured to generate a DMA trigger after all channel data is capturedrr }r!(jjjjubaubajjubajjubj)r"}r#(jUj}r$(j]j]j]j]j]ujjj]r%j)r&}r'(jUj}r((j]j]j]j]j]ujj"j]r)j)r*}r+(jXRThe application checks the ADC channel ID and prints pass on successful completionr,jKjj&j jjjj}r-(j]j]j]j]j]ujKj]r.j%XRThe application checks the ADC channel ID and prints pass on successful completionr/r0}r1(jj,jj*ubaubajjubajjubejjubj)r2}r3(jUj}r4(j]j]j]j]j]ujjj]r5(j)r6}r7(jUj}r8(j]j]j]j]j]ujj2j]r9jX)r:}r;(jXUDMA Chaining applicationr<jj6j jjj\j}r=(j]j]j]j]j]ujKbj]r>j%XUDMA Chaining applicationr?r@}rA(jj<jj:ubaubajjubj)rB}rC(jUj}rD(j]j]j]j]j]ujj2j]rEj)rF}rG(jUj}rH(j]j]j]j]j]ujjBj]rIj)rJ}rK(jXUDMA chaining sample application performing a chain of block copy using channel global trigger: CH0 -> CH1 -> ... -> CHx. The first channel doesn't user a global trigger and each channel triggers the next channel's global trigger through the channel's TR event register. A channel's source buffer is previous channel destination buffer. This ensures that chaining trigger worked in a synchronized manner when the memory compare matchesrLjKjjFj jjjj}rM(j]j]j]j]j]ujKj]rNj%XUDMA chaining sample application performing a chain of block copy using channel global trigger: CH0 -> CH1 -> ... -> CHx. The first channel doesn't user a global trigger and each channel triggers the next channel's global trigger through the channel's TR event register. A channel's source buffer is previous channel destination buffer. This ensures that chaining trigger worked in a synchronized manner when the memory compare matchesrOrP}rQ(jjLjjJubaubajjubajjubj)rR}rS(jUj}rT(j]j]j]j]j]ujj2j]rUj)rV}rW(jUj}rX(j]j]j]j]j]ujjRj]rYj)rZ}r[(jXiThe application checks the destination buffer with source buffer and prints pass on successful completionr\jKjjVj jjjj}r](j]j]j]j]j]ujKj]r^j%XiThe application checks the destination buffer with source buffer and prints pass on successful completionr_r`}ra(jj\jjZubaubajjubajjubejjubj)rb}rc(jUj}rd(j]j]j]j]j]ujjj]re(j)rf}rg(jUj}rh(j]j]j]j]j]ujjbj]rijX)rj}rk(jXUDMA CRC applicationrljjfj jjj\j}rm(j]j]j]j]j]ujK}j]rnj%XUDMA CRC applicationrorp}rq(jjljjjubaubajjubj)rr}rs(jUj}rt(j]j]j]j]j]ujjbj]ruj)rv}rw(jUj}rx(j]j]j]j]j]ujjrj]ryj)rz}r{(jX This performs UDMA CRC operationr|jKjjvj jjjj}r}(j]j]j]j]j]ujKj]r~j%X This performs UDMA CRC operationrr}r(jj|jjzubaubajjubajjubj)r}r(jUj}r(j]j]j]j]j]ujjbj]rj)r}r(jUj}r(j]j]j]j]j]ujjj]rj)r}r(jXvThe application checks the calculated CRC value with pre-calculated CRC value and prints pass on successful completionrjKjjj jjjj}r(j]j]j]j]j]ujKj]rj%XvThe application checks the calculated CRC value with pre-calculated CRC value and prints pass on successful completionrr}r(jjjjubaubajjubajjubejjubj)r}r(jUj}r(j]j]j]j]j]ujjj]r(j)r}r(jUj}r(j]j]j]j]j]ujjj]rjX)r}r(jXUDMA Direct TR DRU applicationrjjj jjj\j}r(j]j]j]j]j]ujKj]rj%XUDMA Direct TR DRU applicationrr}r(jjjjubaubajjubj)r}r(jUj}r(j]j]j]j]j]ujjj]rj)r}r(jUj}r(j]j]j]j]j]ujjj]rj)r}r(jXeUDMA DRU memcpy sample application performing block copy using direct TR submission via DRU registersrjKjjj jjjj}r(j]j]j]j]j]ujKj]rj%XeUDMA DRU memcpy sample application performing block copy using direct TR submission via DRU registersrr}r(jjjjubaubajjubajjubj)r}r(jUj}r(j]j]j]j]j]ujjj]rj)r}r(jUj}r(j]j]j]j]j]ujjj]rj)r}r(jXiThe application checks the destination buffer with source buffer and prints pass on successful completionrjKjjj jjjj}r(j]j]j]j]j]ujKj]rj%XiThe application checks the destination buffer with source buffer and prints pass on successful completionrr}r(jjjjubaubajjubajjubejjubj)r}rÁ(jUj}rā(j]j]j]j]j]ujjj]rŁ(j)rƁ}rǁ(jUj}rȁ(j]j]j]j]j]ujjj]rɁjX)rʁ}rˁ(jX!UDMA In-Direct TR DRU applicationŕjjƁj jjj\j}ŕ(j]j]j]j]j]ujKj]r΁j%X!UDMA In-Direct TR DRU applicationrρrЁ}rс(jj́jjʁubaubajjubj)rҁ}rӁ(jUj}rԁ(j]j]j]j]j]ujjj]rՁj)rց}rׁ(jUj}r؁(j]j]j]j]j]ujjҁj]rفj)rځ}rہ(jXUDMA DRU memory copy sample application performing block copy using Type 15 Transfer Record (TR15) using Transfer Record Packet Descriptor (TRPD) for developers.r܁jKjjցj jjjj}r݁(j]j]j]j]j]ujKj]rށj%XUDMA DRU memory copy sample application performing block copy using Type 15 Transfer Record (TR15) using Transfer Record Packet Descriptor (TRPD) for developers.r߁r}r(jj܁jjځubaubajjubajjubj)r}r(jUj}r(j]j]j]j]j]ujjj]rj)r}r(jUj}r(j]j]j]j]j]ujjj]rj)r}r(jXiThe application checks the destination buffer with source buffer and prints pass on successful completionrjKjjj jjjj}r(j]j]j]j]j]ujKj]rj%XiThe application checks the destination buffer with source buffer and prints pass on successful completionrr}r(jjjjubaubajjubajjubejjubj)r}r(jUj}r(j]j]j]j]j]ujjj]r(j)r}r(jUj}r(j]j]j]j]j]ujjj]rjX)r}r(jXUDMA Blockcopy applicationrjjj jjj\j}r(j]j]j]j]j]ujKj]rj%XUDMA Blockcopy applicationrr}r(jjjjubaubajjubj)r}r(jUj}r(j]j]j]j]j]ujjj]rj)r}r(jUj}r(j]j]j]j]j]ujjj]r j)r }r (jXUDMA memory copy sample application performing block copy using Type 15 Transfer Record (TR15) using Transfer Record Packet Descriptor (TRPD)r jKjjj jjjj}r (j]j]j]j]j]ujKj]rj%XUDMA memory copy sample application performing block copy using Type 15 Transfer Record (TR15) using Transfer Record Packet Descriptor (TRPD)rr}r(jj jj ubaubajjubajjubj)r}r(jUj}r(j]j]j]j]j]ujjj]rj)r}r(jUj}r(j]j]j]j]j]ujjj]rj)r}r(jXiThe application checks the destination buffer with source buffer and prints pass on successful completionrjKjjj jjjj}r(j]j]j]j]j]ujKj]rj%XiThe application checks the destination buffer with source buffer and prints pass on successful completionrr }r!(jjjjubaubajjubajjubejjubejjubejjubaubeubeubj)r"}r#(jUjKjjj jjjj}r$(j]r%Xadditional referencesr&aj]j]j]r'Uid221r(aj]ujKjhj]r)(j)r*}r+(jXAdditional Referencesr,jj"j jjj"j}r-(j]j]j]j]j]ujKjhj]r.j%XAdditional Referencesr/r0}r1(jj,jj*ubaubj)r2}r3(jUjj"j jjjj}r4(j]j]j]j]j]ujNjhj]r5j)r6}r7(jUj}r8(j]j]j]j]j]UcolsKujj2j]r9(j)r:}r;(jUj}r<(j]j]j]j]j]UcolwidthK#ujj6j]jjubj)r=}r>(jUj}r?(j]j]j]j]j]UcolwidthK/packages/ti/drv/udmarjjj jjj j}r(j]j]j]j]j]ujNjhj]rjX)r‚}rÂ(jjjjj jjj\j}rĂ(j]j]j]j]j]ujKj]rłj%Xcd /packages/ti/drv/udmarƂrǂ}rȂ(jjjj‚ubaubaubj)rɂ}rʂ(jX1To build: make -s PDK_INSTALL_PATH=/packagesr˂jjj jjj j}r̂(j]j]j]j]j]ujNjhj]r͂jX)r΂}rς(jj˂jjɂj jjj\j}rЂ(j]j]j]j]j]ujKj]rтj%X1To build: make -s PDK_INSTALL_PATH=/packagesr҂rӂ}rԂ(jj˂jj΂ubaubaubj)rՂ}rւ(jX8To clean: make -s clean PDK_INSTALL_PATH=/packages jjj jjj j}rׂ(j]j]j]j]j]ujNjhj]r؂jX)rق}rڂ(jX7To clean: make -s clean PDK_INSTALL_PATH=/packagesrۂjjՂj jjj\j}r܂(j]j]j]j]j]ujKj]r݂j%X7To clean: make -s clean PDK_INSTALL_PATH=/packagesrނr߂}r(jjۂjjقubaubaubeubeubj)r}r(jUjjj jjjj}r(j]j]j]j]rU udma-examplesraj]rhuaujKjhj]r(j)r}r(jX UDMA examplesrjjj jjj"j}r(j]j]j]j]j]ujKjhj]rj%X UDMA examplesrr}r(jjjjubaubjb)r}r(jX *Description*rjKjjj jjjfj}r(j]rUid222raj]j]rX descriptionraj]j]ujNjhj]rj<)r}r(jjj}r(j]j]j]j]j]ujjj]rj%X Descriptionrr}r(jUjjubajjDubaubjX)r}r(jX:UDMA examples demonstrates the key features of the driver.rjjj jjj\j}r(j]j]j]j]j]ujKjhj]rj%X:UDMA examples demonstrates the key features of the driver.rr}r(jjjjubaubj)r}r (jUjjj jjjj}r (j]j]j]j]j]ujKjhj]r j)r }r (jUjKjjj jjjj}r(j]j]j]j]j]ujKjhj]ubaubjb)r}r(jX**Running the UDMA examples**rjjj jjjfj}r(j]rUrunning-the-udma-examplesraj]j]j]j]rhRaujNjhj]rj|)r}r(jjj}r(j]j]j]j]j]ujjj]rj%XRunning the UDMA examplesrr}r(jUjjubajjubaubjX)r}r(jX**CCS connection**:r jjj jjj\j}r!(j]j]j]j]j]ujKjhj]r"(j|)r#}r$(jX**CCS connection**j}r%(j]j]j]j]j]ujjj]r&j%XCCS connectionr'r(}r)(jUjj#ubajjubj%X:r*}r+(jX:jjubeubj)r,}r-(jUjjj jjjj}r.(jX-j]j]j]j]j]ujKjhj]r/(j)r0}r1(jX@Load the System firmware as specified in SCICLIENT documentationr2jj,j jjj j}r3(j]j]j]j]j]ujNjhj]r4jX)r5}r6(jj2jj0j jjj\j}r7(j]j]j]j]j]ujKj]r8j%X@Load the System firmware as specified in SCICLIENT documentationr9r:}r;(jj2jj5ubaubaubj)r<}r=(jX)Load the generated executable file in CCSr>jj,j jjj j}r?(j]j]j]j]j]ujNjhj]r@jX)rA}rB(jj>jj<j jjj\j}rC(j]j]j]j]j]ujKj]rDj%X)Load the generated executable file in CCSrErF}rG(jj>jjAubaubaubj)rH}rI(jXRun the application.rJjj,j jjj j}rK(j]j]j]j]j]ujNjhj]rLjX)rM}rN(jjJjjHj jjj\j}rO(j]j]j]j]j]ujKj]rPj%XRun the application.rQrR}rS(jjJjjMubaubaubj)rT}rU(jXThe application print will be displayed on the CCS and UART console. The UART console used depends on the core in which the application is run. jj,j XTinternal padding after source/rtos/PDK_Platform_Software/Device_Drivers/UDMA.rst.incrVjj j}rW(j]j]j]j]j]ujNjhj]rXjX)rY}rZ(jXThe application print will be displayed on the CCS and UART console. The UART console used depends on the core in which the application is run.r[jjTj jjj\j}r\(j]j]j]j]j]ujKj]r]j%XThe application print will be displayed on the CCS and UART console. The UART console used depends on the core in which the application is run.r^r_}r`(jj[jjYubaubaubeubeubeubj jjjj}ra(j]rbXoverviewrcaj]j]j]rdUid214reaj]ujKjhj]rf(j)rg}rh(jXOverviewrijjj jjj"j}rj(j]j]j]j]j]ujKjhj]rkj%XOverviewrlrm}rn(jjijjgubaubj)ro}rp(jUjKjjj jjjj}rq(j]rrX introductionrsaj]j]j]rtUid215ruaj]ujKjhj]rv(j)rw}rx(jX Introductionryjjoj jjj"j}rz(j]j]j]j]j]ujKjhj]r{j%X Introductionr|r}}r~(jjyjjwubaubjX)r}r(jXThe DMA architecture specifies the data structures used by standard communications modules to facilitate direct memory access (DMA) and to provide a consistent application programming interface (API) to the host software in multi-core devices. The data structures and the API used to manipulate them will be jointly referred to as NAVSS. For more information on NAVSS DMA architecture, refer to the device Technical Reference Manualrjjoj jjj\j}r(j]j]j]j]j]ujK jhj]rj%XThe DMA architecture specifies the data structures used by standard communications modules to facilitate direct memory access (DMA) and to provide a consistent application programming interface (API) to the host software in multi-core devices. The data structures and the API used to manipulate them will be jointly referred to as NAVSS. For more information on NAVSS DMA architecture, refer to the device Technical Reference Manualrr}r(jjjjubaubjX)r}r(jXThe UDMA driver provides API to program the DMA portion of the NAVSS subsystem to setup and initiate transfers. Below are the high level features supported by the driverrjjoj jjj\j}r(j]j]j]j]j]ujKjhj]rj%XThe UDMA driver provides API to program the DMA portion of the NAVSS subsystem to setup and initiate transfers. Below are the high level features supported by the driverrr}r(jjjjubaubj)r}r(jUjjoj jjjj}r(jX-j]j]j]j]j]ujKjhj]r(j)r}r(jX!Both Main and MCU NAVSS instancesrjjj jjj j}r(j]j]j]j]j]ujNjhj]rjX)r}r(jjjjj jjj\j}r(j]j]j]j]j]ujKj]rj%X!Both Main and MCU NAVSS instancesrr}r(jjjjubaubaubj)r}r(jXMSupports all DMA operations from both instances from all the cores in the SOCrjjj jjj j}r(j]j]j]j]j]ujNjhj]rjX)r}r(jjjjj jjj\j}r(j]j]j]j]j]ujKj]rj%XMSupports all DMA operations from both instances from all the cores in the SOCrr}r(jjjjubaubaubj)r}r(jX,UDMAP block copy using native NAVSS channelsrjjj jjj j}r(j]j]j]j]j]ujNjhj]rjX)r}r(jjjjj jjj\j}r(j]j]j]j]j]ujKj]rj%X,UDMAP block copy using native NAVSS channelsrr}r(jjjjubaubaubj)r}r(jX9DRU block copy using direct TR submission to DRU registerrjjj jjj j}r(j]j]j]j]j]ujNjhj]rjX)r}r(jjjjj jjj\j}r(j]j]j]j]j]ujKj]rj%X9DRU block copy using direct TR submission to DRU registerrr}rƒ(jjjjubaubaubj)rÃ}ră(jXLDRU block copy using indirect (PSIL) TR submission to UDMA external channelsrŃjjj jjj j}rƃ(j]j]j]j]j]ujNjhj]rǃjX)rȃ}rɃ(jjŃjjÃj jjj\j}rʃ(j]j]j]j]j]ujKj]r˃j%XLDRU block copy using indirect (PSIL) TR submission to UDMA external channelsr̃r̓}r΃(jjŃjjȃubaubaubj)rσ}rЃ(jX]PDMA module to initiate transfers to/from PDMA peripherals like UART, McASP, McSPI, ADC, MCANrуjjj jjj j}r҃(j]j]j]j]j]ujNjhj]rӃjX)rԃ}rՃ(jjуjjσj jjj\j}rփ(j]j]j]j]j]ujKj]r׃j%X]PDMA module to initiate transfers to/from PDMA peripherals like UART, McASP, McSPI, ADC, MCANr؃rك}rڃ(jjуjjԃubaubaubj)rۃ}r܃(jXHDMA transfer to/from from native PSIL peripherals like EMAC, CPSW, SA2ULr݃jjj jjj j}rރ(j]j]j]j]j]ujNjhj]r߃jX)r}r(jj݃jjۃj jjj\j}r(j]j]j]j]j]ujKj]rj%XHDMA transfer to/from from native PSIL peripherals like EMAC, CPSW, SA2ULrr}r(jj݃jjubaubaubj)r}r(jX`Event and interrupt management like DMA completion, channel chaining, interrupt sharing using IArjjj jjj j}r(j]j]j]j]j]ujNjhj]rjX)r}r(jjjjj jjj\j}r(j]j]j]j]j]ujKj]rj%X`Event and interrupt management like DMA completion, channel chaining, interrupt sharing using IArr}r(jjjjubaubaubj)r}r(jXResources management across instances and cores for UDMAP DMA channels,RX flow, External UTC channel (DRU), interrupt aggregators (IA), interrupt routers (IR),global events, ring accelerators (RA)rjjj jjj j}r(j]j]j]j]j]ujNjhj]rjX)r}r(jjjjj jjj\j}r(j]j]j]j]j]ujKj]rj%XResources management across instances and cores for UDMAP DMA channels,RX flow, External UTC channel (DRU), interrupt aggregators (IA), interrupt routers (IR),global events, ring accelerators (RA)rr}r(jjjjubaubaubj)r}r(jXVInteraction with DMSC RM module via SCICLIENT for all non-RealTime (NRT) configurationrjjj jjj j}r(j]j]j]j]j]ujNjhj]rjX)r}r(jjjjj jjj\j}r(j]j]j]j]j]ujKj]rj%XVInteraction with DMSC RM module via SCICLIENT for all non-RealTime (NRT) configurationrr }r (jjjjubaubaubj)r }r (jX$Supports both TI-RTOS and baremetal jjj jjj j}r (j]j]j]j]j]ujNjhj]rjX)r}r(jX#Supports both TI-RTOS and baremetalrjj j jjj\j}r(j]j]j]j]j]ujKj]rj%X#Supports both TI-RTOS and baremetalrr}r(jjjjubaubaubeubjX)r}r(jX **Notes**rjjoj jjj\j}r(j]j]j]j]j]ujKjhj]rj|)r}r(jjj}r(j]j]j]j]j]ujjj]rj%XNotesr r!}r"(jUjjubajjubaubj)r#}r$(jUjjoj jjjj}r%(jX-j]j]j]j]j]ujK jhj]r&(j)r'}r((jX}UDMA driver doesn't manage/allocate the descriptor and RA memory.The caller need to allocate and provide the required memory.r)jj#j jjj j}r*(j]j]j]j]j]ujNjhj]r+jX)r,}r-(jj)jj'j jjj\j}r.(j]j]j]j]j]ujK j]r/j%X}UDMA driver doesn't manage/allocate the descriptor and RA memory.The caller need to allocate and provide the required memory.r0r1}r2(jj)jj,ubaubaubj)r3}r4(jXUDMA driver doesn't use any global variables. All the required object memory like channel, driver instance, event etc should be allocated by the caller jj#j jjj j}r5(j]j]j]j]j]ujNjhj]r6jX)r7}r8(jXUDMA driver doesn't use any global variables. All the required object memory like channel, driver instance, event etc should be allocated by the callerr9jj3j jjj\j}r:(j]j]j]j]j]ujK!j]r;j%XUDMA driver doesn't use any global variables. All the required object memory like channel, driver instance, event etc should be allocated by the callerr<r=}r>(jj9jj7ubaubaubeubjX)r?}r@(jX\This document has detailed API description that user can use to make use of the UDMA driver.rAjjoj jjj\j}rB(j]j]j]j]j]ujK#jhj]rCj%X\This document has detailed API description that user can use to make use of the UDMA driver.rDrE}rF(jjAjj?ubaubeubeubj jjj?j}rG(j]UlevelKj]j]rHjeaUsourcejj]j]UlineKUtypejAujKjhj]rIjX)rJ}rK(jX+Duplicate implicit target name: "overview".j}rL(j]j]j]j]j]ujjj]rMj%X+Duplicate implicit target name: "overview".rNrO}rP(jUjjJubajj\ubaubh)rQ}rR(jUjjoj jjj?j}rS(j]UlevelKj]j]rTjuaUsourcejj]j]UlineKUtypejAujKjhj]rUjX)rV}rW(jX/Duplicate implicit target name: "introduction".j}rX(j]j]j]j]j]ujjQj]rYj%X/Duplicate implicit target name: "introduction".rZr[}r\(jUjjVubajj\ubaubh)r]}r^(jUjjj jjj?j}r_(j]UlevelKj]j]r`jaUsourcejj]j]UlineK(UtypejAujK(jhj]rajX)rb}rc(jX1Duplicate implicit target name: "user interface".j}rd(j]j]j]j]j]ujj]j]rej%X1Duplicate implicit target name: "user interface".rfrg}rh(jUjjbubajj\ubaubh)ri}rj(jUjjj jjj?j}rk(j]UlevelKj]j]rlj aUsourcejj]j]UlineK+UtypejAujK+jhj]rmjX)rn}ro(jX7Duplicate implicit target name: "driver configuration".j}rp(j]j]j]j]j]ujjij]rqj%X7Duplicate implicit target name: "driver configuration".rrrs}rt(jUjjnubajj\ubaubh)ru}rv(jUjj*j jjj?j}rw(j]UlevelKj]j]rxj0aUsourcejj]j]UlineK5UtypejAujK5jhj]ryjX)rz}r{(jX'Duplicate implicit target name: "apis".j}r|(j]j]j]j]j]ujjuj]r}j%X'Duplicate implicit target name: "apis".r~r}r(jUjjzubajj\ubaubh)r}r(jUjjj jjj?j}r(j]UlevelKj]j]rjaUsourcejj]j]UlineKKUtypejAujKKjhj]rjX)r}r(jX.Duplicate implicit target name: "application".j}r(j]j]j]j]j]ujjj]rj%X.Duplicate implicit target name: "application".rr}r(jUjjubajj\ubaubh)r}r(jUjjj jjj?j}r(j]UlevelKj]j]rjaUsourcejj]j]UlineKNUtypejAujKNjhj]rjX)r}r(jX+Duplicate implicit target name: "examples".j}r(j]j]j]j]j]ujjj]rj%X+Duplicate implicit target name: "examples".rr}r(jUjjubajj\ubaubh)r}r(jUjj"j jjj?j}r(j]UlevelKj]j]rj(aUsourcejj]j]UlineKUtypejAujKjhj]rjX)r}r(jX8Duplicate implicit target name: "additional references".j}r(j]j]j]j]j]ujjj]rj%X8Duplicate implicit target name: "additional references".rr}r(jUjjubajj\ubaubh)r}r(jUj}r(j]UlevelKj]j]rjaUsourcej j]j]UlineKUtypejXujjj]rjX)r}r(jX.Duplicate explicit target name: "description".j}r(j]j]j]j]j]ujjj]rj%X.Duplicate explicit target name: "description".rr}r(jUjjubajj\ubajj?ubh)r}r(jUjj)r}r(jUjKjj)r}r(jUjhj j jjj}r(j]j]j]j]rUpmraj]rhaujKjhj]r(j)r}r(jXPMrjjj j jj"j}r(j]j]j]j]j]ujKjhj]rj%XPMrr„}rÄ(jjjjubaubj))rĄ}rń(jX=http://processors.wiki.ti.com/index.php/Processor_SDK_RTOS_PMjjj j,X;source/rtos/PDK_Platform_Software/Device_Drivers/PM.rst.incrƄrDŽ}rȄbjj0j}rɄ(j2j3j]j]j]j]j]ujKjhj]rʄj%X=http://processors.wiki.ti.com/index.php/Processor_SDK_RTOS_PMr˄r̄}r̈́(jUjjĄubaubjj)r΄}rτ(jUjKjjj jDŽjjj}rЄ(j]rфXuser interfacer҄aj]j]j]rӄUid225rԄaj]ujK$jhj]rՄ(j)rք}rׄ(jXUser Interfacer؄jj΄j jDŽjj"j}rل(j]j]j]j]j]ujK$jhj]rڄj%XUser Interfacerۄr܄}r݄(jj؄jjքubaubj)rބ}r߄(jUjKjj΄j jDŽjjj}r(j]rXdriver configurationraj]j]j]rUid226raj]ujK'jhj]r(j)r}r(jXDriver Configurationrjjބj jDŽjj"j}r(j]j]j]j]j]ujK'jhj]rj%XDriver Configurationrr}r(jjjjubaubjb)r}r(jX **Board Specific Configuration**rjKjjބj jDŽjjfj}r(j]rUid227raj]j]rXboard-specific-configurationraj]j]ujNjhj]rj|)r}r(jjj}r(j]j]j]j]j]ujjj]rj%XBoard Specific Configurationrr}r(jUjjubajjubaubjX)r}r(jXXThe following board-specific actions must take place prior to calling any PM Power APIs:rjjބj jDŽjj\j}r(j]j]j]j]j]ujK,jhj]rj%XXThe following board-specific actions must take place prior to calling any PM Power APIs:rr}r(jjjjubaubj)r}r(jUjjބj jDŽjjj}r(jX-j]j]j]j]j]ujK/jhj]r (j)r }r (jXLA board-specific I2C implementation must be registered with the PM HAL layerjjj jDŽjj j}r (j]j]j]j]j]ujNjhj]r jX)r}r(jXLA board-specific I2C implementation must be registered with the PM HAL layerrjj j jDŽjj\j}r(j]j]j]j]j]ujK/j]rj%XLA board-specific I2C implementation must be registered with the PM HAL layerrr}r(jjjjubaubaubj)r}r(jX`The PMIC Ops structure matching the executing device's PMIC must be registered with PM HAL layerjjj jDŽjj j}r(j]j]j]j]j]ujNjhj]rjX)r}r(jX`The PMIC Ops structure matching the executing device's PMIC must be registered with PM HAL layerrjjj jDŽjj\j}r(j]j]j]j]j]ujK1j]rj%X`The PMIC Ops structure matching the executing device's PMIC must be registered with PM HAL layerrr }r!(jjjjubaubaubj)r"}r#(jX@Device clock rates must be initialized through the PM LIB layer jjj jDŽjj j}r$(j]j]j]j]j]ujNjhj]r%jX)r&}r'(jX?Device clock rates must be initialized through the PM LIB layerr(jj"j jDŽjj\j}r)(j]j]j]j]j]ujK3j]r*j%X?Device clock rates must be initialized through the PM LIB layerr+r,}r-(jj(jj&ubaubaubeubjX)r.}r/(jXFor working examples of how to implement the listed items, see the "main" functions of any PM example in ``[PDK_INSTALL_DIR]\packages\ti\drv\pm\examples``.jjބj jDŽjj\j}r0(j]j]j]j]j]ujK5jhj]r1(j%XiFor working examples of how to implement the listed items, see the "main" functions of any PM example in r2r3}r4(jXiFor working examples of how to implement the listed items, see the "main" functions of any PM example in jj.ubj)r5}r6(jX1``[PDK_INSTALL_DIR]\packages\ti\drv\pm\examples``j}r7(j]j]j]j]j]ujj.j]r8j%X-[PDK_INSTALL_DIR]\packages\ti\drv\pm\examplesr9r:}r;(jUjj5ubajj ubj%X.r<}r=(jX.jj.ubeubjb)r>}r?(jX**PM Configuration Structure**r@jjބj jDŽjjfj}rA(j]rBUpm-configuration-structurerCaj]j]j]j]rDh!aujNjhj]rEj|)rF}rG(jj@j}rH(j]j]j]j]j]ujj>j]rIj%XPM Configuration StructurerJrK}rL(jUjjFubajjubaubjX)rM}rN(jXThe pm\src\pmrtos\prcm\PowerDevice.c file configures the PM driver through the PowerDevice_config structure. This structure must be provided to PM driver. The structure is a global defined within PowerDevice.c and must be initialized prior to calling Power_init(). The structure cannot be changed after calling Power_init(). For details about individual fields of this structure, see the Doxygen help by opening ``[PDK_INSTALL_DIR]\packages\ti\drv\pm\docs\doxygen\html\index.html``.jjބj jDŽjj\j}rO(j]j]j]j]j]ujK /* Contains the core TI RTOS Power implementation APIs */jj]j jDŽjj&j}r(j2j3j]j]j]j]j]ujMOjhj]rj%XW#include /* Contains the core TI RTOS Power implementation APIs */rr}r(jUjj}ubaubjX)r}r(jXRPM TI RTOS extended API reference for applications can be found in the below file:rjj]j jDŽjj\j}r(j]j]j]j]j]ujKRjhj]rj%XRPM TI RTOS extended API reference for applications can be found in the below file:rr}r(jjjjubaubj#)r}r(jXl#include /* Contains TI RTOS Power API extensions such as thermal management */jj]j jDŽjj&j}r(j2j3j]j]j]j]j]ujMVjhj]rj%Xl#include /* Contains TI RTOS Power API extensions such as thermal management */rr}r(jUjjubaubjX)r}r(jXYPM TI RTOS device-specific API reference for applications can be found in the below file:rjj]j jDŽjj\j}r(j]j]j]j]j]ujKYjhj]rj%XYPM TI RTOS device-specific API reference for applications can be found in the below file:rr}r(jjjjubaubj#)r}r(jXo#include /* Contains device-specific TI RTOS Power API definitions and structures */jj]j jDŽjj&j}r(j2j3j]j]j]j]j]ujM]jhj]rj%Xo#include /* Contains device-specific TI RTOS Power API definitions and structures */rr}r(jUjjubaubj)r}r(jUjj]j jDŽjjj}r(j]j]j]j]j]ujK`jhj]rj)r}r(jUjKjjj jDŽjjj}r(j]j]j]j]j]ujKjhj]ubaubeubeubj)r}r(jUjKjjj jDŽjjj}r(j]rX applicationraj]j]j]rUid229raj]ujKcjhj]r(j)r}r(jX Applicationrjjj jDŽjj"j}r(j]j]j]j]j]ujKcjhj]rj%X Applicationrr}r(jjjjubaubj)r}r(jUjKjjj jDŽjjj}r(j]rXexamplesraj]j]j]rUid230raj]ujKfjhj]r(j)r}r…(jXExamplesrÅjjj jDŽjj"j}rą(j]j]j]j]j]ujKfjhj]rŅj%XExamplesrƅrDž}rȅ(jjÅjjubaubj)rɅ}rʅ(jUjjj jDŽjjj}r˅(j]j]j]j]j]ujNjhj]r̅j)rͅ}r΅(jUj}rυ(j]j]j]j]j]UcolsKujjɅj]rЅ(j)rх}r҅(jUj}rӅ(j]j]j]j]j]UcolwidthKujjͅj]jjubj)rԅ}rՅ(jUj}rօ(j]j]j]j]j]UcolwidthKujjͅj]jjubj)rׅ}r؅(jUj}rم(j]j]j]j]j]UcolwidthKFujjͅj]jjubj)rڅ}rۅ(jUj}r܅(j]j]j]j]j]ujjͅj]r݅j)rޅ}r߅(jUj}r(j]j]j]j]j]ujjڅj]r(j)r}r(jUj}r(j]j]j]j]j]ujjޅj]rjX)r}r(jXNamerjjj jDŽjj\j}r(j]j]j]j]j]ujKj]rj%XNamerr}r(jjjjubaubajjubj)r}r(jUj}r(j]j]j]j]j]ujjޅj]rjX)r}r(jX Descriptionrjjj jDŽjj\j}r(j]j]j]j]j]ujKj]rj%X Descriptionrr}r(jjjjubaubajjubj)r}r(jUj}r(j]j]j]j]j]ujjޅj]rjX)r}r(jXExpected Resultsrjjj jDŽjj\j}r(j]j]j]j]j]ujKj]rj%XExpected Resultsrr}r(jjjjubaubajjubejjubajjubj)r}r(jUj}r(j]j]j]j]j]ujjͅj]r (j)r }r (jUj}r (j]j]j]j]j]ujjj]r (j)r}r(jUj}r(j]j]j]j]j]ujj j]rjX)r}r(jXPM RTOS Applicationrjjj jDŽjj\j}r(j]j]j]j]j]ujKj]rj%XPM RTOS Applicationrr}r(jjjjubaubajjubj)r}r(jUj}r(j]j]j]j]j]ujj j]rjX)r}r(jXRExample demonstarting power management use cases. Reference example for developersr jjj jDŽjj\j}r!(j]j]j]j]j]ujKj]r"j%XRExample demonstarting power management use cases. Reference example for developersr#r$}r%(jj jjubaubajjubj)r&}r'(jUj}r((j]j]j]j]j]ujj j]r)jX)r*}r+(jX Application cycles the processor running the application through various power states using the PM APIs. User observes the output printed over the device's UART connection. **Note:** The example should be run in *Free Run* mode when loaded and executed in Code Composer Studio in order to prevent sleep API testing interruptions from the JTAG. Use the following steps to execute the application on the AM57xx's M4 and C66 processors in Code Composer Studio: - Connect to CortexA15_0 waiting until the GEL file initialization completes - Run the GEL: Scripts-->AM572x MULTICORE Initialization-->AM572x_MULTICORE_EnableAllCores - Connect to M4_IPU1_C0 or the C66xx_DSP1 - Load the PM RTOS application's M4 or c66 executable - Free run the M4_IPU1_C0 or the C66xx_DSP1jj&j jDŽjj\j}r,(j]j]j]j]j]ujKj]r-(j%XApplication cycles the processor running the application through various power states using the PM APIs. User observes the output printed over the device's UART connection. r.r/}r0(jXApplication cycles the processor running the application through various power states using the PM APIs. User observes the output printed over the device's UART connection. jj*ubj|)r1}r2(jX **Note:**j}r3(j]j]j]j]j]ujj*j]r4j%XNote:r5r6}r7(jUjj1ubajjubj%X The example should be run in r8r9}r:(jX The example should be run in jj*ubj<)r;}r<(jX *Free Run*j}r=(j]j]j]j]j]ujj*j]r>j%XFree Runr?r@}rA(jUjj;ubajjDubj%X, mode when loaded and executed in Code Composer Studio in order to prevent sleep API testing interruptions from the JTAG. Use the following steps to execute the application on the AM57xx's M4 and C66 processors in Code Composer Studio: - Connect to CortexA15_0 waiting until the GEL file initialization completes - Run the GEL: Scripts-->AM572x MULTICORE Initialization-->AM572x_MULTICORE_EnableAllCores - Connect to M4_IPU1_C0 or the C66xx_DSP1 - Load the PM RTOS application's M4 or c66 executable - Free run the M4_IPU1_C0 or the C66xx_DSP1rBrC}rD(jX, mode when loaded and executed in Code Composer Studio in order to prevent sleep API testing interruptions from the JTAG. Use the following steps to execute the application on the AM57xx's M4 and C66 processors in Code Composer Studio: - Connect to CortexA15_0 waiting until the GEL file initialization completes - Run the GEL: Scripts-->AM572x MULTICORE Initialization-->AM572x_MULTICORE_EnableAllCores - Connect to M4_IPU1_C0 or the C66xx_DSP1 - Load the PM RTOS application's M4 or c66 executable - Free run the M4_IPU1_C0 or the C66xx_DSP1jj*ubeubajjubejjubj)rE}rF(jUj}rG(j]j]j]j]j]ujjj]rH(j)rI}rJ(jUj}rK(j]j]j]j]j]ujjEj]rLjX)rM}rN(jXPM RTOS Thermal ApplicationrOjjIj jDŽjj\j}rP(j]j]j]j]j]ujKj]rQj%XPM RTOS Thermal ApplicationrRrS}rT(jjOjjMubaubajjubj)rU}rV(jUj}rW(j]j]j]j]j]ujjEj]rXjX)rY}rZ(jXSExample demonstrating thermal management use case. Reference example for developersr[jjUj jDŽjj\j}r\(j]j]j]j]j]ujKj]r]j%XSExample demonstrating thermal management use case. Reference example for developersr^r_}r`(jj[jjYubaubajjubj)ra}rb(jUj}rc(j]j]j]j]j]ujjEj]rdjX)re}rf(jXApplication sets high and low thermal set points using the PM APIs.The set points are triggered by internally heating up the processor.User observes the output printed over the device's UART connection. Use the following steps to execute the application on the AM57xx's M4 and C66 processors in Code Composer Studio: - Connect to CortexA15_0 waiting until the GEL file initialization completes - Run the GEL:Scripts-->AM572x MULTICORE Initialization-->AM572x_MULTICORE_EnableAllCores - Connect to M4_IPU1_C0 or the C66xx_DSP1 - Load the PM RTOS Thermal application's M4 or c66 executable - Run the M4_IPU1_C0 or the C66xx_DSP1rgjjaj jDŽjj\j}rh(j]j]j]j]j]ujKj]rij%XApplication sets high and low thermal set points using the PM APIs.The set points are triggered by internally heating up the processor.User observes the output printed over the device's UART connection. Use the following steps to execute the application on the AM57xx's M4 and C66 processors in Code Composer Studio: - Connect to CortexA15_0 waiting until the GEL file initialization completes - Run the GEL:Scripts-->AM572x MULTICORE Initialization-->AM572x_MULTICORE_EnableAllCores - Connect to M4_IPU1_C0 or the C66xx_DSP1 - Load the PM RTOS Thermal application's M4 or c66 executable - Run the M4_IPU1_C0 or the C66xx_DSP1rjrk}rl(jjgjjeubaubajjubejjubj)rm}rn(jUj}ro(j]j]j]j]j]ujjj]rp(j)rq}rr(jUj}rs(j]j]j]j]j]ujjmj]rtjX)ru}rv(jXPM Measurement Applicationrwjjqj jDŽjj\j}rx(j]j]j]j]j]ujKj]ryj%XPM Measurement Applicationrzr{}r|(jjwjjuubaubajjubj)r}}r~(jUj}r(j]j]j]j]j]ujjmj]rjX)r}r(jXPMenu-based application allowing selection of processor OPPs and benchmark tests.rjj}j jDŽjj\j}r(j]j]j]j]j]ujKj]rj%XPMenu-based application allowing selection of processor OPPs and benchmark tests.rr}r(jjjjubaubajjubj)r}r(jUj}r(j]j]j]j]j]ujjmj]rjX)r}r(jXApplication allows the user to control the processor's OPP settings via the PM driver. The application also allows the user to select execution of the Dhrystone benchmark for performance and power profiling under different OPP settings. The application's menu is printed over the device's UART connection. **Note:** The measurement application is only supported on the AM335x device at the moment.jjj jDŽjj\j}r(j]j]j]j]j]ujKj]r(j%X3Application allows the user to control the processor's OPP settings via the PM driver. The application also allows the user to select execution of the Dhrystone benchmark for performance and power profiling under different OPP settings. The application's menu is printed over the device's UART connection. rr}r(jX3Application allows the user to control the processor's OPP settings via the PM driver. The application also allows the user to select execution of the Dhrystone benchmark for performance and power profiling under different OPP settings. The application's menu is printed over the device's UART connection. jjubj|)r}r(jX **Note:**j}r(j]j]j]j]j]ujjj]rj%XNote:rr}r(jUjjubajjubj%XV The measurement application is only supported on the AM335x device at the moment.rr}r(jXV The measurement application is only supported on the AM335x device at the moment.jjubeubajjubejjubj)r}r(jUj}r(j]j]j]j]j]ujjj]r(j)r}r(jUj}r(j]j]j]j]j]ujjj]rjX)r}r(jXPM System Configuration Testrjjj jDŽjj\j}r(j]j]j]j]j]ujKj]rj%XPM System Configuration Testrr}r(jjjjubaubajjubj)r}r(jUj}r(j]j]j]j]j]ujjj]rjX)r}r(jX3Example demonstrating system configuration use-caserjjj jDŽjj\j}r(j]j]j]j]j]ujKj]rj%X3Example demonstrating system configuration use-caserr}r(jjjjubaubajjubj)r}r(jUj}r(j]j]j]j]j]ujjj]rjX)r}r(jXuThis example is available at '/packages /ti/drv/pm/examples/systemconfig'. The PM System Configuration test is an example running on tda2xx A15 core, tda2xx M4 core,tda3xx IPU (M4) core and AM65xx(A53 and R5). This example demonstrates the ability to configure the desired power state for a given module based on the entries in the power spread sheet.The example loops through the different modules and power states and tries to program the same for each module using PM LIB sysconfig APIs before declaring pass or fail.The example illustrates the use of Power Management LIB which allows system configuration.rjjj jDŽjj\j}r(j]j]j]j]j]ujKj]r†j%XuThis example is available at '/packages /ti/drv/pm/examples/systemconfig'. The PM System Configuration test is an example running on tda2xx A15 core, tda2xx M4 core,tda3xx IPU (M4) core and AM65xx(A53 and R5). This example demonstrates the ability to configure the desired power state for a given module based on the entries in the power spread sheet.The example loops through the different modules and power states and tries to program the same for each module using PM LIB sysconfig APIs before declaring pass or fail.The example illustrates the use of Power Management LIB which allows system configuration.rÆrĆ}rņ(jjjjubaubajjubejjubj)rƆ}rdž(jUj}rȆ(j]j]j]j]j]ujjj]rɆ(j)rʆ}rˆ(jUj}r̆(j]j]j]j]j]ujjƆj]r͆jX)rΆ}rφ(jX PM CLock Rate Configuration TestrІjjʆj jDŽjj\j}rц(j]j]j]j]j]ujKj]r҆j%X PM CLock Rate Configuration TestrӆrԆ}rՆ(jjІjjΆubaubajjubj)rֆ}r׆(jUj}r؆(j]j]j]j]j]ujjƆj]rنjX)rچ}rۆ(jX6Example demonstrating clockrate configuration use-caser܆jjֆj jDŽjj\j}r݆(j]j]j]j]j]ujKj]rކj%X6Example demonstrating clockrate configuration use-caser߆r}r(jj܆jjچubaubajjubj)r}r(jUj}r(j]j]j]j]j]ujjƆj]rjX)r}r(jXcThis example is available at '/packages/ti/drv/pm/ examples/clkrate_manager' The Clock Rate Configuration test is an example running on A15 core and IPU (M4) Core for tda2xx/tda2ex/tda2px ,IPU (M4) core for tda3xx ,A53(MPU) and R5(MCU) for AM65xx. This example demonstrates the ability to read the clock rate for different clocks for a given CPU (MPU/IPU/DSP/GPU/IVA/EVE). The example first reads the current clock configuration and then checks for OPP_NOM, OPP_OD and OPP_HIGH frequencies along with voltage changes by using the PMLIB clock rate APIs before declaring pass or fail. The example illustrates the use of Power Management LIB which allows changing the CPU OPP. For AM65xx, this example first loops through all modules and gets the clockrate for all of their clocks.Then, it tries to set the frequencies for some clocks of different modules.rjjj jDŽjj\j}r(j]j]j]j]j]ujKj]rj%XcThis example is available at '/packages/ti/drv/pm/ examples/clkrate_manager' The Clock Rate Configuration test is an example running on A15 core and IPU (M4) Core for tda2xx/tda2ex/tda2px ,IPU (M4) core for tda3xx ,A53(MPU) and R5(MCU) for AM65xx. This example demonstrates the ability to read the clock rate for different clocks for a given CPU (MPU/IPU/DSP/GPU/IVA/EVE). The example first reads the current clock configuration and then checks for OPP_NOM, OPP_OD and OPP_HIGH frequencies along with voltage changes by using the PMLIB clock rate APIs before declaring pass or fail. The example illustrates the use of Power Management LIB which allows changing the CPU OPP. For AM65xx, this example first loops through all modules and gets the clockrate for all of their clocks.Then, it tries to set the frequencies for some clocks of different modules.rr}r(jjjjubaubajjubejjubejjubejjubaubeubeubj)r}r(jUjKjjj jDŽjjj}r(j]rXadditional referencesraj]j]j]rUid231raj]ujKujhj]r(j)r}r(jXAdditional Referencesrjjj jDŽjj"j}r(j]j]j]j]j]ujKujhj]rj%XAdditional Referencesrr}r(jjjjubaubj)r}r(jUjjj jDŽjjj}r(j]j]j]j]j]ujNjhj]rj)r}r(jUj}r(j]j]j]j]j]UcolsKujjj]r(j)r}r(jUj}r(j]j]j]j]j]UcolwidthK#ujjj]jjubj)r }r (jUj}r (j]j]j]j]j]UcolwidthK)ujjj]jjubj)r }r (jUj}r(j]j]j]j]j]ujjj]r(j)r}r(jUj}r(j]j]j]j]j]ujj j]r(j)r}r(jUj}r(j]j]j]j]j]ujjj]rjX)r}r(jX **Document**rjjj jDŽjj\j}r(j]j]j]j]j]ujKxj]rj|)r}r(jjj}r(j]j]j]j]j]ujjj]r j%XDocumentr!r"}r#(jUjjubajjubaubajjubj)r$}r%(jUj}r&(j]j]j]j]j]ujjj]r'jX)r(}r)(jX **Location**r*jj$j jDŽjj\j}r+(j]j]j]j]j]ujKxj]r,j|)r-}r.(jj*j}r/(j]j]j]j]j]ujj(j]r0j%XLocationr1r2}r3(jUjj-ubajjubaubajjubejjubj)r4}r5(jUj}r6(j]j]j]j]j]ujj j]r7(j)r8}r9(jUj}r:(j]j]j]j]j]ujj4j]r;jX)r<}r=(jXAPI Reference Manualr>jj8j jDŽjj\j}r?(j]j]j]j]j]ujKzj]r@j%XAPI Reference ManualrArB}rC(jj>jj<ubaubajjubj)rD}rE(jUj}rF(j]j]j]j]j]ujj4j]rGjX)rH}rI(jXO$(TI_PDK_INSTALL_DIR)\\packages\\ti \\drv\\pm\\docs\\doxygen\\html\\index.h tmljjDj jDŽjj\j}rJ(j]j]j]j]j]ujKzj]rKj%XG$(TI_PDK_INSTALL_DIR)\packages\ti \drv\pm\docs\doxygen\html\index.h tmlrLrM}rN(jXO$(TI_PDK_INSTALL_DIR)\\packages\\ti \\drv\\pm\\docs\\doxygen\\html\\index.h tmljjHubaubajjubejjubj)rO}rP(jUj}rQ(j]j]j]j]j]ujj j]rR(j)rS}rT(jUj}rU(j]j]j]j]j]ujjOj]rVjX)rW}rX(jX Release NotesrYjjSj jDŽjj\j}rZ(j]j]j]j]j]ujK~j]r[j%X Release Notesr\r]}r^(jjYjjWubaubajjubj)r_}r`(jUj}ra(j]j]j]j]j]ujjOj]rbjX)rc}rd(jXM$(TI_PDK_INSTALL_DIR)\\packages\\ti \\drv\\pm\\docs\\ReleaseNotes_PM_LLD. pdfjj_j jDŽjj\j}re(j]j]j]j]j]ujK~j]rfj%XG$(TI_PDK_INSTALL_DIR)\packages\ti \drv\pm\docs\ReleaseNotes_PM_LLD. pdfrgrh}ri(jXM$(TI_PDK_INSTALL_DIR)\\packages\\ti \\drv\\pm\\docs\\ReleaseNotes_PM_LLD. pdfjjcubaubajjubejjubejjubejjubaubeubeubj jDŽjjj}rj(j]rkXoverviewrlaj]j]j]rmUid223rnaj]ujKjhj]ro(j)rp}rq(jXOverviewrrjjj jDŽjj"j}rs(j]j]j]j]j]ujKjhj]rtj%XOverviewrurv}rw(jjrjjpubaubj)rx}ry(jUjKjjj jDŽjjj}rz(j]r{X introductionr|aj]j]j]r}Uid224r~aj]ujKjhj]r(j)r}r(jX Introductionrjjxj jDŽjj"j}r(j]j]j]j]j]ujKjhj]rj%X Introductionrr}r(jjjjubaubjX)r}r(jXsThe Power Management (PM) low level driver provide power and thermal management capabilities for RTOS applications.rjjxj jDŽjj\j}r(j]j]j]j]j]ujK jhj]rj%XsThe Power Management (PM) low level driver provide power and thermal management capabilities for RTOS applications.rr}r(jjjjubaubjb)r}r(jX**Supported Devices**rjjxj jDŽjjfj}r(j]rUsupported-devicesraj]j]j]j]rh1aujNjhj]rj|)r}r(jjj}r(j]j]j]j]j]ujjj]rj%XSupported Devicesrr}r(jUjjubajjubaubj)r}r(jUjjxj jDŽjjj}r(j]j]j]j]j]ujNjhj]rj)r}r(jUj}r(j]j]j]j]j]UcolsK ujjj]r(j)r}r(jUj}r(j]j]j]j]j]UcolwidthK ujjj]jjubj)r}r(jUj}r(j]j]j]j]j]UcolwidthK ujjj]jjubj)r}r(jUj}r(j]j]j]j]j]UcolwidthK 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jDŽjj\j}rp(j]j]j]j]j]ujKj]rqj%XXrr}rs(jXXjjnubaubajjubj)rt}ru(jUj}rv(j]j]j]j]j]ujjZj]jjubj)rw}rx(jUj}ry(j]j]j]j]j]ujjZj]jjubj)rz}r{(jUj}r|(j]j]j]j]j]ujjZj]jjubj)r}}r~(jUj}r(j]j]j]j]j]ujjZj]jjubj)r}r(jUj}r(j]j]j]j]j]ujjZj]jjubj)r}r(jUj}r(j]j]j]j]j]ujjZj]rjX)r}r(jXXjjj jDŽjj\j}r(j]j]j]j]j]ujKj]rj%XXr}r(jXXjjubaubajjubj)r}r(jUj}r(j]j]j]j]j]ujjZj]rjX)r}r(jXAM65x EVM, AM65x IDKrjjj jDŽjj\j}r(j]j]j]j]j]ujKj]rj%XAM65x EVM, AM65x IDKrr}r(jjjjubaubajjubejjubj)r}r(jUj}r(j]j]j]j]j]ujj‡j]r(j)r}r(jUj}r(j]j]j]j]j]ujjj]rjX)r}r(jXAM57xxrjjj jDŽjj\j}r(j]j]j]j]j]ujKj]rj%XAM57xxrr}r(jjjjubaubajjubj)r}r(jUj}r(j]j]j]j]j]ujjj]jjubj)r}r(jUj}r(j]j]j]j]j]ujjj]rjX)r}r(jXXjjj jDŽjj\j}r(j]j]j]j]j]ujKj]rj%XXr}r(jXXjjubaubajjubj)r}r(jUj}r(j]j]j]j]j]ujjj]jjubj)r}r(jUj}r(j]j]j]j]j]ujjj]jjubj)r}r(jUj}r(j]j]j]j]j]ujjj]rjX)r}r(jXXjjj jDŽjj\j}rˆ(j]j]j]j]j]ujKj]rÈj%XXrĈ}rň(jXXjjubaubajjubj)rƈ}rLj(jUj}rȈ(j]j]j]j]j]ujjj]rɈjX)rʈ}rˈ(jXXjjƈj jDŽjj\j}r̈(j]j]j]j]j]ujKj]r͈j%XXrΈ}rψ(jXXjjʈubaubajjubj)rЈ}rш(jUj}r҈(j]j]j]j]j]ujjj]jjubj)rӈ}rԈ(jUj}rՈ(j]j]j]j]j]ujjj]rֈjX)r׈}r؈(jXAM572x GP EVM, AM571x GP EVMrوjjӈj jDŽjj\j}rڈ(j]j]j]j]j]ujKj]rۈj%XAM572x GP EVM, AM571x GP EVMr܈r݈}rވ(jjوjj׈ubaubajjubejjubj)r߈}r(jUj}r(j]j]j]j]j]ujj‡j]r(j)r}r(jUj}r(j]j]j]j]j]ujj߈j]rjX)r}r(jXAM335xrjjj jDŽjj\j}r(j]j]j]j]j]ujKj]rj%XAM335xrr}r(jjjjubaubajjubj)r}r(jUj}r(j]j]j]j]j]ujj߈j]jjubj)r}r(jUj}r(j]j]j]j]j]ujj߈j]jjubj)r}r(jUj}r(j]j]j]j]j]ujj߈j]rjX)r}r(jXXjjj jDŽjj\j}r(j]j]j]j]j]ujKj]rj%XXr}r(jXXjjubaubajjubj)r}r(jUj}r(j]j]j]j]j]ujj߈j]jjubj)r}r(jUj}r(j]j]j]j]j]ujj߈j]jjubj)r}r(jUj}r(j]j]j]j]j]ujj߈j]jjubj)r}r (jUj}r (j]j]j]j]j]ujj߈j]jjubj)r }r (jUj}r (j]j]j]j]j]ujj߈j]rjX)r}r(jX AM335x GP EVMrjj j jDŽjj\j}r(j]j]j]j]j]ujKj]rj%X AM335x GP EVMrr}r(jjjjubaubajjubejjubj)r}r(jUj}r(j]j]j]j]j]ujj‡j]r(j)r}r(jUj}r(j]j]j]j]j]ujjj]rjX)r}r (jXAM437xr!jjj jDŽjj\j}r"(j]j]j]j]j]ujKj]r#j%XAM437xr$r%}r&(jj!jjubaubajjubj)r'}r((jUj}r)(j]j]j]j]j]ujjj]jjubj)r*}r+(jUj}r,(j]j]j]j]j]ujjj]jjubj)r-}r.(jUj}r/(j]j]j]j]j]ujjj]jjubj)r0}r1(jUj}r2(j]j]j]j]j]ujjj]r3jX)r4}r5(jXXjj0j jDŽjj\j}r6(j]j]j]j]j]ujKj]r7j%XXr8}r9(jXXjj4ubaubajjubj)r:}r;(jUj}r<(j]j]j]j]j]ujjj]jjubj)r=}r>(jUj}r?(j]j]j]j]j]ujjj]jjubj)r@}rA(jUj}rB(j]j]j]j]j]ujjj]jjubj)rC}rD(jUj}rE(j]j]j]j]j]ujjj]rFjX)rG}rH(jX AM437x GP EVMrIjjCj jDŽjj\j}rJ(j]j]j]j]j]ujKj]rKj%X AM437x GP EVMrLrM}rN(jjIjjGubaubajjubejjubj)rO}rP(jUj}rQ(j]j]j]j]j]ujj‡j]rR(j)rS}rT(jUj}rU(j]j]j]j]j]ujjOj]rVjX)rW}rX(jXK2GrYjjSj jDŽjj\j}rZ(j]j]j]j]j]ujKj]r[j%XK2Gr\r]}r^(jjYjjWubaubajjubj)r_}r`(jUj}ra(j]j]j]j]j]ujjOj]jjubj)rb}rc(jUj}rd(j]j]j]j]j]ujjOj]rejX)rf}rg(jXXjjbj jDŽjj\j}rh(j]j]j]j]j]ujKj]rij%XXrj}rk(jXXjjfubaubajjubj)rl}rm(jUj}rn(j]j]j]j]j]ujjOj]jjubj)ro}rp(jUj}rq(j]j]j]j]j]ujjOj]jjubj)rr}rs(jUj}rt(j]j]j]j]j]ujjOj]rujX)rv}rw(jXXjjrj jDŽjj\j}rx(j]j]j]j]j]ujKj]ryj%XXrz}r{(jXXjjvubaubajjubj)r|}r}(jUj}r~(j]j]j]j]j]ujjOj]jjubj)r}r(jUj}r(j]j]j]j]j]ujjOj]jjubj)r}r(jUj}r(j]j]j]j]j]ujjOj]rjX)r}r(jXK2G EVMrjjj jDŽjj\j}r(j]j]j]j]j]ujKj]rj%XK2G EVMrr}r(jjjjubaubajjubejjubejjubejjubaubj\)r}r(jXPM on AM335x and AM437x devices supports only OPP modifications. CPU idle and other PM modes on these devices are only for reference and are not validated on the EVM every release.jjxj jDŽjj_j}r(j]j]j]j]j]ujNjhj]rjX)r}r(jXPM on AM335x and AM437x devices supports only OPP modifications. CPU idle and other PM modes on these devices are only for reference and are not validated on the EVM every release.rjjj jDŽjj\j}r(j]j]j]j]j]ujKj]rj%XPM on AM335x and AM437x devices supports only OPP modifications. CPU idle and other PM modes on these devices are only for reference and are not validated on the EVM every release.rr}r(jjjjubaubaubeubeubj jDŽjj?j}r(j]UlevelKj]j]rjnaUsourcejDŽj]j]UlineKUtypejAujKjhj]rjX)r}r(jX+Duplicate implicit target name: "overview".j}r(j]j]j]j]j]ujjj]rj%X+Duplicate implicit target name: "overview".rr}r(jUjjubajj\ubaubh)r}r(jUjjxj jDŽjj?j}r(j]UlevelKj]j]rj~aUsourcejDŽj]j]UlineKUtypejAujKjhj]rjX)r}r(jX/Duplicate implicit target name: "introduction".j}r(j]j]j]j]j]ujjj]rj%X/Duplicate implicit target name: "introduction".rr}r(jUjjubajj\ubaubh)r}r(jUjj΄j jDŽjj?j}r(j]UlevelKj]j]rjԄaUsourcejDŽj]j]UlineK$UtypejAujK$jhj]rjX)r}r(jX1Duplicate implicit target name: "user interface".j}r(j]j]j]j]j]ujjj]rj%X1Duplicate implicit target name: "user interface".rr}r(jUjjubajj\ubaubh)r}r(jUjjބj jDŽjj?j}r(j]UlevelKj]j]rjaUsourcejDŽj]j]UlineK'UtypejAujK'jhj]rjX)r}r‰(jX7Duplicate implicit target name: "driver configuration".j}rÉ(j]j]j]j]j]ujjj]rĉj%X7Duplicate implicit target name: "driver configuration".rʼnrƉ}rlj(jUjjubajj\ubaubh)rȉ}rɉ(jUj}rʉ(j]UlevelKj]j]rˉjaUsourcej j]j]UlineKUtypejXujjj]r̉jX)r͉}rΉ(jX?Duplicate explicit target name: "board-specific-configuration".j}rω(j]j]j]j]j]ujjȉj]rЉj%X?Duplicate explicit target name: "board-specific-configuration".rщr҉}rӉ(jUjj͉ubajj\ubajj?ubh)rԉ}rՉ(jUjj]j jDŽjj?j}r։(j]UlevelKj]j]r׉jcaUsourcejDŽj]j]UlineKFUtypejAujKFjhj]r؉jX)rى}rډ(jX'Duplicate implicit target name: "apis".j}rۉ(j]j]j]j]j]ujjԉj]r܉j%X'Duplicate implicit target name: "apis".r݉rމ}r߉(jUjjىubajj\ubaubh)r}r(jUjjj jDŽjj?j}r(j]UlevelKj]j]rjaUsourcejDŽj]j]UlineKcUtypejAujKcjhj]rjX)r}r(jX.Duplicate implicit target name: "application".j}r(j]j]j]j]j]ujjj]rj%X.Duplicate implicit target name: "application".rr}r(jUjjubajj\ubaubh)r}r(jUjjj jDŽjj?j}r(j]UlevelKj]j]UsourcejDŽj]j]UlineKfUtypejXujKfjhj]r(jX)r}r(jXTitle underline too short.j}r(j]j]j]j]j]ujjj]rj%XTitle underline too short.rr}r(jUjjubajj\ubj#)r}r(jXExamples ^^^^^^^j}r(j2j3j]j]j]j]j]ujjj]rj%XExamples ^^^^^^^rr}r(jUjjubajj&ubeubh)r}r(jUjjj jDŽjj?j}r(j]UlevelKj]j]rjaUsourcejDŽj]j]UlineKfUtypejAujKfjhj]rjX)r}r(jX+Duplicate implicit target name: "examples".j}r(j]j]j]j]j]ujjj]rj%X+Duplicate implicit target name: "examples".rr}r (jUjjubajj\ubaubh)r }r (jUjjj jDŽjj?j}r (j]UlevelKj]j]r jaUsourcejDŽj]j]UlineKuUtypejAujKujhj]rjX)r}r(jX8Duplicate implicit target name: "additional references".j}r(j]j]j]j]j]ujj j]rj%X8Duplicate implicit target name: "additional references".rr}r(jUjjubajj\ubaubh)r}r(jUjj)r}r(jUjKjj)r}r(jUjhj j jjj}r(j]j]j]j]rUrmraj]rh-aujKjhj]r (j)r!}r"(jXRMr#jjj j jj"j}r$(j]j]j]j]j]ujKjhj]r%j%XRMr&r'}r((jj#jj!ubaubj))r)}r*(jX=http://processors.wiki.ti.com/index.php/Processor_SDK_RTOS_RMjjj j,X;source/rtos/PDK_Platform_Software/Device_Drivers/RM.rst.incr+r,}r-bjj0j}r.(j2j3j]j]j]j]j]ujKjhj]r/j%X=http://processors.wiki.ti.com/index.php/Processor_SDK_RTOS_RMr0r1}r2(jUjj)ubaubjj)r3}r4(jUjKjjj j,jjj}r5(j]r6Xuser interfacer7aj]j]j]r8Uid234r9aj]ujK4jhj]r:(j)r;}r<(jXUser Interfacer=jj3j j,jj"j}r>(j]j]j]j]j]ujK4jhj]r?j%XUser Interfacer@rA}rB(jj=jj;ubaubj)rC}rD(jUjKjj3j j,jjj}rE(j]rFXdriver configurationrGaj]j]j]rHUid235rIaj]ujK7jhj]rJ(j)rK}rL(jXDriver ConfigurationrMjjCj j,jj"j}rN(j]j]j]j]j]ujK7jhj]rOj%XDriver ConfigurationrPrQ}rR(jjMjjKubaubjb)rS}rT(jX**Resource Configuration**rUjjCj j,jjfj}rV(j]rWUresource-configurationrXaj]j]j]j]rYhaujNjhj]rZj|)r[}r\(jjUj}r](j]j]j]j]j]ujjSj]r^j%XResource Configurationr_r`}ra(jUjj[ubajjubaubjX)rb}rc(jXOThe RM Server instance must be provided a resource list and allocation policy at initialization time. The resource list and allocation policy are specified in the open source flattened device tree format. Device specific resource list and allocation policy files are provided in ``[PDK_INSTALL_PATH]/packages/ti/drv/rm/device/[SoC]/``.jjCj j,jj\j}rd(j]j]j]j]j]ujKjjj j,jj&j}r(j2j3j]j]j]j]j]ujMjhj]rj%X#include rr}r(jUjjubaubjX)r}rŠ(jX4RM instance transport API reference for application:rÊjjj j,jj\j}rĊ(j]j]j]j]j]ujK\jhj]rŊj%X4RM instance transport API reference for application:rƊrNJ}rȊ(jjÊjjubaubj#)rɊ}rʊ(jX##include jjj j,jj&j}rˊ(j2j3j]j]j]j]j]ujMjhj]r̊j%X##include r͊rΊ}rϊ(jUjjɊubaubjX)rЊ}rъ(jXCRM instance service request/response API reference for application:rҊjjj j,jj\j}rӊ(j]j]j]j]j]ujKbjhj]rԊj%XCRM instance service request/response API reference for application:rՊr֊}r׊(jjҊjjЊubaubj#)r؊}rي(jX"#include jjj j,jj&j}rڊ(j2j3j]j]j]j]j]ujMjhj]rۊj%X"#include r܊r݊}rފ(jUjj؊ubaubjX)rߊ}r(jX2RM Server interface API reference for application:rjjj j,jj\j}r(j]j]j]j]j]ujKhjhj]rj%X2RM Server interface API reference for application:rr}r(jjjjߊubaubj#)r}r(jX##include jjj j,jj&j}r(j2j3j]j]j]j]j]ujMjhj]rj%X##include rr}r(jUjjubaubeubeubj)r}r(jUjKjjj j,jjj}r(j]rX applicationraj]j]j]rUid237raj]ujKojhj]r(j)r}r(jX Applicationrjjj j,jj"j}r(j]j]j]j]j]ujKojhj]rj%X Applicationrr}r(jjjjubaubj)r}r(jUjKjjj j,jjj}r(j]rXexamplesraj]j]j]rUid238raj]ujKrjhj]r(j)r}r(jXExamplesrjjj j,jj"j}r (j]j]j]j]j]ujKrjhj]r j%XExamplesr r }r (jjjjubaubj)r}r(jUjjj j,jjj}r(j]j]j]j]j]ujNjhj]rj)r}r(jUj}r(j]j]j]j]j]UcolsKujjj]r(j)r}r(jUj}r(j]j]j]j]j]UcolwidthKujjj]jjubj)r}r(jUj}r(j]j]j]j]j]UcolwidthKujjj]jjubj)r}r(jUj}r(j]j]j]j]j]UcolwidthKujjj]jjubj)r}r (jUj}r!(j]j]j]j]j]ujjj]r"j)r#}r$(jUj}r%(j]j]j]j]j]ujjj]r&(j)r'}r((jUj}r)(j]j]j]j]j]ujj#j]r*jX)r+}r,(jXNamer-jj'j j,jj\j}r.(j]j]j]j]j]ujKuj]r/j%XNamer0r1}r2(jj-jj+ubaubajjubj)r3}r4(jUj}r5(j]j]j]j]j]ujj#j]r6j)r7}r8(jUj}r9(j]j]j]j]j]ujj3j]r:j)r;}r<(jX Descriptionr=jKjj7j j,jjj}r>(j]j]j]j]j]ujKj]r?j%X Descriptionr@rA}rB(jj=jj;ubaubajjubajjubj)rC}rD(jUj}rE(j]j]j]j]j]ujj#j]rFj)rG}rH(jUj}rI(j]j]j]j]j]ujjCj]rJj)rK}rL(jXExpected ResultsrMjKjjGj j,jjj}rN(j]j]j]j]j]ujKj]rOj%XExpected ResultsrPrQ}rR(jjMjjKubaubajjubajjubejjubajjubj)rS}rT(jUj}rU(j]j]j]j]j]ujjj]rV(j)rW}rX(jUj}rY(j]j]j]j]j]ujjSj]rZ(j)r[}r\(jUj}r](j]j]j]j]j]ujjWj]r^jX)r_}r`(jXRM DSP BIOS Test applicationrajj[j j,jj\j}rb(j]j]j]j]j]ujKwj]rcj%XRM DSP BIOS Test applicationrdre}rf(jjajj_ubaubajjubj)rg}rh(jUj}ri(j]j]j]j]j]ujjWj]rjj)rk}rl(jUj}rm(j]j]j]j]j]ujjgj]rnj)ro}rp(jXUnit Test application exercising APIs and the different service request/response mechanisms across the Server, Client Delegate, and Client instances.rqjKjjkj j,jjj}rr(j]j]j]j]j]ujKj]rsj%XUnit Test application exercising APIs and the different service request/response mechanisms across the Server, Client Delegate, and Client instances.rtru}rv(jjqjjoubaubajjubajjubj)rw}rx(jUj}ry(j]j]j]j]j]ujjWj]rzj)r{}r|(jUj}r}(j]j]j]j]j]ujjwj]r~j)r}r(jX4Application successfully completes on two DSP cores.rjKjj{j j,jjj}r(j]j]j]j]j]ujKj]rj%X4Application successfully completes on two DSP cores.rr}r(jjjjubaubajjubajjubejjubj)r}r(jUj}r(j]j]j]j]j]ujjSj]r(j)r}r(jUj}r(j]j]j]j]j]ujjj]rjX)r}r(jX#RM Memory DSP BIOS Test applicationrjjj j,jj\j}r(j]j]j]j]j]ujKj]rj%X#RM Memory DSP BIOS Test applicationrr}r(jjjjubaubajjubj)r}r(jUj}r(j]j]j]j]j]ujjj]rj)r}r(jUj}r(j]j]j]j]j]ujjj]rj)r}r(jXWUnit Test application to test for memory leaks during resource request/free operations.rjKjjj j,jjj}r(j]j]j]j]j]ujKj]rj%XWUnit Test application to test for memory leaks during resource request/free operations.rr}r(jjjjubaubajjubajjubj)r}r(jUj}r(j]j]j]j]j]ujjj]rj)r}r(jUj}r(j]j]j]j]j]ujjj]rj)r}r(jXIApplication successfully completes with no memory leaks on two DSP cores.rjKjjj j,jjj}r(j]j]j]j]j]ujKj]rj%XIApplication successfully completes with no memory leaks on two DSP cores.rr}r(jjjjubaubajjubajjubejjubj)r}r(jUj}r(j]j]j]j]j]ujjSj]r(j)r}r(jUj}r(j]j]j]j]j]ujjj]rjX)r}r(jX#RM Shared DSP BIOS Test applicationrjjj j,jj\j}r‹(j]j]j]j]j]ujKj]rËj%X#RM Shared DSP BIOS Test applicationrċrŋ}rƋ(jjjjubaubajjubj)rNj}rȋ(jUj}rɋ(j]j]j]j]j]ujjj]rʋj)rˋ}r̋(jUj}r͋(j]j]j]j]j]ujjNjj]r΋j)rϋ}rЋ(jXzUnit Test application exercising Shared Server/Client APIs and resource allocation in a Shared Server/Client architecture.rыjKjjˋj j,jjj}rҋ(j]j]j]j]j]ujKj]rӋj%XzUnit Test application exercising Shared Server/Client APIs and resource allocation in a Shared Server/Client architecture.rԋrՋ}r֋(jjыjjϋubaubajjubajjubj)r׋}r؋(jUj}rً(j]j]j]j]j]ujjj]rڋj)rۋ}r܋(jUj}r݋(j]j]j]j]j]ujj׋j]rދj)rߋ}r(jXIApplication successfully completes with no memory leaks on two DSP cores.rjKjjۋj j,jjj}r(j]j]j]j]j]ujKj]rj%XIApplication successfully completes with no memory leaks on two DSP cores.rr}r(jjjjߋubaubajjubajjubejjubj)r}r(jUj}r(j]j]j]j]j]ujjSj]r(j)r}r(jUj}r(j]j]j]j]j]ujjj]rjX)r}r(jX+RM DSP BIOS Multi-Threaded Test applicationrjjj j,jj\j}r(j]j]j]j]j]ujKj]rj%X+RM DSP BIOS Multi-Threaded Test applicationrr}r(jjjjubaubajjubj)r}r(jUj}r(j]j]j]j]j]ujjj]rj)r}r(jUj}r(j]j]j]j]j]ujjj]rj)r}r(jXdUnit Test application verifying service request/response mechanism in a multi-threaded architecture.rjKjjj j,jjj}r(j]j]j]j]j]ujKj]rj%XdUnit Test application verifying service request/response mechanism in a multi-threaded architecture.rr}r(jjjjubaubajjubajjubj)r}r(jUj}r (j]j]j]j]j]ujjj]r j)r }r (jUj}r (j]j]j]j]j]ujjj]rj)r}r(jXMApplication successfully completes with no memory leaks on a single DSP core.rjKjj j j,jjj}r(j]j]j]j]j]ujKj]rj%XMApplication successfully completes with no memory leaks on a single DSP core.rr}r(jjjjubaubajjubajjubejjubj)r}r(jUj}r(j]j]j]j]j]ujjSj]r(j)r}r(jUj}r(j]j]j]j]j]ujjj]rjX)r}r (jXRM ARM Linux Test applicationr!jjj j,jj\j}r"(j]j]j]j]j]ujKj]r#j%XRM ARM Linux Test applicationr$r%}r&(jj!jjubaubajjubj)r'}r((jUj}r)(j]j]j]j]j]ujjj]r*j)r+}r,(jUj}r-(j]j]j]j]j]ujj'j]r.j)r/}r0(jXUnit Test application exercising APIs and the different service request/response mechanisms across the Server, Client Delegate, and Client instances.r1jKjj+j j,jjj}r2(j]j]j]j]j]ujKj]r3j%XUnit Test application exercising APIs and the different service request/response mechanisms across the Server, Client Delegate, and Client instances.r4r5}r6(jj1jj/ubaubajjubajjubj)r7}r8(jUj}r9(j]j]j]j]j]ujjj]r:j)r;}r<(jUj}r=(j]j]j]j]j]ujj7j]r>j)r?}r@(jXBApplication successfully completes when run from Linux user-space.rAjKjj;j j,jjj}rB(j]j]j]j]j]ujKj]rCj%XBApplication successfully completes when run from Linux user-space.rDrE}rF(jjAjj?ubaubajjubajjubejjubj)rG}rH(jUj}rI(j]j]j]j]j]ujjSj]rJ(j)rK}rL(jUj}rM(j]j]j]j]j]ujjGj]rNjX)rO}rP(jX,RM ARM Linux Multi-Threaded Test applicationrQjjKj j,jj\j}rR(j]j]j]j]j]ujKj]rSj%X,RM ARM Linux Multi-Threaded Test applicationrTrU}rV(jjQjjOubaubajjubj)rW}rX(jUj}rY(j]j]j]j]j]ujjGj]rZj)r[}r\(jUj}r](j]j]j]j]j]ujjWj]r^j)r_}r`(jXdUnit Test application verifying service request/response mechanism in a multi-threaded architecture.rajKjj[j j,jjj}rb(j]j]j]j]j]ujKj]rcj%XdUnit Test application verifying service request/response mechanism in a multi-threaded architecture.rdre}rf(jjajj_ubaubajjubajjubj)rg}rh(jUj}ri(j]j]j]j]j]ujjGj]rjj)rk}rl(jUj}rm(j]j]j]j]j]ujjgj]rnj)ro}rp(jXBApplication successfully completes when run from Linux user-space.rqjKjjkj j,jjj}rr(j]j]j]j]j]ujKj]rsj%XBApplication successfully completes when run from Linux user-space.rtru}rv(jjqjjoubaubajjubajjubejjubj)rw}rx(jUj}ry(j]j]j]j]j]ujjSj]rz(j)r{}r|(jUj}r}(j]j]j]j]j]ujjwj]r~jX)r}r(jX.Combined DSP BIOS & ARM Linux Test applicationrjj{j j,jj\j}r(j]j]j]j]j]ujKj]rj%X.Combined DSP BIOS & ARM Linux Test applicationrr}r(jjjjubaubajjubj)r}r(jUj}r(j]j]j]j]j]ujjwj]rj)r}r(jUj}r(j]j]j]j]j]ujjj]rj)r}r(jXUnit Test application verifying service request/response mechanism over a heterogeneous processor boundary. RM Clients on two DSP cores request resources from an RM Server running in Linux user-space.rjKjjj j,jjj}r(j]j]j]j]j]ujKj]rj%XUnit Test application verifying service request/response mechanism over a heterogeneous processor boundary. RM Clients on two DSP cores request resources from an RM Server running in Linux user-space.rr}r(jjjjubaubajjubajjubj)r}r(jUj}r(j]j]j]j]j]ujjwj]rj)r}r(jUj}r(j]j]j]j]j]ujjj]rj)r}r(jXIApplication successfully completes with no memory leaks on two DSP cores.rjKjjj j,jjj}r(j]j]j]j]j]ujKj]rj%XIApplication successfully completes with no memory leaks on two DSP cores.rr}r(jjjjubaubajjubajjubejjubejjubejjubaubeubeubj)r}r(jUjKjjj j,jjj}r(j]rXadditional referencesraj]j]j]rUid239raj]ujKjhj]r(j)r}r(jXAdditional Referencesrjjj j,jj"j}r(j]j]j]j]j]ujKjhj]rj%XAdditional Referencesrr}r(jjjjubaubj)r}r(jUjjj j,jjj}r(j]j]j]j]j]ujNjhj]rj)r}r(jUj}r(j]j]j]j]j]UcolsKujjj]r(j)r}r(jUj}r(j]j]j]j]j]UcolwidthK#ujjj]jjubj)rŒ}rÌ(jUj}rČ(j]j]j]j]j]UcolwidthK)ujjj]jjubj)rŌ}rƌ(jUj}rnj(j]j]j]j]j]ujjj]rȌ(j)rɌ}rʌ(jUj}rˌ(j]j]j]j]j]ujjŌj]ř(j)r͌}rΌ(jUj}rό(j]j]j]j]j]ujjɌj]rЌjX)rь}rҌ(jX **Document**rӌjj͌j j,jj\j}rԌ(j]j]j]j]j]ujKj]rՌj|)r֌}r׌(jjӌj}r،(j]j]j]j]j]ujjьj]rٌj%XDocumentrڌrی}r܌(jUjj֌ubajjubaubajjubj)r݌}rތ(jUj}rߌ(j]j]j]j]j]ujjɌj]rjX)r}r(jX **Location**rjj݌j j,jj\j}r(j]j]j]j]j]ujKj]rj|)r}r(jjj}r(j]j]j]j]j]ujjj]rj%XLocationrr}r(jUjjubajjubaubajjubejjubj)r}r(jUj}r(j]j]j]j]j]ujjŌj]r(j)r}r(jUj}r(j]j]j]j]j]ujjj]rjX)r}r(jXAPI Reference Manualrjjj j,jj\j}r(j]j]j]j]j]ujKj]rj%XAPI Reference Manualrr}r(jjjjubaubajjubj)r}r(jUj}r(j]j]j]j]j]ujjj]rjX)r}r(jXO$(TI_PDK_INSTALL_DIR)\\packages\\ti \\drv\\rm\\docs\\doxygen\\html\\index.h tmljjj j,jj\j}r(j]j]j]j]j]ujKj]rj%XG$(TI_PDK_INSTALL_DIR)\packages\ti \drv\rm\docs\doxygen\html\index.h tmlrr}r(jXO$(TI_PDK_INSTALL_DIR)\\packages\\ti \\drv\\rm\\docs\\doxygen\\html\\index.h tmljjubaubajjubejjubj)r}r (jUj}r (j]j]j]j]j]ujjŌj]r (j)r }r (jUj}r(j]j]j]j]j]ujjj]rjX)r}r(jX Release Notesrjj j j,jj\j}r(j]j]j]j]j]ujKj]rj%X Release Notesrr}r(jjjjubaubajjubj)r}r(jUj}r(j]j]j]j]j]ujjj]rjX)r}r(jXH$(TI_PDK_INSTALL_DIR)\\packages\\ti \\drv\\rm\\docs\\ReleaseNotes_RM.pdfjjj j,jj\j}r(j]j]j]j]j]ujKj]rj%XB$(TI_PDK_INSTALL_DIR)\packages\ti \drv\rm\docs\ReleaseNotes_RM.pdfr r!}r"(jXH$(TI_PDK_INSTALL_DIR)\\packages\\ti \\drv\\rm\\docs\\ReleaseNotes_RM.pdfjjubaubajjubejjubj)r#}r$(jUj}r%(j]j]j]j]j]ujjŌj]r&(j)r'}r((jUj}r)(j]j]j]j]j]ujj#j]r*jX)r+}r,(jXResource Manager User Guider-jj'j j,jj\j}r.(j]j]j]j]j]ujKj]r/j%XResource Manager User Guider0r1}r2(jj-jj+ubaubajjubj)r3}r4(jUj}r5(j]j]j]j]j]ujj#j]r6jX)r7}r8(jX!`Processor SDK Resource Manager`_r9jj3j j,jj\j}r:(j]j]j]j]j]ujKj]r;j)r<}r=(jj9jqKjj7jjj}r>(UnameXProcessor SDK Resource ManagerjXFhttp://processors.wiki.ti.com/index.php/Processor_SDK_Resource_Managerr?j]j]j]j]j]uj]r@j%XProcessor SDK Resource ManagerrArB}rC(jUjj<ubaubaubajjubejjubejjubejjubaubj)rD}rE(jXj.. _Processor SDK Resource Manager: http://processors.wiki.ti.com/index.php/Processor_SDK_Resource_ManagerjKjjj j,jjj}rF(jj?j]rGUprocessor-sdk-resource-managerrHaj]j]j]j]rIhaujMVjhj]ubj)rJ}rK(jUjjj j,jjj}rL(j]j]j]j]j]ujKjhj]rMj)rN}rO(jUjKjjJj j,jjj}rP(j]j]j]j]j]ujKjhj]ubaubeubeubj j,jjj}rQ(j]rRXoverviewrSaj]j]j]rTUid232rUaj]ujKjhj]rV(j)rW}rX(jXOverviewrYjjj j,jj"j}rZ(j]j]j]j]j]ujKjhj]r[j%XOverviewr\r]}r^(jjYjjWubaubj)r_}r`(jUjKjjj j,jjj}ra(j]rbX introductionrcaj]j]j]rdUid233reaj]ujKjhj]rf(j)rg}rh(jX Introductionrijj_j j,jj"j}rj(j]j]j]j]j]ujKjhj]rkj%X Introductionrlrm}rn(jjijjgubaubjX)ro}rp(jXThe Resource Manager (RM) is delivered as part of Processor-SDK as a means for managing system resource contentions. RM has the ability to allocate system resources within a software architecture based on sets of allocation rules. Resources can be allocated to anything from a device core, to an OS task or process, to a specific software module. RM's resource management is defined by the RM configuration parameters and how RM is integrated within a software framework. The RM source code is device agnostic. The RM configuration parameters are device specific allowing RM to function on any processor capable of compiling and executing a C binary.rqjj_j j,jj\j}rr(j]j]j]j]j]ujK jhj]rsj%XThe Resource Manager (RM) is delivered as part of Processor-SDK as a means for managing system resource contentions. RM has the ability to allocate system resources within a software architecture based on sets of allocation rules. Resources can be allocated to anything from a device core, to an OS task or process, to a specific software module. RM's resource management is defined by the RM configuration parameters and how RM is integrated within a software framework. The RM source code is device agnostic. The RM configuration parameters are device specific allowing RM to function on any processor capable of compiling and executing a C binary.rtru}rv(jjqjjoubaubjb)rw}rx(jXRM Instance Typesryjj_j j,jjfj}rz(j]r{Urm-instance-typesr|aj]j]j]j]r}haujNjhj]r~j%XRM Instance Typesrr}r(jjyjjwubaubjX)r}r(jXResource Manager is an instance-based architecture. Integrating RM into a system consists of creating a set of RM instances, connecting these instances via message-passing mechanisms, and then using the instances to request resources for cores, processes, tasks, modules, etc. There are no restrictions on where a RM instance can be created as long as the means exist to connect the instance to other RM instances within the system.rjj_j j,jj\j}r(j]j]j]j]j]ujKjhj]rj%XResource Manager is an instance-based architecture. Integrating RM into a system consists of creating a set of RM instances, connecting these instances via message-passing mechanisms, and then using the instances to request resources for cores, processes, tasks, modules, etc. There are no restrictions on where a RM instance can be created as long as the means exist to connect the instance to other RM instances within the system.rr}r(jjjjubaubjX)r}r(jXThere are five instance typesrjj_j j,jj\j}r(j]j]j]j]j]ujKjhj]rj%XThere are five instance typesrr}r(jjjjubaubj`)r}r(jUjj_j j,jjcj}r(jeU.j]j]j]jfUj]j]jgjhujK!jhj]r(j)r}r(jX**Server**: Manages all defined system resources. Services resource requests received from connected Client Delegates and Clients.jjj j,jj j}r(j]j]j]j]j]ujNjhj]rjX)r}r(jX**Server**: Manages all defined system resources. Services resource requests received from connected Client Delegates and Clients.jjj j,jj\j}r(j]j]j]j]j]ujK!j]r(j|)r}r(jX **Server**j}r(j]j]j]j]j]ujjj]rj%XServerrr}r(jUjjubajjubj%Xx: Manages all defined system resources. Services resource requests received from connected Client Delegates and Clients.rr}r(jXx: Manages all defined system resources. Services resource requests received from connected Client Delegates and Clients.jjubeubaubj)r}r(jX**Client Delegate (CD)**: Acts as a low-request-latency proxy for the RM Server, managing resources provided by the RM Server. Services resource requests received from connected Clients.jjj j,jj j}r(j]j]j]j]j]ujNjhj]rjX)r}r(jX**Client Delegate (CD)**: Acts as a low-request-latency proxy for the RM Server, managing resources provided by the RM Server. Services resource requests received from connected Clients.jjj j,jj\j}r(j]j]j]j]j]ujK#j]r(j|)r}r(jX**Client Delegate (CD)**j}r(j]j]j]j]j]ujjj]rj%XClient Delegate (CD)rr}r(jUjjubajjubj%X: Acts as a low-request-latency proxy for the RM Server, managing resources provided by the RM Server. Services resource requests received from connected Clients.rr}r(jX: Acts as a low-request-latency proxy for the RM Server, managing resources provided by the RM Server. Services resource requests received from connected Clients.jjubeubaubj)r}r(jX**Client**: Front-end for receiving/responding to resource requests from application. Forwards resource requests to Server, or CD, for servicing. Returns allocated resources to application once response is received from Server or CD.jjj j,jj j}r(j]j]j]j]j]ujNjhj]rjX)r}r(jX**Client**: Front-end for receiving/responding to resource requests from application. Forwards resource requests to Server, or CD, for servicing. Returns allocated resources to application once response is received from Server or CD.jjj j,jj\j}r(j]j]j]j]j]ujK&j]r(j|)r}rÍ(jX **Client**j}rč(j]j]j]j]j]ujjj]rōj%XClientrƍrǍ}rȍ(jUjjubajjubj%X: Front-end for receiving/responding to resource requests from application. Forwards resource requests to Server, or CD, for servicing. Returns allocated resources to application once response is received from Server or CD.rɍrʍ}rˍ(jX: Front-end for receiving/responding to resource requests from application. Forwards resource requests to Server, or CD, for servicing. Returns allocated resources to application once response is received from Server or CD.jjubeubaubj)r̍}r͍(jX**Shared Server**: Same as the standard Server except all resource data structures are stored in shared memory allowing direct access from Shared Client instances.jjj j,jj j}r΍(j]j]j]j]j]ujNjhj]rύjX)rЍ}rэ(jX**Shared Server**: Same as the standard Server except all resource data structures are stored in shared memory allowing direct access from Shared Client instances.jj̍j j,jj\j}rҍ(j]j]j]j]j]ujK*j]rӍ(j|)rԍ}rՍ(jX**Shared Server**j}r֍(j]j]j]j]j]ujjЍj]r׍j%X Shared Serverr؍rٍ}rڍ(jUjjԍubajjubj%X: Same as the standard Server except all resource data structures are stored in shared memory allowing direct access from Shared Client instances.rۍr܍}rݍ(jX: Same as the standard Server except all resource data structures are stored in shared memory allowing direct access from Shared Client instances.jjЍubeubaubj)rލ}rߍ(jX/**Shared Client**: Same as Client except has direct access to the Server resource data structures via shared memory. Useful for low latency requests but not as robust from a software architecture perspective given shared memory MUST be available and used in order for Shared Server-Clients to function. jjj j,jj j}r(j]j]j]j]j]ujNjhj]rjX)r}r(jX.**Shared Client**: Same as Client except has direct access to the Server resource data structures via shared memory. Useful for low latency requests but not as robust from a software architecture perspective given shared memory MUST be available and used in order for Shared Server-Clients to function.jjލj j,jj\j}r(j]j]j]j]j]ujK-j]r(j|)r}r(jX**Shared Client**j}r(j]j]j]j]j]ujjj]rj%X Shared Clientrr}r(jUjjubajjubj%X: Same as Client except has direct access to the Server resource data structures via shared memory. Useful for low latency requests but not as robust from a software architecture perspective given shared memory MUST be available and used in order for Shared Server-Clients to function.rr}r(jX: Same as Client except has direct access to the Server resource data structures via shared memory. Useful for low latency requests but not as robust from a software architecture perspective given shared memory MUST be available and used in order for Shared Server-Clients to function.jjubeubaubeubeubeubj j,jj?j}r(j]UlevelKj]j]rjUaUsourcej,j]j]UlineKUtypejAujKjhj]rjX)r}r(jX+Duplicate implicit target name: "overview".j}r(j]j]j]j]j]ujjj]rj%X+Duplicate implicit target name: "overview".rr}r(jUjjubajj\ubaubh)r}r(jUjj_j j,jj?j}r(j]UlevelKj]j]rjeaUsourcej,j]j]UlineKUtypejAujKjhj]rjX)r}r(jX/Duplicate implicit target name: "introduction".j}r(j]j]j]j]j]ujjj]rj%X/Duplicate implicit target name: "introduction".rr}r(jUjjubajj\ubaubh)r}r(jUjj3j j,jj?j}r(j]UlevelKj]j]r j9aUsourcej,j]j]UlineK4UtypejAujK4jhj]r jX)r }r (jX1Duplicate implicit target name: "user interface".j}r (j]j]j]j]j]ujjj]rj%X1Duplicate implicit target name: "user interface".rr}r(jUjj ubajj\ubaubh)r}r(jUjjCj j,jj?j}r(j]UlevelKj]j]rjIaUsourcej,j]j]UlineK7UtypejAujK7jhj]rjX)r}r(jX7Duplicate implicit target name: "driver configuration".j}r(j]j]j]j]j]ujjj]rj%X7Duplicate implicit target name: "driver configuration".rr}r(jUjjubajj\ubaubh)r}r(jUjjj j,jj?j}r (j]UlevelKj]j]r!jaUsourcej,j]j]UlineKTUtypejAujKTjhj]r"jX)r#}r$(jX'Duplicate implicit target name: "apis".j}r%(j]j]j]j]j]ujjj]r&j%X'Duplicate implicit target name: "apis".r'r(}r)(jUjj#ubajj\ubaubh)r*}r+(jUjjj j,jj?j}r,(j]UlevelKj]j]r-jaUsourcej,j]j]UlineKoUtypejAujKojhj]r.jX)r/}r0(jX.Duplicate implicit target name: "application".j}r1(j]j]j]j]j]ujj*j]r2j%X.Duplicate implicit target name: "application".r3r4}r5(jUjj/ubajj\ubaubh)r6}r7(jUjjj j,jj?j}r8(j]UlevelKj]j]r9jaUsourcej,j]j]UlineKrUtypejAujKrjhj]r:jX)r;}r<(jX+Duplicate implicit target name: "examples".j}r=(j]j]j]j]j]ujj6j]r>j%X+Duplicate implicit target name: "examples".r?r@}rA(jUjj;ubajj\ubaubh)rB}rC(jUjjj j,jj?j}rD(j]UlevelKj]j]rEjaUsourcej,j]j]UlineKUtypejAujKjhj]rFjX)rG}rH(jX8Duplicate implicit target name: "additional references".j}rI(j]j]j]j]j]ujjBj]rJj%X8Duplicate implicit target name: "additional references".rKrL}rM(jUjjGubajj\ubaubh)rN}rO(jUjj)rP}rQ(jUjKjj)rR}rS(jUjhj j jjj}rT(j]j]j]j]rUUgpmcrVaj]rWhaujKjhj]rX(j)rY}rZ(jXGPMCr[jjRj j jj"j}r\(j]j]j]j]j]ujKjhj]r]j%XGPMCr^r_}r`(jj[jjYubaubj))ra}rb(jX?http://processors.wiki.ti.com/index.php/Processor_SDK_RTOS_GPMCjjRj j,X=source/rtos/PDK_Platform_Software/Device_Drivers/GPMC.rst.incrcrd}rebjj0j}rf(j2j3j]j]j]j]j]ujKjhj]rgj%X?http://processors.wiki.ti.com/index.php/Processor_SDK_RTOS_GPMCrhri}rj(jUjjaubaubjPj)rk}rl(jUjKjjRj jdjjj}rm(j]rnXuser interfaceroaj]j]j]rpUid242rqaj]ujK+jhj]rr(j)rs}rt(jXUser Interfacerujjkj jdjj"j}rv(j]j]j]j]j]ujK+jhj]rwj%XUser Interfacerxry}rz(jjujjsubaubj)r{}r|(jUjKjjkj jdjjj}r}(j]r~Xdriver configurationraj]j]j]rUid243raj]ujK.jhj]r(j)r}r(jXDriver Configurationrjj{j jdjj"j}r(j]j]j]j]j]ujK.jhj]rj%XDriver Configurationrr}r(jjjjubaubjb)r}r(jX **Board Specific Configuration**rjKjj{j jdjjfj}r(j]rUid244raj]j]rXboard-specific-configurationraj]j]ujNjhj]rj|)r}r(jjj}r(j]j]j]j]j]ujjj]rj%XBoard Specific Configurationrr}r(jUjjubajjubaubjX)r}r(jX8All the board specific configurations eg:enabling and pin-mux of GPMC pins should be performed before calling any driver APIs.By default Board_Init() API supports all initialization sequence for TI supported EVMs.Refer `Processor SDK RTOS Board Support `__ for additional details.jj{j jdjj\j}r(j]j]j]j]j]ujK3jhj]r(j%XAll the board specific configurations eg:enabling and pin-mux of GPMC pins should be performed before calling any driver APIs.By default Board_Init() API supports all initialization sequence for TI supported EVMs.Refer rr}r(jXAll the board specific configurations eg:enabling and pin-mux of GPMC pins should be performed before calling any driver APIs.By default Board_Init() API supports all initialization sequence for TI supported EVMs.Refer jjubj)r}r(jXE`Processor SDK RTOS Board Support `__j}r(UnameX Processor SDK RTOS Board SupportjXindex_board.html#board-supportj]j]j]j]j]ujjj]rj%X Processor SDK RTOS Board Supportrr}r(jUjjubajjubj%X for additional details.rr}r(jX for additional details.jjubeubjX)r}r(jXkOnce the board specific configuration is complete driver API GPMC_init() can be called to initialize driverrjj{j jdjj\j}r(j]j]j]j]j]ujK9jhj]rj%XkOnce the board specific configuration is complete driver API GPMC_init() can be called to initialize driverrr}r(jjjjubaubjb)r}r(jX **GPMC Configuration Structure**rjj{j jdjjfj}r(j]rUgpmc-configuration-structureraj]j]j]j]rhaujNjhj]rj|)r}r(jjj}r(j]j]j]j]j]ujjj]rj%XGPMC Configuration Structurerr}rŽ(jUjjubajjubaubjX)rÎ}rĎ(jXGPMC_soc.c file binds driver with hardware attributes on the board through GPMC_config structure. This structure must be provided to GPMC driver. It must be initialized before the GPMC_init() function is called and cannot be changed afterwards. For details about the individual fields of this structure, see the Doxygen help by opening PDK_INSTALL_DIR\\packages\\ti\\drv\\gpmc\\docs\\doxygen\\html\\index.html.jj{j jdjj\j}rŎ(j]j]j]j]j]ujK?jhj]rƎj%XGPMC_soc.c file binds driver with hardware attributes on the board through GPMC_config structure. This structure must be provided to GPMC driver. It must be initialized before the GPMC_init() function is called and cannot be changed afterwards. For details about the individual fields of this structure, see the Doxygen help by opening PDK_INSTALL_DIR\packages\ti\drv\gpmc\docs\doxygen\html\index.html.rǎrȎ}rɎ(jXGPMC_soc.c file binds driver with hardware attributes on the board through GPMC_config structure. This structure must be provided to GPMC driver. It must be initialized before the GPMC_init() function is called and cannot be changed afterwards. For details about the individual fields of this structure, see the Doxygen help by opening PDK_INSTALL_DIR\\packages\\ti\\drv\\gpmc\\docs\\doxygen\\html\\index.html.jjÎubaubeubj)rʎ}rˎ(jUjKjjkj jdjjj}r̎(j]r͎XapisrΎaj]j]j]rώUid245rЎaj]ujKGjhj]rю(j)rҎ}rӎ(jXAPIsrԎjjʎj jdjj"j}rՎ(j]j]j]j]j]ujKGjhj]r֎j%XAPIsr׎r؎}rَ(jjԎjjҎubaubjX)rڎ}rێ(jXAPI reference for application:r܎jjʎj jdjj\j}rݎ(j]j]j]j]j]ujKIjhj]rގj%XAPI reference for application:rߎr}r(jj܎jjڎubaubj#)r}r(jX#include jjʎj jdjj&j}r(j2j3j]j]j]j]j]ujMjhj]rj%X#include rr}r(jUjjubaubjX)r}r(jX/ Sample code for initiating GPMC transaction:rjjʎj jdjj\j}r(j]j]j]j]j]ujKOjhj]rj%X/ Sample code for initiating GPMC transaction:rr}r(jjjjubaubj#)r}r(jX... Board_init(boardCfg); ... ... gpmc = GPMC_open(peripheralNum, &gpmcParams); ... ... /* Initiate GPMC transfers. Refer Example for details */ transferOK = GPMC_transfer(gpmc, &gpmcTransaction); if (!transferOK) { /* GPMC transaction failed */ }jjʎj jdjj&j}r(jj Xcj2j3j]j]j]j!}j]j]ujKQjhj]rj%X... Board_init(boardCfg); ... ... gpmc = GPMC_open(peripheralNum, &gpmcParams); ... ... /* Initiate GPMC transfers. Refer Example for details */ transferOK = GPMC_transfer(gpmc, &gpmcTransaction); if (!transferOK) { /* GPMC transaction failed */ }rr}r(jUjjubaubeubeubj)r}r(jUjKjjRj jdjjj}r(j]rX applicationraj]j]j]rUid246raj]ujKcjhj]r(j)r}r(jX Applicationrjjj jdjj"j}r(j]j]j]j]j]ujKcjhj]rj%X Applicationrr}r(jjjjubaubj)r}r (jUjKjjj jdjjj}r (j]r Xexamplesr aj]j]j]r Uid247raj]ujKfjhj]r(j)r}r(jXExamplesrjjj jdjj"j}r(j]j]j]j]j]ujKfjhj]rj%XExamplesrr}r(jjjjubaubjX)r}r(jX9Refer Release Note for GPMC support across different EVMsrjjj jdjj\j}r(j]j]j]j]j]ujKhjhj]rj%X9Refer Release Note for GPMC support across different EVMsrr}r(jjjjubaubj)r }r!(jUjjj jdjjj}r"(j]j]j]j]j]ujNjhj]r#j)r$}r%(jUj}r&(j]j]j]j]j]UcolsKujj j]r'(j)r(}r)(jUj}r*(j]j]j]j]j]UcolwidthKujj$j]jjubj)r+}r,(jUj}r-(j]j]j]j]j]UcolwidthKujj$j]jjubj)r.}r/(jUj}r0(j]j]j]j]j]UcolwidthKujj$j]jjubj)r1}r2(jUj}r3(j]j]j]j]j]ujj$j]r4j)r5}r6(jUj}r7(j]j]j]j]j]ujj1j]r8(j)r9}r:(jUj}r;(j]j]j]j]j]ujj5j]r<jX)r=}r>(jXNamer?jj9j jdjj\j}r@(j]j]j]j]j]ujKkj]rAj%XNamerBrC}rD(jj?jj=ubaubajjubj)rE}rF(jUj}rG(j]j]j]j]j]ujj5j]rHj)rI}rJ(jUj}rK(j]j]j]j]j]ujjEj]rLj)rM}rN(jX DescriptionrOjKjjIj jdjjj}rP(j]j]j]j]j]ujKj]rQj%X DescriptionrRrS}rT(jjOjjMubaubajjubajjubj)rU}rV(jUj}rW(j]j]j]j]j]ujj5j]rXjX)rY}rZ(jXExpected Resultsr[jjUj jdjj\j}r\(j]j]j]j]j]ujKkj]r]j%XExpected Resultsr^r_}r`(jj[jjYubaubajjubejjubajjubj)ra}rb(jUj}rc(j]j]j]j]j]ujj$j]rd(j)re}rf(jUj}rg(j]j]j]j]j]ujjaj]rh(j)ri}rj(jUj}rk(j]j]j]j]j]ujjej]rljX)rm}rn(jX&GPMC NOR/NAND Read Example Applicationrojjij jdjj\j}rp(j]j]j]j]j]ujKmj]rqj%X&GPMC NOR/NAND Read Example Applicationrrrs}rt(jjojjmubaubajjubj)ru}rv(jUj}rw(j]j]j]j]j]ujjej]rxj)ry}rz(jUj}r{(j]j]j]j]j]ujjuj]r|j)r}}r~(jX>Simple example to read data from GPMC NOR/NAND flash on board.rjKjjyj jdjjj}r(j]j]j]j]j]ujKj]rj%X>Simple example to read data from GPMC NOR/NAND flash on board.rr}r(jjjj}ubaubajjubajjubj)r}r(jUj}r(j]j]j]j]j]ujjej]r(jX)r}r(jXBFollowing prints will come on console based on pass/fail criteria:rjjj jdjj\j}r(j]j]j]j]j]ujKmj]rj%XBFollowing prints will come on console based on pass/fail criteria:rr}r(jjjjubaubjX)r}r(jX**Pass criteria:**rjjj jdjj\j}r(j]j]j]j]j]ujKrj]rj|)r}r(jjj}r(j]j]j]j]j]ujjj]rj%XPass criteria:rr}r(jUjjubajjubaubjX)r}r(jX1GPMC flash device ID: 0x##, manufacturer ID: 0x##rjjj jdjj\j}r(j]j]j]j]j]ujKtj]rj%X1GPMC flash device ID: 0x##, manufacturer ID: 0x##rr}r(jjjjubaubjX)r}r(jXGPMC flash read test passed.rjjj jdjj\j}r(j]j]j]j]j]ujKxj]rj%XGPMC flash read test passed.rr}r(jjjjubaubjX)r}r(jXAll tests have passed.rjjj jdjj\j}r(j]j]j]j]j]ujK{j]rj%XAll tests have passed.rr}r(jjjjubaubejjubejjubj)r}r(jUj}r(j]j]j]j]j]ujjaj]r(j)r}r(jUj}r(j]j]j]j]j]ujjj]rjX)r}r(jXGPMC NOR/NAND test applicationrjjj jdjj\j}r(j]j]j]j]j]ujK~j]rj%XGPMC NOR/NAND test applicationrrÏ}rď(jjjjubaubajjubj)rŏ}rƏ(jUj}rǏ(j]j]j]j]j]ujjj]rȏj)rɏ}rʏ(jUj}rˏ(j]j]j]j]j]ujjŏj]ȑj)r͏}rΏ(jXJDriver Unit Test application to test GPMC NOR/NAND flash read/erase/writerϏjKjjɏj jdjjj}rЏ(j]j]j]j]j]ujKj]rяj%XJDriver Unit Test application to test GPMC NOR/NAND flash read/erase/writerҏrӏ}rԏ(jjϏjj͏ubaubajjubajjubj)rՏ}r֏(jUj}r׏(j]j]j]j]j]ujjj]r؏(jX)rُ}rڏ(jXBFollowing prints will come on console based on pass/fail criteria:rۏjjՏj jdjj\j}r܏(j]j]j]j]j]ujK~j]rݏj%XBFollowing prints will come on console based on pass/fail criteria:rޏrߏ}r(jjۏjjُubaubjX)r}r(jX**Pass criteria:**rjjՏj jdjj\j}r(j]j]j]j]j]ujKj]rj|)r}r(jjj}r(j]j]j]j]j]ujjj]rj%XPass criteria:rr}r(jUjjubajjubaubjX)r}r(jX1GPMC flash device ID: 0x##, manufacturer ID: 0x##rjjՏj jdjj\j}r(j]j]j]j]j]ujKj]rj%X1GPMC flash device ID: 0x##, manufacturer ID: 0x##rr}r(jjjjubaubjX)r}r(jX#GPMC flash block erase test passed.rjjՏj jdjj\j}r(j]j]j]j]j]ujKj]rj%X#GPMC flash block erase test passed.rr}r(jjjjubaubjX)r}r(jXGPMC flash write test passed.rjjՏj jdjj\j}r(j]j]j]j]j]ujKj]rj%XGPMC flash write test passed.rr}r(jjjjubaubjX)r}r(jXGPMC flash read test passed.rjjՏj jdjj\j}r(j]j]j]j]j]ujKj]r j%XGPMC flash read test passed.r r }r (jjjjubaubjX)r }r(jXAll tests have passed.rjjՏj jdjj\j}r(j]j]j]j]j]ujKj]rj%XAll tests have passed.rr}r(jjjj ubaubejjubejjubj)r}r(jUj}r(j]j]j]j]j]ujjaj]r(j)r}r(jUj}r(j]j]j]j]j]ujjj]jjubj)r}r(jUj}r(j]j]j]j]j]ujjj]jjubj)r}r (jUj}r!(j]j]j]j]j]ujjj]jjubejjubejjubejjubaubj\)r"}r#(jX1. GPMC Test Application supports write test, by default write test is disabled, user can enable the write test by defining TEST_GPMC_FLASH_WRITE in test/src/GPMC_board.h. 2. In GPMC_Test_icev2AM335x, J5 pin2 & 3 should be shorted on iceV2AM335x board in order to test GPMC NOR flash. 3. In GPMC_Test_evmAM437x, J2 pin1 & 2 should NOT be shorted on evmAM437x board in order to test GPMC NAND flash.jjj jdjj_j}r$(j]j]j]j]j]ujNjhj]r%(j`)r&}r'(jUj}r((jeU.j]j]j]jfUj]j]jgjhujj"j]r)(j)r*}r+(jXGPMC Test Application supports write test, by default write test is disabled, user can enable the write test by defining TEST_GPMC_FLASH_WRITE in test/src/GPMC_board.h. j}r,(j]j]j]j]j]ujj&j]r-jX)r.}r/(jXGPMC Test Application supports write test, by default write test is disabled, user can enable the write test by defining TEST_GPMC_FLASH_WRITE in test/src/GPMC_board.h.r0jj*j jdjj\j}r1(j]j]j]j]j]ujKj]r2j%XGPMC Test Application supports write test, by default write test is disabled, user can enable the write test by defining TEST_GPMC_FLASH_WRITE in test/src/GPMC_board.h.r3r4}r5(jj0jj.ubaubajj ubj)r6}r7(jXnIn GPMC_Test_icev2AM335x, J5 pin2 & 3 should be shorted on iceV2AM335x board in order to test GPMC NOR flash. j}r8(j]j]j]j]j]ujj&j]r9jX)r:}r;(jXmIn GPMC_Test_icev2AM335x, J5 pin2 & 3 should be shorted on iceV2AM335x board in order to test GPMC NOR flash.r<jj6j jdjj\j}r=(j]j]j]j]j]ujKj]r>j%XmIn GPMC_Test_icev2AM335x, J5 pin2 & 3 should be shorted on iceV2AM335x board in order to test GPMC NOR flash.r?r@}rA(jj<jj:ubaubajj ubejjcubjX)rB}rC(jXq3. In GPMC_Test_evmAM437x, J2 pin1 & 2 should NOT be shorted on evmAM437x board in order to test GPMC NAND flash.rDjj"j jdjj\j}rE(j]j]j]j]j]ujKj]rFj%Xq3. In GPMC_Test_evmAM437x, J2 pin1 & 2 should NOT be shorted on evmAM437x board in order to test GPMC NAND flash.rGrH}rI(jjDjjBubaubeubeubeubj)rJ}rK(jUjKjjRj jdjjj}rL(j]rMXadditional referencesrNaj]j]j]rOUid248rPaj]ujKjhj]rQ(j)rR}rS(jXAdditional ReferencesrTjjJj jdjj"j}rU(j]j]j]j]j]ujKjhj]rVj%XAdditional ReferencesrWrX}rY(jjTjjRubaubj)rZ}r[(jUjjJj jdjjj}r\(j]j]j]j]j]ujNjhj]r]j)r^}r_(jUj}r`(j]j]j]j]j]UcolsKujjZj]ra(j)rb}rc(jUj}rd(j]j]j]j]j]UcolwidthK#ujj^j]jjubj)re}rf(jUj}rg(j]j]j]j]j]UcolwidthK)ujj^j]jjubj)rh}ri(jUj}rj(j]j]j]j]j]ujj^j]rk(j)rl}rm(jUj}rn(j]j]j]j]j]ujjhj]ro(j)rp}rq(jUj}rr(j]j]j]j]j]ujjlj]rsjX)rt}ru(jX **Document**rvjjpj jdjj\j}rw(j]j]j]j]j]ujKj]rxj|)ry}rz(jjvj}r{(j]j]j]j]j]ujjtj]r|j%XDocumentr}r~}r(jUjjyubajjubaubajjubj)r}r(jUj}r(j]j]j]j]j]ujjlj]rjX)r}r(jX **Location**rjjj jdjj\j}r(j]j]j]j]j]ujKj]rj|)r}r(jjj}r(j]j]j]j]j]ujjj]rj%XLocationrr}r(jUjjubajjubaubajjubejjubj)r}r(jUj}r(j]j]j]j]j]ujjhj]r(j)r}r(jUj}r(j]j]j]j]j]ujjj]rjX)r}r(jXAPI Reference Manualrjjj jdjj\j}r(j]j]j]j]j]ujKj]rj%XAPI Reference Manualrr}r(jjjjubaubajjubj)r}r(jUj}r(j]j]j]j]j]ujjj]rjX)r}r(jXQ$(TI_PDK_INSTALL_DIR)\\packages\\ti \\drv\\gpmc\\docs\\doxygen\\html\\index .htmljjj jdjj\j}r(j]j]j]j]j]ujKj]rj%XI$(TI_PDK_INSTALL_DIR)\packages\ti \drv\gpmc\docs\doxygen\html\index .htmlrr}r(jXQ$(TI_PDK_INSTALL_DIR)\\packages\\ti \\drv\\gpmc\\docs\\doxygen\\html\\index .htmljjubaubajjubejjubj)r}r(jUj}r(j]j]j]j]j]ujjhj]r(j)r}r(jUj}r(j]j]j]j]j]ujjj]rjX)r}r(jX Release Notesrjjj jdjj\j}r(j]j]j]j]j]ujKj]rj%X Release Notesrr}r(jjjjubaubajjubj)r}r(jUj}r(j]j]j]j]j]ujjj]rjX)r}r(jXQ$(TI_PDK_INSTALL_DIR)\\packages\\ti \\drv\\gpmc\\docs\\ReleaseNotes_GPMC_ LLD.pdfjjj jdjj\j}r(j]j]j]j]j]ujKj]rj%XK$(TI_PDK_INSTALL_DIR)\packages\ti \drv\gpmc\docs\ReleaseNotes_GPMC_ LLD.pdfrÐrĐ}rŐ(jXQ$(TI_PDK_INSTALL_DIR)\\packages\\ti \\drv\\gpmc\\docs\\ReleaseNotes_GPMC_ LLD.pdfjjubaubajjubejjubejjubejjubaubj)rƐ}rǐ(jUjjJj jdjjj}rȐ(j]j]j]j]j]ujKjhj]rɐj)rʐ}rː(jUjKjjƐj jdjjj}r̐(j]j]j]j]j]ujKjhj]ubaubeubeubj jdjjj}r͐(j]rΐXoverviewrϐaj]j]j]rАUid240rѐaj]ujKjhj]rҐ(j)rӐ}rԐ(jXOverviewrՐjjPj jdjj"j}r֐(j]j]j]j]j]ujKjhj]rאj%XOverviewrؐrِ}rڐ(jjՐjjӐubaubj)rې}rܐ(jUjKjjPj jdjjj}rݐ(j]rސX introductionrߐaj]j]j]rUid241raj]ujKjhj]r(j)r}r(jX Introductionrjjېj jdjj"j}r(j]j]j]j]j]ujKjhj]rj%X Introductionrr}r(jjjjubaubjX)r}r(jX~The general-purpose memory controller (GPMC) is an unified memory controller dedicated to interfacing external memory devices:rjjېj jdjj\j}r(j]j]j]j]j]ujK jhj]rj%X~The general-purpose memory controller (GPMC) is an unified memory controller dedicated to interfacing external memory devices:rr}r(jjjjubaubj)r}r(jUjjېj jdjjj}r(jX-j]j]j]j]j]ujK jhj]r(j)r}r(jXZAsynchronous SRAM-like memories and application-specific integrated circuit (ASIC) devicesjjj jdjj j}r(j]j]j]j]j]ujNjhj]rjX)r}r(jXZAsynchronous SRAM-like memories and application-specific integrated circuit (ASIC) devicesrjjj jdjj\j}r(j]j]j]j]j]ujK j]rj%XZAsynchronous SRAM-like memories and application-specific integrated circuit (ASIC) devicesrr}r(jjjjubaubaubj)r}r(jXiAsynchronous, synchronous, and page mode (only available in non-multiplexed mode) burst NOR flash devicesjjj jdjj j}r(j]j]j]j]j]ujNjhj]rjX)r}r(jXiAsynchronous, synchronous, and page mode (only available in non-multiplexed mode) burst NOR flash devicesr jjj jdjj\j}r (j]j]j]j]j]ujKj]r j%XiAsynchronous, synchronous, and page mode (only available in non-multiplexed mode) burst NOR flash devicesr r }r(jj jjubaubaubj)r}r(jX NAND Flash jjj jdjj j}r(j]j]j]j]j]ujNjhj]rjX)r}r(jX NAND Flashrjjj jdjj\j}r(j]j]j]j]j]ujKj]rj%X NAND Flashrr}r(jjjjubaubaubeubjX)r}r(jXnDriver supports two types of transfers with data path to external memory device configured to be 16- or 8-bit:rjjېj jdjj\j}r(j]j]j]j]j]ujKjhj]rj%XnDriver supports two types of transfers with data path to external memory device configured to be 16- or 8-bit:r r!}r"(jjjjubaubj)r#}r$(jUjjېj jdjjj}r%(jX-j]j]j]j]j]ujKjhj]r&(j)r'}r((jXReadr)jj#j jdjj j}r*(j]j]j]j]j]ujNjhj]r+jX)r,}r-(jj)jj'j jdjj\j}r.(j]j]j]j]j]ujKj]r/j%XReadr0r1}r2(jj)jj,ubaubaubj)r3}r4(jXWrite jj#j jdjj j}r5(j]j]j]j]j]ujNjhj]r6jX)r7}r8(jXWriter9jj3j jdjj\j}r:(j]j]j]j]j]ujKj]r;j%XWriter<r=}r>(jj9jj7ubaubaubeubj)r?}r@(jUjjېj jdjjj}rA(j]j]j]j]j]ujKjhj]rBj)rC}rD(jX9In addition driver supports following modes of operation:rEjKjj?j jdjjj}rF(j]j]j]j]j]ujKjhj]rGj%X9In addition driver supports following modes of operation:rHrI}rJ(jjEjjCubaubaubj)rK}rL(jUjjېj jdjjj}rM(jX-j]j]j]j]j]ujKjhj]rN(j)rO}rP(jX**GPMC_MODE_BLOCKING:** By default, driver operates in blocking mode. In blocking mode, a Task’s code execution is blocked until transaction is complete. This ensures only one transaction operates at a given time. Driver supports both interrupt or non-interrupt based blocking modes.jjKj jdjj j}rQ(j]j]j]j]j]ujNjhj]rRjX)rS}rT(jX**GPMC_MODE_BLOCKING:** By default, driver operates in blocking mode. In blocking mode, a Task’s code execution is blocked until transaction is complete. This ensures only one transaction operates at a given time. Driver supports both interrupt or non-interrupt based blocking modes.jjOj jdjj\j}rU(j]j]j]j]j]ujKj]rV(j|)rW}rX(jX**GPMC_MODE_BLOCKING:**j}rY(j]j]j]j]j]ujjSj]rZj%XGPMC_MODE_BLOCKING:r[r\}r](jUjjWubajjubj%X By default, driver operates in blocking mode. In blocking mode, a Task’s code execution is blocked until transaction is complete. This ensures only one transaction operates at a given time. Driver supports both interrupt or non-interrupt based blocking modes.r^r_}r`(jX By default, driver operates in blocking mode. In blocking mode, a Task’s code execution is blocked until transaction is complete. This ensures only one transaction operates at a given time. Driver supports both interrupt or non-interrupt based blocking modes.jjSubeubaubj)ra}rb(jX**GPMC_MODE_CALLBACK** In callback mode, an GPMC transaction functions asynchronously, which means that it does not block a Task’s code execution. After an GPMC transaction is complete, GPMC driver calls a user-provided hook function. Only interrupt based callback is supported. jjKj jdjj j}rc(j]j]j]j]j]ujNjhj]rdjX)re}rf(jX**GPMC_MODE_CALLBACK** In callback mode, an GPMC transaction functions asynchronously, which means that it does not block a Task’s code execution. After an GPMC transaction is complete, GPMC driver calls a user-provided hook function. Only interrupt based callback is supported.jjaj jdjj\j}rg(j]j]j]j]j]ujKj]rh(j|)ri}rj(jX**GPMC_MODE_CALLBACK**j}rk(j]j]j]j]j]ujjej]rlj%XGPMC_MODE_CALLBACKrmrn}ro(jUjjiubajjubj%X In callback mode, an GPMC transaction functions asynchronously, which means that it does not block a Task’s code execution. After an GPMC transaction is complete, GPMC driver calls a user-provided hook function. Only interrupt based callback is supported.rprq}rr(jX In callback mode, an GPMC transaction functions asynchronously, which means that it does not block a Task’s code execution. After an GPMC transaction is complete, GPMC driver calls a user-provided hook function. Only interrupt based callback is supported.jjeubeubaubeubjX)rs}rt(jX=In NAND flash mode, driver supports following ECC algorithms:rujjېj jdjj\j}rv(j]j]j]j]j]ujK%jhj]rwj%X=In NAND flash mode, driver supports following ECC algorithms:rxry}rz(jjujjsubaubj)r{}r|(jUjjېj jdjjj}r}(jX-j]j]j]j]j]ujK'jhj]r~(j)r}r(jXBCH code 8-bitrjj{j jdjj j}r(j]j]j]j]j]ujNjhj]rjX)r}r(jjjjj jdjj\j}r(j]j]j]j]j]ujK'j]rj%XBCH code 8-bitrr}r(jjjjubaubaubj)r}r(jXHAMMING code 1-bit jj{j jdjj j}r(j]j]j]j]j]ujNjhj]rjX)r}r(jXHAMMING code 1-bitrjjj jdjj\j}r(j]j]j]j]j]ujK(j]rj%XHAMMING code 1-bitrr}r(jjjjubaubaubeubeubeubj jdjj?j}r(j]UlevelKj]j]rjѐaUsourcejdj]j]UlineKUtypejAujKjhj]rjX)r}r(jX+Duplicate implicit target name: "overview".j}r(j]j]j]j]j]ujjNj]rj%X+Duplicate implicit target name: "overview".rr}r(jUjjubajj\ubaubh)r}r(jUjjېj jdjj?j}r(j]UlevelKj]j]rjaUsourcejdj]j]UlineKUtypejAujKjhj]rjX)r}r(jX/Duplicate implicit target name: "introduction".j}r(j]j]j]j]j]ujjj]rj%X/Duplicate implicit target name: "introduction".rr}r(jUjjubajj\ubaubh)r}r(jUjjkj jdjj?j}r(j]UlevelKj]j]rjqaUsourcejdj]j]UlineK+UtypejAujK+jhj]rjX)r}r(jX1Duplicate implicit target name: "user interface".j}r(j]j]j]j]j]ujjj]rj%X1Duplicate implicit target name: "user interface".rr}r(jUjjubajj\ubaubh)r}r(jUjj{j jdjj?j}r(j]UlevelKj]j]rjaUsourcejdj]j]UlineK.UtypejAujK.jhj]rjX)r}r(jX7Duplicate implicit target name: "driver configuration".j}r(j]j]j]j]j]ujjj]rj%X7Duplicate implicit target name: "driver configuration".r‘rÑ}rđ(jUjjubajj\ubaubh)rő}rƑ(jUj}rǑ(j]UlevelKj]j]rȑjaUsourcej j]j]UlineKUtypejXujjj]rɑjX)rʑ}rˑ(jX?Duplicate explicit target name: "board-specific-configuration".j}ȓ(j]j]j]j]j]ujjőj]r͑j%X?Duplicate explicit target name: "board-specific-configuration".rΑrϑ}rБ(jUjjʑubajj\ubajj?ubh)rё}rґ(jUjjʎj jdjj?j}rӑ(j]UlevelKj]j]rԑjЎaUsourcejdj]j]UlineKGUtypejAujKGjhj]rՑjX)r֑}rב(jX'Duplicate implicit target name: "apis".j}rؑ(j]j]j]j]j]ujjёj]rّj%X'Duplicate implicit target name: "apis".rڑrۑ}rܑ(jUjj֑ubajj\ubaubh)rݑ}rޑ(jUjjj jdjj?j}rߑ(j]UlevelKj]j]rjaUsourcejdj]j]UlineKcUtypejAujKcjhj]rjX)r}r(jX.Duplicate implicit target name: "application".j}r(j]j]j]j]j]ujjݑj]rj%X.Duplicate implicit target name: "application".rr}r(jUjjubajj\ubaubh)r}r(jUjjj jdjj?j}r(j]UlevelKj]j]rjaUsourcejdj]j]UlineKfUtypejAujKfjhj]rjX)r}r(jX+Duplicate implicit target name: "examples".j}r(j]j]j]j]j]ujjj]rj%X+Duplicate implicit target name: "examples".rr}r(jUjjubajj\ubaubh)r}r(jUjjJj jdjj?j}r(j]UlevelKj]j]rjPaUsourcejdj]j]UlineKUtypejAujKjhj]rjX)r}r(jX8Duplicate implicit target name: "additional references".j}r(j]j]j]j]j]ujjj]rj%X8Duplicate implicit target name: "additional references".rr}r(jUjjubajj\ubaubh)r}r(jUjj)r}r(jUjKjj)r}r(jUjhj j jjj}r(j]j]j]j]rU sciclientr aj]r haujKjhj]r (j)r }r (jX SCICLIENTrjjj j jj"j}r(j]j]j]j]j]ujKjhj]rj%X SCICLIENTrr}r(jjjj ubaubj))r}r(jXDhttp://processors.wiki.ti.com/index.php/Processor_SDK_RTOS_SCICLIENTjjj j,XBsource/rtos/PDK_Platform_Software/Device_Drivers/SCICLIENT.rst.incrr}rbjj0j}r(j2j3j]j]j]j]j]ujKjhj]rj%XDhttp://processors.wiki.ti.com/index.php/Processor_SDK_RTOS_SCICLIENTrr}r(jUjjubaubjj)r}r(jUjKjjj jjjj}r (j]r!Xterms and abbreviationr"aj]j]j]r#Uterms-and-abbreviationr$aj]ujKjhj]r%(j)r&}r'(jXTerms and Abbreviationr(jjj jjj"j}r)(j]j]j]j]j]ujKjhj]r*j%XTerms and Abbreviationr+r,}r-(jj(jj&ubaubj)r.}r/(jUjjj jjjj}r0(j]j]j]j]j]ujNjhj]r1j)r2}r3(jUj}r4(j]j]j]j]j]UcolsKujj.j]r5(j)r6}r7(jUj}r8(j]j]j]j]j]UcolwidthKujj2j]jjubj)r9}r:(jUj}r;(j]j]j]j]j]UcolwidthK)ujj2j]jjubj)r<}r=(jUj}r>(j]j]j]j]j]ujj2j]r?j)r@}rA(jUj}rB(j]j]j]j]j]ujj<j]rC(j)rD}rE(jUj}rF(j]j]j]j]j]ujj@j]rGjX)rH}rI(jXtermrJjjDj jjj\j}rK(j]j]j]j]j]ujK"j]rLj%XtermrMrN}rO(jjJjjHubaubajjubj)rP}rQ(jUj}rR(j]j]j]j]j]ujj@j]rSjX)rT}rU(jXdefinition or explanationrVjjPj jjj\j}rW(j]j]j]j]j]ujK"j]rXj%Xdefinition or explanationrYrZ}r[(jjVjjTubaubajjubejjubajjubj)r\}r](jUj}r^(j]j]j]j]j]ujj2j]r_(j)r`}ra(jUj}rb(j]j]j]j]j]ujj\j]rc(j)rd}re(jUj}rf(j]j]j]j]j]ujj`j]rgjX)rh}ri(jXDMSCrjjjdj jjj\j}rk(j]j]j]j]j]ujK$j]rlj%XDMSCrmrn}ro(jjjjjhubaubajjubj)rp}rq(jUj}rr(j]j]j]j]j]ujj`j]rsjX)rt}ru(jX)Device Management and Security Controllerrvjjpj jjj\j}rw(j]j]j]j]j]ujK$j]rxj%X)Device Management and Security Controllerryrz}r{(jjvjjtubaubajjubejjubj)r|}r}(jUj}r~(j]j]j]j]j]ujj\j]r(j)r}r(jUj}r(j]j]j]j]j]ujj|j]rjX)r}r(jXSCIrjjj jjj\j}r(j]j]j]j]j]ujK%j]rj%XSCIrr}r(jjjjubaubajjubj)r}r(jUj}r(j]j]j]j]j]ujj|j]rjX)r}r(jXSystem Control Interfacerjjj jjj\j}r(j]j]j]j]j]ujK%j]rj%XSystem Control Interfacerr}r(jjjjubaubajjubejjubj)r}r(jUj}r(j]j]j]j]j]ujj\j]r(j)r}r(jUj}r(j]j]j]j]j]ujjj]rjX)r}r(jXSYSFWrjjj jjj\j}r(j]j]j]j]j]ujK&j]rj%XSYSFWrr}r(jjjjubaubajjubj)r}r(jUj}r(j]j]j]j]j]ujjj]rjX)r}r(jXSystem Firmwarerjjj jjj\j}r(j]j]j]j]j]ujK&j]rj%XSystem Firmwarerr}r(jjjjubaubajjubejjubj)r}r(jUj}r(j]j]j]j]j]ujj\j]r(j)r}r(jUj}r(j]j]j]j]j]ujjj]rjX)r}r(jXPMrjjj jjj\j}r(j]j]j]j]j]ujK'j]rj%XPMrr’}rÒ(jjjjubaubajjubj)rĒ}rŒ(jUj}rƒ(j]j]j]j]j]ujjj]rǒjX)rȒ}rɒ(jXPower ManagementrʒjjĒj jjj\j}r˒(j]j]j]j]j]ujK'j]r̒j%XPower Managementr͒rΒ}rϒ(jjʒjjȒubaubajjubejjubj)rВ}rђ(jUj}rҒ(j]j]j]j]j]ujj\j]rӒ(j)rԒ}rՒ(jUj}r֒(j]j]j]j]j]ujjВj]rגjX)rؒ}rْ(jXRMrڒjjԒj jjj\j}rے(j]j]j]j]j]ujK(j]rܒj%XRMrݒrޒ}rߒ(jjڒjjؒubaubajjubj)r}r(jUj}r(j]j]j]j]j]ujjВj]rjX)r}r(jXResource Managementrjjj jjj\j}r(j]j]j]j]j]ujK(j]rj%XResource Managementrr}r(jjjjubaubajjubejjubejjubejjubaubeubj)r}r(jUjjj jjjj}r(j]j]j]j]rUdirectory-structureraj]rhQaujK-jhj]r(j)r}r(jXDirectory Structurerjjj jjj"j}r(j]j]j]j]j]ujK-jhj]rj%XDirectory Structurerr}r(jjjjubaubjX)r}r(jX3The directory structure of SCIClient is as follows:rjjj jjj\j}r(j]j]j]j]j]ujK/jhj]rj%X3The directory structure of SCIClient is as follows:rr}r(jjjjubaubj)r}r(jUjjj jjjj}r(j]j]j]j]j]ujNjhj]rj)r}r(jUj}r (j]j]j]j]j]UcolsKujjj]r (j)r }r (jUj}r (j]j]j]j]j]UcolwidthK!ujjj]jjubj)r}r(jUj}r(j]j]j]j]j]UcolwidthKujjj]jjubj)r}r(jUj}r(j]j]j]j]j]ujjj]r(j)r}r(jUj}r(j]j]j]j]j]ujjj]r(j)r}r(jUj}r(j]j]j]j]j]ujjj]rjX)r}r(jXdocs/rjjj jjj\j}r (j]j]j]j]j]ujK2j]r!j%Xdocs/r"r#}r$(jjjjubaubajjubj)r%}r&(jUj}r'(j]j]j]j]j]ujjj]r(jX)r)}r*(jXQContains SCIClient design documentation and System Firmware public documentation.r+jj%j jjj\j}r,(j]j]j]j]j]ujK2j]r-j%XQContains SCIClient design documentation and System Firmware public documentation.r.r/}r0(jj+jj)ubaubajjubejjubj)r1}r2(jUj}r3(j]j]j]j]j]ujjj]r4(j)r5}r6(jUj}r7(j]j]j]j]j]ujj1j]r8jX)r9}r:(jXinclude/r;jj5j jjj\j}r<(j]j]j]j]j]ujK3j]r=j%Xinclude/r>r?}r@(jj;jj9ubaubajjubj)rA}rB(jUj}rC(j]j]j]j]j]ujj1j]rDjX)rE}rF(jXThis folder contains the files user needs to refer in order to communicate with SYSFW using `Sciclient_service`_ . The files in this folder define the request and response structures for communicating with SYSFW .jjAj jjj\j}rG(j]j]j]j]j]ujK3j]rH(j%X\This folder contains the files user needs to refer in order to communicate with SYSFW using rIrJ}rK(jX\This folder contains the files user needs to refer in order to communicate with SYSFW using jjEubj)rL}rM(jX`Sciclient_service`_jqKjjEjjj}rN(UnameXSciclient_servicej]j]j]j]j]UrefidrOUsciclient-servicerPuj]rQj%XSciclient_servicerRrS}rT(jUjjLubaubj%Xe . The files in this folder define the request and response structures for communicating with SYSFW .rUrV}rW(jXe . The files in this folder define the request and response structures for communicating with SYSFW .jjEubeubajjubejjubj)rX}rY(jUj}rZ(j]j]j]j]j]ujjj]r[(j)r\}r](jUj}r^(j]j]j]j]j]ujjXj]r_jX)r`}ra(jXsrc/rbjj\j jjj\j}rc(j]j]j]j]j]ujK4j]rdj%Xsrc/rerf}rg(jjbjj`ubaubajjubj)rh}ri(jUj}rj(j]j]j]j]j]ujjXj]rkjX)rl}rm(jX)Contains source(.c) files for the driver.rnjjhj jjj\j}ro(j]j]j]j]j]ujK4j]rpj%X)Contains source(.c) files for the driver.rqrr}rs(jjnjjlubaubajjubejjubj)rt}ru(jUj}rv(j]j]j]j]j]ujjj]rw(j)rx}ry(jUj}rz(j]j]j]j]j]ujjtj]r{jX)r|}r}(jXsoc/r~jjxj jjj\j}r(j]j]j]j]j]ujK5j]rj%Xsoc/rr}r(jj~jj|ubaubajjubj)r}r(jUj}r(j]j]j]j]j]ujjtj]rjX)r}r(jXContains SoC specific header files and firmware binary image. Refer to this folder for SoC sepcific parameters and board configuration. V0 - AM65xx, V1 - J721E.rjjj jjj\j}r(j]j]j]j]j]ujK5j]rj%XContains SoC specific header files and firmware binary image. Refer to this folder for SoC sepcific parameters and board configuration. V0 - AM65xx, V1 - J721E.rr}r(jjjjubaubajjubejjubj)r}r(jUj}r(j]j]j]j]j]ujjj]r(j)r}r(jUj}r(j]j]j]j]j]ujjj]rjX)r}r(jXexamplesrjjj jjj\j}r(j]j]j]j]j]ujK6j]rj%Xexamplesrr}r(jjjjubaubajjubj)r}r(jUj}r(j]j]j]j]j]ujjj]rjX)r}r(jX~Contains examples for utilizing sciclient interfaces. For Sciclient shim layer examples kindly refer the PM, UDMA driver code.rjjj jjj\j}r(j]j]j]j]j]ujK6j]rj%X~Contains examples for utilizing sciclient interfaces. For Sciclient shim layer examples kindly refer the PM, UDMA driver code.rr}r(jjjjubaubajjubejjubejjubejjubaubeubj)r}r(jUjKjjj jjjj}r(j]j]j]j]rU build-and-runraj]rhyaujK:jhj]r(j)r}r(jX Build and Runrjjj jjj"j}r(j]j]j]j]j]ujK:jhj]rj%X Build and Runrr}r(jjjjubaubjX)r}r(jX>This section assumes that you have PDK at PDK_INSTALL_DIR . ::jjj jjj\j}r(j]j]j]j]j]ujK BOARD=am65xx_evm CORE= sciclientr7jj1j jjj\j}r8(j]j]j]j]j]ujKLj]r9j%Xhmake PDK_INSTALL_PATH= BOARD=am65xx_evm CORE= sciclientr:r;}r<(jj7jj5ubaubajjubj)r=}r>(jUj}r?(j]j]j]j]j]ujj!j]r@jX)rA}rB(jXSCIClient libraryrCjj=j jjj\j}rD(j]j]j]j]j]ujKLj]rEj%XSCIClient libraryrFrG}rH(jjCjjAubaubajjubejjubj)rI}rJ(jUj}rK(j]j]j]j]j]ujjj]rL(j)rM}rN(jUj}rO(j]j]j]j]j]ujjIj]rPjX)rQ}rR(jXsciclient_ccs_initrSjjMj jjj\j}rT(j]j]j]j]j]ujKMj]rUj%Xsciclient_ccs_initrVrW}rX(jjSjjQubaubajjubj)rY}rZ(jUj}r[(j]j]j]j]j]ujjIj]r\jX)r]}r^(jXsmake PDK_INSTALL_PATH= BOARD=am65xx_evm CORE= sciclient_ccs_initr_jjYj jjj\j}r`(j]j]j]j]j]ujKMj]raj%Xsmake PDK_INSTALL_PATH= BOARD=am65xx_evm CORE= sciclient_ccs_initrbrc}rd(jj_jj]ubaubajjubj)re}rf(jUj}rg(j]j]j]j]j]ujjIj]rhjX)ri}rj(jX_SCIClient application that loads the firmware during ccs load.(No need to build this normally.)rkjjej jjj\j}rl(j]j]j]j]j]ujKMj]rmj%X_SCIClient application that loads the firmware during ccs load.(No need to build this normally.)rnro}rp(jjkjjiubaubajjubejjubj)rq}rr(jUj}rs(j]j]j]j]j]ujjj]rt(j)ru}rv(jUj}rw(j]j]j]j]j]ujjqj]rxjX)ry}rz(jXsciclient_firmware_bootr{jjuj jjj\j}r|(j]j]j]j]j]ujKNj]r}j%Xsciclient_firmware_bootr~r}r(jj{jjyubaubajjubj)r}r(jUj}r(j]j]j]j]j]ujjqj]rjX)r}r(jXxmake PDK_INSTALL_PATH= BOARD=am65xx_evm CORE= sciclient_firmware_bootrjjj jjj\j}r(j]j]j]j]j]ujKNj]rj%Xxmake PDK_INSTALL_PATH= BOARD=am65xx_evm CORE= sciclient_firmware_bootrr}r(jjjjubaubajjubj)r}r(jUj}r(j]j]j]j]j]ujjqj]rjX)r}r(jXSCIClient example applicationrjjj jjj\j}r(j]j]j]j]j]ujKNj]rj%XSCIClient example applicationrr}r(jjjjubaubajjubejjubj)r}r(jUj}r(j]j]j]j]j]ujjj]r(j)r}r(jUj}r(j]j]j]j]j]ujjj]rjX)r}r(jX Design Docrjjj jjj\j}r(j]j]j]j]j]ujKOj]rj%X Design Docrr}r(jjjjubaubajjubj)r}r(jUj}r(j]j]j]j]j]ujjj]rjX)r}r(jX4make PDK_INSTALL_PATH= designdocrjjj jjj\j}r(j]j]j]j]j]ujKOj]rj%X4make PDK_INSTALL_PATH= designdocrr}r(jjjjubaubajjubj)r}r(jUj}r(j]j]j]j]j]ujjj]rjX)r}r(jXSCIClient design documentationrjjj jjj\j}r(j]j]j]j]j]ujKOj]rj%XSCIClient design documentationrr}r(jjjjubaubajjubejjubejjubejjubaubjX)r}r”(jXNote ::jjɓj jjj\j}rÔ(j]j]j]j]j]ujKRjhj]rĔj%XNoterŔrƔ}rǔ(jXNotejjubaubj#)rȔ}rɔ(jXFor building the example "sciclient_firmware_boot" or "your application" using SCIClient lib, make sure you have a section "boardcfg_data" defined in your linker cmd file which resides in OC-MSRAM .jjɓj jjj&j}rʔ(j2j3j]j]j]j]j]ujMqjhj]r˔j%XFor building the example "sciclient_firmware_boot" or "your application" using SCIClient lib, make sure you have a section "boardcfg_data" defined in your linker cmd file which resides in OC-MSRAM .r̔r͔}rΔ(jUjjȔubaubjX)rϔ}rД(jXOThe next sections will explain how to load the system firmware using sciclient.rєjjɓj jjj\j}rҔ(j]j]j]j]j]ujKVjhj]rӔj%XOThe next sections will explain how to load the system firmware using sciclient.rԔrՔ}r֔(jjєjjϔubaubeubj)rה}rؔ(jUjjj jjjj}rٔ(j]j]j]j]rڔUload-using-a-boot-mediar۔aj]rܔhMaujKYjhj]rݔ(j)rޔ}rߔ(jXLoad using a boot-mediarjjהj jjj"j}r(j]j]j]j]j]ujKYjhj]rj%XLoad using a boot-mediarr}r(jjjjޔubaubjX)r}r(jX\Follow these steps to load the **sciclient_firmware_boot** application through a boot media:rjjהj jjj\j}r(j]j]j]j]j]ujKZjhj]r(j%XFollow these steps to load the rr}r(jXFollow these steps to load the jjubj|)r}r(jX**sciclient_firmware_boot**j}r(j]j]j]j]j]ujjj]rj%Xsciclient_firmware_bootrr}r(jUjjubajjubj%X" application through a boot media:rr}r(jX" application through a boot media:jjubeubj)r}r(jUjjהj jjjj}r(jX-j]j]j]j]j]ujK\jhj]r(j)r}r(jX2Build the example: sciclient_firmware_boot_TestApprjjj jjj j}r(j]j]j]j]j]ujNjhj]rjX)r}r(jjjjj jjj\j}r(j]j]j]j]j]ujK\j]rj%X2Build the example: sciclient_firmware_boot_TestApprr}r(jjjjubaubaubj)r}r (jXThe test case works with MMCSD boot mode where it loads the sysfw.bin file from the mmcsd card. Ensure to create a tiboot3.bin file from the sciclient application. Copy the SoC specific sysfw.bin in the SD card along with the tiboot3.bin file.r jjj jjj j}r (j]j]j]j]j]ujNjhj]r jX)r }r(jj jjj jjj\j}r(j]j]j]j]j]ujK]j]rj%XThe test case works with MMCSD boot mode where it loads the sysfw.bin file from the mmcsd card. Ensure to create a tiboot3.bin file from the sciclient application. Copy the SoC specific sysfw.bin in the SD card along with the tiboot3.bin file.rr}r(jj jj ubaubaubj)r}r(jXvRefer the section `Boot-Modes `_ for details on how to use a bootmedia.rjjj jjj j}r(j]j]j]j]j]ujNjhj]rjX)r}r(jjjjj jjj\j}r(j]j]j]j]j]ujK^j]r(j%XRefer the section rr}r(jXRefer the section jjubj)r }r!(jX=`Boot-Modes `_j}r"(UnameX Boot-ModesjX-index_Foundational_Components.html#boot-modesr#j]j]j]j]j]ujjj]r$j%X Boot-Modesr%r&}r'(jUjj ubajjubj)r(}r)(jX0 jKjjjjj}r*(Urefurij#j]r+U boot-modesr,aj]j]j]j]r-hauj]ubj%X' for details on how to use a bootmedia.r.r/}r0(jX' for details on how to use a bootmedia.jjubeubaubj)r1}r2(jX|You can also use the SBL to load the system firmware and initialize the SoC. Refer to the SBL user guide for more details. jjj jjj j}r3(j]j]j]j]j]ujNjhj]r4jX)r5}r6(jXzYou can also use the SBL to load the system firmware and initialize the SoC. Refer to the SBL user guide for more details.r7jj1j jjj\j}r8(j]j]j]j]j]ujK_j]r9j%XzYou can also use the SBL to load the system firmware and initialize the SoC. Refer to the SBL user guide for more details.r:r;}r<(jj7jj5ubaubaubeubeubj)r=}r>(jUjjj jjjj}r?(j]j]j]j]r@Uload-using-ccsrAaj]rBhaujKcjhj]rC(j)rD}rE(jXLoad using CCSrFjj=j jjj"j}rG(j]j]j]j]j]ujKcjhj]rHj%XLoad using CCSrIrJ}rK(jjFjjDubaubjX)rL}rM(jXMFollow these steps to load the **sciclient_ccs_init** application through CCSrNjj=j jjj\j}rO(j]j]j]j]j]ujKdjhj]rP(j%XFollow these steps to load the rQrR}rS(jXFollow these steps to load the jjLubj|)rT}rU(jX**sciclient_ccs_init**j}rV(j]j]j]j]j]ujjLj]rWj%Xsciclient_ccs_initrXrY}rZ(jUjjTubajjubj%X application through CCSr[r\}r](jX application through CCSjjLubeubj)r^}r_(jUjj=j jjjj}r`(jX-j]j]j]j]j]ujKfjhj]raj)rb}rc(jX|Update the File SCICLIENT_PATH/sciclient/tools/ccsLoadDmsc//launch.js for the following variables to your PC location .rdjj^j jjj j}re(j]j]j]j]j]ujNjhj]rfjX)rg}rh(jjdjjbj jjj\j}ri(j]j]j]j]j]ujKfj]rjj%X|Update the File SCICLIENT_PATH/sciclient/tools/ccsLoadDmsc//launch.js for the following variables to your PC location .rkrl}rm(jjdjjgubaubaubaubjX)rn}ro(jXModify for AM65xx: ::jj=j jjj\j}rp(j]j]j]j]j]ujKgjhj]rqj%XModify for AM65xx:rrrs}rt(jXModify for AM65xx:jjnubaubj#)ru}rv(jX3//Path to GEL files gelFilePath = "/ccs_base/emulation/gel/AM65xEVM/"; → GEL path location // Path to the directory in which this file would be residing. CCS expects // absolute paths to load the binaries. thisJsFileDirectory = "PDK_INSTALL_DIR/packages/ti/drv/sciclient/tools/ccsLoadDmsc";jj=j jjj&j}rw(j2j3j]j]j]j]j]ujMjhj]rxj%X3//Path to GEL files gelFilePath = "/ccs_base/emulation/gel/AM65xEVM/"; → GEL path location // Path to the directory in which this file would be residing. CCS expects // absolute paths to load the binaries. thisJsFileDirectory = "PDK_INSTALL_DIR/packages/ti/drv/sciclient/tools/ccsLoadDmsc";ryrz}r{(jUjjuubaubjX)r|}r}(jXModify for J721E: ::jj=j jjj\j}r~(j]j]j]j]j]ujKnjhj]rj%XModify for J721E:rr}r(jXModify for J721E:jj|ubaubj#)r}r(jX2//PDK path. Edit this pdkPath = "PDK_INSTALL_DIR";jj=j jjj&j}r(j2j3j]j]j]j]j]ujMjhj]rj%X2//PDK path. Edit this pdkPath = "PDK_INSTALL_DIR";rr}r(jUjjubaubj)r}r(jUjj=j jjjj}r(jX-j]j]j]j]j]ujKsjhj]r(j)r}r(jXConnect the Javascript to the CCXML file with the steps shown below: (Note: this step needs to be repeated if you switch workspaces or clean your workspace).The Javascript is run on re-launch of the ccxml. If you would like to run the Javascript without relaunch then you can look ahead to the section: "Re-running the script once ccxml is already launched." Click on Debug Configurations from the button as follows: .. image:: ../images/sciclient_ccsLoad1.png :height: 300 :width: 600 jjj jjj j}r(j]j]j]j]j]ujNjhj]r(jX)r}r(jXConnect the Javascript to the CCXML file with the steps shown below: (Note: this step needs to be repeated if you switch workspaces or clean your workspace).The Javascript is run on re-launch of the ccxml. If you would like to run the Javascript without relaunch then you can look ahead to the section: "Re-running the script once ccxml is already launched." Click on Debug Configurations from the button as follows:rjjj jjj\j}r(j]j]j]j]j]ujKsj]rj%XConnect the Javascript to the CCXML file with the steps shown below: (Note: this step needs to be repeated if you switch workspaces or clean your workspace).The Javascript is run on re-launch of the ccxml. If you would like to run the Javascript without relaunch then you can look ahead to the section: "Re-running the script once ccxml is already launched." Click on Debug Configurations from the button as follows:rr}r(jjjjubaubj )r}r(jUj}r(j]j]j]j]j]ujjj]rj^)r}r(jX].. image:: ../images/sciclient_ccsLoad1.png :height: 300 :width: 600 j}r(j]UuriX%rtos/../images/sciclient_ccsLoad1.pngrj]j]UwidthX600j]jd}rU*jsj]UheightX300ujjj]jjaubajj ubeubj)r}r(jX Select the CCXML file from the left-hand side and populate the path to the launch_am65xx.js file in the "Initialization Script" free form field and click on "Apply". .. image:: ../images/sciclient_ccsLoad2.png :height: 300 :width: 600jjj jjj j}r(j]j]j]j]j]ujNjhj]r(jX)r}r(jXSelect the CCXML file from the left-hand side and populate the path to the launch_am65xx.js file in the "Initialization Script" free form field and click on "Apply".rjjj jjj\j}r(j]j]j]j]j]ujKyj]rj%XSelect the CCXML file from the left-hand side and populate the path to the launch_am65xx.js file in the "Initialization Script" free form field and click on "Apply".rr}r(jjjjubaubj )r}r(jUj}r(j]j]j]j]j]ujjj]rj^)r}r(jX\.. image:: ../images/sciclient_ccsLoad2.png :height: 300 :width: 600j}r(j]UuriX%rtos/../images/sciclient_ccsLoad2.pngrj]j]UwidthX600j]jd}rU*jsj]UheightX300ujjj]jjaubajj ubeubj)r}r(jXWOnce you Launch the ccxml the java script would automatically run and connect to R5F. jjj jjj j}r(j]j]j]j]j]ujNjhj]rjX)r}r(jXUOnce you Launch the ccxml the java script would automatically run and connect to R5F.rjjj jjj\j}r(j]j]j]j]j]ujK~j]rj%XUOnce you Launch the ccxml the java script would automatically run and connect to R5F.rr•}rÕ(jjjjubaubaubeubjb)rĕ}rŕ(jX8**Re-running the script once ccxml is already launched**rƕjj=j jjjfj}rǕ(j]j]j]j]j]ujKjhj]rȕj|)rɕ}rʕ(jjƕj}r˕(j]j]j]j]j]ujjĕj]r̕j%X4Re-running the script once ccxml is already launchedr͕rΕ}rϕ(jUjjɕubajjubaubjX)rЕ}rѕ(jX_In the CCS window open the "View → Scripting Console.." In the CCS Scripting Console type: ::jj=j jjj\j}rҕ(j]j]j]j]j]ujKjhj]rӕj%X\In the CCS window open the "View → Scripting Console.." In the CCS Scripting Console type:rԕrՕ}r֕(jX\In the CCS window open the "View → Scripting Console.." In the CCS Scripting Console type:jjЕubaubj#)rו}rؕ(jX=load("SCICLIENT_PATH\\tools\\ccsLoadDmsc\\am65xx\\launch.js")jj=j jjj&j}rٕ(j2j3j]j]j]j]j]ujMjhj]rڕj%X=load("SCICLIENT_PATH\\tools\\ccsLoadDmsc\\am65xx\\launch.js")rەrܕ}rݕ(jUjjוubaubj)rޕ}rߕ(jUjj=j jjjj}r(j]j]j]j]rUorraj]rh{aujKjhj]r(j)r}r(jXorrjjޕj jjj"j}r(j]j]j]j]j]ujKjhj]rj%Xorrr}r(jjjjubaubj )r}r(jUjjޕj jjj j}r(j]j]j]j]j]ujNjhj]rjX)r}r(jX<load("SCICLIENT_PATH\\tools\\ccsLoadDmsc\\j721e\\launch.js")jjj jjj\j}r(j]j]j]j]j]ujKj]rj%X8load("SCICLIENT_PATH\tools\ccsLoadDmsc\j721e\launch.js")rr}r(jX<load("SCICLIENT_PATH\\tools\\ccsLoadDmsc\\j721e\\launch.js")jjubaubaubjX)r}r(jX=This would give the following output on the scripting consolerjjޕj jjj\j}r(j]j]j]j]j]ujKjhj]rj%X=This would give the following output on the scripting consolerr}r(jjjjubaubjX)r}r(jXFor AM65xx: ::jjޕj jjj\j}r(j]j]j]j]j]ujKjhj]rj%X For AM65xx:rr}r(jX For AM65xx:jjubaubj#)r}r(jXjs:> load("SCICLIENT_PATH\\tools\\ccsLoadDmsc\\am65xx\\launch.js") Connecting to DMSC_Cortex_M3_0! Loading DMSC Firmware... DMSC Firmware Load Done... DMSC Firmware run starting now... Connecting to MCU Cortex_R5_0!jjޕj jjj&j}r (j2j3j]j]j]j]j]ujMjhj]r j%Xjs:> load("SCICLIENT_PATH\\tools\\ccsLoadDmsc\\am65xx\\launch.js") Connecting to DMSC_Cortex_M3_0! Loading DMSC Firmware... DMSC Firmware Load Done... DMSC Firmware run starting now... Connecting to MCU Cortex_R5_0!r r }r (jUjjubaubjX)r}r(jX For J721E: ::jjޕj jjj\j}r(j]j]j]j]j]ujKjhj]rj%X For J721E:rr}r(jX For J721E:jjubaubj#)r}r(jXrjs:> load("SCICLIENT_PATH\\tools\\ccsLoadDmsc\\j721e\\launch.js") Connecting to DMSC_Cortex_M3_0! Loading DMSC Firmware... DMSC Firmware Load Done... DMSC Firmware run starting now... Connecting to MCU Cortex_R5_0! Running the board configuration initialization from R5! Running the DDR configuration... Wait till it completes! Okay you are good to go.. Happy Debugging!jjޕj jjj&j}r(j2j3j]j]j]j]j]ujMjhj]rj%Xrjs:> load("SCICLIENT_PATH\\tools\\ccsLoadDmsc\\j721e\\launch.js") Connecting to DMSC_Cortex_M3_0! Loading DMSC Firmware... DMSC Firmware Load Done... DMSC Firmware run starting now... Connecting to MCU Cortex_R5_0! Running the board configuration initialization from R5! Running the DDR configuration... Wait till it completes! Okay you are good to go.. Happy Debugging!rr}r(jUjjubaubeubeubj)r}r(jUjjj jjjj}r(j]j]j]j]rU handling-two-or-more-ccxml-filesr aj]r!hkaujKjhj]r"(j)r#}r$(jX Handling Two or more ccxml filesr%jjj jjj"j}r&(j]j]j]j]j]ujKjhj]r'j%X Handling Two or more ccxml filesr(r)}r*(jj%jj#ubaubjX)r+}r,(jXIn case you need to connect two or more board to the same CCS session and use the launch script, please follow the steps below:r-jjj jjj\j}r.(j]j]j]j]j]ujKjhj]r/j%XIn case you need to connect two or more board to the same CCS session and use the launch script, please follow the steps below:r0r1}r2(jj-jj+ubaubj)r3}r4(jUjjj jjjj}r5(jX-j]j]j]j]j]ujKjhj]r6j)r7}r8(jXWhen you use 2 or more CCXML files with similar debugger (e.g. connect 2 boards XDS110 on-board debugger to the PC), CCS would enumerate the debuggers as below:r9jj3j jjj j}r:(j]j]j]j]j]ujNjhj]r;jX)r<}r=(jj9jj7j jjj\j}r>(j]j]j]j]j]ujKj]r?j%XWhen you use 2 or more CCXML files with similar debugger (e.g. connect 2 boards XDS110 on-board debugger to the PC), CCS would enumerate the debuggers as below:r@rA}rB(jj9jj<ubaubaubaubj )rC}rD(jUjjj jjj j}rE(j]j]j]j]j]ujNjhj]rFj )rG}rH(jXX:: Texas Instruments XDS110 USB Debug Probe_0 Texas Instruments XDS110 USB Debug Probe_1jjCj jjj j}rI(j]j]j]j]j]ujKj]rJ(j )rK}rL(jX::rMjjGj jjj j}rN(j]j]j]j]j]ujKj]rOj%X::rPrQ}rR(jjMjjKubaubj )rS}rT(jUj}rU(j]j]j]j]j]ujjGj]rVjX)rW}rX(jXUTexas Instruments XDS110 USB Debug Probe_0 Texas Instruments XDS110 USB Debug Probe_1rYjjSj jjj\j}rZ(j]j]j]j]j]ujKj]r[j%XUTexas Instruments XDS110 USB Debug Probe_0 Texas Instruments XDS110 USB Debug Probe_1r\r]}r^(jjYjjWubaubajj ubeubaubjX)r_}r`(jXNotice the suffix "_0" and "_1". - In order to use the same launch.js file with this, please create a second copy of the launch.js file. Update the first launch.js files as below: ::jjj jjj\j}ra(j]j]j]j]j]ujKjhj]rbj%XNotice the suffix "_0" and "_1". - In order to use the same launch.js file with this, please create a second copy of the launch.js file. Update the first launch.js files as below:rcrd}re(jXNotice the suffix "_0" and "_1". - In order to use the same launch.js file with this, please create a second copy of the launch.js file. Update the first launch.js files as below:jj_ubaubj#)rf}rg(jXfunction updateScriptVars() { //Open a debug session dsMCU1_0 = debugServer.openSession( "*_0.*MCU_PULSAR_Cortex_R5_0" ); dsDMSC_0 = debugServer.openSession( "*_0.*DMSC_Cortex_M3_0" ); }jjj jjj&j}rh(j2j3j]j]j]j]j]ujMjhj]rij%Xfunction updateScriptVars() { //Open a debug session dsMCU1_0 = debugServer.openSession( "*_0.*MCU_PULSAR_Cortex_R5_0" ); dsDMSC_0 = debugServer.openSession( "*_0.*DMSC_Cortex_M3_0" ); }rjrk}rl(jUjjfubaubjX)rm}rn(jX(Update the second launch.js as below: ::jjj jjj\j}ro(j]j]j]j]j]ujKjhj]rpj%X%Update the second launch.js as below:rqrr}rs(jX%Update the second launch.js as below:jjmubaubj#)rt}ru(jXfunction updateScriptVars() { //Open a debug session dsMCU1_0 = debugServer.openSession( "*_1.*MCU_PULSAR_Cortex_R5_0" ); dsDMSC_0 = debugServer.openSession( "*_1.*DMSC_Cortex_M3_0" ); }jjj jjj&j}rv(j2j3j]j]j]j]j]ujMjhj]rwj%Xfunction updateScriptVars() { //Open a debug session dsMCU1_0 = debugServer.openSession( "*_1.*MCU_PULSAR_Cortex_R5_0" ); dsDMSC_0 = debugServer.openSession( "*_1.*DMSC_Cortex_M3_0" ); }rxry}rz(jUjjtubaubjX)r{}r|(jX&Notice the addition of "*_0" and "*_1"r}jjj jjj\j}r~(j]j]j]j]j]ujKjhj]r(j%XNotice the addition of "rr}r(jXNotice the addition of "jj{ubjg-)r}r(jX*j}r(j]rUid251raj]j]j]j]UrefidUid250rujj{j]rj%X*r}r(jUjjubajjs-ubj%X _0" and "rr}r(jX _0" and "jj{ubjg-)r}r(jX*j}r(j]rUid253raj]j]j]j]UrefidUid252rujj{j]rj%X*r}r(jUjjubajjs-ubj%X_1"rr}r(jX_1"jj{ubeubeubeubj)r}r(jUjjj jjjj}r(j]j]j]j]rUsystem-firmware-logs-parseraj]rheaujKjhj]r(j)r}r(jXSystem Firmware Logs Parserjjj jjj"j}r(j]j]j]j]j]ujKjhj]rj%XSystem Firmware Logs Parserr}r(jjjjubaubjX)r}r(jXIn many cases you may need to understand and debug if a System Firmware API fails due to incorrect parameters or some genuine issue in the firmware. In order to debug when the API is failing, you need to follow the steps below:rjjj jjj\j}r(j]j]j]j]j]ujKjhj]rj%XIn many cases you may need to understand and debug if a System Firmware API fails due to incorrect parameters or some genuine issue in the firmware. In order to debug when the API is failing, you need to follow the steps below:rr}r(jjjjubaubj)r}r(jUjjj jjjj}r(jX-j]j]j]j]j]ujKjhj]rj)r}r(jXDEnable logs in the system firmware by modifying the below structure:rjjj jjj j}r(j]j]j]j]j]ujNjhj]rjX)r}r(jjjjj jjj\j}r(j]j]j]j]j]ujKj]rj%XDEnable logs in the system firmware by modifying the below structure:rr}r(jjjjubaubaubaubjX)r–}rÖ(jXFile: sciclient\soc\Vx\sciclient_defaultBoardcfg.c Structure: const struct tisci_boardcfg gBoardConfigLow Update the structure to have trace enabled: ::jjj jjj\j}rĖ(j]j]j]j]j]ujKjhj]rŖj%XFile: sciclientsocVxsciclient_defaultBoardcfg.c Structure: const struct tisci_boardcfg gBoardConfigLow Update the structure to have trace enabled:rƖrǖ}rȖ(jXFile: sciclient\soc\Vx\sciclient_defaultBoardcfg.c Structure: const struct tisci_boardcfg gBoardConfigLow Update the structure to have trace enabled:jj–ubaubj#)rɖ}rʖ(jX0/* This enables the trace for DMSC logging. Should be used only for * debug. */ .trace_dst_enables = (TISCI_BOARDCFG_TRACE_DST_UART0 | TISCI_BOARDCFG_TRACE_DST_ITM | TISCI_BOARDCFG_TRACE_DST_MEM), .trace_src_enables = (TISCI_BOARDCFG_TRACE_SRC_PM | TISCI_BOARDCFG_TRACE_SRC_RM | TISCI_BOARDCFG_TRACE_SRC_SEC | TISCI_BOARDCFG_TRACE_SRC_BASE | TISCI_BOARDCFG_TRACE_SRC_USER | TISCI_BOARDCFG_TRACE_SRC_SUPR)jjj jjj&j}r˖(j2j3j]j]j]j]j]ujMjhj]r̖j%X0/* This enables the trace for DMSC logging. Should be used only for * debug. */ .trace_dst_enables = (TISCI_BOARDCFG_TRACE_DST_UART0 | TISCI_BOARDCFG_TRACE_DST_ITM | TISCI_BOARDCFG_TRACE_DST_MEM), .trace_src_enables = (TISCI_BOARDCFG_TRACE_SRC_PM | TISCI_BOARDCFG_TRACE_SRC_RM | TISCI_BOARDCFG_TRACE_SRC_SEC | TISCI_BOARDCFG_TRACE_SRC_BASE | TISCI_BOARDCFG_TRACE_SRC_USER | TISCI_BOARDCFG_TRACE_SRC_SUPR)r͖rΖ}rϖ(jUjjɖubaubj)rЖ}rі(jUjjj jjjj}rҖ(jX-j]j]j]j]j]ujKjhj]rӖ(j)rԖ}rՖ(jX6Capture the System firmware logs from the WKUP_USART0.r֖jjЖj jjj j}rז(j]j]j]j]j]ujNjhj]rؖjX)rٖ}rږ(jj֖jjԖj jjj\j}rۖ(j]j]j]j]j]ujKj]rܖj%X6Capture the System firmware logs from the WKUP_USART0.rݖrޖ}rߖ(jj֖jjٖubaubaubj)r}r(jXUGet the parsed logs from **sciclient\tools\sysfw_trace_parser\sysfw_trace_parser.py**rjjЖj jjj j}r(j]j]j]j]j]ujNjhj]rjX)r}r(jjjjj jjj\j}r(j]j]j]j]j]ujKj]r(j%XGet the parsed logs from rr}r(jXGet the parsed logs from jjubj|)r}r(jX<**sciclient\tools\sysfw_trace_parser\sysfw_trace_parser.py**j}r(j]j]j]j]j]ujjj]rj%X5sciclienttoolssysfw_trace_parsersysfw_trace_parser.pyrr}r(jUjjubajjubeubaubeubj )r}r(jUjjj Njj j}r(j]j]j]j]j]ujNjhj]rj )r}r(jXl:: usage: python ./sysfw_trace_parser.py [-h] (-l LOG_FILE | -d SERIAL_PORT) (-o OUTPUT_FILE | -O) [-t] [-r RULES_FILE] [-Pm] System Firmware Log Parse utility URL: http://software- dl.ti.com/tisci/esd/latest/4_trace/trace.html Required arguments - Choose one of the inputs: -l LOG_FILE, --log_file LOG_FILE Log File provided as input (default: None) -d SERIAL_PORT, --serial_port SERIAL_PORT Provide Device as input: Requires pyserial package installed: See https://pyserial.readthedocs.io/ (default: None) Required arguments - Choose one of the outputs: -o OUTPUT_FILE, --output_file OUTPUT_FILE Parse out the output to a file (default: None) -O, --output_console Log File to parse and report results to console (default: False) optional arguments: -h, --help show this help message and exit -t, --time_stamp_relative Add TimeStamp to output in relative milliseconds(this is approximation ONLY) (default: False) -r RULES_FILE, --rules_file RULES_FILE Alternate Rules file (default: ./sysfw_trace_rules.json) -Pm, --print_match_only Print just decoded data, (default: False) jjj jjj j}r(j]j]j]j]j]ujKj]r(j )r}r(jX::rjjj jjj j}r(j]j]j]j]j]ujKj]rj%X::rr}r(jjjjubaubj )r}r(jUj}r(j]j]j]j]j]ujjj]r(j )r}r(jUj}r (j]j]j]j]j]ujjj]r j )r }r (jX{usage: python ./sysfw_trace_parser.py [-h] (-l LOG_FILE | -d SERIAL_PORT) (-o OUTPUT_FILE | -O) [-t] [-r RULES_FILE] [-Pm] jjj jjj j}r (j]j]j]j]j]ujKj]r(j )r}r(jXIusage: python ./sysfw_trace_parser.py [-h] (-l LOG_FILE | -d SERIAL_PORT)rjj j jjj j}r(j]j]j]j]j]ujKj]rj%XIusage: python ./sysfw_trace_parser.py [-h] (-l LOG_FILE | -d SERIAL_PORT)rr}r(jjjjubaubj )r}r(jUj}r(j]j]j]j]j]ujj j]rjX)r}r(jX0(-o OUTPUT_FILE | -O) [-t] [-r RULES_FILE] [-Pm]rjjj jjj\j}r(j]j]j]j]j]ujKj]rj%X0(-o OUTPUT_FILE | -O) [-t] [-r RULES_FILE] [-Pm]r r!}r"(jjjjubaubajj ubeubajj ubjX)r#}r$(jXeSystem Firmware Log Parse utility URL: http://software- dl.ti.com/tisci/esd/latest/4_trace/trace.htmljjj jjj\j}r%(j]j]j]j]j]ujKj]r&(j%X'System Firmware Log Parse utility URL: r'r(}r)(jX'System Firmware Log Parse utility URL: jj#ubj)r*}r+(jXhttp://softwarer,j}r-(Urefurij,j]j]j]j]j]ujj#j]r.j%Xhttp://softwarer/r0}r1(jUjj*ubajjubj%X/- dl.ti.com/tisci/esd/latest/4_trace/trace.htmlr2r3}r4(jX/- dl.ti.com/tisci/esd/latest/4_trace/trace.htmljj#ubeubjX)r5}r6(jXORequired arguments - Choose one of the inputs: -l LOG_FILE, --log_file LOG_FILEr7jjj jjj\j}r8(j]j]j]j]j]ujKj]r9j%XORequired arguments - Choose one of the inputs: -l LOG_FILE, --log_file LOG_FILEr:r;}r<(jj7jj5ubaubj )r=}r>(jUj}r?(j]j]j]j]j]ujjj]r@jX)rA}rB(jX*Log File provided as input (default: None)rCjj=j jjj\j}rD(j]j]j]j]j]ujKj]rEj%X*Log File provided as input (default: None)rFrG}rH(jjCjjAubaubajj ubcdocutils.nodes option_list rI)rJ}rK(jUj}rL(j]j]j]j]j]ujjj]rMcdocutils.nodes option_list_item rN)rO}rP(jUj}rQ(j]j]j]j]j]ujjJj]rR(cdocutils.nodes option_group rS)rT}rU(jUj}rV(j]j]j]j]j]ujjOj]rW(cdocutils.nodes option rX)rY}rZ(jX-d SERIAL_PORTj}r[(j]j]j]j]j]ujjTj]r\(cdocutils.nodes option_string r])r^}r_(jX-dj}r`(j]j]j]j]j]ujjYj]raj%X-drbrc}rd(jUjj^ubajU option_stringreubcdocutils.nodes option_argument rf)rg}rh(jX SERIAL_PORTj}ri(j]j]j]U delimiterU j]j]ujjYj]rjj%X SERIAL_PORTrkrl}rm(jUjjgubajUoption_argumentrnubejUoptionroubjX)rp}rq(jX--serial_port SERIAL_PORTj}rr(j]j]j]j]j]ujjTj]rs(j])rt}ru(jX --serial_portj}rv(j]j]j]j]j]ujjpj]rwj%X --serial_portrxry}rz(jUjjtubajjeubjf)r{}r|(jX SERIAL_PORTj}r}(j]j]j]U delimiterU j]j]ujjpj]r~j%X SERIAL_PORTrr}r(jUjj{ubajjnubejjoubejU option_grouprubcdocutils.nodes description r)r}r(jXsProvide Device as input: Requires pyserial package installed: See https://pyserial.readthedocs.io/ (default: None) j}r(j]j]j]j]j]ujjOj]rjX)r}r(jXrProvide Device as input: Requires pyserial package installed: See https://pyserial.readthedocs.io/ (default: None)jjj jjj\j}r(j]j]j]j]j]ujKj]r(j%XBProvide Device as input: Requires pyserial package installed: See rr}r(jXBProvide Device as input: Requires pyserial package installed: See jjubj)r}r(jX https://pyserial.readthedocs.io/rj}r(Urefurijj]j]j]j]j]ujjj]rj%X https://pyserial.readthedocs.io/rr}r(jUjjubajjubj%X (default: None)rr}r(jX (default: None)jjubeubajU descriptionrubejUoption_list_itemrubajU option_listrubjX)r}r(jXYRequired arguments - Choose one of the outputs: -o OUTPUT_FILE, --output_file OUTPUT_FILErjjj jjj\j}r(j]j]j]j]j]ujKj]rj%XYRequired arguments - Choose one of the outputs: -o OUTPUT_FILE, --output_file OUTPUT_FILErr}r(jjjjubaubj )r}r(jUj}r(j]j]j]j]j]ujjj]rjX)r}r(jX.Parse out the output to a file (default: None)rjjj jjj\j}r(j]j]j]j]j]ujKj]rj%X.Parse out the output to a file (default: None)rr}r(jjjjubaubajj ubjI)r}r(jUj}r(j]j]j]j]j]ujjj]rjN)r}r(jUj}r(j]j]j]j]j]ujjj]r(jS)r}r(jUj}r(j]j]j]j]j]ujjj]r(jX)r}r(jX-Orj}r(j]j]j]j]j]ujjj]rj])r—}r×(jjj}rė(j]j]j]j]j]ujjj]rŗj%X-OrƗrǗ}rȗ(jUjj—ubajjeubajjoubjX)rɗ}rʗ(jX--output_consoler˗j}r̗(j]j]j]j]j]ujjj]r͗j])rΗ}rϗ(jj˗j}rЗ(j]j]j]j]j]ujjɗj]rїj%X--output_consolerҗrӗ}rԗ(jUjjΗubajjeubajjoubejjubj)r՗}r֗(jXALog File to parse and report results to console (default: False) j}rח(j]j]j]j]j]ujjj]rؗjX)rٗ}rڗ(jX@Log File to parse and report results to console (default: False)rۗjj՗j jjj\j}rܗ(j]j]j]j]j]ujKj]rݗj%X@Log File to parse and report results to console (default: False)rޗrߗ}r(jjۗjjٗubaubajjubejjubajjubjX)r}r(jXcoptional arguments: -h, --help show this help message and exit -t, --time_stamp_relativerjjj jjj\j}r(j]j]j]j]j]ujKj]rj%Xcoptional arguments: -h, --help show this help message and exit -t, --time_stamp_relativerr}r(jjjjubaubj )r}r(jUj}r(j]j]j]j]j]ujjj]rjX)r}r(jX]Add TimeStamp to output in relative milliseconds(this is approximation ONLY) (default: False)rjjj jjj\j}r(j]j]j]j]j]ujKj]rj%X]Add TimeStamp to output in relative milliseconds(this is approximation ONLY) (default: False)rr}r(jjjjubaubajj ubjI)r}r(jUj}r(j]j]j]j]j]ujjj]r(jN)r}r(jUj}r(j]j]j]j]j]ujjj]r(jS)r}r(jUj}r(j]j]j]j]j]ujjj]r(jX)r}r(jX -r RULES_FILEj}r(j]j]j]j]j]ujjj]r(j])r}r(jX-rj}r(j]j]j]j]j]ujjj]rj%X-rr r }r (jUjjubajjeubjf)r }r (jX RULES_FILEj}r(j]j]j]U delimiterU j]j]ujjj]rj%X RULES_FILErr}r(jUjj ubajjnubejjoubjX)r}r(jX--rules_file RULES_FILEj}r(j]j]j]j]j]ujjj]r(j])r}r(jX --rules_filej}r(j]j]j]j]j]ujjj]rj%X --rules_filerr}r(jUjjubajjeubjf)r}r(jX RULES_FILEj}r (j]j]j]U delimiterU j]j]ujjj]r!j%X RULES_FILEr"r#}r$(jUjjubajjnubejjoubejjubj)r%}r&(jX8Alternate Rules file (default: ./sysfw_trace_rules.json)r'j}r((j]j]j]j]j]ujjj]r)jX)r*}r+(jj'jj%j jjj\j}r,(j]j]j]j]j]ujKj]r-j%X8Alternate Rules file (default: ./sysfw_trace_rules.json)r.r/}r0(jj'jj*ubaubajjubejjubjN)r1}r2(jUj}r3(j]j]j]j]j]ujjj]r4(jS)r5}r6(jUj}r7(j]j]j]j]j]ujj1j]r8(jX)r9}r:(jX-Pmj}r;(j]j]j]j]j]ujj5j]r<(j])r=}r>(jX-Pj}r?(j]j]j]j]j]ujj9j]r@j%X-PrArB}rC(jUjj=ubajjeubjf)rD}rE(jXmj}rF(j]j]j]U delimiterUj]j]ujj9j]rGj%XmrH}rI(jUjjDubajjnubejjoubjX)rJ}rK(jX--print_match_onlyrLj}rM(j]j]j]j]j]ujj5j]rNj])rO}rP(jjLj}rQ(j]j]j]j]j]ujjJj]rRj%X--print_match_onlyrSrT}rU(jUjjOubajjeubajjoubejjubj)rV}rW(jX*Print just decoded data, (default: False) j}rX(j]j]j]j]j]ujj1j]rYjX)rZ}r[(jX)Print just decoded data, (default: False)r\jjVj jjj\j}r](j]j]j]j]j]ujKj]r^j%X)Print just decoded data, (default: False)r_r`}ra(jj\jjZubaubajjubejjubejjubejj ubeubaubeubj)rb}rc(jUjjj jjjj}rd(j]j]j]j]reUapi-descriptionsrfaj]rghaujKjhj]rh(j)ri}rj(jXAPI descriptionsrkjjbj jjj"j}rl(j]j]j]j]j]ujKjhj]rmj%XAPI descriptionsrnro}rp(jjkjjiubaubjX)rq}rr(jX!API reference for application: ::jjbj jjj\j}rs(j]j]j]j]j]ujKjhj]rtj%XAPI reference for application:rurv}rw(jXAPI reference for application:jjqubaubj#)rx}ry(jX'#include jjbj jjj&j}rz(j2j3j]j]j]j]j]ujMjhj]r{j%X'#include r|r}}r~(jUjjxubaubjX)r}r(jX"The driver is split into 2 parts :rjjbj jjj\j}r(j]j]j]j]j]ujKjhj]rj%X"The driver is split into 2 parts :rr}r(jjjjubaubj)r}r(jUjjbj jjjj}r(jX-j]j]j]j]j]ujKjhj]r(j)r}r(jX`SCIClient Core`_ : This has APIs for loading SYSFW ,initialization, de-initialization and SYSFW communication .These are defined in sciclient.h . jjj jjj j}r(j]j]j]j]j]ujNjhj]rjX)r}r(jX`SCIClient Core`_ : This has APIs for loading SYSFW ,initialization, de-initialization and SYSFW communication .These are defined in sciclient.h .jjj jjj\j}r(j]j]j]j]j]ujKj]r(j)r}r(jX`SCIClient Core`_jqKjjjjj}r(UnameXSCIClient Corej]j]j]j]j]jOUsciclient-coreruj]rj%XSCIClient Corerr}r(jUjjubaubj%X : This has APIs for loading SYSFW ,initialization, de-initialization and SYSFW communication .These are defined in sciclient.h .rr}r(jX : This has APIs for loading SYSFW ,initialization, de-initialization and SYSFW communication .These are defined in sciclient.h .jjubeubaubj)r}r(jX`SCIClient Shim Layer`_ : This thin layer abstracts the message requests and responses sent to SYSW for `Power_management`_ , `Resource_management`_ and `Processor_BOOT_API_Interface`_ which the user can use without worrying about the request and response structures used . jjj jjj j}r(j]j]j]j]j]ujNjhj]rjX)r}r(jX`SCIClient Shim Layer`_ : This thin layer abstracts the message requests and responses sent to SYSW for `Power_management`_ , `Resource_management`_ and `Processor_BOOT_API_Interface`_ which the user can use without worrying about the request and response structures used .jjj jjj\j}r(j]j]j]j]j]ujMj]r(j)r}r(jX`SCIClient Shim Layer`_jqKjjjjj}r(UnameXSCIClient Shim Layerj]j]j]j]j]jOUsciclient-shim-layerruj]rj%XSCIClient Shim Layerrr}r(jUjjubaubj%XQ : This thin layer abstracts the message requests and responses sent to SYSW for rr}r(jXQ : This thin layer abstracts the message requests and responses sent to SYSW for jjubj)r}r(jX`Power_management`_jqKjjjjj}r(UnameXPower_managementj]j]j]j]j]jOUpower-managementruj]rj%XPower_managementrr}r(jUjjubaubj%X , rr}r(jX , jjubj)r}r(jX`Resource_management`_jqKjjjjj}r(UnameXResource_managementj]j]j]j]j]jOUresource-managementruj]rj%XResource_managementrr˜}rØ(jUjjubaubj%X and rĘrŘ}rƘ(jX and jjubj)rǘ}rȘ(jX`Processor_BOOT_API_Interface`_jqKjjjjj}rɘ(UnameXProcessor_BOOT_API_Interfacej]j]j]j]j]jOUprocessor-boot-api-interfacerʘuj]r˘j%XProcessor_BOOT_API_Interfacer̘r͘}rΘ(jUjjǘubaubj%XY which the user can use without worrying about the request and response structures used .rϘrИ}rј(jXY which the user can use without worrying about the request and response structures used .jjubeubaubeubj)rҘ}rӘ(jUjKjjbj jjjj}rԘ(j]j]j]j]r՘jaj]r֘haujMjhj]rט(j)rؘ}r٘(jXSCIClient CorerژjjҘj jjj"j}rۘ(j]j]j]j]j]ujMjhj]rܘj%XSCIClient Corerݘrޘ}rߘ(jjژjjؘubaubjX)r}r(jXBThe following core APIs for SCIClient are declared in sciclient.h.rjjҘj jjj\j}r(j]j]j]j]j]ujMjhj]rj%XBThe following core APIs for SCIClient are declared in sciclient.h.rr}r(jjjjubaubjb)r}r(jX Firmware LoadrjjҘj jjjfj}r(j]j]j]j]j]ujMjhj]rj%X Firmware Loadrr}r(jjjjubaubj)r}r(jX.. _Sciclient_loadFirmware:jKjjҘj jjjj}r(j]j]j]j]j]jOUsciclient-loadfirmwarerujM%jhj]ubjX)r}r(jXThis API loads SYSFW.The image must be loaded through a boot media for this API to succeed (Refer `Build and Run`_). Hence, this is typically called by SBL. Load firmware call does not require `Sciclient_init`_ to be done before. ::jKjjҘj jUexpect_referenced_by_namer}rhojsjj\j}r(j]j]j]j]rjaj]rhoaujM jhUexpect_referenced_by_idr}rjjsj]r(j%XbThis API loads SYSFW.The image must be loaded through a boot media for this API to succeed (Refer rr}r(jXbThis API loads SYSFW.The image must be loaded through a boot media for this API to succeed (Refer jjubj)r}r(jX`Build and Run`_jqKjjjjj}r(UnameX Build and Runj]j]j]j]j]jOjuj]rj%X Build and Runrr}r(jUjjubaubj%XO). Hence, this is typically called by SBL. Load firmware call does not require rr }r (jXO). Hence, this is typically called by SBL. Load firmware call does not require jjubj)r }r (jX`Sciclient_init`_jqKjjjjj}r (UnameXSciclient_initj]j]j]j]j]jOUsciclient-initruj]rj%XSciclient_initrr}r(jUjj ubaubj%X to be done before.rr}r(jX to be done before.jjubeubj#)r}r(jX1Defined in sciclient.h as Sciclient_loadFirmware.jjҘj jjj&j}r(j2j3j]j]j]j]j]ujM*jhj]rj%X1Defined in sciclient.h as Sciclient_loadFirmware.rr}r(jUjjubaubjX)r}r(jXTypical usage ::jjҘj jjj\j}r(j]j]j]j]j]ujMjhj]r j%X Typical usager!r"}r#(jX Typical usagejjubaubj#)r$}r%(jXstatic const uint32_t gSciclient_firmware[BINARY_FILE_SIZE_IN_BYTES / 4U] =SCICLIENT_FIRMWARE; . . . Sciclient_loadFirmware(gSciclient_firmware);jjҘj jjj&j}r&(j2j3j]j]j]j]j]ujM.jhj]r'j%Xstatic const uint32_t gSciclient_firmware[BINARY_FILE_SIZE_IN_BYTES / 4U] =SCICLIENT_FIRMWARE; . . . Sciclient_loadFirmware(gSciclient_firmware);r(r)}r*(jUjj$ubaubjb)r+}r,(jXSCIClient initializationr-jjҘj jjjfj}r.(j]j]j]j]j]ujMjhj]r/j%XSCIClient initializationr0r1}r2(jj-jj+ubaubj)r3}r4(jX.. _Sciclient_init:jKjjҘj jjjj}r5(j]j]j]j]j]jOjujM5jhj]ubjX)r6}r7(jXXThis API is called once for registering interrupts and creating semaphore handles to be able to talk to the firmware. The application should assume that the firmware is pre-loaded while calling this API. The firmware should have been loaded either via GEL or via the SBL (refer `Sciclient_loadFirmware`_ ) prior to the application calling this.jKjjҘj jj}r8hj3sjj\j}r9(j]j]j]j]r:jaj]r;haujMjhj}r<jj3sj]r=(j%XThis API is called once for registering interrupts and creating semaphore handles to be able to talk to the firmware. The application should assume that the firmware is pre-loaded while calling this API. The firmware should have been loaded either via GEL or via the SBL (refer r>r?}r@(jXThis API is called once for registering interrupts and creating semaphore handles to be able to talk to the firmware. The application should assume that the firmware is pre-loaded while calling this API. The firmware should have been loaded either via GEL or via the SBL (refer jj6ubj)rA}rB(jX`Sciclient_loadFirmware`_jqKjj6jjj}rC(UnameXSciclient_loadFirmwarej]j]j]j]j]jOjuj]rDj%XSciclient_loadFirmwarerErF}rG(jUjjAubaubj%X) ) prior to the application calling this.rHrI}rJ(jX) ) prior to the application calling this.jj6ubeubjX)rK}rL(jXPThe API **Sciclient_init** takes a pointer to *Sciclient_ConfigPrms_t* as input.rMjjҘj jjj\j}rN(j]j]j]j]j]ujM!jhj]rO(j%XThe API rPrQ}rR(jXThe API jjKubj|)rS}rT(jX**Sciclient_init**j}rU(j]j]j]j]j]ujjKj]rVj%XSciclient_initrWrX}rY(jUjjSubajjubj%X takes a pointer to rZr[}r\(jX takes a pointer to jjKubj<)r]}r^(jX*Sciclient_ConfigPrms_t*j}r_(j]j]j]j]j]ujjKj]r`j%XSciclient_ConfigPrms_trarb}rc(jUjj]ubajjDubj%X as input.rdre}rf(jX as input.jjKubeubj)rg}rh(jUjjҘj jjjj}ri(jX-j]j]j]j]j]ujM#jhj]rjj)rk}rl(jXThe parameter *opModeFlag* allows 2 operation modes for `Sciclient_service`_ : +-----------------------+----------------------------------------------------------------+ | opModeFlag | Description | +=======================+================================================================+ | Polling based | Invoked using SCICLIENT_SERVICE_OPERATION_MODE_POLLED | +-----------------------+----------------------------------------------------------------+ | Interrupt based | Invoked using SCICLIENT_SERVICE_OPERATION_MODE_INTERRUPT | +-----------------------+----------------------------------------------------------------+ jjgj jjj j}rm(j]j]j]j]j]ujNjhj]rn(jX)ro}rp(jXNThe parameter *opModeFlag* allows 2 operation modes for `Sciclient_service`_ :jjkj jjj\j}rq(j]j]j]j]j]ujM#j]rr(j%XThe parameter rsrt}ru(jXThe parameter jjoubj<)rv}rw(jX *opModeFlag*j}rx(j]j]j]j]j]ujjoj]ryj%X opModeFlagrzr{}r|(jUjjvubajjDubj%X allows 2 operation modes for r}r~}r(jX allows 2 operation modes for jjoubj)r}r(jX`Sciclient_service`_jqKjjojjj}r(UnameXSciclient_servicej]j]j]j]j]jOjPuj]rj%XSciclient_servicerr}r(jUjjubaubj%X :rr}r(jX :jjoubeubj )r}r(jUj}r(j]j]j]j]j]ujjkj]rj)r}r(jUj}r(j]j]j]j]j]ujjj]rj)r}r(jUj}r(j]j]j]j]j]UcolsKujjj]r(j)r}r(jUj}r(j]j]j]j]j]UcolwidthKujjj]jjubj)r}r(jUj}r(j]j]j]j]j]UcolwidthK@ujjj]jjubj)r}r(jUj}r(j]j]j]j]j]ujjj]rj)r}r(jUj}r(j]j]j]j]j]ujjj]r(j)r}r(jUj}r(j]j]j]j]j]ujjj]rjX)r}r(jX opModeFlagrjjj jjj\j}r(j]j]j]j]j]ujM&j]rj%X opModeFlagrr}r(jjjjubaubajjubj)r}r(jUj}r(j]j]j]j]j]ujjj]rjX)r}r(jX Descriptionrjjj jjj\j}r(j]j]j]j]j]ujM&j]rj%X Descriptionrr}r(jjjjubaubajjubejjubajjubj)r}r(jUj}r(j]j]j]j]j]ujjj]r(j)r}r(jUj}r™(j]j]j]j]j]ujjj]rÙ(j)rę}rř(jUj}rƙ(j]j]j]j]j]ujjj]rǙjX)rș}rə(jX Polling basedrʙjjęj jjj\j}r˙(j]j]j]j]j]ujM(j]r̙j%X Polling basedr͙rΙ}rϙ(jjʙjjșubaubajjubj)rЙ}rљ(jUj}rҙ(j]j]j]j]j]ujjj]rәjX)rԙ}rՙ(jX7Invoked using SCICLIENT_SERVICE_OPERATION_MODE_POLLEDr֙jjЙj jjj\j}rי(j]j]j]j]j]ujM(j]rؙj%X7Invoked using SCICLIENT_SERVICE_OPERATION_MODE_POLLEDrٙrڙ}rۙ(jj֙jjԙubaubajjubejjubj)rܙ}rݙ(jUj}rޙ(j]j]j]j]j]ujjj]rߙ(j)r}r(jUj}r(j]j]j]j]j]ujjܙj]rjX)r}r(jXInterrupt basedrjjj jjj\j}r(j]j]j]j]j]ujM*j]rj%XInterrupt basedrr}r(jjjjubaubajjubj)r}r(jUj}r(j]j]j]j]j]ujjܙj]rjX)r}r(jX:Invoked using SCICLIENT_SERVICE_OPERATION_MODE_INTERRUPTrjjj jjj\j}r(j]j]j]j]j]ujM*j]rj%X:Invoked using SCICLIENT_SERVICE_OPERATION_MODE_INTERRUPTrr}r(jjjjubaubajjubejjubejjubejjubajjubajj ubeubaubjX)r}r(jX Definition ::jjҘj jjj\j}r(j]j]j]j]j]ujM-jhj]rj%X Definitionrr}r(jX Definitionjjubaubj#)r}r(jX-Defined in sciclient.h as **Sciclient_init**.jjҘj jjj&j}r(j2j3j]j]j]j]j]ujMLjhj]rj%X-Defined in sciclient.h as **Sciclient_init**.rr}r(jUjjubaubjX)r}r(jXNote ::jjҘj jjj\j}r(j]j]j]j]j]ujM2jhj]r j%XNoter r }r (jXNotejjubaubj#)r }r(jX- This API provides a software initialization for the driver. Any application using SCIClient must call this API. - SCICLIENT_SERVICE_OPERATION_MODE_INTERRUPT is not supported as of now.jjҘj jjj&j}r(j2j3j]j]j]j]j]ujMQjhj]rj%X- This API provides a software initialization for the driver. Any application using SCIClient must call this API. - SCICLIENT_SERVICE_OPERATION_MODE_INTERRUPT is not supported as of now.rr}r(jUjj ubaubjX)r}r(jXTypical usage ::jjҘj jjj\j}r(j]j]j]j]j]ujM8jhj]rj%X Typical usagerr}r(jX Typical usagejjubaubj#)r}r(jXzSciclient_ConfigPrms_t config = { SCICLIENT_SERVICE_OPERATION_MODE_POLLED, NULL }; Sciclient_init(&config);jjҘj jjj&j}r(j2j3j]j]j]j]j]ujMWjhj]rj%XzSciclient_ConfigPrms_t config = { SCICLIENT_SERVICE_OPERATION_MODE_POLLED, NULL }; Sciclient_init(&config);rr }r!(jUjjubaubjb)r"}r#(jXSYSFW communicationr$jjҘj jjjfj}r%(j]j]j]j]j]ujMAjhj]r&j%XSYSFW communicationr'r(}r)(jj$jj"ubaubj)r*}r+(jX.. _Sciclient_service:jKjjҘj jjjj}r,(j]j]j]j]j]jOjPujM_jhj]ubjX)r-}r.(jXThis API allows communicating with the System firmware which can be called to perform various functions in the system. Core SCIClient function for transmitting payload and recieving the response. The caller is expected to allocate memory for the input request parameter **Sciclient_ReqPrm_t** . This involves setting the message type being communicated to the firmware, the response flags, populate the payload of the message based on the inputs in the files located at include/tisci/ . Since the payload in considered a stream of bytes in this API, the caller should also populate the size of this stream in reqPayloadSize. The timeout is used to determine for what amount of iterations the API would wait for their operation to complete.jKjjҘj jj}r/hIj*sjj\j}r0(j]j]j]j]r1jPaj]r2hIaujMDjhj}r3jPj*sj]r4(j%XThis API allows communicating with the System firmware which can be called to perform various functions in the system. Core SCIClient function for transmitting payload and recieving the response. The caller is expected to allocate memory for the input request parameter r5r6}r7(jXThis API allows communicating with the System firmware which can be called to perform various functions in the system. Core SCIClient function for transmitting payload and recieving the response. The caller is expected to allocate memory for the input request parameter jj-ubj|)r8}r9(jX**Sciclient_ReqPrm_t**j}r:(j]j]j]j]j]ujj-j]r;j%XSciclient_ReqPrm_tr<r=}r>(jUjj8ubajjubj%X . This involves setting the message type being communicated to the firmware, the response flags, populate the payload of the message based on the inputs in the files located at include/tisci/ . Since the payload in considered a stream of bytes in this API, the caller should also populate the size of this stream in reqPayloadSize. The timeout is used to determine for what amount of iterations the API would wait for their operation to complete.r?r@}rA(jX . This involves setting the message type being communicated to the firmware, the response flags, populate the payload of the message based on the inputs in the files located at include/tisci/ . Since the payload in considered a stream of bytes in this API, the caller should also populate the size of this stream in reqPayloadSize. The timeout is used to determine for what amount of iterations the API would wait for their operation to complete.jj-ubeubjX)rB}rC(jXTo make sure the response is captured correctly the caller should also allocate the space for **Sciclient_RespPrm_t** parameters. The caller should populate the pointer to the pRespPayload and the size respPayloadSize. The API would populate the response flags to indicate any firmware specific errors and also populate the memory pointed by pRespPayload till the size given in respPayloadSize. ::jjҘj jjj\j}rD(j]j]j]j]j]ujMRjhj]rE(j%X^To make sure the response is captured correctly the caller should also allocate the space for rFrG}rH(jX^To make sure the response is captured correctly the caller should also allocate the space for jjBubj|)rI}rJ(jX**Sciclient_RespPrm_t**j}rK(j]j]j]j]j]ujjBj]rLj%XSciclient_RespPrm_trMrN}rO(jUjjIubajjubj%X parameters. The caller should populate the pointer to the pRespPayload and the size respPayloadSize. The API would populate the response flags to indicate any firmware specific errors and also populate the memory pointed by pRespPayload till the size given in respPayloadSize.rPrQ}rR(jX parameters. The caller should populate the pointer to the pRespPayload and the size respPayloadSize. The API would populate the response flags to indicate any firmware specific errors and also populate the memory pointed by pRespPayload till the size given in respPayloadSize.jjBubeubj#)rS}rT(jX1Defined in sciclient.h as **Sciclient_service** .jjҘj jjj&j}rU(j2j3j]j]j]j]j]ujMvjhj]rVj%X1Defined in sciclient.h as **Sciclient_service** .rWrX}rY(jUjjSubaubjX)rZ}r[(jXTypical usage ::jjҘj jjj\j}r\(j]j]j]j]j]ujMZjhj]r]j%X Typical usager^r_}r`(jX Typical usagejjZubaubj#)ra}rb(jXmconst Sciclient_ReqPrm_t reqPrm = { TISCI_MSG_VERSION, TISCI_MSG_FLAG_AOP, NULL, 0, SCICLIENT_SERVICE_WAIT_FOREVER }; struct tisci_msg_version_resp response; Sciclient_RespPrm_t respPrm = { 0, (uint8_t *) &response, sizeof (response) }; status = Sciclient_init(&config); status = Sciclient_service(&reqPrm, &respPrm);jjҘj jjj&j}rc(j2j3j]j]j]j]j]ujMyjhj]rdj%Xmconst Sciclient_ReqPrm_t reqPrm = { TISCI_MSG_VERSION, TISCI_MSG_FLAG_AOP, NULL, 0, SCICLIENT_SERVICE_WAIT_FOREVER }; struct tisci_msg_version_resp response; Sciclient_RespPrm_t respPrm = { 0, (uint8_t *) &response, sizeof (response) }; status = Sciclient_init(&config); status = Sciclient_service(&reqPrm, &respPrm);rerf}rg(jUjjaubaubjb)rh}ri(jXSCIClient de-initializationrjjjҘj jjjfj}rk(j]j]j]j]j]ujMpjhj]rlj%XSCIClient de-initializationrmrn}ro(jjjjjhubaubj)rp}rq(jX.. _Sciclient_deinit:jjҘj jjjj}rr(j]j]j]j]j]jOUsciclient-deinitrsujMjhj]ubjX)rt}ru(jXDe-initialization of sciclient. This de-initialization is specific to the application. It only de-initializes the semaphores, interrupts etc. which are initialized using `Sciclient_init`_ . It does not de-initialize the system firmware. ::jjҘj jj}rvhjpsjj\j}rw(j]j]j]j]rxjsaj]ryhaujMsjhj}rzjsjpsj]r{(j%XDe-initialization of sciclient. This de-initialization is specific to the application. It only de-initializes the semaphores, interrupts etc. which are initialized using r|r}}r~(jXDe-initialization of sciclient. This de-initialization is specific to the application. It only de-initializes the semaphores, interrupts etc. which are initialized using jjtubj)r}r(jX`Sciclient_init`_jqKjjtjjj}r(UnameXSciclient_initj]j]j]j]j]jOjuj]rj%XSciclient_initrr}r(jUjjubaubj%X1 . It does not de-initialize the system firmware.rr}r(jX1 . It does not de-initialize the system firmware.jjtubeubj#)r}r(jX0Defined in sciclient.h as **Sciclient_deinit** .jjҘj jjj&j}r(j2j3j]j]j]j]j]ujMjhj]rj%X0Defined in sciclient.h as **Sciclient_deinit** .rr}r(jUjjubaubjX)r}r(jXTypical usage ::jjҘj jjj\j}r(j]j]j]j]j]ujMzjhj]rj%X Typical usagerr}r(jX Typical usagejjubaubj#)r}r(jXSciclient_deinit();jjҘj jjj&j}r(j2j3j]j]j]j]j]ujMjhj]rj%XSciclient_deinit();rr}r(jUjjubaubjb)r}r(jXBoard configurationrjjҘj jjjfj}r(j]j]j]j]j]ujMjhj]rj%XBoard configurationrr}r(jjjjubaubjX)r}r(jXOne time board configuration needs to be done from R5 for rm,pm and security to communicate with SYSFW. It is normally done by SBL, so user doesn't need to call these APIs.rjjҘj jjj\j}r(j]j]j]j]j]ujMjhj]rj%XOne time board configuration needs to be done from R5 for rm,pm and security to communicate with SYSFW. It is normally done by SBL, so user doesn't need to call these APIs.rr}r(jjjjubaubjX)r}r(jXUser needs to define a section ".boardcfg_data" in the linker file for the default configuration (NULL pointer to *Sciclient_BoardCfgPrms_t* is passed to the APIs), which needs to be present in OCMRAM . If user provides custom board_cfg, then the data must be present on OCMRAM. ::jjҘj jjj\j}r(j]j]j]j]j]ujMjhj]r(j%XrUser needs to define a section ".boardcfg_data" in the linker file for the default configuration (NULL pointer to rr}r(jXrUser needs to define a section ".boardcfg_data" in the linker file for the default configuration (NULL pointer to jjubj<)r}r(jX*Sciclient_BoardCfgPrms_t*j}r(j]j]j]j]j]ujjj]rj%XSciclient_BoardCfgPrms_trr}r(jUjjubajjDubj%X is passed to the APIs), which needs to be present in OCMRAM . If user provides custom board_cfg, then the data must be present on OCMRAM.rr}r(jX is passed to the APIs), which needs to be present in OCMRAM . If user provides custom board_cfg, then the data must be present on OCMRAM.jjubeubj#)r}r(jXhBoard configuration structure is defined in include/V0/sciclient_boardcfg.h as Sciclient_BoardCfgPrms_t.jjҘj jjj&j}r(j2j3j]j]j]j]j]ujMjhj]ršj%XhBoard configuration structure is defined in include/V0/sciclient_boardcfg.h as Sciclient_BoardCfgPrms_t.rÚrĚ}rŚ(jUjjubaubjX)rƚ}rǚ(jXTypical usage ::jjҘj jjj\j}rȚ(j]j]j]j]j]ujMjhj]rɚj%X Typical usagerʚr˚}r̚(jX Typical usagejjƚubaubj#)r͚}rΚ(jXstatus = Sciclient_boardCfg(NULL); if (CSL_PASS == status) { status = Sciclient_boardCfgPm(NULL) + Sciclient_boardCfgRm(NULL) + Sciclient_boardCfgSec(NULL) ; }jjҘj jjj&j}rϚ(j2j3j]j]j]j]j]ujMjhj]rКj%Xstatus = Sciclient_boardCfg(NULL); if (CSL_PASS == status) { status = Sciclient_boardCfgPm(NULL) + Sciclient_boardCfgRm(NULL) + Sciclient_boardCfgSec(NULL) ; }rњrҚ}rӚ(jUjj͚ubaubeubj)rԚ}r՚(jUjKjjbj jjjj}r֚(j]j]j]j]rךjaj]rؚh7aujMjhj]rٚ(j)rښ}rۚ(jXSCIClient Shim LayerrܚjjԚj jjj"j}rݚ(j]j]j]j]j]ujMjhj]rޚj%XSCIClient Shim Layerrߚr}r(jjܚjjښubaubjb)r}r(jXPower managementrjjԚj jjjfj}r(j]j]j]j]j]ujMjhj]rj%XPower managementrr}r(jjjjubaubj)r}r(jX.. _Power_management:jKjjԚj jjjj}r(j]j]j]j]j]jOjujMjhj]ubjX)r}r(jXkThe APIs in include/sciclient_pm.h provide declarations of SCIClient APIs for power management of the SOC .rjKjjԚj jj}rhjsjj\j}r(j]j]j]j]rjaj]rhaujMjhj}rjjsj]rj%XkThe APIs in include/sciclient_pm.h provide declarations of SCIClient APIs for power management of the SOC .rr}r(jjjjubaubjb)r}r(jXResource managementrjjԚj jjjfj}r(j]j]j]j]j]ujMjhj]rj%XResource managementrr}r(jjjjubaubj)r}r(jX.. _Resource_management:jKjjԚj jjjj}r(j]j]j]j]j]jOjujMjhj]ubjX)r}r(jXnThe APIs in include/sciclient_rm.h provide declarations of SCIClient APIs for resource management of the SOC .rjKjjԚj jj}rhrjsjj\j}r(j]j]j]j]r jaj]r hraujMjhj}r jjsj]r j%XnThe APIs in include/sciclient_rm.h provide declarations of SCIClient APIs for resource management of the SOC .r r}r(jjjjubaubjb)r}r(jXProcessor BOOT API InterfacerjjԚj jjjfj}r(j]j]j]j]j]ujMjhj]rj%XProcessor BOOT API Interfacerr}r(jjjjubaubj)r}r(jX!.. _Processor_BOOT_API_Interface:jKjjԚj jjjj}r(j]j]j]j]j]jOjʘujMjhj]ubjX)r}r(jXoThe APIs in include/sciclient_procboot.h provide declarations of SCIClient APIs for processor boot and control.rjKjjԚj jj}rh;jsjj\j}r(j]j]j]j]r jʘaj]r!h;aujMjhj}r"jʘjsj]r#j%XoThe APIs in include/sciclient_procboot.h provide declarations of SCIClient APIs for processor boot and control.r$r%}r&(jjjjubaubjX)r'}r((jX,APIs are divided into the following two setsr)jjԚj jjj\j}r*(j]j]j]j]j]ujMjhj]r+j%X,APIs are divided into the following two setsr,r-}r.(jj)jj'ubaubj)r/}r0(jUjjԚj jjjj}r1(jX-j]j]j]j]j]ujMjhj]r2(j)r3}r4(jX_Book keeping APIs - Meant to control access to allow a reasonable usage scenario of processors.r5jj/j jjj j}r6(j]j]j]j]j]ujNjhj]r7jX)r8}r9(jj5jj3j jjj\j}r:(j]j]j]j]j]ujMj]r;j%X_Book keeping APIs - Meant to control access to allow a reasonable usage scenario of processors.r<r=}r>(jj5jj8ubaubaubj)r?}r@(jXHProcessor Control APIs - Meant to be the actual Processor Corecontrols. jj/j XYinternal padding after source/rtos/PDK_Platform_Software/Device_Drivers/SCICLIENT.rst.incrAjj j}rB(j]j]j]j]j]ujNjhj]rCjX)rD}rE(jXGProcessor Control APIs - Meant to be the actual Processor Corecontrols.rFjj?j jjj\j}rG(j]j]j]j]j]ujMj]rHj%XGProcessor Control APIs - Meant to be the actual Processor Corecontrols.rIrJ}rK(jjFjjDubaubaubeubeubeubeubj jjjj}rL(j]rMXoverviewrNaj]j]j]rOUid249rPaj]ujKjhj]rQ(j)rR}rS(jXOverviewrTjjj jjj"j}rU(j]j]j]j]j]ujKjhj]rVj%XOverviewrWrX}rY(jjTjjRubaubjX)rZ}r[(jX Traditional Texas Instruments SoCs implement system control functions such as power management within operating systems on each of the processing units (ARM/DSP etc). However the traditional approach has had tremendous challenges to ensure system stability. Few of the challenges include:r\jjj jjj\j}r](j]j]j]j]j]ujKjhj]r^j%X Traditional Texas Instruments SoCs implement system control functions such as power management within operating systems on each of the processing units (ARM/DSP etc). However the traditional approach has had tremendous challenges to ensure system stability. Few of the challenges include:r_r`}ra(jj\jjZubaubj)rb}rc(jUjjj jjjj}rd(jX-j]j]j]j]j]ujK jhj]re(j)rf}rg(jXZComplex interactions between Operating Systems on heterogeneous SoCs for generic features.rhjjbj jjj j}ri(j]j]j]j]j]ujNjhj]rjjX)rk}rl(jjhjjfj jjj\j}rm(j]j]j]j]j]ujK j]rnj%XZComplex interactions between Operating Systems on heterogeneous SoCs for generic features.rorp}rq(jjhjjkubaubaubj)rr}rs(jX.Lack of centralized knowledge of system state.rtjjbj jjj j}ru(j]j]j]j]j]ujNjhj]rvjX)rw}rx(jjtjjrj jjj\j}ry(j]j]j]j]j]ujK j]rzj%X.Lack of centralized knowledge of system state.r{r|}r}(jjtjjwubaubaubj)r~}r(jXOComplex implementation challenges when implementing workarounds for SoC errata.rjjbj jjj j}r(j]j]j]j]j]ujNjhj]rjX)r}r(jjjj~j jjj\j}r(j]j]j]j]j]ujK j]rj%XOComplex implementation challenges when implementing workarounds for SoC errata.rr}r(jjjjubaubaubj)r}r(jX^Equivalent SoC power or device management entitlement on all variations of Operating Systems. jjbj jjj j}r(j]j]j]j]j]ujNjhj]rjX)r}r(jX]Equivalent SoC power or device management entitlement on all variations of Operating Systems.rjjj jjj\j}r(j]j]j]j]j]ujK j]rj%X]Equivalent SoC power or device management entitlement on all variations of Operating Systems.rr}r(jjjjubaubaubeubjX)r}r(jXDMSC controls the power management of the device, hence is responsible for bringing the device out of reset, enforce clock and reset rules. DMSC power management functions are critical to bring device to low power modes, for example DeepSleep, and sense wake-up events to bring device back online to active state. There is one instance of DMSC in this family of devices - WKUP_DMSC0.rjjj jjj\j}r(j]j]j]j]j]ujKjhj]rj%XDMSC controls the power management of the device, hence is responsible for bringing the device out of reset, enforce clock and reset rules. DMSC power management functions are critical to bring device to low power modes, for example DeepSleep, and sense wake-up events to bring device back online to active state. There is one instance of DMSC in this family of devices - WKUP_DMSC0.rr}r(jjjjubaubjX)r}r(jX8Texas Instruments' System Control Interface defines the communication protocol between various processing entities to the System Control Entity on TI SoCs. This is a set of message formats and sequence of operations required to communicate and get system services processed from System Control entity in the SoC.rjjj jjj\j}r(j]j]j]j]j]ujKjhj]rj%X8Texas Instruments' System Control Interface defines the communication protocol between various processing entities to the System Control Entity on TI SoCs. This is a set of message formats and sequence of operations required to communicate and get system services processed from System Control entity in the SoC.rr}r(jjjjubaubjX)r}r(jXfMore information regarding the TI-SCI is given `here `_ .rjjj jjj\j}r(j]j]j]j]j]ujKjhj]r(j%X/More information regarding the TI-SCI is given rr}r(jX/More information regarding the TI-SCI is given jjubj)r}r(jX5`here `_j}r(UnamehjX+http://downloads.ti.com/tisci/esd/18_08_00/rj]j]j]j]j]ujjj]rj%Xhererr}r(jUjjubajjubj)r}r(jX. jKjjjjj}r(Urefurijj]rUhereraj]j]j]j]rhauj]ubj%X .rr}r(jX .jjubeubjX)r}r(jX The SCIClient is an interface to the TI-SCI protocol for RTOS and non-OS based applications. It exposes the core message details, valid module/clock IDs to the higher level software and abstracts the communication with SYSFW based on the TI-SCI protocol. These APIs can be called by power, resource and security RTOS drivers or any other non-OS or RTOS based higher level software to be able to communicate with DMSC for its services. The higher level software is expected to populate the necessary message core parameters.rjjj jjj\j}r›(j]j]j]j]j]ujKjhj]rÛj%X The SCIClient is an interface to the TI-SCI protocol for RTOS and non-OS based applications. It exposes the core message details, valid module/clock IDs to the higher level software and abstracts the communication with SYSFW based on the TI-SCI protocol. These APIs can be called by power, resource and security RTOS drivers or any other non-OS or RTOS based higher level software to be able to communicate with DMSC for its services. The higher level software is expected to populate the necessary message core parameters.rěrś}rƛ(jjjjubaubjX)rǛ}rț(jXThe firmware which runs on DMSC is called system-firmware(SYSFW) .The documentation for SYSFW can be found at docs/system-firmware-public-documentation/ .rɛjjj jjj\j}rʛ(j]j]j]j]j]ujKjhj]r˛j%XThe firmware which runs on DMSC is called system-firmware(SYSFW) .The documentation for SYSFW can be found at docs/system-firmware-public-documentation/ .r̛r͛}rΛ(jjɛjjǛubaubeubj jjj?j}rϛ(j]UlevelKj]j]rЛjPaUsourcejj]j]UlineKUtypejAujKjhj]rћjX)rқ}rӛ(jX+Duplicate implicit target name: "overview".j}rԛ(j]j]j]j]j]ujjj]r՛j%X+Duplicate implicit target name: "overview".r֛rכ}r؛(jUjjқubajj\ubaubh)rٛ}rڛ(jUjjj jjj?j}rۛ(j]UlevelKj]j]Usourcejj]j]UlineK=UtypejAujK=jhj]rܛjX)rݛ}rޛ(jXfPossible title underline, too short for the title. Treating it as ordinary text because it's so short.j}rߛ(j]j]j]j]j]ujjٛj]rj%XfPossible title underline, too short for the title. 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Interpreted as a definition list item.j}r(j]j]j]j]j]ujjj]rj%X`Blank line missing before literal block (after the "::")? Interpreted as a definition list item.rr}r(jUjjubajj\ubajj?ubh)r}r(jUjjj jjj?j}r(j]UlevelKj]j]Usourcejj]j]UlineKUtypejXujKjhj]rjX)r}r(jX?Definition list ends without a blank line; unexpected unindent.j}r(j]j]j]j]j]ujjj]rj%X?Definition list ends without a blank line; unexpected unindent.rr}r(jUjjubajj\ubaubh)r}r(jUjjj jjj?j}rœ(j]UlevelKj]j]Usourcejj]j]UlineKUtypejujKjhj]rÜjX)rĜ}rŜ(jXUnexpected indentation.j}rƜ(j]j]j]j]j]ujjj]rǜj%XUnexpected indentation.rȜrɜ}rʜ(jUjjĜubajj\ubaubh)r˜}r̜(jUjjj jjj?j}r͜(j]UlevelKj]j]Usourcejj]j]UlineKUtypejXujKjhj]rΜjX)rϜ}rМ(jX=Literal block ends without a blank line; unexpected unindent.j}rќ(j]j]j]j]j]ujj˜j]rҜj%X=Literal block ends without a blank line; unexpected unindent.rӜrԜ}r՜(jUjjϜubajj\ubaubh)r֜}rל(jUjjj jjj?j}r؜(j]UlevelKj]j]Usourcejj]j]UlineKUtypejAujKjhj]rٜjX)rڜ}rۜ(jXfPossible title underline, too short for the title. Treating it as ordinary text because it's so short.j}rܜ(j]j]j]j]j]ujj֜j]rݜj%XfPossible title underline, too short for the title. Treating it as ordinary text because it's so short.rޜrߜ}r(jUjjڜubajj\ubaubh)r}r(jUjjj jjj?j}r(j]UlevelKj]j]Usourcejj]j]UlineKUtypejujKjhj]rjX)r}r(jXUnexpected indentation.j}r(j]j]j]j]j]ujjj]rj%XUnexpected indentation.rr}r(jUjjubajj\ubaubh)r}r(jUjjj jjj?j}r(j]UlevelKj]j]Usourcejj]j]UlineKUtypejXujKjhj]rjX)r}r(jX=Literal block ends without a blank line; unexpected unindent.j}r(j]j]j]j]j]ujjj]rj%X=Literal block ends without a blank line; unexpected unindent.rr}r(jUjjubajj\ubaubh)r}r(jUjjj jjj?j}r(j]UlevelKj]rjaj]rjaUsourcejj]j]UlineKUtypejXujKjhj]rjX)r}r(jX0Inline emphasis start-string without end-string.j}r(j]j]j]j]j]ujjj]rj%X0Inline emphasis start-string without end-string.rr}r(jUjjubajj\ubaubh)r}r(jUjjj jjj?j}r(j]UlevelKj]rjaj]rjaUsourcejj]j]UlineKUtypejXujKjhj]r jX)r }r (jX0Inline emphasis start-string without end-string.j}r (j]j]j]j]j]ujjj]r j%X0Inline emphasis start-string without end-string.rr}r(jUjj ubajj\ubaubh)r}r(jUjjj jjj?j}r(j]UlevelKj]j]Usourcejj]j]UlineKUtypejXujKjhj]rjX)r}r(jX;Bullet list ends without a blank line; unexpected unindent.j}r(j]j]j]j]j]ujjj]rj%X;Bullet list ends without a blank line; unexpected unindent.rr}r(jUjjubajj\ubaubh)r}r(jUjjj jjj?j}r(j]UlevelKj]j]Usourcejj]j]UlineKUtypejujKjhj]rjX)r }r!(jXUnexpected indentation.j}r"(j]j]j]j]j]ujjj]r#j%XUnexpected indentation.r$r%}r&(jUjj ubajj\ubaubh)r'}r((jUjjj jjj?j}r)(j]UlevelKj]j]Usourcejj]j]UlineKUtypejXujKjhj]r*jX)r+}r,(jX=Literal block ends without a blank line; unexpected unindent.j}r-(j]j]j]j]j]ujj'j]r.j%X=Literal block ends without a blank line; unexpected unindent.r/r0}r1(jUjj+ubajj\ubaubh)r2}r3(jUjjj jjj?j}r4(j]UlevelKj]j]Usourcejj]j]UlineKUtypejXujKjhj]r5jX)r6}r7(jX;Bullet list ends without a blank line; unexpected unindent.j}r8(j]j]j]j]j]ujj2j]r9j%X;Bullet list ends without a blank line; unexpected unindent.r:r;}r<(jUjj6ubajj\ubaubh)r=}r>(jUjjj jjj?j}r?(j]UlevelKj]j]Usourcejj]j]UlineKUtypejAujKjhj]r@jX)rA}rB(jX`Possible incomplete section title. Treating the overline as ordinary text because it's so short.j}rC(j]j]j]j]j]ujj=j]rDj%X`Possible incomplete section title. Treating the overline as ordinary text because it's so short.rErF}rG(jUjjAubajj\ubaubh)rH}rI(jUj}rJ(j]UlevelKj]j]Usourcejj]j]UlineKUtypejAujjj]rKjX)rL}rM(jX`Blank line missing before literal block (after the "::")? Interpreted as a definition list item.j}rN(j]j]j]j]j]ujjHj]rOj%X`Blank line missing before literal block (after the "::")? Interpreted as a definition list item.rPrQ}rR(jUjjLubajj\ubajj?ubh)rS}rT(jUj}rU(j]UlevelKj]j]Usourcejj]j]UlineKUtypejujjj]rVjX)rW}rX(jXUnexpected indentation.j}rY(j]j]j]j]j]ujjSj]rZj%XUnexpected indentation.r[r\}r](jUjjWubajj\ubajj?ubh)r^}r_(jUj}r`(j]UlevelKj]j]Usourcejj]j]UlineKUtypejXujjj]rajX)rb}rc(jX;Block quote ends without a blank line; unexpected unindent.j}rd(j]j]j]j]j]ujj^j]rej%X;Block quote ends without a blank line; unexpected unindent.rfrg}rh(jUjjbubajj\ubajj?ubh)ri}rj(jUj}rk(j]UlevelKj]j]Usourcejj]j]UlineKUtypejujjj]rljX)rm}rn(jXUnexpected indentation.j}ro(j]j]j]j]j]ujjij]rpj%XUnexpected indentation.rqrr}rs(jUjjmubajj\ubajj?ubh)rt}ru(jUj}rv(j]UlevelKj]j]Usourcejj]j]UlineKUtypejXujjj]rwjX)rx}ry(jX;Block quote ends without a blank line; unexpected unindent.j}rz(j]j]j]j]j]ujjtj]r{j%X;Block quote ends without a blank line; unexpected unindent.r|r}}r~(jUjjxubajj\ubajj?ubh)r}r(jUj}r(j]UlevelKj]j]Usourcejj]j]UlineKUtypejujjj]rjX)r}r(jXUnexpected indentation.j}r(j]j]j]j]j]ujjj]rj%XUnexpected indentation.rr}r(jUjjubajj\ubajj?ubh)r}r(jUj}r(j]UlevelKj]j]Usourcejj]j]UlineKUtypejXujjj]rjX)r}r(jX;Block quote ends without a blank line; unexpected unindent.j}r(j]j]j]j]j]ujjj]rj%X;Block quote ends without a blank line; unexpected unindent.rr}r(jUjjubajj\ubajj?ubh)r}r(jUjjbj jjj?j}r(j]UlevelKj]j]Usourcejj]j]UlineKUtypejAujKjhj]rjX)r}r(jXfPossible title underline, too short for the title. Treating it as ordinary text because it's so short.j}r(j]j]j]j]j]ujjj]rj%XfPossible title underline, too short for the title. Treating it as ordinary text because it's so short.rr}r(jUjjubajj\ubaubh)r}r(jUjjҘj jjj?j}r(j]UlevelKj]j]Usourcejj]j]UlineM UtypejujM jhj]rjX)r}r(jXUnexpected indentation.j}r(j]j]j]j]j]ujjj]rj%XUnexpected indentation.rr}r(jUjjubajj\ubaubh)r}r(jUjjҘj jjj?j}r(j]UlevelKj]j]Usourcejj]j]UlineMUtypejAujMjhj]rjX)r}r(jXfPossible title underline, too short for the title. Treating it as ordinary text because it's so short.j}r(j]j]j]j]j]ujjj]rj%XfPossible title underline, too short for the title. Treating it as ordinary text because it's so short.rr}r(jUjjubajj\ubaubh)r}r(jUjjҘj jjj?j}r(j]UlevelKj]j]Usourcejj]j]UlineMUtypejujMjhj]rjX)r}r(jXUnexpected indentation.j}r(j]j]j]j]j]ujjj]rj%XUnexpected indentation.rr}r(jUjjubajj\ubaubh)r}r(jUjjҘj jjj?j}rÝ(j]UlevelKj]j]Usourcejj]j]UlineM.UtypejAujM.jhj]rĝjX)rŝ}rƝ(jXfPossible title underline, too short for the title. Treating it as ordinary text because it's so short.j}rǝ(j]j]j]j]j]ujjj]rȝj%XfPossible title underline, too short for the title. Treating it as ordinary text because it's so short.rɝrʝ}r˝(jUjjŝubajj\ubaubh)r̝}r͝(jUjjҘj jjj?j}rΝ(j]UlevelKj]j]Usourcejj]j]UlineM/UtypejujM.jhj]rϝjX)rН}rѝ(jXUnexpected indentation.j}rҝ(j]j]j]j]j]ujj̝j]rӝj%XUnexpected indentation.rԝr՝}r֝(jUjjНubajj\ubaubh)rם}r؝(jUjjҘj jjj?j}rٝ(j]UlevelKj]j]Usourcejj]j]UlineM3UtypejAujM3jhj]rڝjX)r۝}rܝ(jXfPossible title underline, too short for the title. Treating it as ordinary text because it's so short.j}rݝ(j]j]j]j]j]ujjםj]rޝj%XfPossible title underline, too short for the title. Treating it as ordinary text because it's so short.rߝr}r(jUjj۝ubajj\ubaubh)r}r(jUjjҘj jjj?j}r(j]UlevelKj]j]Usourcejj]j]UlineM4UtypejujM3jhj]rjX)r}r(jXUnexpected indentation.j}r(j]j]j]j]j]ujjj]rj%XUnexpected indentation.rr}r(jUjjubajj\ubaubh)r}r(jUjjҘj jjj?j}r(j]UlevelKj]j]Usourcejj]j]UlineM9UtypejAujM9jhj]rjX)r}r(jXfPossible title underline, too short for the title. Treating it as ordinary text because it's so short.j}r(j]j]j]j]j]ujjj]rj%XfPossible title underline, too short for the title. Treating it as ordinary text because it's so short.rr}r(jUjjubajj\ubaubh)r}r(jUjjҘj jjj?j}r(j]UlevelKj]j]Usourcejj]j]UlineM:UtypejujM9jhj]rjX)r}r(jXUnexpected indentation.j}r(j]j]j]j]j]ujjj]rj%XUnexpected indentation.rr}r(jUjjubajj\ubaubh)r}r(jUjjҘj jjj?j}r(j]UlevelKj]j]Usourcejj]j]UlineMYUtypejujMXjhj]rjX)r}r(jXUnexpected indentation.j}r (j]j]j]j]j]ujjj]r j%XUnexpected indentation.r r }r (jUjjubajj\ubaubh)r}r(jUjjҘj jjj?j}r(j]UlevelKj]j]Usourcejj]j]UlineMZUtypejXujMYjhj]rjX)r}r(jX=Literal block ends without a blank line; unexpected unindent.j}r(j]j]j]j]j]ujjj]rj%X=Literal block ends without a blank line; unexpected unindent.rr}r(jUjjubajj\ubaubh)r}r(jUjjҘj jjj?j}r(j]UlevelKj]j]Usourcejj]j]UlineM[UtypejAujM[jhj]rjX)r}r(jXfPossible title underline, too short for the title. Treating it as ordinary text because it's so short.j}r(j]j]j]j]j]ujjj]r j%XfPossible title underline, too short for the title. Treating it as ordinary text because it's so short.r!r"}r#(jUjjubajj\ubaubh)r$}r%(jUjjҘj jjj?j}r&(j]UlevelKj]j]Usourcejj]j]UlineM\UtypejujM[jhj]r'jX)r(}r)(jXUnexpected indentation.j}r*(j]j]j]j]j]ujj$j]r+j%XUnexpected indentation.r,r-}r.(jUjj(ubajj\ubaubh)r/}r0(jUjjҘj jjj?j}r1(j]UlevelKj]j]Usourcejj]j]UlineMxUtypejujMwjhj]r2jX)r3}r4(jXUnexpected indentation.j}r5(j]j]j]j]j]ujj/j]r6j%XUnexpected indentation.r7r8}r9(jUjj3ubajj\ubaubh)r:}r;(jUjjҘj jjj?j}r<(j]UlevelKj]j]Usourcejj]j]UlineM{UtypejAujM{jhj]r=jX)r>}r?(jXfPossible title underline, too short for the title. Treating it as ordinary text because it's so short.j}r@(j]j]j]j]j]ujj:j]rAj%XfPossible title underline, too short for the title. Treating it as ordinary text because it's so short.rBrC}rD(jUjj>ubajj\ubaubh)rE}rF(jUjjҘj jjj?j}rG(j]UlevelKj]j]Usourcejj]j]UlineM|UtypejujM{jhj]rHjX)rI}rJ(jXUnexpected indentation.j}rK(j]j]j]j]j]ujjEj]rLj%XUnexpected indentation.rMrN}rO(jUjjIubajj\ubaubh)rP}rQ(jUjjҘj jjj?j}rR(j]UlevelKj]j]Usourcejj]j]UlineMUtypejujMjhj]rSjX)rT}rU(jXUnexpected indentation.j}rV(j]j]j]j]j]ujjPj]rWj%XUnexpected indentation.rXrY}rZ(jUjjTubajj\ubaubh)r[}r\(jUjjҘj jjj?j}r](j]UlevelKj]j]Usourcejj]j]UlineMUtypejAujMjhj]r^jX)r_}r`(jXfPossible title underline, too short for the title. Treating it as ordinary text because it's so short.j}ra(j]j]j]j]j]ujj[j]rbj%XfPossible title underline, too short for the title. Treating it as ordinary text because it's so short.rcrd}re(jUjj_ubajj\ubaubh)rf}rg(jUjjҘj jjj?j}rh(j]UlevelKj]j]Usourcejj]j]UlineMUtypejujMjhj]rijX)rj}rk(jXUnexpected indentation.j}rl(j]j]j]j]j]ujjfj]rmj%XUnexpected indentation.rnro}rp(jUjjjubajj\ubaubh)rq}rr(jUjj)rs}rt(jUjKjj)ru}rv(jUjhj j jjj}rw(j]j]j]j]rxUipclldryaj]rzh?aujKjhj]r{(j)r|}r}(jXIPCLLDr~jjuj j jj"j}r(j]j]j]j]j]ujKjhj]rj%XIPCLLDrr}r(jj~jj|ubaubj))r}r(jXAhttp://processors.wiki.ti.com/index.php/Processor_SDK_RTOS_IPCLLDjjuj j,X?source/rtos/PDK_Platform_Software/Device_Drivers/IPCLLD.rst.incrr}rbjj0j}r(j2j3j]j]j]j]j]ujKjhj]rj%XAhttp://processors.wiki.ti.com/index.php/Processor_SDK_RTOS_IPCLLDrr}r(jUjjubaubjsj)r}r(jUjKjjuj jjjj}r(j]rj"aj]j]j]rUid255raj]ujK jhj]r(j)r}r(jXTerms and Abbreviationrjjj jjj"j}r(j]j]j]j]j]ujK jhj]rj%XTerms and Abbreviationrr}r(jjjjubaubj)r}r(jUjjj jjjj}r(j]j]j]j]j]ujNjhj]rj)r}r(jUj}r(j]j]j]j]j]UcolsKujjj]r(j)r}r(jUj}r(j]j]j]j]j]UcolwidthKujjj]jjubj)r}r(jUj}r(j]j]j]j]j]UcolwidthKGujjj]jjubj)r}r(jUj}r(j]j]j]j]j]ujjj]rj)r}r(jUj}r(j]j]j]j]j]ujjj]r(j)r}r(jUj}r(j]j]j]j]j]ujjj]rjX)r}r(jXTermrjjj jjj\j}r(j]j]j]j]j]ujKj]rj%XTermrr}r(jjjjubaubajjubj)r}r(jUj}r(j]j]j]j]j]ujjj]ržjX)rÞ}rĞ(jXDefinition or ExplanationrŞjjj jjj\j}rƞ(j]j]j]j]j]ujKj]rǞj%XDefinition or ExplanationrȞrɞ}rʞ(jjŞjjÞubaubajjubejjubajjubj)r˞}r̞(jUj}r͞(j]j]j]j]j]ujjj]rΞ(j)rϞ}rО(jUj}rў(j]j]j]j]j]ujj˞j]rҞ(j)rӞ}rԞ(jUj}r՞(j]j]j]j]j]ujjϞj]r֞jX)rמ}r؞(jXIPCrٞjjӞj jjj\j}rڞ(j]j]j]j]j]ujKj]r۞j%XIPCrܞrݞ}rޞ(jjٞjjמubaubajjubj)rߞ}r(jUj}r(j]j]j]j]j]ujjϞj]rjX)r}r(jXInter-Processor Communicationrjjߞj jjj\j}r(j]j]j]j]j]ujKj]rj%XInter-Processor Communicationrr}r(jjjjubaubajjubejjubj)r}r(jUj}r(j]j]j]j]j]ujj˞j]r(j)r}r(jUj}r(j]j]j]j]j]ujjj]rjX)r}r(jXRirtIOrjjj jjj\j}r(j]j]j]j]j]ujKj]rj%XRirtIOrr}r(jjjjubaubajjubj)r}r(jUj}r(j]j]j]j]j]ujjj]rjX)r}r(jXVirtual I/O driverrjjj jjj\j}r(j]j]j]j]j]ujKj]rj%XVirtual I/O driverrr}r(jjjjubaubajjubejjubj)r}r(jUj}r (j]j]j]j]j]ujj˞j]r (j)r }r (jUj}r (j]j]j]j]j]ujjj]rjX)r}r(jXMailBoxrjj j jjj\j}r(j]j]j]j]j]ujKj]rj%XMailBoxrr}r(jjjjubaubajjubj)r}r(jUj}r(j]j]j]j]j]ujjj]rjX)r}r(jXGIP which provides queued interrupt mechanism for communication channelrjjj jjj\j}r(j]j]j]j]j]ujKj]rj%XGIP which provides queued interrupt mechanism for communication channelr r!}r"(jjjjubaubajjubejjubj)r#}r$(jUj}r%(j]j]j]j]j]ujj˞j]r&(j)r'}r((jUj}r)(j]j]j]j]j]ujj#j]r*jX)r+}r,(jXVRingr-jj'j jjj\j}r.(j]j]j]j]j]ujKj]r/j%XVRingr0r1}r2(jj-jj+ubaubajjubj)r3}r4(jUj}r5(j]j]j]j]j]ujj#j]r6jX)r7}r8(jXRing Buffer in shared memoryr9jj3j jjj\j}r:(j]j]j]j]j]ujKj]r;j%XRing Buffer in shared memoryr<r=}r>(jj9jj7ubaubajjubejjubj)r?}r@(jUj}rA(j]j]j]j]j]ujj˞j]rB(j)rC}rD(jUj}rE(j]j]j]j]j]ujj?j]rFjX)rG}rH(jXPDKrIjjCj jjj\j}rJ(j]j]j]j]j]ujKj]rKj%XPDKrLrM}rN(jjIjjGubaubajjubj)rO}rP(jUj}rQ(j]j]j]j]j]ujj?j]rRjX)rS}rT(jXPlatform Development KitrUjjOj jjj\j}rV(j]j]j]j]j]ujKj]rWj%XPlatform Development KitrXrY}rZ(jjUjjSubaubajjubejjubj)r[}r\(jUj}r](j]j]j]j]j]ujj˞j]r^(j)r_}r`(jUj}ra(j]j]j]j]j]ujj[j]rbjX)rc}rd(jXPSDKRArejj_j jjj\j}rf(j]j]j]j]j]ujKj]rgj%XPSDKRArhri}rj(jjejjcubaubajjubj)rk}rl(jUj}rm(j]j]j]j]j]ujj[j]rnjX)ro}rp(jXProcessor SDK RTOS Automotiverqjjkj jjj\j}rr(j]j]j]j]j]ujKj]rsj%XProcessor SDK RTOS Automotivertru}rv(jjqjjoubaubajjubejjubj)rw}rx(jUj}ry(j]j]j]j]j]ujj˞j]rz(j)r{}r|(jUj}r}(j]j]j]j]j]ujjwj]r~jX)r}r(jXPSDKLArjj{j jjj\j}r(j]j]j]j]j]ujKj]rj%XPSDKLArr}r(jjjjubaubajjubj)r}r(jUj}r(j]j]j]j]j]ujjwj]rjX)r}r(jXProcessor SDK Linux Automotiverjjj jjj\j}r(j]j]j]j]j]ujKj]rj%XProcessor SDK Linux Automotiverr}r(jjjjubaubajjubejjubejjubejjubaubeubj)r}r(jUjjuj jjjj}r(j]j]j]j]rU referencesraj]rhgaujKjhj]r(j)r}r(jX Referencesrjjj jjj"j}r(j]j]j]j]j]ujKjhj]rj%X Referencesrr}r(jjjjubaubj)r}r(jUjjj jjjj}r(jX*j]j]j]j]j]ujKjhj]r(j)r}r(jX@`Sitara Processor Datasheet `_rjjj jjj j}r(j]j]j]j]j]ujNjhj]rjX)r}r(jjjjj jjj\j}r(j]j]j]j]j]ujKj]r(j)r}r(jjj}r(UnameXSitara Processor DatasheetjX http://www.ti.com/lit/gpn/am6548rj]j]j]j]j]ujjj]rj%XSitara Processor Datasheetrr}r(jUjjubajjubj)r}r(jX# jKjjjjj}r(Urefurijj]rUsitara-processor-datasheetraj]j]j]j]rh0auj]ubeubaubj)r}r(jX5For J721e datasheet, please contact TI presentative jjj jjj j}r(j]j]j]j]j]ujNjhj]rjX)r}rŸ(jX3For J721e datasheet, please contact TI presentativerßjjj jjj\j}rğ(j]j]j]j]j]ujKj]rşj%X3For J721e datasheet, please contact TI presentativerƟrǟ}rȟ(jjßjjubaubaubeubeubj)rɟ}rʟ(jUjjuj jjjj}r˟(j]j]j]j]r̟Ufeaturesr͟aj]rΟhZaujK#jhj]rϟ(j)rП}rџ(jXFeaturesrҟjjɟj jjj"j}rӟ(j]j]j]j]j]ujK#jhj]rԟj%XFeaturesr՟r֟}rן(jjҟjjПubaubj)r؟}rٟ(jUjjɟj jjjj}rڟ(jX*j]j]j]j]j]ujK%jhj]r۟(j)rܟ}rݟ(jXdProvides ipc low-level driver, which can be compiled for any of the cores on AM65xx or J721E devicesrޟjj؟j jjj j}rߟ(j]j]j]j]j]ujNjhj]rjX)r}r(jjޟjjܟj jjj\j}r(j]j]j]j]j]ujK%j]rj%XdProvides ipc low-level driver, which can be compiled for any of the cores on AM65xx or J721E devicesrr}r(jjޟjjubaubaubj)r}r(jXJSupports Bios/Bios communication and Linux/Bios concurrently for all coresrjj؟j jjj j}r(j]j]j]j]j]ujNjhj]rjX)r}r(jjjjj jjj\j}r(j]j]j]j]j]ujK&j]rj%XJSupports Bios/Bios communication and Linux/Bios concurrently for all coresrr}r(jjjjubaubaubj)r}r(jX7Supports TI RTOS, Linux, QNX and baremetal (No-OS) use.rjj؟j jjj j}r(j]j]j]j]j]ujNjhj]rjX)r}r(jjjjj jjj\j}r(j]j]j]j]j]ujK'j]rj%X7Supports TI RTOS, Linux, QNX and baremetal (No-OS) use.rr}r(jjjjubaubaubj)r}r(jXIIt can be extended for any third-party RTOS by adding OS adaptation layerrjj؟j jjj j}r(j]j]j]j]j]ujNjhj]rjX)r}r(jjjjj jjj\j}r(j]j]j]j]j]ujK(j]rj%XIIt can be extended for any third-party RTOS by adding OS adaptation layerr r }r (jjjjubaubaubj)r }r (jX8IPCLLD also provides many examples for quick reference jj؟j jjj j}r(j]j]j]j]j]ujNjhj]rjX)r}r(jX6IPCLLD also provides many examples for quick referencerjj j jjj\j}r(j]j]j]j]j]ujK)j]rj%X6IPCLLD also provides many examples for quick referencerr}r(jjjjubaubaubeubeubj)r}r(jUjjuj jjjj}r(j]j]j]j]rU installationraj]rhqaujK-jhj]r(j)r}r (jX Installationr!jjj jjj"j}r"(j]j]j]j]j]ujK-jhj]r#j%X Installationr$r%}r&(jj!jjubaubjX)r'}r((jXOIPCLLD is part of TI PDK (Platform Development Kit) package. Once PRSDK is installed, PDK and all dependent packages and tool-chains are installed automatically. IPCLLD can also be located at /pdk/packages/ti/drv/ipc. IPCLLD is also available publically at ``_ at packages/ti/drv/ipc.jjj jjj\j}r)(j]j]j]j]j]ujK/jhj]r*(j%X IPCLLD is part of TI PDK (Platform Development Kit) package. Once PRSDK is installed, PDK and all dependent packages and tool-chains are installed automatically. IPCLLD can also be located at /pdk/packages/ti/drv/ipc. IPCLLD is also available publically at r+r,}r-(jX IPCLLD is part of TI PDK (Platform Development Kit) package. Once PRSDK is installed, PDK and all dependent packages and tool-chains are installed automatically. IPCLLD can also be located at /pdk/packages/ti/drv/ipc. IPCLLD is also available publically at jj'ubj)r.}r/(jX*``_j}r0(Unamehjhj]j]j]j]j]ujj'j]r1j%X%https://git.ti.com/processor-sdk/pdk/r2r3}r4(jUjj.ubajjubj)r5}r6(jX'jKjj'jjj}r7(Urefurihj]r8U"https-git-ti-com-processor-sdk-pdkr9aj]j]j]j]r:hauj]ubj%X at packages/ti/drv/ipc.r;r<}r=(jX at packages/ti/drv/ipc.jj'ubeubjX)r>}r?(jX2It can also be cloned using following git command:r@jjj jjj\j}rA(j]j]j]j]j]ujK2jhj]rBj%X2It can also be cloned using following git command:rCrD}rE(jj@jj>ubaubj)rF}rG(jUjjj jjjj}rH(jX*j]j]j]j]j]ujK4jhj]rI(j)rJ}rK(jX0git clone git://git.ti.com/processor-sdk/pdk.gitrLjjFj jjj j}rM(j]j]j]j]j]ujNjhj]rNjX)rO}rP(jjLjjJj jjj\j}rQ(j]j]j]j]j]ujK4j]rRj%X0git clone git://git.ti.com/processor-sdk/pdk.gitrSrT}rU(jjLjjOubaubaubj)rV}rW(jX+Provides many examples for quick reference jjFj jjj j}rX(j]j]j]j]j]ujNjhj]rYjX)rZ}r[(jX*Provides many examples for quick referencer\jjVj jjj\j}r](j]j]j]j]j]ujK5j]r^j%X*Provides many examples for quick referencer_r`}ra(jj\jjZubaubaubeubjX)rb}rc(jX3The file and directory oraganization are as below.rdjjj jjj\j}re(j]j]j]j]j]ujK7jhj]rfj%X3The file and directory oraganization are as below.rgrh}ri(jjdjjbubaubj )rj}rk(jUjjj Njj j}rl(j]j]j]j]j]ujNjhj]rmj^)rn}ro(jXa.. image:: ../images/ipclld_file_org.png :height: 944 :width: 435 j}rp(j]UuriX"rtos/../images/ipclld_file_org.pngrqj]j]UwidthX435j]jd}rrU*jqsj]UheightX944ujjjj]jjaubaubeubj)rs}rt(jUjjuj jjjj}ru(j]j]j]j]rvUbuildrwaj]rxhaujK?jhj]ry(j)rz}r{(jXBuildr|jjsj jjj"j}r}(j]j]j]j]j]ujK?jhj]r~j%XBuildrr}r(jj|jjzubaubjX)r}r(jXWIPCLLD uses the PDK build systems to build the IPCLLD library and example applications.rjjsj jjj\j}r(j]j]j]j]j]ujKAjhj]rj%XWIPCLLD uses the PDK build systems to build the IPCLLD library and example applications.rr}r(jjjjubaubj)r}r(jUjjsj jjjj}r(j]j]j]j]rU%dependency-of-external-pdk-componentsraj]rhaujKDjhj]r(j)r}r(jX%Dependency of External PDK Componentsrjjj jjj"j}r(j]j]j]j]j]ujKDjhj]rj%X%Dependency of External PDK Componentsrr}r(jjjjubaubjX)r}r(jXIPCLLD does not access any hardware diretly. It uses the PDK/csl component to configure Mailbox registers. It uses sciclient to set/release Mailbox interrupt. Also it uses PDK/osal to configure OS-related steps like Semaphore etc.rjjj jjj\j}r(j]j]j]j]j]ujKEjhj]rj%XIPCLLD does not access any hardware diretly. It uses the PDK/csl component to configure Mailbox registers. It uses sciclient to set/release Mailbox interrupt. Also it uses PDK/osal to configure OS-related steps like Semaphore etc.rr}r(jjjjubaubj)r}r(jUjjj jjjj}r(jX-j]j]j]j]j]ujKGjhj]r(j)r}r(jX&pdk/csl : Configures Mailbox registersrjjj jjj j}r(j]j]j]j]j]ujNjhj]rjX)r}r(jjjjj jjj\j}r(j]j]j]j]j]ujKGj]rj%X&pdk/csl : Configures Mailbox registersrr}r(jjjjubaubaubj)r}r(jX&pdk/sciclient : Set Mailbox interruptsrjjj jjj j}r(j]j]j]j]j]ujNjhj]rjX)r}r(jjjjj jjj\j}r(j]j]j]j]j]ujKHj]rj%X&pdk/sciclient : Set Mailbox interruptsrr}r(jjjjubaubaubj)r}r(jX:pdk/osal : To register for HWI and other kernel stuffs. jjj jjj j}r(j]j]j]j]j]ujNjhj]rjX)r}r (jX7pdk/osal : To register for HWI and other kernel stuffs.ràjjj jjj\j}rĠ(j]j]j]j]j]ujKIj]rŠj%X7pdk/osal : To register for HWI and other kernel stuffs.rƠrǠ}rȠ(jjàjjubaubaubeubeubj)rɠ}rʠ(jUjjsj jjjj}rˠ(j]j]j]j]r̠Ucommand-to-build-ipclldr͠aj]rΠhaujKNjhj]rϠ(j)rР}rѠ(jXCommand to build IPCLLDrҠjjɠj jjj"j}rӠ(j]j]j]j]j]ujKNjhj]rԠj%XCommand to build IPCLLDrՠr֠}rנ(jjҠjjРubaubjX)rؠ}r٠(jXThe build can be done either from the IPCLLD's path in the PDK packages, or from the PDK build folder. For either method, the following environment variables must be defined, or supplied with the build command (if they are different from the defaults of the SDK installation):rڠjjɠj jjj\j}r۠(j]j]j]j]j]ujKPjhj]rܠj%XThe build can be done either from the IPCLLD's path in the PDK packages, or from the PDK build folder. For either method, the following environment variables must be defined, or supplied with the build command (if they are different from the defaults of the SDK installation):rݠrޠ}rߠ(jjڠjjؠubaubj)r}r(jUjjɠj jjjj}r(jX-j]j]j]j]j]ujKRjhj]r(j)r}r(jX+SDK_INSTALL_PATH: Installation root for sdkrjjj jjj j}r(j]j]j]j]j]ujNjhj]rjX)r}r(jjjjj jjj\j}r(j]j]j]j]j]ujKRj]rj%X+SDK_INSTALL_PATH: Installation root for sdkrr}r(jjjjubaubaubj)r}r(jX_TOOLS_INSTALL_PATH: where all the tool chains are installed, if different from SDK_INSTALL_PATHrjjj jjj j}r(j]j]j]j]j]ujNjhj]rjX)r}r(jjjjj jjj\j}r(j]j]j]j]j]ujKSj]rj%X_TOOLS_INSTALL_PATH: where all the tool chains are installed, if different from SDK_INSTALL_PATHrr}r(jjjjubaubaubj)r}r(jX+PDK_INSTALL_PATH: Installtion root for pdk jjj jjj j}r(j]j]j]j]j]ujNjhj]rjX)r}r(jX*PDK_INSTALL_PATH: Installtion root for pdkrjjj jjj\j}r(j]j]j]j]j]ujKTj]rj%X*PDK_INSTALL_PATH: Installtion root for pdkrr}r(jjjjubaubaubeubjX)r}r (jXfThe following build instructions are for Linux. For Windows build, please replace "make" with "gmake".r jjɠj jjj\j}r (j]j]j]j]j]ujKVjhj]r j%XfThe following build instructions are for Linux. For Windows build, please replace "make" with "gmake".r r}r(jj jjubaubjX)r}r(jX Method 1:rjjɠj jjj\j}r(j]j]j]j]j]ujKXjhj]rj%X Method 1:rr}r(jjjjubaubjX)r}r(jXRThese libraries and examples are built from the IPCLLD's path in the PDK packages:rjjɠj jjj\j}r(j]j]j]j]j]ujKZjhj]rj%XRThese libraries and examples are built from the IPCLLD's path in the PDK packages:rr}r(jjjjubaubj )r }r!(jUjjɠj jjj j}r"(j]j]j]j]j]ujNjhj]r#jX)r$}r%(jX#PDK_INSTALL_DIR/packages/ti/drv/ipcr&jj j jjj\j}r'(j]j]j]j]j]ujK\j]r(j%X#PDK_INSTALL_DIR/packages/ti/drv/ipcr)r*}r+(jj&jj$ubaubaubj)r,}r-(jUjjɠj jjjj}r.(j]j]j]j]j]ujNjhj]r/j)r0}r1(jUj}r2(j]j]j]j]j]UcolsKujj,j]r3(j)r4}r5(jUj}r6(j]j]j]j]j]UcolwidthKujj0j]jjubj)r7}r8(jUj}r9(j]j]j]j]j]UcolwidthKVujj0j]jjubj)r:}r;(jUj}r<(j]j]j]j]j]UcolwidthK!ujj0j]jjubj)r=}r>(jUj}r?(j]j]j]j]j]ujj0j]r@j)rA}rB(jUj}rC(j]j]j]j]j]ujj=j]rD(j)rE}rF(jUj}rG(j]j]j]j]j]ujjAj]rHjX)rI}rJ(jXTargetrKjjEj jjj\j}rL(j]j]j]j]j]ujK_j]rMj%XTargetrNrO}rP(jjKjjIubaubajjubj)rQ}rR(jUj}rS(j]j]j]j]j]ujjAj]rTjX)rU}rV(jX Build CommandrWjjQj jjj\j}rX(j]j]j]j]j]ujK_j]rYj%X Build CommandrZr[}r\(jjWjjUubaubajjubj)r]}r^(jUj}r_(j]j]j]j]j]ujjAj]r`jX)ra}rb(jX Descriptionrcjj]j jjj\j}rd(j]j]j]j]j]ujK_j]rej%X Descriptionrfrg}rh(jjcjjaubaubajjubejjubajjubj)ri}rj(jUj}rk(j]j]j]j]j]ujj0j]rl(j)rm}rn(jUj}ro(j]j]j]j]j]ujjij]rp(j)rq}rr(jUj}rs(j]j]j]j]j]ujjmj]rtjX)ru}rv(jXlibrwjjqj jjj\j}rx(j]j]j]j]j]ujKaj]ryj%Xlibrzr{}r|(jjwjjuubaubajjubj)r}}r~(jUj}r(j]j]j]j]j]ujjmj]rjX)r}r(jXTmake PDK_INSTALL_PATH=PDK_INSTALL_DIR/packages SDK_INSTALL_PATH=SDK_INSTALL_PATH librjj}j jjj\j}r(j]j]j]j]j]ujKaj]rj%XTmake PDK_INSTALL_PATH=PDK_INSTALL_DIR/packages SDK_INSTALL_PATH=SDK_INSTALL_PATH librr}r(jjjjubaubajjubj)r}r(jUj}r(j]j]j]j]j]ujjmj]rjX)r}r(jXIPCLLD libraryrjjj jjj\j}r(j]j]j]j]j]ujKaj]rj%XIPCLLD libraryrr}r(jjjjubaubajjubejjubj)r}r(jUj}r(j]j]j]j]j]ujjij]r(j)r}r(jUj}r(j]j]j]j]j]ujjj]rjX)r}r(jXappsrjjj jjj\j}r(j]j]j]j]j]ujKbj]rj%Xappsrr}r(jjjjubaubajjubj)r}r(jUj}r(j]j]j]j]j]ujjj]rjX)r}r(jXUmake PDK_INSTALL_PATH=PDK_INSTALL_DIR/packages SDK_INSTALL_PATH=SDK_INSTALL_PATH appsrjjj jjj\j}r(j]j]j]j]j]ujKbj]rj%XUmake PDK_INSTALL_PATH=PDK_INSTALL_DIR/packages SDK_INSTALL_PATH=SDK_INSTALL_PATH appsrr}r(jjjjubaubajjubj)r}r(jUj}r(j]j]j]j]j]ujjj]rjX)r}r(jXIPCLLD examplesrjjj jjj\j}r(j]j]j]j]j]ujKbj]rj%XIPCLLD examplesrr}r(jjjjubaubajjubejjubj)r}r(jUj}r(j]j]j]j]j]ujjij]r(j)r}r¡(jUj}rá(j]j]j]j]j]ujjj]rġjX)rš}rơ(jXcleanrǡjjj jjj\j}rȡ(j]j]j]j]j]ujKcj]rɡj%Xcleanrʡrˡ}r̡(jjǡjjšubaubajjubj)r͡}rΡ(jUj}rϡ(j]j]j]j]j]ujjj]rСjX)rѡ}rҡ(jXVmake PDK_INSTALL_PATH=PDK_INSTALL_DIR/packages SDK_INSTALL_PATH=SDK_INSTALL_PATH cleanrӡjj͡j jjj\j}rԡ(j]j]j]j]j]ujKcj]rաj%XVmake PDK_INSTALL_PATH=PDK_INSTALL_DIR/packages SDK_INSTALL_PATH=SDK_INSTALL_PATH cleanr֡rס}rء(jjӡjjѡubaubajjubj)r١}rڡ(jUj}rۡ(j]j]j]j]j]ujjj]rܡjX)rݡ}rޡ(jX!Clean IPCLLD library and examplesrߡjj١j jjj\j}r(j]j]j]j]j]ujKcj]rj%X!Clean IPCLLD library and examplesrr}r(jjߡjjݡubaubajjubejjubj)r}r(jUj}r(j]j]j]j]j]ujjij]r(j)r}r(jUj}r(j]j]j]j]j]ujjj]rjX)r}r(jXallrjjj jjj\j}r(j]j]j]j]j]ujKdj]rj%Xallrr}r(jjjjubaubajjubj)r}r(jUj}r(j]j]j]j]j]ujjj]rjX)r}r(jXTmake PDK_INSTALL_PATH=PDK_INSTALL_DIR/packages SDK_INSTALL_PATH=SDK_INSTALL_PATH allrjjj jjj\j}r(j]j]j]j]j]ujKdj]rj%XTmake PDK_INSTALL_PATH=PDK_INSTALL_DIR/packages SDK_INSTALL_PATH=SDK_INSTALL_PATH allrr}r(jjjjubaubajjubj)r}r(jUj}r(j]j]j]j]j]ujjj]rjX)r}r(jX!Build IPCLLD library and examplesrjjj jjj\j}r(j]j]j]j]j]ujKdj]r j%X!Build IPCLLD library and examplesr r }r (jjjjubaubajjubejjubejjubejjubaubjX)r }r(jX Method 2:rjjɠj jjj\j}r(j]j]j]j]j]ujKgjhj]rj%X Method 2:rr}r(jjjj ubaubjX)r}r(jXHIf building from the PDK build folder, then use following steps to buildrjjɠj jjj\j}r(j]j]j]j]j]ujKijhj]rj%XHIf building from the PDK build folder, then use following steps to buildrr}r(jjjjubaubj )r}r(jUjjɠj jjj j}r(j]j]j]j]j]ujNjhj]r jX)r!}r"(jX'Go to PDK_INSTALL_DIR/packages/ti/buildr#jjj jjj\j}r$(j]j]j]j]j]ujKkj]r%j%X'Go to PDK_INSTALL_DIR/packages/ti/buildr&r'}r((jj#jj!ubaubaubj)r)}r*(jUjjɠj jjjj}r+(j]j]j]j]j]ujNjhj]r,j)r-}r.(jUj}r/(j]j]j]j]j]UcolsKujj)j]r0(j)r1}r2(jUj}r3(j]j]j]j]j]UcolwidthKujj-j]jjubj)r4}r5(jUj}r6(j]j]j]j]j]UcolwidthKjujj-j]jjubj)r7}r8(jUj}r9(j]j]j]j]j]UcolwidthKjujj-j]jjubj)r:}r;(jUj}r<(j]j]j]j]j]ujj-j]r=j)r>}r?(jUj}r@(j]j]j]j]j]ujj:j]rA(j)rB}rC(jUj}rD(j]j]j]j]j]ujj>j]rEjX)rF}rG(jXTargetrHjjBj jjj\j}rI(j]j]j]j]j]ujKnj]rJj%XTargetrKrL}rM(jjHjjFubaubajjubj)rN}rO(jUj}rP(j]j]j]j]j]ujj>j]rQjX)rR}rS(jX Build CommandrTjjNj jjj\j}rU(j]j]j]j]j]ujKnj]rVj%X Build CommandrWrX}rY(jjTjjRubaubajjubj)rZ}r[(jUj}r\(j]j]j]j]j]ujj>j]r]jX)r^}r_(jX Descriptionr`jjZj jjj\j}ra(j]j]j]j]j]ujKnj]rbj%X Descriptionrcrd}re(jj`jj^ubaubajjubejjubajjubj)rf}rg(jUj}rh(j]j]j]j]j]ujj-j]ri(j)rj}rk(jUj}rl(j]j]j]j]j]ujjfj]rm(j)rn}ro(jUj}rp(j]j]j]j]j]ujjjj]rqjX)rr}rs(jXlibrtjjnj jjj\j}ru(j]j]j]j]j]ujKpj]rvj%Xlibrwrx}ry(jjtjjrubaubajjubj)rz}r{(jUj}r|(j]j]j]j]j]ujjjj]r}jX)r~}r(jXZmake -s -j BUILD_PROFILE= BOARD= CORE= ipcrjjzj jjj\j}r(j]j]j]j]j]ujKpj]rj%XZmake -s -j BUILD_PROFILE= BOARD= CORE= ipcrr}r(jjjj~ubaubajjubj)r}r(jUj}r(j]j]j]j]j]ujjjj]rjX)r}r(jXIPCLLD libraryrjjj jjj\j}r(j]j]j]j]j]ujKpj]rj%XIPCLLD libraryrr}r(jjjjubaubajjubejjubj)r}r(jUj}r(j]j]j]j]j]ujjfj]r(j)r}r(jUj}r(j]j]j]j]j]ujjj]rjX)r}r(jXexamplerjjj jjj\j}r(j]j]j]j]j]ujKqj]rj%Xexamplerr}r(jjjjubaubajjubj)r}r(jUj}r(j]j]j]j]j]ujjj]rjX)r}r(jXdmake -s -j BUILD_PROFILE= BOARD= CORE= ipc_echo_testrjjj jjj\j}r(j]j]j]j]j]ujKqj]rj%Xdmake -s -j BUILD_PROFILE= BOARD= CORE= ipc_echo_testrr}r(jjjjubaubajjubj)r}r(jUj}r(j]j]j]j]j]ujjj]rjX)r}r(jXhipc_echo_test example (this can be replaced with any available IPC test name to build the specific test)rjjj jjj\j}r(j]j]j]j]j]ujKqj]rj%Xhipc_echo_test example (this can be replaced with any available IPC test name to build the specific test)rr}r(jjjjubaubajjubejjubj)r}r(jUj}r(j]j]j]j]j]ujjfj]r(j)r}r(jUj}r(j]j]j]j]j]ujjj]rjX)r¢}râ(jXcleanrĢjjj jjj\j}rŢ(j]j]j]j]j]ujKrj]rƢj%XcleanrǢrȢ}rɢ(jjĢjj¢ubaubajjubj)rʢ}rˢ(jUj}r̢(j]j]j]j]j]ujjj]r͢jX)r΢}rϢ(jXjmake -s -j BUILD_PROFILE= BOARD= CORE= ipc_echo_test_cleanrТjjʢj jjj\j}rѢ(j]j]j]j]j]ujKrj]rҢj%Xjmake -s -j BUILD_PROFILE= BOARD= CORE= ipc_echo_test_cleanrӢrԢ}rբ(jjТjj΢ubaubajjubj)r֢}rע(jUj}rآ(j]j]j]j]j]ujjj]r٢jX)rڢ}rۢ(jXjClean the ipc_echo_test (this can be replaced with any available IPC test name to build the specific test)rܢjj֢j jjj\j}rݢ(j]j]j]j]j]ujKrj]rޢj%XjClean the ipc_echo_test (this can be replaced with any available IPC test name to build the specific test)rߢr}r(jjܢjjڢubaubajjubejjubejjubejjubaubjX)r}r(jX6See `Example Details`_ for list of supported examples.rjjɠj jjj\j}r(j]j]j]j]j]ujKujhj]r(j%XSee rr}r(jXSee jjubj)r}r(jX`Example Details`_jqKjjjjj}r(UnameXExample Detailsj]j]j]j]j]jOUexample-detailsruj]rj%XExample Detailsrr}r(jUjjubaubj%X for list of supported examples.rr}r(jX for list of supported examples.jjubeubeubj)r}r(jUjjsj jjjj}r(j]j]j]j]rUavailable-core-namesraj]rh\aujKxjhj]r(j)r}r(jXAvailable Core namesrjjj jjj"j}r(j]j]j]j]j]ujKxjhj]rj%XAvailable Core namesrr}r(jjjjubaubj )r}r(jUjjj Njj j}r(j]j]j]j]j]ujNjhj]r(j )r}r (jX:AM65XX: - mpu1_0 (A53) - mcu1_0 (r5f0_0) - mcu1_1 (r5f0_1)jjj jjj j}r (j]j]j]j]j]ujK|j]r (j )r }r (jXAM65XX:rjjj jjj j}r(j]j]j]j]j]ujK|j]rj%XAM65XX:rr}r(jjjj ubaubj )r}r(jUj}r(j]j]j]j]j]ujjj]rj)r}r(jUj}r(jX-j]j]j]j]j]ujjj]r(j)r}r(jX mpu1_0 (A53)rj}r(j]j]j]j]j]ujjj]r jX)r!}r"(jjjjj jjj\j}r#(j]j]j]j]j]ujK{j]r$j%X mpu1_0 (A53)r%r&}r'(jjjj!ubaubajj ubj)r(}r)(jXmcu1_0 (r5f0_0)r*j}r+(j]j]j]j]j]ujjj]r,jX)r-}r.(jj*jj(j jjj\j}r/(j]j]j]j]j]ujK|j]r0j%Xmcu1_0 (r5f0_0)r1r2}r3(jj*jj-ubaubajj ubj)r4}r5(jXmcu1_1 (r5f0_1)r6j}r7(j]j]j]j]j]ujjj]r8jX)r9}r:(jj6jj4j jjj\j}r;(j]j]j]j]j]ujK}j]r<j%Xmcu1_1 (r5f0_1)r=r>}r?(jj6jj9ubaubajj ubejjubajj ubeubj )r@}rA(jXJ721E: - mpu1_0 (A72) - mcu1_0 (mcu-r5f0_0) - mcu1_1 (mcu-r5f0_1) - mcu2_0 (main-r5f0_0) - mcu2_1 (main-r5f0_1) - mcu3_0 (main-r5f1_0) - mcu3_1 (main-r5f1_1) - c66xdsp_1 (c66x_0) - c66xdsp_2 (c66x_1) - c7x_1 (c71x_0) jjj jjj j}rB(j]j]j]j]j]ujKjhj]rC(j )rD}rE(jXJ721E:rFjj@j jjj j}rG(j]j]j]j]j]ujKj]rHj%XJ721E:rIrJ}rK(jjFjjDubaubj )rL}rM(jUj}rN(j]j]j]j]j]ujj@j]rOj)rP}rQ(jUj}rR(jX-j]j]j]j]j]ujjLj]rS(j)rT}rU(jX mpu1_0 (A72)rVj}rW(j]j]j]j]j]ujjPj]rXjX)rY}rZ(jjVjjTj jjj\j}r[(j]j]j]j]j]ujKj]r\j%X mpu1_0 (A72)r]r^}r_(jjVjjYubaubajj ubj)r`}ra(jXmcu1_0 (mcu-r5f0_0)rbj}rc(j]j]j]j]j]ujjPj]rdjX)re}rf(jjbjj`j jjj\j}rg(j]j]j]j]j]ujKj]rhj%Xmcu1_0 (mcu-r5f0_0)rirj}rk(jjbjjeubaubajj ubj)rl}rm(jXmcu1_1 (mcu-r5f0_1)rnj}ro(j]j]j]j]j]ujjPj]rpjX)rq}rr(jjnjjlj jjj\j}rs(j]j]j]j]j]ujKj]rtj%Xmcu1_1 (mcu-r5f0_1)rurv}rw(jjnjjqubaubajj ubj)rx}ry(jXmcu2_0 (main-r5f0_0)rzj}r{(j]j]j]j]j]ujjPj]r|jX)r}}r~(jjzjjxj jjj\j}r(j]j]j]j]j]ujKj]rj%Xmcu2_0 (main-r5f0_0)rr}r(jjzjj}ubaubajj ubj)r}r(jXmcu2_1 (main-r5f0_1)rj}r(j]j]j]j]j]ujjPj]rjX)r}r(jjjjj jjj\j}r(j]j]j]j]j]ujKj]rj%Xmcu2_1 (main-r5f0_1)rr}r(jjjjubaubajj ubj)r}r(jXmcu3_0 (main-r5f1_0)rj}r(j]j]j]j]j]ujjPj]rjX)r}r(jjjjj jjj\j}r(j]j]j]j]j]ujKj]rj%Xmcu3_0 (main-r5f1_0)rr}r(jjjjubaubajj ubj)r}r(jXmcu3_1 (main-r5f1_1)rj}r(j]j]j]j]j]ujjPj]rjX)r}r(jjjjj jjj\j}r(j]j]j]j]j]ujKj]rj%Xmcu3_1 (main-r5f1_1)rr}r(jjjjubaubajj ubj)r}r(jXc66xdsp_1 (c66x_0)rj}r(j]j]j]j]j]ujjPj]rjX)r}r(jjjjj jjj\j}r(j]j]j]j]j]ujKj]rj%Xc66xdsp_1 (c66x_0)rr}r(jjjjubaubajj ubj)r}r(jXc66xdsp_2 (c66x_1)rj}r(j]j]j]j]j]ujjPj]rjX)r}r(jjjjj jjj\j}r(j]j]j]j]j]ujKj]rj%Xc66xdsp_2 (c66x_1)rr}r(jjjjubaubajj ubj)r}r(jXc7x_1 (c71x_0) j}r£(j]j]j]j]j]ujjPj]rãjX)rģ}rţ(jXc7x_1 (c71x_0)rƣjjj jjj\j}rǣ(j]j]j]j]j]ujKj]rȣj%Xc7x_1 (c71x_0)rɣrʣ}rˣ(jjƣjjģubaubajj ubejjubajj ubeubeubeubj)ṛ}rͣ(jUjjsj jjjj}rΣ(j]j]j]j]rϣUexpected-outputrУaj]rѣhaujKjhj]rң(j)rӣ}rԣ(jXExpected Outputrգjj̣j jjj"j}r֣(j]j]j]j]j]ujKjhj]rףj%XExpected Outputrأr٣}rڣ(jjգjjӣubaubjX)rۣ}rܣ(jXCThe built example binaries can be found in the PDK's binary folder:rݣjj̣j jjj\j}rޣ(j]j]j]j]j]ujKjhj]rߣj%XCThe built example binaries can be found in the PDK's binary folder:rr}r(jjݣjjۣubaubj )r}r(jUjj̣j jjj j}r(j]j]j]j]j]ujNjhj]rjX)r}r(jXAPDK_INSTALL_PATH/packages/ti/binary//bin//rjjj jjj\j}r(j]j]j]j]j]ujKj]rj%XAPDK_INSTALL_PATH/packages/ti/binary//bin//rr}r(jjjjubaubaubeubeubj)r}r(jUjjuj jjjj}r(j]j]j]j]rUrunning-the-ipclld-examplesraj]rh aujKjhj]r(j)r}r(jXRunning the IPCLLD examplesrjjj jjj"j}r(j]j]j]j]j]ujKjhj]rj%XRunning the IPCLLD examplesrr}r(jjjjubaubjX)r}r(jX)IPCLLD comes with the following examples.rjjj jjj\j}r(j]j]j]j]j]ujKjhj]rj%X)IPCLLD comes with the following examples.rr}r(jjjjubaubj)r}r(jUjKjjj jjjj}r(j]j]j]j]r jaj]r haujKjhj]r (j)r }r (jXExample Detailsrjjj jjj"j}r(j]j]j]j]j]ujKjhj]rj%XExample Detailsrr}r(jjjj ubaubj)r}r(jUjjj jjjj}r(jX-j]j]j]j]j]ujKjhj]r(j)r}r(jX-**ipc_echo_test:** This is most generic example application where mpu1_0 is running Linux, and all other cores running bios. All cores talk to each other bi-diectionally. It is send ping message and remote end responds pong message. There are 10000 ping/pong messages exchanged between each core-pair.rjjj jjj j}r(j]j]j]j]j]ujNjhj]rjX)r}r(jjjjj jjj\j}r(j]j]j]j]j]ujKj]r (j|)r!}r"(jX**ipc_echo_test:**j}r#(j]j]j]j]j]ujjj]r$j%Xipc_echo_test:r%r&}r'(jUjj!ubajjubj%X This is most generic example application where mpu1_0 is running Linux, and all other cores running bios. All cores talk to each other bi-diectionally. It is send ping message and remote end responds pong message. There are 10000 ping/pong messages exchanged between each core-pair.r(r)}r*(jX This is most generic example application where mpu1_0 is running Linux, and all other cores running bios. All cores talk to each other bi-diectionally. It is send ping message and remote end responds pong message. There are 10000 ping/pong messages exchanged between each core-pair.jjubeubaubj)r+}r,(jXn**ex01_bios_2core_echo_test:** This is the simplistic ping/pong application between any two cores running BIOSr-jjj jjj j}r.(j]j]j]j]j]ujNjhj]r/jX)r0}r1(jj-jj+j jjj\j}r2(j]j]j]j]j]ujKj]r3(j|)r4}r5(jX**ex01_bios_2core_echo_test:**j}r6(j]j]j]j]j]ujj0j]r7j%Xex01_bios_2core_echo_test:r8r9}r:(jUjj4ubajjubj%XP This is the simplistic ping/pong application between any two cores running BIOSr;r<}r=(jXP This is the simplistic ping/pong application between any two cores running BIOSjj0ubeubaubj)r>}r?(jX**ex02_bios_multicore_echo_test:** All cores running BIOS, many-to-many communication, each sending ping/pong with each other. mpu1_0 is also running BIOS.r@jjj jjj j}rA(j]j]j]j]j]ujNjhj]rBjX)rC}rD(jj@jj>j jjj\j}rE(j]j]j]j]j]ujKj]rF(j|)rG}rH(jX"**ex02_bios_multicore_echo_test:**j}rI(j]j]j]j]j]ujjCj]rJj%Xex02_bios_multicore_echo_test:rKrL}rM(jUjjGubajjubj%Xy All cores running BIOS, many-to-many communication, each sending ping/pong with each other. mpu1_0 is also running BIOS.rNrO}rP(jXy All cores running BIOS, many-to-many communication, each sending ping/pong with each other. mpu1_0 is also running BIOS.jjCubeubaubj)rQ}rR(jX**ex03_linux_bios_2core_echo_test:** This is simplistic ping/pong application where mpu1_0 running Linux and any other core is running Bios.rSjjj jjj j}rT(j]j]j]j]j]ujNjhj]rUjX)rV}rW(jjSjjQj jjj\j}rX(j]j]j]j]j]ujKj]rY(j|)rZ}r[(jX$**ex03_linux_bios_2core_echo_test:**j}r\(j]j]j]j]j]ujjVj]r]j%X ex03_linux_bios_2core_echo_test:r^r_}r`(jUjjZubajjubj%Xh This is simplistic ping/pong application where mpu1_0 running Linux and any other core is running Bios.rarb}rc(jXh This is simplistic ping/pong application where mpu1_0 running Linux and any other core is running Bios.jjVubeubaubj)rd}re(jX**ex04_linux_baremetal_2core_echo_test:** AM65xx only. This is a ping/pong application where mpu1_0 is running Linux and the other core is baremetal (no OS). jjj jjj j}rf(j]j]j]j]j]ujNjhj]rgjX)rh}ri(jX**ex04_linux_baremetal_2core_echo_test:** AM65xx only. This is a ping/pong application where mpu1_0 is running Linux and the other core is baremetal (no OS).jjdj jjj\j}rj(j]j]j]j]j]ujKj]rk(j|)rl}rm(jX)**ex04_linux_baremetal_2core_echo_test:**j}rn(j]j]j]j]j]ujjhj]roj%X%ex04_linux_baremetal_2core_echo_test:rprq}rr(jUjjlubajjubj%Xt AM65xx only. This is a ping/pong application where mpu1_0 is running Linux and the other core is baremetal (no OS).rsrt}ru(jXt AM65xx only. This is a ping/pong application where mpu1_0 is running Linux and the other core is baremetal (no OS).jjhubeubaubeubeubj)rv}rw(jUjjj jjjj}rx(j]j]j]j]ryUloading-remote-firmwarerzaj]r{hzaujKjhj]r|(j)r}}r~(jXLoading Remote Firmwarerjjvj jjj"j}r(j]j]j]j]j]ujKjhj]rj%XLoading Remote Firmwarerr}r(jjjj}ubaubjX)r}r(jX<Remote firmware can be loading using CCS or using uBoot SPL.rjjvj jjj\j}r(j]j]j]j]j]ujKjhj]rj%X<Remote firmware can be loading using CCS or using uBoot SPL.rr}r(jjjjubaubj`)r}r(jUjjvj jjjcj}r(jeU.j]j]j]jfUj]j]jgjhujKjhj]r(j)r}r(jX**Loading using CCS** : Sciclient module contains default system firmware and CCS script to load the system firmware. The load scripts should be modified to reflect the correct full-path of the script location. Once the script is updated, * start TI CCS 9.1 or newer * open CCS script console using menu **View --> Scripting Console** * Run the script using following command (example below is for J721E, use the appropriate one for your target) - loadJSFile("PDK_INSTALL_DIR/packages/ti/drv/sciclient/tools/ccsLoadDmsc/j721e/launch.js") .. image:: ../images/ipclld_LoadingSysFw_sciclient.png :height: 160 :width: 941 * Connect the cores - select the core - right-click and connect * Load the remote binaries - Menu **Run --> Load Program** * Run the cores. * After running the cores, the sample output should look something like below. .. image:: ../images/ipclld_Sample_output_mpu.png :height: 377 :width: 672 jjj jjj j}r(j]j]j]j]j]ujNjhj]r(jX)r}r(jX**Loading using CCS** :rjjj jjj\j}r(j]j]j]j]j]ujKj]r(j|)r}r(jX**Loading using CCS**j}r(j]j]j]j]j]ujjj]rj%XLoading using CCSrr}r(jUjjubajjubj%X :rr}r(jX :jjubeubj )r}r(jUj}r(j]j]j]j]j]ujjj]r(jX)r}r(jXSciclient module contains default system firmware and CCS script to load the system firmware. The load scripts should be modified to reflect the correct full-path of the script location. Once the script is updated,rjjj jjj\j}r(j]j]j]j]j]ujKj]rj%XSciclient module contains default system firmware and CCS script to load the system firmware. The load scripts should be modified to reflect the correct full-path of the script location. Once the script is updated,rr}r(jjjjubaubj)r}r(jUj}r(jX*j]j]j]j]j]ujjj]r(j)r}r(jXstart TI CCS 9.1 or newerrj}r(j]j]j]j]j]ujjj]rjX)r}r(jjjjj jjj\j}r(j]j]j]j]j]ujKj]rj%Xstart TI CCS 9.1 or newerrr}r(jjjjubaubajj ubj)r}r(jXAopen CCS script console using menu **View --> Scripting Console**r¤j}rä(j]j]j]j]j]ujjj]rĤjX)rŤ}rƤ(jj¤jjj jjj\j}rǤ(j]j]j]j]j]ujKj]rȤ(j%X#open CCS script console using menu rɤrʤ}rˤ(jX#open CCS script console using menu jjŤubj|)r̤}rͤ(jX**View --> Scripting Console**j}rΤ(j]j]j]j]j]ujjŤj]rϤj%XView --> Scripting ConsolerФrѤ}rҤ(jUjj̤ubajjubeubajj ubj)rӤ}rԤ(jX/Run the script using following command (example below is for J721E, use the appropriate one for your target) - loadJSFile("PDK_INSTALL_DIR/packages/ti/drv/sciclient/tools/ccsLoadDmsc/j721e/launch.js") .. image:: ../images/ipclld_LoadingSysFw_sciclient.png :height: 160 :width: 941j}rդ(j]j]j]j]j]ujjj]r֤(j )rפ}rؤ(jUj}r٤(j]j]j]j]j]ujjӤj]rڤj )rۤ}rܤ(jXRun the script using following command (example below is for J721E, use the appropriate one for your target) - loadJSFile("PDK_INSTALL_DIR/packages/ti/drv/sciclient/tools/ccsLoadDmsc/j721e/launch.js") jjפj jjj j}rݤ(j]j]j]j]j]ujKj]rޤ(j )rߤ}r(jXlRun the script using following command (example below is for J721E, use the appropriate one for your target)rjjۤj jjj j}r(j]j]j]j]j]ujKj]rj%XlRun the script using following command (example below is for J721E, use the appropriate one for your target)rr}r(jjjjߤubaubj )r}r(jUj}r(j]j]j]j]j]ujjۤj]rj)r}r(jUj}r(jX-j]j]j]j]j]ujjj]rj)r}r(jXZloadJSFile("PDK_INSTALL_DIR/packages/ti/drv/sciclient/tools/ccsLoadDmsc/j721e/launch.js") j}r(j]j]j]j]j]ujjj]rjX)r}r(jXYloadJSFile("PDK_INSTALL_DIR/packages/ti/drv/sciclient/tools/ccsLoadDmsc/j721e/launch.js")rjjj jjj\j}r(j]j]j]j]j]ujKj]rj%XYloadJSFile("PDK_INSTALL_DIR/packages/ti/drv/sciclient/tools/ccsLoadDmsc/j721e/launch.js")rr}r(jjjjubaubajj ubajjubajj ubeubajj ubj^)r}r(jXc.. image:: ../images/ipclld_LoadingSysFw_sciclient.png :height: 160 :width: 941j}r(j]UuriX0rtos/../images/ipclld_LoadingSysFw_sciclient.pngrj]j]UwidthX941j]jd}rU*jsj]UheightX160ujjӤj]jjaubejj ubj)r}r(jXAConnect the cores - select the core - right-click and connectj}r(j]j]j]j]j]ujjj]rj )r}r(jUj}r(j]j]j]j]j]ujjj]rj )r}r (jX=Connect the cores - select the core - right-click and connectjjj jjj j}r (j]j]j]j]j]ujKj]r (j )r }r (jXConnect the coresrjjj jjj j}r(j]j]j]j]j]ujKj]rj%XConnect the coresrr}r(jjjj ubaubj )r}r(jUj}r(j]j]j]j]j]ujjj]rj)r}r(jUj}r(jX-j]j]j]j]j]ujjj]r(j)r}r(jXselect the corerj}r(j]j]j]j]j]ujjj]r jX)r!}r"(jjjjj jjj\j}r#(j]j]j]j]j]ujKj]r$j%Xselect the corer%r&}r'(jjjj!ubaubajj ubj)r(}r)(jXright-click and connectr*j}r+(j]j]j]j]j]ujjj]r,jX)r-}r.(jj*jj(j jjj\j}r/(j]j]j]j]j]ujKj]r0j%Xright-click and connectr1r2}r3(jj*jj-ubaubajj ubejjubajj ubeubajj ubajj ubj)r4}r5(jX:Load the remote binaries - Menu **Run --> Load Program**j}r6(j]j]j]j]j]ujjj]r7j )r8}r9(jUj}r:(j]j]j]j]j]ujj4j]r;j )r<}r=(jX8Load the remote binaries - Menu **Run --> Load Program**jj8j jjj j}r>(j]j]j]j]j]ujKj]r?(j )r@}rA(jXLoad the remote binariesrBjj<j jjj j}rC(j]j]j]j]j]ujKj]rDj%XLoad the remote binariesrErF}rG(jjBjj@ubaubj )rH}rI(jUj}rJ(j]j]j]j]j]ujj<j]rKj)rL}rM(jUj}rN(jX-j]j]j]j]j]ujjHj]rOj)rP}rQ(jXMenu **Run --> Load Program**rRj}rS(j]j]j]j]j]ujjLj]rTjX)rU}rV(jjRjjPj jjj\j}rW(j]j]j]j]j]ujKj]rX(j%XMenu rYrZ}r[(jXMenu jjUubj|)r\}r](jX**Run --> Load Program**j}r^(j]j]j]j]j]ujjUj]r_j%XRun --> Load Programr`ra}rb(jUjj\ubajjubeubajj ubajjubajj ubeubajj ubajj ubj)rc}rd(jXRun the cores.rej}rf(j]j]j]j]j]ujjj]rgjX)rh}ri(jjejjcj jjj\j}rj(j]j]j]j]j]ujKj]rkj%XRun the cores.rlrm}rn(jjejjhubaubajj ubj)ro}rp(jXAfter running the cores, the sample output should look something like below. .. image:: ../images/ipclld_Sample_output_mpu.png :height: 377 :width: 672 j}rq(j]j]j]j]j]ujjj]rr(jX)rs}rt(jXLAfter running the cores, the sample output should look something like below.rujjoj jjj\j}rv(j]j]j]j]j]ujKj]rwj%XLAfter running the cores, the sample output should look something like below.rxry}rz(jjujjsubaubj^)r{}r|(jX`.. image:: ../images/ipclld_Sample_output_mpu.png :height: 377 :width: 672 j}r}(j]UuriX+rtos/../images/ipclld_Sample_output_mpu.pngr~j]j]UwidthX672j]jd}rU*j~sj]UheightX377ujjoj]jjaubejj ubejjubejj ubeubj)r}r(jX**Loading using SPL/uBoot** jjj jjj j}r(j]j]j]j]j]ujNjhj]rjX)r}r(jX**Loading using SPL/uBoot**rjjj jjj\j}r(j]j]j]j]j]ujKj]rj|)r}r(jjj}r(j]j]j]j]j]ujjj]rj%XLoading using SPL/uBootrr}r(jUjjubajjubaubaubeubj )r}r(jUjjvj Njj j}r(j]j]j]j]j]ujNjhj]r(jX)r}r(jXYRun following steps to configure remote firmware for SPL loading with HLOS running on MPUrjjj jjj\j}r(j]j]j]j]j]ujKj]rj%XYRun following steps to configure remote firmware for SPL loading with HLOS running on MPUrr}r(jjjjubaubj`)r}r(jUj}r(jeU)j]j]j]jfUj]j]jgjhujjj]r(j)r}r(jXBCopy the remote firmware to rootfs at /lib/firmware/pdk-ipc folderrj}r(j]j]j]j]j]ujjj]rjX)r}r(jjjjj jjj\j}r(j]j]j]j]j]ujKj]rj%XBCopy the remote firmware to rootfs at /lib/firmware/pdk-ipc folderrr}r(jjjjubaubajj ubj)r}r(jXcd /lib/firmwarerj}r(j]j]j]j]j]ujjj]rjX)r}r(jjjjj jjj\j}r(j]j]j]j]j]ujKj]rj%Xcd /lib/firmwarerr}r(jjjjubaubajj ubj)r}r(jX/Remove old soft link for remote cores * rm j7*j}r(j]j]j]j]j]ujjj]r(jX)r}r(jX%Remove old soft link for remote coresrjjj jjj\j}r(j]j]j]j]j]ujKj]rj%X%Remove old soft link for remote coresrr¥}rå(jjjjubaubj)rĥ}rť(jUj}rƥ(jX*j]j]j]j]j]ujjj]rǥj)rȥ}rɥ(jXrm j7*rʥj}r˥(j]j]j]j]j]ujjĥj]r̥jX)rͥ}rΥ(jjʥjjȥj jjj\j}rϥ(j]j]j]j]j]ujKj]rХj%Xrm j7*rѥrҥ}rӥ(jjʥjjͥubaubajj ubajjubejj ubj)rԥ}rե(jXCreate new soft links * ln -s /lib/firmware/pdk-ipc/ipc_echo_test_c66xdsp_1_release.xe66 j7-c66_0-fw * ln -s /lib/firmware/pdk-ipc/ipc_echo_test_c66xdsp_2_release.xe66 j7-c66_1-fw * ln -s /lib/firmware/pdk-ipc/ipc_echo_test_c7x_1_release.xe71 j7-c71_0-fw * ln -s /lib/firmware/pdk-ipc/ipc_echo_test_mcu2_0_release.xer5f j7-main-r5f0_0-fw * ln -s /lib/firmware/pdk-ipc/ipc_echo_test_mcu2_1_release.xer5f j7-main-r5f0_1-fw * ln -s /lib/firmware/pdk-ipc/ipc_echo_test_mcu3_0_release.xer5f j7-main-r5f1_0-fw * ln -s /lib/firmware/pdk-ipc/ipc_echo_test_mcu3_1_release.xer5f j7-main-r5f1_1-fw * ln -s /lib/firmware/pdk-ipc/ipc_echo_testb_mcu1_0_release.xer5f j7-mcu-r5f0_0-fw * ln -s /lib/firmware/pdk-ipc/ipc_echo_test_mcu1_1_release.xer5f j7-mcu-r5f0_1-fw j}r֥(j]j]j]j]j]ujjj]rץ(jX)rإ}r٥(jXCreate new soft linksrڥjjԥj jjj\j}rۥ(j]j]j]j]j]ujKj]rܥj%XCreate new soft linksrݥrޥ}rߥ(jjڥjjإubaubj)r}r(jUj}r(jX*j]j]j]j]j]ujjԥj]r(j)r}r(jXLln -s /lib/firmware/pdk-ipc/ipc_echo_test_c66xdsp_1_release.xe66 j7-c66_0-fwrj}r(j]j]j]j]j]ujjj]rjX)r}r(jjjjj jjj\j}r(j]j]j]j]j]ujKj]rj%XLln -s /lib/firmware/pdk-ipc/ipc_echo_test_c66xdsp_1_release.xe66 j7-c66_0-fwrr}r(jjjjubaubajj ubj)r}r(jXLln -s /lib/firmware/pdk-ipc/ipc_echo_test_c66xdsp_2_release.xe66 j7-c66_1-fwrj}r(j]j]j]j]j]ujjj]rjX)r}r(jjjjj jjj\j}r(j]j]j]j]j]ujKj]rj%XLln -s /lib/firmware/pdk-ipc/ipc_echo_test_c66xdsp_2_release.xe66 j7-c66_1-fwrr}r(jjjjubaubajj ubj)r}r(jXLln -s /lib/firmware/pdk-ipc/ipc_echo_test_c7x_1_release.xe71 j7-c71_0-fwrj}r(j]j]j]j]j]ujjj]rjX)r}r(jjjjj jjj\j}r(j]j]j]j]j]ujKj]rj%XLln -s /lib/firmware/pdk-ipc/ipc_echo_test_c7x_1_release.xe71 j7-c71_0-fwrr}r(jjjjubaubajj ubj)r}r (jXRln -s /lib/firmware/pdk-ipc/ipc_echo_test_mcu2_0_release.xer5f j7-main-r5f0_0-fwr j}r (j]j]j]j]j]ujjj]r jX)r }r(jj jjj jjj\j}r(j]j]j]j]j]ujKj]rj%XRln -s /lib/firmware/pdk-ipc/ipc_echo_test_mcu2_0_release.xer5f j7-main-r5f0_0-fwrr}r(jj jj ubaubajj ubj)r}r(jXRln -s /lib/firmware/pdk-ipc/ipc_echo_test_mcu2_1_release.xer5f j7-main-r5f0_1-fwrj}r(j]j]j]j]j]ujjj]rjX)r}r(jjjjj jjj\j}r(j]j]j]j]j]ujKj]rj%XRln -s /lib/firmware/pdk-ipc/ipc_echo_test_mcu2_1_release.xer5f j7-main-r5f0_1-fwrr}r(jjjjubaubajj ubj)r }r!(jXRln -s /lib/firmware/pdk-ipc/ipc_echo_test_mcu3_0_release.xer5f j7-main-r5f1_0-fwr"j}r#(j]j]j]j]j]ujjj]r$jX)r%}r&(jj"jj j jjj\j}r'(j]j]j]j]j]ujKj]r(j%XRln -s /lib/firmware/pdk-ipc/ipc_echo_test_mcu3_0_release.xer5f j7-main-r5f1_0-fwr)r*}r+(jj"jj%ubaubajj ubj)r,}r-(jXRln -s /lib/firmware/pdk-ipc/ipc_echo_test_mcu3_1_release.xer5f j7-main-r5f1_1-fwr.j}r/(j]j]j]j]j]ujjj]r0jX)r1}r2(jj.jj,j jjj\j}r3(j]j]j]j]j]ujKj]r4j%XRln -s /lib/firmware/pdk-ipc/ipc_echo_test_mcu3_1_release.xer5f j7-main-r5f1_1-fwr5r6}r7(jj.jj1ubaubajj ubj)r8}r9(jXQln -s /lib/firmware/pdk-ipc/ipc_echo_testb_mcu1_0_release.xer5f j7-mcu-r5f0_0-fwr:j}r;(j]j]j]j]j]ujjj]r<jX)r=}r>(jj:jj8j jjj\j}r?(j]j]j]j]j]ujKj]r@j%XQln -s /lib/firmware/pdk-ipc/ipc_echo_testb_mcu1_0_release.xer5f j7-mcu-r5f0_0-fwrArB}rC(jj:jj=ubaubajj ubj)rD}rE(jXRln -s /lib/firmware/pdk-ipc/ipc_echo_test_mcu1_1_release.xer5f j7-mcu-r5f0_1-fw j}rF(j]j]j]j]j]ujjj]rGjX)rH}rI(jXQln -s /lib/firmware/pdk-ipc/ipc_echo_test_mcu1_1_release.xer5f j7-mcu-r5f0_1-fwrJjjDj jjj\j}rK(j]j]j]j]j]ujKj]rLj%XQln -s /lib/firmware/pdk-ipc/ipc_echo_test_mcu1_1_release.xer5f j7-mcu-r5f0_1-fwrMrN}rO(jjJjjHubaubajj ubejjubejj ubj)rP}rQ(jX&sync : write the changes to filesystemrRj}rS(j]j]j]j]j]ujjj]rTjX)rU}rV(jjRjjPj jjj\j}rW(j]j]j]j]j]ujKj]rXj%X&sync : write the changes to filesystemrYrZ}r[(jjRjjUubaubajj ubj)r\}r](jXReboot the system j}r^(j]j]j]j]j]ujjj]r_jX)r`}ra(jXReboot the systemrbjj\j jjj\j}rc(j]j]j]j]j]ujKj]rdj%XReboot the systemrerf}rg(jjbjj`ubaubajj ubejjcubeubeubj)rh}ri(jUjjj jjjj}rj(j]j]j]j]rkUrunning-the-echo-testsrlaj]rmhaujKjhj]rn(j)ro}rp(jXRunning the Echo Testsrqjjhj jjj"j}rr(j]j]j]j]j]ujKjhj]rsj%XRunning the Echo Testsrtru}rv(jjqjjoubaubjX)rw}rx(jXIn this section ipc_echo_test is used to demonstrate, but same instructions apply to other examples that have Linux on MPU, though test output may be slightly different.ryjjhj jjj\j}rz(j]j]j]j]j]ujKjhj]r{j%XIn this section ipc_echo_test is used to demonstrate, but same instructions apply to other examples that have Linux on MPU, though test output may be slightly different.r|r}}r~(jjyjjwubaubj )r}r(jUjjhj jjj j}r(j]j]j]j]j]ujNjhj]r(j`)r}r(jUj}r(jeU)j]j]j]jfUj]j]jgjhujjj]r(j)r}r(jX Login as rootrj}r(j]j]j]j]j]ujjj]rjX)r}r(jjjjj jjj\j}r(j]j]j]j]j]ujKj]rj%X Login as rootrr}r(jjjjubaubajj ubj)r}r(jXStart sample app as below - modprobe rpmsg_client_sample count=5 .. image:: ../images/ipclld_Linux_Start.png :height: 270 :width: 581 j}r(j]j]j]j]j]ujjj]r(jX)r}r(jXStart sample app as belowrjjj jjj\j}r(j]j]j]j]j]ujKj]rj%XStart sample app as belowrr}r(jjjjubaubj)r}r(jUj}r(jX-j]j]j]j]j]ujjj]rj)r}r(jX%modprobe rpmsg_client_sample count=5 j}r(j]j]j]j]j]ujjj]rjX)r}r(jX$modprobe rpmsg_client_sample count=5rjjj jjj\j}r(j]j]j]j]j]ujKj]rj%X$modprobe rpmsg_client_sample count=5rr}r(jjjjubaubajj ubajjubj^)r}r(jX[.. image:: ../images/ipclld_Linux_Start.png :height: 270 :width: 581 j}r(j]UuriX%rtos/../images/ipclld_Linux_Start.pngrj]j]UwidthX581j]jd}rU*jsj]UheightX270ujjj]jjaubejj ubejjcubj )r}r(jUj}r(j]j]j]j]j]ujjj]r(j`)r}r(jUj}r(jeU)jKj]j]j]jfUj]j]jgjhujjj]rj)r}r(jX@After running the sample app, it should display something below j}r(j]j]j]j]j]ujjj]rjX)r}r(jX?After running the sample app, it should display something belowr¦jjj jjj\j}ræ(j]j]j]j]j]ujKj]rĦj%X?After running the sample app, it should display something belowrŦrƦ}rǦ(jj¦jjubaubajj ubajjcubj )rȦ}rɦ(jUj}rʦ(j]j]j]j]j]ujjj]r˦j^)r̦}rͦ(jXc.. image:: ../images/ipclld_linux_output.png :height: 796px :width: 983px j}rΦ(j]UuriX&rtos/../images/ipclld_linux_output.pngrϦj]j]UwidthX983pxj]jd}rЦU*jϦsj]UheightX796pxujjȦj]jjaubajj ubejj ubeubeubeubj)rѦ}rҦ(jUjKjjuj jjjj}rӦ(j]j]j]j]rԦUipclld-design-detailsrզaj]r֦haujKjhj]rצ(j)rئ}r٦(jXIPCLLD Design DetailsrڦjjѦj jjj"j}rۦ(j]j]j]j]j]ujKjhj]rܦj%XIPCLLD Design Detailsrݦrަ}rߦ(jjڦjjئubaubj)r}r(jUjjѦj jjjj}r(jX-j]j]j]j]j]ujKjhj]rj)r}r(jX|Ring Buffer is used as shared memory to transfer the data. It must be reserved system wide. The base-address and size of ring Buffer must be provided to IPCLLD. It must be same for all core applications. The invidual memory-range for Ring Buffer between core combinations are calculated internally inside the library. The default base-address and size used in the IPC examples is jjj jjj j}r(j]j]j]j]j]ujNjhj]rjX)r}r(jX{Ring Buffer is used as shared memory to transfer the data. It must be reserved system wide. The base-address and size of ring Buffer must be provided to IPCLLD. It must be same for all core applications. The invidual memory-range for Ring Buffer between core combinations are calculated internally inside the library. The default base-address and size used in the IPC examples isrjjj jjj\j}r(j]j]j]j]j]ujKj]rj%X{Ring Buffer is used as shared memory to transfer the data. It must be reserved system wide. The base-address and size of ring Buffer must be provided to IPCLLD. It must be same for all core applications. The invidual memory-range for Ring Buffer between core combinations are calculated internally inside the library. The default base-address and size used in the IPC examples isrr}r(jjjjubaubaubaubj)r}r(jUjjѦj jjjj}r(j]j]j]j]j]ujNjhj]rj)r}r(jUj}r(j]j]j]j]j]UcolsKujjj]r(j)r}r(jUj}r(j]j]j]j]j]UcolwidthKujjj]jjubj)r}r(jUj}r(j]j]j]j]j]UcolwidthK ujjj]jjubj)r}r(jUj}r(j]j]j]j]j]UcolwidthK ujjj]jjubj)r}r(jUj}r(j]j]j]j]j]ujjj]rj)r}r(jUj}r(j]j]j]j]j]ujjj]r(j)r }r (jUj}r (j]j]j]j]j]ujjj]r jX)r }r(jXDevicerjj j jjj\j}r(j]j]j]j]j]ujKj]rj%XDevicerr}r(jjjj ubaubajjubj)r}r(jUj}r(j]j]j]j]j]ujjj]rjX)r}r(jX Base Addressrjjj jjj\j}r(j]j]j]j]j]ujKj]rj%X Base Addressrr}r (jjjjubaubajjubj)r!}r"(jUj}r#(j]j]j]j]j]ujjj]r$jX)r%}r&(jXSizer'jj!j jjj\j}r((j]j]j]j]j]ujKj]r)j%XSizer*r+}r,(jj'jj%ubaubajjubejjubajjubj)r-}r.(jUj}r/(j]j]j]j]j]ujjj]r0(j)r1}r2(jUj}r3(j]j]j]j]j]ujj-j]r4(j)r5}r6(jUj}r7(j]j]j]j]j]ujj1j]r8jX)r9}r:(jXJ721Er;jj5j jjj\j}r<(j]j]j]j]j]ujKj]r=j%XJ721Er>r?}r@(jj;jj9ubaubajjubj)rA}rB(jUj}rC(j]j]j]j]j]ujj1j]rDjX)rE}rF(jX 0xAA000000rGjjAj jjj\j}rH(j]j]j]j]j]ujKj]rIj%X 0xAA000000rJrK}rL(jjGjjEubaubajjubj)rM}rN(jUj}rO(j]j]j]j]j]ujj1j]rPjX)rQ}rR(jX 0x1C00000rSjjMj jjj\j}rT(j]j]j]j]j]ujKj]rUj%X 0x1C00000rVrW}rX(jjSjjQubaubajjubejjubj)rY}rZ(jUj}r[(j]j]j]j]j]ujj-j]r\(j)r]}r^(jUj}r_(j]j]j]j]j]ujjYj]r`jX)ra}rb(jXAM65XXrcjj]j jjj\j}rd(j]j]j]j]j]ujKj]rej%XAM65XXrfrg}rh(jjcjjaubaubajjubj)ri}rj(jUj}rk(j]j]j]j]j]ujjYj]rljX)rm}rn(jX 0xA2000000rojjij jjj\j}rp(j]j]j]j]j]ujKj]rqj%X 0xA2000000rrrs}rt(jjojjmubaubajjubj)ru}rv(jUj}rw(j]j]j]j]j]ujjYj]rxjX)ry}rz(jX0x200000r{jjuj jjj\j}r|(j]j]j]j]j]ujKj]r}j%X0x200000r~r}r(jj{jjyubaubajjubejjubejjubejjubaubjX)r}r(jXThe VRing base address and size is passed from the application during the Ipc_initVirtIO() call. See `Writing HelloWorld App using IPCLLD`_ for the example of usage.rjjѦj jjj\j}r(j]j]j]j]j]ujKjhj]r(j%XeThe VRing base address and size is passed from the application during the Ipc_initVirtIO() call. See rr}r(jXeThe VRing base address and size is passed from the application during the Ipc_initVirtIO() call. See jjubj)r}r(jX&`Writing HelloWorld App using IPCLLD`_jqKjjjjj}r(UnameX#Writing HelloWorld App using IPCLLDj]j]j]j]j]jOU#writing-helloworld-app-using-ipclldruj]rj%X#Writing HelloWorld App using IPCLLDrr}r(jUjjubaubj%X for the example of usage.rr}r(jX for the example of usage.jjubeubjX)r}r(jXAdditionally the Ring Buffer memory used when communicating with MPU running Linux must be reserved system wide. The base-address and size of the ring buffer is different from what is used between cores not running Linux. The base-address and size of the ring Buffer is provided to IPCLLD when Linux updates the core's resource table with the allocated addresses. Linux allocates the base-address from the first memory-region. See `Resource Table`_ for more information.rjjѦj jjj\j}r(j]j]j]j]j]ujKjhj]r(j%XAdditionally the Ring Buffer memory used when communicating with MPU running Linux must be reserved system wide. The base-address and size of the ring buffer is different from what is used between cores not running Linux. The base-address and size of the ring Buffer is provided to IPCLLD when Linux updates the core's resource table with the allocated addresses. Linux allocates the base-address from the first memory-region. See rr}r(jXAdditionally the Ring Buffer memory used when communicating with MPU running Linux must be reserved system wide. The base-address and size of the ring buffer is different from what is used between cores not running Linux. The base-address and size of the ring Buffer is provided to IPCLLD when Linux updates the core's resource table with the allocated addresses. Linux allocates the base-address from the first memory-region. See jjubj)r}r(jX`Resource Table`_jqKjjjjj}r(UnameXResource Tablej]j]j]j]j]jOUresource-tableruj]rj%XResource Tablerr}r(jUjjubaubj%X for more information.rr}r(jX for more information.jjubeubj)r}r(jUjjѦj jjjj}r(jX-j]j]j]j]j]ujKjhj]r(j)r}r(jXFor each RPmessage object, the memory must be provided to library from local heap. All subsequent send/recv API is using rpmessage buffer provided during the create function.rjjj jjj j}r(j]j]j]j]j]ujNjhj]rjX)r}r(jjjjj jjj\j}r(j]j]j]j]j]ujKj]rj%XFor each RPmessage object, the memory must be provided to library from local heap. All subsequent send/recv API is using rpmessage buffer provided during the create function.rr}r(jjjjubaubaubj)r}r(jXRPMessage can transfer maximum of 512 bytes of data. For larger data transfers, it is recommended to pass a pointer/handle/offset to a larger shared memory buffer inside the message data.rjjj jjj j}r(j]j]j]j]j]ujNjhj]rjX)r}r(jjjjj jjj\j}r(j]j]j]j]j]ujKj]rj%XRPMessage can transfer maximum of 512 bytes of data. For larger data transfers, it is recommended to pass a pointer/handle/offset to a larger shared memory buffer inside the message data.rr}r§(jjjjubaubaubj)rç}rħ(jXFor firmware that will communicate with Linux over IPC, a Resource Table is required. See `Resource Table`_ for more information. jjj jjj j}rŧ(j]j]j]j]j]ujNjhj]rƧjX)rǧ}rȧ(jXFor firmware that will communicate with Linux over IPC, a Resource Table is required. See `Resource Table`_ for more information.jjçj jjj\j}rɧ(j]j]j]j]j]ujKj]rʧ(j%XZFor firmware that will communicate with Linux over IPC, a Resource Table is required. See r˧ŗ}rͧ(jXZFor firmware that will communicate with Linux over IPC, a Resource Table is required. See jjǧubj)rΧ}rϧ(jX`Resource Table`_jqKjjǧjjj}rЧ(UnameXResource Tablej]j]j]j]j]jOjuj]rѧj%XResource Tablerҧrӧ}rԧ(jUjjΧubaubj%X for more information.rէr֧}rק(jX for more information.jjǧubeubaubeubj)rا}r٧(jUjjѦj jjjj}rڧ(j]j]j]j]rۧU;typical-data-flow-in-ipclld-communication-between-two-coresrܧaj]rݧh*aujMjhj]rާ(j)rߧ}r(jX;Typical Data-Flow in IPCLLD communication between two coresrjjاj jjj"j}r(j]j]j]j]j]ujMjhj]rj%X;Typical Data-Flow in IPCLLD communication between two coresrr}r(jjjjߧubaubjX)r}r(jX\Following picture illustrates the data flow between two cores using mailbox IP as transport.rjjاj jjj\j}r(j]j]j]j]j]ujMjhj]rj%X\Following picture illustrates the data flow between two cores using mailbox IP as transport.rr}r(jjjjubaubj^)r}r(jXc.. image:: ../images/ipclld_data_flow.png :height: 470 :width: 687 jjاj jjjaj}r(j]UuriX#rtos/../images/ipclld_data_flow.pngrj]j]UwidthX687j]jd}rU*jsj]UheightX470ujNjhj]ubeubj)r}r(jUjKjjѦj jjjj}r(j]j]j]j]rjaj]rhaujM jhj]r(j)r}r(jXResource Tablerjjj jjj"j}r(j]j]j]j]j]ujM jhj]rj%XResource Tablerr}r(jjjjubaubjX)r}r(jXFor applications that will use Linux IPC, a resource table is required. Example resource tables can be found in the IPC examples:rjjj jjj\j}r(j]j]j]j]j]ujM jhj]rj%XFor applications that will use Linux IPC, a resource table is required. Example resource tables can be found in the IPC examples:rr}r (jjjjubaubj)r }r (jUjjj jjjj}r (j]j]j]j]j]ujNjhj]r j)r}r(jUj}r(j]j]j]j]j]UcolsKujj j]r(j)r}r(jUj}r(j]j]j]j]j]UcolwidthKujjj]jjubj)r}r(jUj}r(j]j]j]j]j]UcolwidthK)ujjj]jjubj)r}r(jUj}r(j]j]j]j]j]ujjj]rj)r}r(jUj}r(j]j]j]j]j]ujjj]r(j)r }r!(jUj}r"(j]j]j]j]j]ujjj]r#jX)r$}r%(jXDevicer&jj j jjj\j}r'(j]j]j]j]j]ujM j]r(j%XDevicer)r*}r+(jj&jj$ubaubajjubj)r,}r-(jUj}r.(j]j]j]j]j]ujjj]r/jX)r0}r1(jXResource Table Example Locationr2jj,j jjj\j}r3(j]j]j]j]j]ujM j]r4j%XResource Table Example Locationr5r6}r7(jj2jj0ubaubajjubejjubajjubj)r8}r9(jUj}r:(j]j]j]j]j]ujjj]r;(j)r<}r=(jUj}r>(j]j]j]j]j]ujj8j]r?(j)r@}rA(jUj}rB(j]j]j]j]j]ujj<j]rCjX)rD}rE(jXJ721ErFjj@j jjj\j}rG(j]j]j]j]j]ujMj]rHj%XJ721ErIrJ}rK(jjFjjDubaubajjubj)rL}rM(jUj}rN(j]j]j]j]j]ujj<j]rOjX)rP}rQ(jX"examples/common/src/ipc_rsctable.hrRjjLj jjj\j}rS(j]j]j]j]j]ujMj]rTj%X"examples/common/src/ipc_rsctable.hrUrV}rW(jjRjjPubaubajjubejjubj)rX}rY(jUj}rZ(j]j]j]j]j]ujj8j]r[(j)r\}r](jUj}r^(j]j]j]j]j]ujjXj]r_jX)r`}ra(jXAM65XXrbjj\j jjj\j}rc(j]j]j]j]j]ujMj]rdj%XAM65XXrerf}rg(jjbjj`ubaubajjubj)rh}ri(jUj}rj(j]j]j]j]j]ujjXj]rkjX)rl}rm(jX)examples/common/src/ipc_am65xx_rsctable.hrnjjhj jjj\j}ro(j]j]j]j]j]ujMj]rpj%X)examples/common/src/ipc_am65xx_rsctable.hrqrr}rs(jjnjjlubaubajjubejjubejjubejjubaubjX)rt}ru(jXThe resource table must have at least one entry, the VDEV entry, to define the the vrings used for IPC communication with Linux. Optionally, the resource table can also have a TRACE entry which defines the location of the remote core trace buffer.rvjjj jjj\j}rw(j]j]j]j]j]ujMjhj]rxj%XThe resource table must have at least one entry, the VDEV entry, to define the the vrings used for IPC communication with Linux. Optionally, the resource table can also have a TRACE entry which defines the location of the remote core trace buffer.ryrz}r{(jjvjjtubaubjX)r|}r}(jX(The VDEV entry specifies the address as RPMSG_VRING_ADDR_ANY, meaning that the address will be allocated by the Linux driver during loading. The allocation is made from the first memory-region specified in the dts file for the remote core. For example, if the dts entry for mcu_r5fss0_core0 is ::r~jjj jjj\j}r(j]j]j]j]j]ujMjhj]rj%X%The VDEV entry specifies the address as RPMSG_VRING_ADDR_ANY, meaning that the address will be allocated by the Linux driver during loading. The allocation is made from the first memory-region specified in the dts file for the remote core. For example, if the dts entry for mcu_r5fss0_core0 isrr}r(jX%The VDEV entry specifies the address as RPMSG_VRING_ADDR_ANY, meaning that the address will be allocated by the Linux driver during loading. The allocation is made from the first memory-region specified in the dts file for the remote core. For example, if the dts entry for mcu_r5fss0_core0 isjj|ubaubj#)r}r(jXreserved_memory: reserved-memory { #address-cells = <2>; #size-cells = <2>; ranges; mcu_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 { compatible = "shared-dma-pool"; reg = <0 0xa0000000 0 0x100000>; no-map; }; mcu_r5fss0_core0_memory_region: r5f-memory@a0100000 { compatible = "shared-dma-pool"; reg = <0 0xa0100000 0 0xf00000>; no-map; }; }jjj jjj&j}r(j2j3j]j]j]j]j]ujM jhj]rj%Xreserved_memory: reserved-memory { #address-cells = <2>; #size-cells = <2>; ranges; mcu_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 { compatible = "shared-dma-pool"; reg = <0 0xa0000000 0 0x100000>; no-map; }; mcu_r5fss0_core0_memory_region: r5f-memory@a0100000 { compatible = "shared-dma-pool"; reg = <0 0xa0100000 0 0xf00000>; no-map; }; }rr}r(jUjjubaubjX)r}r(jXGthen the allocation for the vrings will come from the 0xa0000000 entry.rjjj jjj\j}r(j]j]j]j]j]ujM*jhj]rj%XGthen the allocation for the vrings will come from the 0xa0000000 entry.rr}r(jjjjubaubeubj)r}r(jUjjѦj jjjj}r(j]j]j]j]rUmemory-considerationsraj]rhaujM-jhj]r(j)r}r(jXMemory Considerationsrjjj jjj"j}r(j]j]j]j]j]ujM-jhj]rj%XMemory Considerationsrr}r(jjjjubaubjX)r}r(jX3As mentioned in `IPCLLD Design Details`_, the Ring Buffer memory must be reserved system-wide. In addition, the Ring Buffer memory should be configured as non-cached on all cores using IPCLLD. For examples of configurations for Ring Buffer memory, refer to the examples in pdk/packages/ti/drv/ipc/examples/.rjjj jjj\j}r(j]j]j]j]j]ujM.jhj]r(j%XAs mentioned in rr}r(jXAs mentioned in jjubj)r}r(jX`IPCLLD Design Details`_jqKjjjjj}r(UnameXIPCLLD Design Detailsj]j]j]j]j]jOjզuj]rj%XIPCLLD Design Detailsrr}r(jUjjubaubj%X , the Ring Buffer memory must be reserved system-wide. In addition, the Ring Buffer memory should be configured as non-cached on all cores using IPCLLD. For examples of configurations for Ring Buffer memory, refer to the examples in pdk/packages/ti/drv/ipc/examples/.rr}r(jX , the Ring Buffer memory must be reserved system-wide. In addition, the Ring Buffer memory should be configured as non-cached on all cores using IPCLLD. For examples of configurations for Ring Buffer memory, refer to the examples in pdk/packages/ti/drv/ipc/examples/.jjubeubeubeubj)r}r(jUjKjjuj jjjj}r(j]j]j]j]rjaj]rhaujM1jhj]r(j)r}r(jX#Writing HelloWorld App using IPCLLDrjjj jjj"j}r(j]j]j]j]j]ujM1jhj]rj%X#Writing HelloWorld App using IPCLLDrr}r(jjjjubaubj)r¨}rè(jUjjj jjjj}rĨ(jX-j]j]j]j]j]ujM2jhj]rŨ(j)rƨ}rǨ(jX**Step1: Initialize MultiProc with SelfId, and how many remote cores** :: Ipc_mpSetConfig(selfProcId, numProc, remoteProc); jj¨j jjj j}rȨ(j]j]j]j]j]ujNjhj]rɨ(jX)rʨ}r˨(jXI**Step1: Initialize MultiProc with SelfId, and how many remote cores** ::jjƨj jjj\j}r̨(j]j]j]j]j]ujM2j]rͨj|)rΨ}rϨ(jXF**Step1: Initialize MultiProc with SelfId, and how many remote cores**j}rШ(j]j]j]j]j]ujjʨj]rѨj%XBStep1: Initialize MultiProc with SelfId, and how many remote coresrҨrӨ}rԨ(jUjjΨubajjubaubj#)rը}r֨(jX1Ipc_mpSetConfig(selfProcId, numProc, remoteProc);jjƨjj&j}rר(j2j3j]j]j]j]j]ujM!j]rبj%X1Ipc_mpSetConfig(selfProcId, numProc, remoteProc);r٨rڨ}rۨ(jUjjըubaubeubj)rܨ}rݨ(jX**Step2: Load the Resource Table (required only if running Linux on A72/A53)** :: Ipc_loadResourceTable((void*)&ti_ipc_remoteproc_ResourceTable); jj¨j jjj j}rި(j]j]j]j]j]ujNjhj]rߨ(jX)r}r(jXQ**Step2: Load the Resource Table (required only if running Linux on A72/A53)** ::jjܨj jjj\j}r(j]j]j]j]j]ujM6j]rj|)r}r(jXN**Step2: Load the Resource Table (required only if running Linux on A72/A53)**j}r(j]j]j]j]j]ujjj]rj%XJStep2: Load the Resource Table (required only if running Linux on A72/A53)rr}r(jUjjubajjubaubj#)r}r(jX?Ipc_loadResourceTable((void*)&ti_ipc_remoteproc_ResourceTable);jjܨjj&j}r(j2j3j]j]j]j]j]ujM!j]rj%X?Ipc_loadResourceTable((void*)&ti_ipc_remoteproc_ResourceTable);rr}r(jUjjubaubeubeubjX)r}r(jX8See `Resource Table`_ for details on the resource table.rjjj jjj\j}r(j]j]j]j]j]ujM:jhj]r(j%XSee rr}r(jXSee jjubj)r}r(jX`Resource Table`_jqKjjjjj}r(UnameXResource Tablej]j]j]j]j]jOjuj]rj%XResource Tablerr}r(jUjjubaubj%X# for details on the resource table.rr}r(jX# for details on the resource table.jjubeubj)r}r(jUjjj jjjj}r(jX-j]j]j]j]j]ujM<jhj]r(j)r}r (jXS**Step3: Initialize VirtIO (note: Base Address for Shared Memory used for RingBuffer)** :: vqParam.vqObjBaseAddr = (void*)sysVqBuf; vqParam.vqBufSize = numProc * Ipc_getVqObjMemoryRequiredPerCore(); vqParam.vringBaseAddr = (void*)VRING_BASE_ADDRESS; vqParam.vringBufSize = VRING_BUFFER_SIZE; Ipc_initVirtIO(&vqParam); jjj jjj j}r (j]j]j]j]j]ujNjhj]r (jX)r }r (jXZ**Step3: Initialize VirtIO (note: Base Address for Shared Memory used for RingBuffer)** ::jjj jjj\j}r(j]j]j]j]j]ujM<j]rj|)r}r(jXW**Step3: Initialize VirtIO (note: Base Address for Shared Memory used for RingBuffer)**j}r(j]j]j]j]j]ujj j]rj%XSStep3: Initialize VirtIO (note: Base Address for Shared Memory used for RingBuffer)rr}r(jUjjubajjubaubj#)r}r(jXvqParam.vqObjBaseAddr = (void*)sysVqBuf; vqParam.vqBufSize = numProc * Ipc_getVqObjMemoryRequiredPerCore(); vqParam.vringBaseAddr = (void*)VRING_BASE_ADDRESS; vqParam.vringBufSize = VRING_BUFFER_SIZE; Ipc_initVirtIO(&vqParam);jjjj&j}r(j2j3j]j]j]j]j]ujM!j]rj%XvqParam.vqObjBaseAddr = (void*)sysVqBuf; vqParam.vqBufSize = numProc * Ipc_getVqObjMemoryRequiredPerCore(); vqParam.vringBaseAddr = (void*)VRING_BASE_ADDRESS; vqParam.vringBufSize = VRING_BUFFER_SIZE; Ipc_initVirtIO(&vqParam);rr}r(jUjjubaubeubj)r}r(jXD**Step4: Initialize RPMessage** :: RPMessage_init(&cntrlParam); jjj jjj j}r (j]j]j]j]j]ujNjhj]r!(jX)r"}r#(jX"**Step4: Initialize RPMessage** ::jjj jjj\j}r$(j]j]j]j]j]ujMDj]r%j|)r&}r'(jX**Step4: Initialize RPMessage**j}r((j]j]j]j]j]ujj"j]r)j%XStep4: Initialize RPMessager*r+}r,(jUjj&ubajjubaubj#)r-}r.(jXRPMessage_init(&cntrlParam);jjjj&j}r/(j2j3j]j]j]j]j]ujM!j]r0j%XRPMessage_init(&cntrlParam);r1r2}r3(jUjj-ubaubeubj)r4}r5(jX`**Step5: Send Message** :: RPMessage_send(handle, dstProc, ENDPT1, myEndPt, (Ptr)buf, len); jjj jjj j}r6(j]j]j]j]j]ujNjhj]r7(jX)r8}r9(jX**Step5: Send Message** ::jj4j jjj\j}r:(j]j]j]j]j]ujMHj]r;j|)r<}r=(jX**Step5: Send Message**j}r>(j]j]j]j]j]ujj8j]r?j%XStep5: Send Messager@rA}rB(jUjj<ubajjubaubj#)rC}rD(jX@RPMessage_send(handle, dstProc, ENDPT1, myEndPt, (Ptr)buf, len);jj4jj&j}rE(j2j3j]j]j]j]j]ujM!j]rFj%X@RPMessage_send(handle, dstProc, ENDPT1, myEndPt, (Ptr)buf, len);rGrH}rI(jUjjCubaubeubj)rJ}rK(jXr**Step6: Receive Message** :: RPMessage_recv(handle, (Ptr)buf, &len, &remoteEndPt, &remoteProcId, timeout); jjj XVinternal padding after source/rtos/PDK_Platform_Software/Device_Drivers/IPCLLD.rst.incrLjj j}rM(j]j]j]j]j]ujNjhj]rN(jX)rO}rP(jX**Step6: Receive Message** ::jjJj jjj\j}rQ(j]j]j]j]j]ujMLj]rRj|)rS}rT(jX**Step6: Receive Message**j}rU(j]j]j]j]j]ujjOj]rVj%XStep6: Receive MessagerWrX}rY(jUjjSubajjubaubj#)rZ}r[(jXMRPMessage_recv(handle, (Ptr)buf, &len, &remoteEndPt, &remoteProcId, timeout);jjJjj&j}r\(j2j3j]j]j]j]j]ujM!j]r]j%XMRPMessage_recv(handle, (Ptr)buf, &len, &remoteEndPt, &remoteProcId, timeout);r^r_}r`(jUjjZubaubeubeubeubeubj jjjj}ra(j]rbXoverviewrcaj]j]j]rdUid254reaj]ujKjhj]rf(j)rg}rh(jXOverviewrijjsj jjj"j}rj(j]j]j]j]j]ujKjhj]rkj%XOverviewrlrm}rn(jjijjgubaubjX)ro}rp(jXTI Jacinto7/AM65XX family of devices consists of many cores - ARM53/72, R5Fs (MCU or Main Domain) and/or DSPs (C66x / C7x). The actual cores vary with actual device. Refer to the datasheet of the device for the actual cores present on SoC. Inter-Processor Communication (IPC) provides a communication channel between various cores. IPCLLD is the low-level driver for IPC, which provides a core-agnostic and OS-agnostic framework for communication.rqjjsj jjj\j}rr(j]j]j]j]j]ujKjhj]rsj%XTI Jacinto7/AM65XX family of devices consists of many cores - ARM53/72, R5Fs (MCU or Main Domain) and/or DSPs (C66x / C7x). The actual cores vary with actual device. Refer to the datasheet of the device for the actual cores present on SoC. Inter-Processor Communication (IPC) provides a communication channel between various cores. IPCLLD is the low-level driver for IPC, which provides a core-agnostic and OS-agnostic framework for communication.rtru}rv(jjqjjoubaubjX)rw}rx(jXMore information regarding the `TI multicore processors `_ is available .ryjjsj jjj\j}rz(j]j]j]j]j]ujK jhj]r{(j%XMore information regarding the r|r}}r~(jXMore information regarding the jjwubj)r}r(jX]`TI multicore processors `_j}r(UnameXTI multicore processorsjX@http://www.ti.com/processors/automotive-processors/overview.htmlrj]j]j]j]j]ujjwj]rj%XTI multicore processorsrr}r(jUjjubajjubj)r}r(jXC jKjjwjjj}r(Urefurijj]rUti-multicore-processorsraj]j]j]j]rhauj]ubj%X is available .rr}r(jX is available .jjwubeubeubj jjj?j}r(j]UlevelKj]j]rjeaUsourcejj]j]UlineKUtypejAujKjhj]rjX)r}r(jX+Duplicate implicit target name: "overview".j}r(j]j]j]j]j]ujjqj]rj%X+Duplicate implicit target name: "overview".rr}r(jUjjubajj\ubaubh)r}r(jUjjj jjj?j}r(j]UlevelKj]j]rjaUsourcejj]j]UlineK UtypejAujK jhj]rjX)r}r(jX9Duplicate implicit target name: "terms and abbreviation".j}r(j]j]j]j]j]ujjj]rj%X9Duplicate implicit target name: "terms and abbreviation".rr}r(jUjjubajj\ubaubh)r}r(jUj}r(j]UlevelKj]j]Usourcej j]j]UlineKUtypejAujjj]rjX)r}r(jX:Enumerated list start value not ordinal-1: "3" (ordinal 3)j}r(j]j]j]j]j]ujjj]rj%X:Enumerated list start value not ordinal-1: "3" (ordinal 3)rr}r(jUjjubajj\ubajj?ubh)r}r(jUjj)r}r(jUjKjj)r}r(jUjhj j jjj}r(j]j]j]j]rU vps-driversraj]rhaujKjhj]r(j)r}r(jX VPS Driversrjjj j jj"j}r(j]j]j]j]j]ujKjhj]rj%X VPS Driversrr©}ré(jjjjubaubj))rĩ}rũ(jXFhttp://processors.wiki.ti.com/index.php/Processor_SDK_RTOS_VPS_DRIVERSjjj j,XDsource/rtos/PDK_Platform_Software/Device_Drivers/VPS_Drivers.rst.incrƩrǩ}rȩbjj0j}rɩ(j2j3j]j]j]j]j]ujKjhj]rʩj%XFhttp://processors.wiki.ti.com/index.php/Processor_SDK_RTOS_VPS_DRIVERSr˩r̩}rͩ(jUjjĩubaubjj)rΩ}rϩ(jUjKjjj jǩjjj}rЩ(j]rѩXuser interfacerҩaj]j]j]rөUid258rԩaj]ujKjhj]rթ(j)r֩}rש(jXUser InterfacerةjjΩj jǩjj"j}r٩(j]j]j]j]j]ujKjhj]rکj%XUser Interfacer۩rܩ}rݩ(jjةjj֩ubaubj)rީ}rߩ(jUjKjjΩj jǩjjj}r(j]rXdriver configurationraj]j]j]rUid259raj]ujKjhj]r(j)r}r(jXDriver Configurationrjjީj jǩjj"j}r(j]j]j]j]j]ujKjhj]rj%XDriver Configurationrr}r(jjjjubaubjb)r}r(jX **Board Specific Configuration**rjKjjީj jǩjjfj}r(j]rUid260raj]j]rXboard-specific-configurationraj]j]ujNjhj]rj|)r}r(jjj}r(j]j]j]j]j]ujjj]rj%XBoard Specific Configurationrr}r(jUjjubajjubaubjX)r}r(jXAll board specific configurations eg:enabling clock and pin-mux for UART/display/vip pins are required before calling any driver APIs. The board specific configurations are implemented under /ti/drv/vps/src/boards/src folder.rjjީj jǩjj\j}r(j]j]j]j]j]ujK"jhj]rj%XAll board specific configurations eg:enabling clock and pin-mux for UART/display/vip pins are required before calling any driver APIs. The board specific configurations are implemented under /ti/drv/vps/src/boards/src folder.rr}r(jjjjubaubjb)r}r(jX**VPS Configuration Structure**rjjީj jǩjjfj}r (j]r Uvps-configuration-structurer aj]j]j]j]r haujNjhj]r j|)r}r(jjj}r(j]j]j]j]j]ujjj]rj%XVPS Configuration Structurerr}r(jUjjubajjubaubjX)r}r(jXFor details about individual fields of VPS library structure, see the Doxygen help by opening PDK_INSTALL_DIR\\packages\\ti\\drv\\vps\\docs\\doxygen\\html\\index.html.jjީj jǩjj\j}r(j]j]j]j]j]ujK*jhj]rj%XFor details about individual fields of VPS library structure, see the Doxygen help by opening PDK_INSTALL_DIR\packages\ti\drv\vps\docs\doxygen\html\index.html.rr}r(jXFor details about individual fields of VPS library structure, see the Doxygen help by opening PDK_INSTALL_DIR\\packages\\ti\\drv\\vps\\docs\\doxygen\\html\\index.html.jjubaubeubj)r}r(jUjKjjΩj jǩjjj}r(j]rXapisr aj]j]j]r!Uid261r"aj]ujK/jhj]r#(j)r$}r%(jXAPIsr&jjj jǩjj"j}r'(j]j]j]j]j]ujK/jhj]r(j%XAPIsr)r*}r+(jj&jj$ubaubjX)r,}r-(jXGThe VPS driver API can be broadly divided into the following categoriesr.jjj jǩjj\j}r/(j]j]j]j]j]ujK1jhj]r0j%XGThe VPS driver API can be broadly divided into the following categoriesr1r2}r3(jj.jj,ubaubj)r4}r5(jUjjj jǩjjj}r6(jX-j]j]j]j]j]ujK3jhj]r7(j)r8}r9(jXIFVID2 API - API used to create, control and use the different VPS driversjj4j jǩjj j}r:(j]j]j]j]j]ujNjhj]r;jX)r<}r=(jXIFVID2 API - API used to create, control and use the different VPS driversr>jj8j jǩjj\j}r?(j]j]j]j]j]ujK3j]r@j%XIFVID2 API - API used to create, control and use the different VPS driversrArB}rC(jj>jj<ubaubaubj)rD}rE(jXAVPS (Video Processing Sub-system) API - API for all video driversrFjj4j jǩjj j}rG(j]j]j]j]j]ujNjhj]rHjX)rI}rJ(jjFjjDj jǩjj\j}rK(j]j]j]j]j]ujK5j]rLj%XAVPS (Video Processing Sub-system) API - API for all video driversrMrN}rO(jjFjjIubaubaubj)rP}rQ(jXVPS Control Driver APIrRjj4j jǩjj j}rS(j]j]j]j]j]ujNjhj]rTjX)rU}rV(jjRjjPj jǩjj\j}rW(j]j]j]j]j]ujK6j]rXj%XVPS Control Driver APIrYrZ}r[(jjRjjUubaubaubj)r\}r](jX/VPS Capture API - API for video capture driversr^jj4j jǩjj j}r_(j]j]j]j]j]ujNjhj]r`jX)ra}rb(jj^jj\j jǩjj\j}rc(j]j]j]j]j]ujK7j]rdj%X/VPS Capture API - API for video capture driversrerf}rg(jj^jjaubaubaubj)rh}ri(jX8VPS VIP Capture API - API specific to VIP capture driverrjjj4j jǩjj j}rk(j]j]j]j]j]ujNjhj]rljX)rm}rn(jjjjjhj jǩjj\j}ro(j]j]j]j]j]ujK8j]rpj%X8VPS VIP Capture API - API specific to VIP capture driverrqrr}rs(jjjjjmubaubaubj)rt}ru(jX=VPS DSSWB Capture API - API specific to DSS WB capture driverrvjj4j jǩjj j}rw(j]j]j]j]j]ujNjhj]rxjX)ry}rz(jjvjjtj jǩjj\j}r{(j]j]j]j]j]ujK9j]r|j%X=VPS DSSWB Capture API - API specific to DSS WB capture driverr}r~}r(jjvjjyubaubaubj)r}r(jX/VPS Display API - API for video display driversrjj4j jǩjj j}r(j]j]j]j]j]ujNjhj]rjX)r}r(jjjjj jǩjj\j}r(j]j]j]j]j]ujK:j]rj%X/VPS Display API - API for video display driversrr}r(jjjjubaubaubj)r}r(jX_VPS Display Controller API - API for controlling and configuring VENCs in the display subsystemjj4j jǩjj j}r(j]j]j]j]j]ujNjhj]rjX)r}r(jX_VPS Display Controller API - API for controlling and configuring VENCs in the display subsystemrjjj jǩjj\j}r(j]j]j]j]j]ujK;j]rj%X_VPS Display Controller API - API for controlling and configuring VENCs in the display subsystemrr}r(jjjjubaubaubj)r}r(jXAVPS Memory to Memory (M2M) API - API for memory to memory driversrjj4j jǩjj j}r(j]j]j]j]j]ujNjhj]rjX)r}r(jjjjj jǩjj\j}r(j]j]j]j]j]ujK=j]rj%XAVPS Memory to Memory (M2M) API - API for memory to memory driversrr}r(jjjjubaubaubj)r}r(jX,M2M VPE API - API specific to VPE M2M driverrjj4j jǩjj j}r(j]j]j]j]j]ujNjhj]rjX)r}r(jjjjj jǩjj\j}r(j]j]j]j]j]ujK>j]rj%X,M2M VPE API - API specific to VPE M2M driverrr}r(jjjjubaubaubj)r}r(jXExternal Device API - API for controlling external video devices like video decoders, video encoders, video filters, IO expanders, Ultra-sonic sensorsjj4j jǩjj j}r(j]j]j]j]j]ujNjhj]rjX)r}r(jXExternal Device API - API for controlling external video devices like video decoders, video encoders, video filters, IO expanders, Ultra-sonic sensorsrjjj jǩjj\j}r(j]j]j]j]j]ujK?j]rj%XExternal Device API - API for controlling external video devices like video decoders, video encoders, video filters, IO expanders, Ultra-sonic sensorsrr}r(jjjjubaubaubj)r}r(jXcPlatform Specific API - API for platform/board specific control, like setting pin muxes, clocks etcjj4j jǩjj j}r(j]j]j]j]j]ujNjhj]rjX)r}r(jXcPlatform Specific API - API for platform/board specific control, like setting pin muxes, clocks etcrªjjj jǩjj\j}rê(j]j]j]j]j]ujKBj]rĪj%XcPlatform Specific API - API for platform/board specific control, like setting pin muxes, clocks etcrŪrƪ}rǪ(jjªjjubaubaubj)rȪ}rɪ(jX6Board Specific API - API for board specific features. jj4j jǩjj j}rʪ(j]j]j]j]j]ujNjhj]r˪jX)r̪}rͪ(jX5Board Specific API - API for board specific features.rΪjjȪj jǩjj\j}rϪ(j]j]j]j]j]ujKDj]rЪj%X5Board Specific API - API for board specific features.rѪrҪ}rӪ(jjΪjj̪ubaubaubeubjX)rԪ}rժ(jXIn addition to above drivers the VPS package also includes many sample examples which show how to use the drivers in different ways. Many of these sample examples use a common set of APIs which a user may find useful to refer to for use in their final application.r֪jjj jǩjj\j}rת(j]j]j]j]j]ujKFjhj]rتj%XIn addition to above drivers the VPS package also includes many sample examples which show how to use the drivers in different ways. Many of these sample examples use a common set of APIs which a user may find useful to refer to for use in their final application.r٪rڪ}r۪(jj֪jjԪubaubjX)rܪ}rݪ(jXAPI reference for application:rުjjj jǩjj\j}rߪ(j]j]j]j]j]ujKKjhj]rj%XAPI reference for application:rr}r(jjުjjܪubaubj#)r}r(jX*#include .h>jjj jǩjj&j}r(j2j3j]j]j]j]j]ujMw!jhj]rj%X*#include .h>rr}r(jUjjubaubeubeubj)r}r(jUjKjjj jǩjjj}r(j]rX applicationraj]j]j]rUid262raj]ujKRjhj]r(j)r}r(jX Applicationrjjj jǩjj"j}r(j]j]j]j]j]ujKRjhj]rj%X Applicationrr}r(jjjjubaubj)r}r(jUjKjjj jǩjjj}r(j]rXexamplesraj]j]j]rUid263raj]ujKUjhj]r(j)r}r(jXExamplesrjjj jǩjj"j}r(j]j]j]j]j]ujKUjhj]rj%XExamplesrr }r (jjjjubaubj)r }r (jUjjj jǩjjj}r (j]j]j]j]j]ujNjhj]rj)r}r(jUj}r(j]j]j]j]j]UcolsKujj j]r(j)r}r(jUj}r(j]j]j]j]j]UcolwidthKujjj]jjubj)r}r(jUj}r(j]j]j]j]j]UcolwidthKujjj]jjubj)r}r(jUj}r(j]j]j]j]j]UcolwidthKujjj]jjubj)r}r(jUj}r(j]j]j]j]j]ujjj]rj)r }r!(jUj}r"(j]j]j]j]j]ujjj]r#(j)r$}r%(jUj}r&(j]j]j]j]j]ujj j]r'jX)r(}r)(jXNamer*jj$j jǩjj\j}r+(j]j]j]j]j]ujKXj]r,j%XNamer-r.}r/(jj*jj(ubaubajjubj)r0}r1(jUj}r2(j]j]j]j]j]ujj j]r3j)r4}r5(jUj}r6(j]j]j]j]j]ujj0j]r7j)r8}r9(jX Descriptionr:jKjj4j jǩjjj}r;(j]j]j]j]j]ujKj]r<j%X Descriptionr=r>}r?(jj:jj8ubaubajjubajjubj)r@}rA(jUj}rB(j]j]j]j]j]ujj j]rCj)rD}rE(jUj}rF(j]j]j]j]j]ujj@j]rGj)rH}rI(jXExpected ResultsrJjKjjDj jǩjjj}rK(j]j]j]j]j]ujKj]rLj%XExpected ResultsrMrN}rO(jjJjjHubaubajjubajjubejjubajjubj)rP}rQ(jUj}rR(j]j]j]j]j]ujjj]rS(j)rT}rU(jUj}rV(j]j]j]j]j]ujjPj]rW(j)rX}rY(jUj}rZ(j]j]j]j]j]ujjTj]r[jX)r\}r](jXDisplay Dss applicationr^jjXj jǩjj\j}r_(j]j]j]j]j]ujKZj]r`j%XDisplay Dss applicationrarb}rc(jj^jj\ubaubajjubj)rd}re(jUj}rf(j]j]j]j]j]ujjTj]rgj)rh}ri(jUj}rj(j]j]j]j]j]ujjdj]rkj)rl}rm(jXoExample demonstrating *simple* display yuyv or bgr frames to the LCD use case. Reference example for developersjKjjhj jǩjjj}rn(j]j]j]j]j]ujKj]ro(j%XExample demonstrating rprq}rr(jXExample demonstrating jjlubj<)rs}rt(jX*simple*j}ru(j]j]j]j]j]ujjlj]rvj%Xsimplerwrx}ry(jUjjsubajjDubj%XQ display yuyv or bgr frames to the LCD use case. Reference example for developersrzr{}r|(jXQ display yuyv or bgr frames to the LCD use case. Reference example for developersjjlubeubajjubajjubj)r}}r~(jUj}r(j]j]j]j]j]ujjTj]rj)r}r(jUj}r(j]j]j]j]j]ujj}j]rj)r}r(jXFApplication prompts user to select the test case input in CCS console.rjKjjj jǩjjj}r(j]j]j]j]j]ujKj]rj%XFApplication prompts user to select the test case input in CCS console.rr}r(jjjjubaubajjubajjubejjubj)r}r(jUj}r(j]j]j]j]j]ujjPj]r(j)r}r(jUj}r(j]j]j]j]j]ujjj]rjX)r}r(jX$Display Dss application (Bare Metal)rjjj jǩjj\j}r(j]j]j]j]j]ujKcj]rj%X$Display Dss application (Bare Metal)rr}r(jjjjubaubajjubj)r}r(jUj}r(j]j]j]j]j]ujjj]rj)r}r(jUj}r(j]j]j]j]j]ujjj]rj)r}r(jXExample demonstrating *simple* display yuyv or bgr frames to the LCD use case for bare metal use cases. Reference bare metal example for developersjKjjj jǩjjj}r(j]j]j]j]j]ujKj]r(j%XExample demonstrating rr}r(jXExample demonstrating jjubj<)r}r(jX*simple*j}r(j]j]j]j]j]ujjj]rj%Xsimplerr}r(jUjjubajjDubj%Xu display yuyv or bgr frames to the LCD use case for bare metal use cases. Reference bare metal example for developersrr}r(jXu display yuyv or bgr frames to the LCD use case for bare metal use cases. Reference bare metal example for developersjjubeubajjubajjubj)r}r(jUj}r(j]j]j]j]j]ujjj]rj)r}r(jUj}r(j]j]j]j]j]ujjj]rj)r}r(jXFApplication prompts user to select the test case input in CCS console.rjKjjj jǩjjj}r(j]j]j]j]j]ujKj]r«j%XFApplication prompts user to select the test case input in CCS console.rërī}rū(jjjjubaubajjubajjubejjubj)rƫ}rǫ(jUj}rȫ(j]j]j]j]j]ujjPj]rɫ(j)rʫ}r˫(jUj}r̫(j]j]j]j]j]ujjƫj]rͫjX)rΫ}rϫ(jXDisplay Dss WB applicationrЫjjʫj jǩjj\j}rѫ(j]j]j]j]j]ujKmj]rҫj%XDisplay Dss WB applicationrӫrԫ}rի(jjЫjjΫubaubajjubj)r֫}r׫(jUj}rث(j]j]j]j]j]ujjƫj]r٫j)rګ}r۫(jUj}rܫ(j]j]j]j]j]ujj֫j]rݫj)rޫ}r߫(jXExample demonstrating *simple* display Write Back (WB) yuyv or bgr frames to the LCD use case. Reference example for developersjKjjګj jǩjjj}r(j]j]j]j]j]ujKj]r(j%XExample demonstrating rr}r(jXExample demonstrating jjޫubj<)r}r(jX*simple*j}r(j]j]j]j]j]ujjޫj]rj%Xsimplerr}r(jUjjubajjDubj%Xa display Write Back (WB) yuyv or bgr frames to the LCD use case. Reference example for developersrr}r(jXa display Write Back (WB) yuyv or bgr frames to the LCD use case. Reference example for developersjjޫubeubajjubajjubj)r}r(jUj}r(j]j]j]j]j]ujjƫj]rj)r}r(jUj}r(j]j]j]j]j]ujjj]rj)r}r(jXFApplication prompts user to select the test case input in CCS console.rjKjjj jǩjjj}r(j]j]j]j]j]ujKj]rj%XFApplication prompts user to select the test case input in CCS console.rr}r(jjjjubaubajjubajjubejjubj)r}r(jUj}r(j]j]j]j]j]ujjPj]r(j)r}r(jUj}r(j]j]j]j]j]ujjj]rjX)r}r(jX6Loopback application (Capture and Display application)r jjj jǩjj\j}r (j]j]j]j]j]ujKwj]r j%X6Loopback application (Capture and Display application)r r }r(jj jjubaubajjubj)r}r(jUj}r(j]j]j]j]j]ujjj]rj)r}r(jUj}r(j]j]j]j]j]ujjj]rj)r}r(jXExample demonstrating *simple* capture and display yuyv frames from camera to the LCD use case. Reference example for developersjKjjj jǩjjj}r(j]j]j]j]j]ujKj]r(j%XExample demonstrating rr}r(jXExample demonstrating jjubj<)r}r(jX*simple*j}r (j]j]j]j]j]ujjj]r!j%Xsimpler"r#}r$(jUjjubajjDubj%Xb capture and display yuyv frames from camera to the LCD use case. Reference example for developersr%r&}r'(jXb capture and display yuyv frames from camera to the LCD use case. Reference example for developersjjubeubajjubajjubj)r(}r)(jUj}r*(j]j]j]j]j]ujjj]r+j)r,}r-(jUj}r.(j]j]j]j]j]ujj(j]r/j)r0}r1(jXApplication prompts user to select the test case input in CCS console, please select ov2659 camera for idkAM57x and OV1063x for evmAM572x test cases.r2jKjj,j jǩjjj}r3(j]j]j]j]j]ujKj]r4j%XApplication prompts user to select the test case input in CCS console, please select ov2659 camera for idkAM57x and OV1063x for evmAM572x test cases.r5r6}r7(jj2jj0ubaubajjubajjubejjubj)r8}r9(jUj}r:(j]j]j]j]j]ujjPj]r;(j)r<}r=(jUj}r>(j]j]j]j]j]ujj8j]r?jX)r@}rA(jX@Loopback application Bare metal(Capture and Display application)rBjj<j jǩjj\j}rC(j]j]j]j]j]ujKj]rDj%X@Loopback application Bare metal(Capture and Display application)rErF}rG(jjBjj@ubaubajjubj)rH}rI(jUj}rJ(j]j]j]j]j]ujj8j]rKj)rL}rM(jUj}rN(j]j]j]j]j]ujjHj]rOj)rP}rQ(jXExample demonstrating *simple* capture and display yuyv frames from camera to the LCD use case for bare metal. Bare Metal reference example for developersjKjjLj jǩjjj}rR(j]j]j]j]j]ujKj]rS(j%XExample demonstrating rTrU}rV(jXExample demonstrating jjPubj<)rW}rX(jX*simple*j}rY(j]j]j]j]j]ujjPj]rZj%Xsimpler[r\}r](jUjjWubajjDubj%X| capture and display yuyv frames from camera to the LCD use case for bare metal. Bare Metal reference example for developersr^r_}r`(jX| capture and display yuyv frames from camera to the LCD use case for bare metal. Bare Metal reference example for developersjjPubeubajjubajjubj)ra}rb(jUj}rc(j]j]j]j]j]ujj8j]rdj)re}rf(jUj}rg(j]j]j]j]j]ujjaj]rhj)ri}rj(jXApplication prompts user to select the test case input in CCS console, please select ov2659 camera for idkAM57x and OV1063x for evmAM572x test cases.rkjKjjej jǩjjj}rl(j]j]j]j]j]ujKj]rmj%XApplication prompts user to select the test case input in CCS console, please select ov2659 camera for idkAM57x and OV1063x for evmAM572x test cases.rnro}rp(jjkjjiubaubajjubajjubejjubejjubejjubaubj\)rq}rr(jX:: * Starting from Processor SDK 4.2 release, idkAM574x support is added for VPS. * Starting from Processor SDK 4.2 release, oV1063x camera part support is added for AM572x - GP evm (older Aptina MT9T11 camera is never supported). * Starting from Processor SDK 3.2 release, osd101t2587 lcd panel is supported (new part) along with osd101t2045 lcd panel (old part) on idkAM572x and idkAM571x boards for all display subsystem examples. * The bare metal examples are added starting from Processor SDK 4.0 release * Some of the clocks such as 32KHz Sync clock are directly tied to A15 core and need that core to be running. Hence while testing the code on other cores such as DSP/IPU, please make sure to disconnect the ARM core after connecting the ARM core & running the GEL files to enable the other cores and before loading the executable on that core.jjj jǩjj_j}rs(j]j]j]j]j]ujNjhj]rtj#)ru}rv(jXW* Starting from Processor SDK 4.2 release, idkAM574x support is added for VPS. * Starting from Processor SDK 4.2 release, oV1063x camera part support is added for AM572x - GP evm (older Aptina MT9T11 camera is never supported). * Starting from Processor SDK 3.2 release, osd101t2587 lcd panel is supported (new part) along with osd101t2045 lcd panel (old part) on idkAM572x and idkAM571x boards for all display subsystem examples. * The bare metal examples are added starting from Processor SDK 4.0 release * Some of the clocks such as 32KHz Sync clock are directly tied to A15 core and need that core to be running. Hence while testing the code on other cores such as DSP/IPU, please make sure to disconnect the ARM core after connecting the ARM core & running the GEL files to enable the other cores and before loading the executable on that core.jjqjj&j}rw(j2j3j]j]j]j]j]ujM!j]rxj%XW* Starting from Processor SDK 4.2 release, idkAM574x support is added for VPS. * Starting from Processor SDK 4.2 release, oV1063x camera part support is added for AM572x - GP evm (older Aptina MT9T11 camera is never supported). * Starting from Processor SDK 3.2 release, osd101t2587 lcd panel is supported (new part) along with osd101t2045 lcd panel (old part) on idkAM572x and idkAM571x boards for all display subsystem examples. * The bare metal examples are added starting from Processor SDK 4.0 release * Some of the clocks such as 32KHz Sync clock are directly tied to A15 core and need that core to be running. Hence while testing the code on other cores such as DSP/IPU, please make sure to disconnect the ARM core after connecting the ARM core & running the GEL files to enable the other cores and before loading the executable on that core.ryrz}r{(jUjjuubaubaubeubeubj)r|}r}(jUjKjjj jǩjjj}r~(j]rXadditional referencesraj]j]j]rUid264raj]ujKjhj]r(j)r}r(jXAdditional Referencesrjj|j jǩjj"j}r(j]j]j]j]j]ujKjhj]rj%XAdditional Referencesrr}r(jjjjubaubj)r}r(jUjj|j jǩjjj}r(j]j]j]j]j]ujNjhj]rj)r}r(jUj}r(j]j]j]j]j]UcolsKujjj]r(j)r}r(jUj}r(j]j]j]j]j]UcolwidthK#ujjj]jjubj)r}r(jUj}r(j]j]j]j]j]UcolwidthK(ujjj]jjubj)r}r(jUj}r(j]j]j]j]j]ujjj]r(j)r}r(jUj}r(j]j]j]j]j]ujjj]r(j)r}r(jUj}r(j]j]j]j]j]ujjj]rjX)r}r(jX **Document**rjjj jǩjj\j}r(j]j]j]j]j]ujKj]rj|)r}r(jjj}r(j]j]j]j]j]ujjj]rj%XDocumentrr}r(jUjjubajjubaubajjubj)r}r(jUj}r(j]j]j]j]j]ujjj]rjX)r}r(jX **Location**rjjj jǩjj\j}r(j]j]j]j]j]ujKj]rj|)r}r(jjj}r(j]j]j]j]j]ujjj]rj%XLocationrr}r(jUjjubajjubaubajjubejjubj)r¬}rì(jUj}rĬ(j]j]j]j]j]ujjj]rŬ(j)rƬ}rǬ(jUj}rȬ(j]j]j]j]j]ujj¬j]rɬjX)rʬ}rˬ(jXAPI Reference Manualr̬jjƬj jǩjj\j}rͬ(j]j]j]j]j]ujKj]rάj%XAPI Reference ManualrϬrЬ}rѬ(jj̬jjʬubaubajjubj)rҬ}rӬ(jUj}rԬ(j]j]j]j]j]ujj¬j]rլjX)r֬}r׬(jXP$(TI_PDK_INSTALL_DIR)\\packages\\ti \\drv\\vps\\docs\\doxygen\\html\\index. htmljjҬj jǩjj\j}rج(j]j]j]j]j]ujKj]r٬j%XH$(TI_PDK_INSTALL_DIR)\packages\ti \drv\vps\docs\doxygen\html\index. htmlrڬr۬}rܬ(jXP$(TI_PDK_INSTALL_DIR)\\packages\\ti \\drv\\vps\\docs\\doxygen\\html\\index. htmljj֬ubaubajjubejjubejjubejjubaubeubj)rݬ}rެ(jUjjj jǩjjj}r߬(j]j]j]j]rUbuilding-vps-examplesraj]rhaujKjhj]r(j)r}r(jXBuilding VPS examplesrjjݬj jǩjj"j}r(j]j]j]j]j]ujKjhj]rj%XBuilding VPS examplesrr}r(jjjjubaubj)r}r(jUjjݬj jǩjjj}r(jX-j]j]j]j]j]ujKjhj]r(j)r}r(jXVPS examples and dependent libraries are built from the top level pdk makefile after the environment setup is done using the pdksetupenv.sh(bat) file.jjj jǩjj j}r(j]j]j]j]j]ujNjhj]rjX)r}r(jXVPS examples and dependent libraries are built from the top level pdk makefile after the environment setup is done using the pdksetupenv.sh(bat) file.rjjj jǩjj\j}r(j]j]j]j]j]ujKj]rj%XVPS examples and dependent libraries are built from the top level pdk makefile after the environment setup is done using the pdksetupenv.sh(bat) file.rr}r(jjjjubaubaubj)r}r(jXcd /packagesrjjj jǩjj j}r(j]j]j]j]j]ujNjhj]rjX)r}r(jjjjj jǩjj\j}r(j]j]j]j]j]ujKj]rj%Xcd /packagesrr}r(jjjjubaubaubj)r}r (jXpdksetupenv.bat (sh)r jjj jǩjj j}r (j]j]j]j]j]ujNjhj]r jX)r }r(jj jjj jǩjj\j}r(j]j]j]j]j]ujKj]rj%Xpdksetupenv.bat (sh)rr}r(jj jj ubaubaubj)r}r(jXLmake vps  : to build vps examples under **/ti/packages/binary** folderjjj jǩjj j}r(j]j]j]j]j]ujNjhj]rjX)r}r(jXLmake vps  : to build vps examples under **/ti/packages/binary** folderjjj jǩjj\j}r(j]j]j]j]j]ujKj]r(j%X)make vps  : to build vps examples under rr}r(jX)make vps  : to build vps examples under jjubj|)r}r (jX**/ti/packages/binary**j}r!(j]j]j]j]j]ujjj]r"j%X/ti/packages/binaryr#r$}r%(jUjjubajjubj%X folderr&r'}r((jX folderjjubeubaubj)r)}r*(jX5make vps_clean : to clean the vps and vps examples. jjj jǩjj j}r+(j]j]j]j]j]ujNjhj]r,jX)r-}r.(jX4make vps_clean : to clean the vps and vps examples.r/jj)j jǩjj\j}r0(j]j]j]j]j]ujKj]r1j%X4make vps_clean : to clean the vps and vps examples.r2r3}r4(jj/jj-ubaubaubeubeubj)r5}r6(jUjjj jǩjjj}r7(j]j]j]j]r8U vps-examplesr9aj]r:h>aujKjhj]r;(j)r<}r=(jX VPS examplesr>jj5j jǩjj"j}r?(j]j]j]j]j]ujKjhj]r@j%X VPS examplesrArB}rC(jj>jj<ubaubj)rD}rE(jUjj5j jǩjjj}rF(j]j]j]j]rGUdisplay-dss-examplerHaj]rIhSaujKjhj]rJ(j)rK}rL(jXDisplay DSS ExamplerMjjDj jǩjj"j}rN(j]j]j]j]j]ujKjhj]rOj%XDisplay DSS ExamplerPrQ}rR(jjMjjKubaubjb)rS}rT(jX *Description*rUjKjjDj jǩjjfj}rV(j]rWUid265rXaj]j]rYX descriptionrZaj]j]ujNjhj]r[j<)r\}r](jjUj}r^(j]j]j]j]j]ujjSj]r_j%X Descriptionr`ra}rb(jUjj\ubajjDubaubjX)rc}rd(jXThe example exploits the DISPC (Display Controller) and LCD/HDMI outputs available in the SoC. When run, the test outputs multiple options to select between to demonstrate the various capacity of the display subsystem. There is also option to select "Auto Run", when selected runs all the tests in sequential manner. The example works on outputing a pre-loaded video frames of YUV422I and BGR888 formats to DP1, DP2 and DP3 parallel interfaces and also to HDMI output observed on TV set, from VID1, VID2, VID3 and GFX pipelines. The example also demonstrates displaying videos combined from GFX and other VID pipelines to DPI1 LCD output. The example is also enhanced to show the display controler scaling features. Test that exploits the scalar unit to show all possible allowed scaling. Maximum scaling ratio supported is the ratio of the dss functional clock / pixel clk. Please refer to section "11.2.4.10.4.2 DISPC Scaling limitations" of AM57x Technical Reference manual for minimum ratio allowed when using the scalar unit.rejjDj jǩjj\j}rf(j]j]j]j]j]ujKjhj]rgj%XThe example exploits the DISPC (Display Controller) and LCD/HDMI outputs available in the SoC. When run, the test outputs multiple options to select between to demonstrate the various capacity of the display subsystem. There is also option to select "Auto Run", when selected runs all the tests in sequential manner. The example works on outputing a pre-loaded video frames of YUV422I and BGR888 formats to DP1, DP2 and DP3 parallel interfaces and also to HDMI output observed on TV set, from VID1, VID2, VID3 and GFX pipelines. The example also demonstrates displaying videos combined from GFX and other VID pipelines to DPI1 LCD output. The example is also enhanced to show the display controler scaling features. Test that exploits the scalar unit to show all possible allowed scaling. Maximum scaling ratio supported is the ratio of the dss functional clock / pixel clk. Please refer to section "11.2.4.10.4.2 DISPC Scaling limitations" of AM57x Technical Reference manual for minimum ratio allowed when using the scalar unit.rhri}rj(jjejjcubaubj)rk}rl(jUjjDj jǩjjj}rm(j]j]j]j]j]ujKjhj]rnj)ro}rp(jUjKjjkj jǩjjj}rq(j]j]j]j]j]ujKjhj]ubaubjb)rr}rs(jX#**Running the Display DSS example**rtjjDj jǩjjfj}ru(j]rvUrunning-the-display-dss-examplerwaj]j]j]j]rxh6aujNjhj]ryj|)rz}r{(jjtj}r|(j]j]j]j]j]ujjrj]r}j%XRunning the Display DSS exampler~r}r(jUjjzubajjubaubjX)r}r(jX**Configuring Display**:rjjDj jǩjj\j}r(j]j]j]j]j]ujKjhj]r(j|)r}r(jX**Configuring Display**j}r(j]j]j]j]j]ujjj]rj%XConfiguring Displayrr}r(jUjjubajjubj%X:r}r(jX:jjubeubj)r}r(jUjjDj jǩjjj}r(jX-j]j]j]j]j]ujKjhj]r(j)r}r(jXWMake sure the LCD panel is connected to the base EVM before running the example binary.jjj jǩjj j}r(j]j]j]j]j]ujNjhj]rjX)r}r(jXWMake sure the LCD panel is connected to the base EVM before running the example binary.rjjj jǩjj\j}r(j]j]j]j]j]ujKj]rj%XWMake sure the LCD panel is connected to the base EVM before running the example binary.rr}r(jjjjubaubaubj)r}r(jXLMake sure the HDMI is connected to TV from the EVM for HDMI display options.jjj jǩjj j}r(j]j]j]j]j]ujNjhj]rjX)r}r(jXLMake sure the HDMI is connected to TV from the EVM for HDMI display options.rjjj jǩjj\j}r(j]j]j]j]j]ujKj]rj%XLMake sure the HDMI is connected to TV from the EVM for HDMI display options.rr}r(jjjjubaubaubj)r}r(jXIFor AM571x IDK EVM, installing a shunt on header J51 to short those pins jjj jǩjj j}r(j]j]j]j]j]ujNjhj]rjX)r}r(jXHFor AM571x IDK EVM, installing a shunt on header J51 to short those pinsrjjj jǩjj\j}r(j]j]j]j]j]ujKj]rj%XHFor AM571x IDK EVM, installing a shunt on header J51 to short those pinsrr}r(jjjjubaubaubeubjX)r}r(jX**CCS connection**:rjjDj jǩjj\j}r(j]j]j]j]j]ujKjhj]r(j|)r}r(jX**CCS connection**j}r(j]j]j]j]j]ujjj]rj%XCCS connectionrr}r­(jUjjubajjubj%X:rí}rĭ(jX:jjubeubj)rŭ}rƭ(jUjjDj jǩjjj}rǭ(jX-j]j]j]j]j]ujKjhj]rȭ(j)rɭ}rʭ(jX)Load the generated executable file in CCSr˭jjŭj jǩjj j}r̭(j]j]j]j]j]ujNjhj]rͭjX)rέ}rϭ(jj˭jjɭj jǩjj\j}rЭ(j]j]j]j]j]ujKj]rѭj%X)Load the generated executable file in CCSrҭrӭ}rԭ(jj˭jjέubaubaubj)rխ}r֭(jXORun the application, Select any of the option and load the buffer as suggested.jjŭj jǩjj j}r׭(j]j]j]j]j]ujNjhj]rحjX)r٭}rڭ(jXORun the application, Select any of the option and load the buffer as suggested.rۭjjխj jǩjj\j}rܭ(j]j]j]j]j]ujKj]rݭj%XORun the application, Select any of the option and load the buffer as suggested.rޭr߭}r(jjۭjj٭ubaubaubj)r}r(jXXContent will be displayed on the LCD panel or HDMI TV connected to EVM for test options jjŭj jǩjj j}r(j]j]j]j]j]ujNjhj]rjX)r}r(jXWContent will be displayed on the LCD panel or HDMI TV connected to EVM for test optionsrjjj jǩjj\j}r(j]j]j]j]j]ujKj]rj%XWContent will be displayed on the LCD panel or HDMI TV connected to EVM for test optionsrr}r(jjjjubaubaubeubj\)r}r(jXu- Test Input files for Display Sample application will be in "\drv\vps\docs\test_inputs\dss_input_files.rar"jjDj Njj_j}r(j]j]j]j]j]ujNjhj]rj)r}r(jUj}r(jX-j]j]j]j]j]ujjj]rj)r}r(jXoTest Input files for Display Sample application will be in "\drv\vps\docs\test_inputs\dss_input_files.rar"j}r(j]j]j]j]j]ujjj]rjX)r}r(jXoTest Input files for Display Sample application will be in "\drv\vps\docs\test_inputs\dss_input_files.rar"jjj jǩjj\j}r(j]j]j]j]j]ujKj]rj%XjTest Input files for Display Sample application will be in "drvvpsdocstest_inputsdss_input_files.rar"rr}r(jXoTest Input files for Display Sample application will be in "\drv\vps\docs\test_inputs\dss_input_files.rar"jjubaubajj ubajjubaubjX)r}r(jXThe rar file can be unrar-ed to get the test files using utilities such as http://www.7-zip.org Please download the latest version of 7-zip from this website. The command to unrar is: 7z x {file_to_unrar}jjDj jǩjj\j}r(j]j]j]j]j]ujKjhj]r(j%XKThe rar file can be unrar-ed to get the test files using utilities such as rr}r(jXKThe rar file can be unrar-ed to get the test files using utilities such as jjubj)r}r(jXhttp://www.7-zip.orgr j}r (Urefurij j]j]j]j]j]ujjj]r j%Xhttp://www.7-zip.orgr r }r(jUjjubajjubj%Xm Please download the latest version of 7-zip from this website. The command to unrar is: 7z x {file_to_unrar}rr}r(jXm Please download the latest version of 7-zip from this website. The command to unrar is: 7z x {file_to_unrar}jjubeubjX)r}r(jXWhen the test program expects the yuyv422 file, please load **display_yuyv422_prog_packed_1920_1080.tigf** file and when the test program expects the bgr888 file, please load **display_gbr888_prog_packed_1920_1080.tigf** file. Each video has 4 frames. Below shows the first frame. If GP EVM is used, only the left upper corner of the video is displayed as it only has an 800x480 LCD.jjDj jǩjj\j}r(j]j]j]j]j]ujKjhj]r(j%X<When the test program expects the yuyv422 file, please load rr}r(jX<When the test program expects the yuyv422 file, please load jjubj|)r}r(jX.**display_yuyv422_prog_packed_1920_1080.tigf**j}r(j]j]j]j]j]ujjj]rj%X*display_yuyv422_prog_packed_1920_1080.tigfrr}r(jUjjubajjubj%XE file and when the test program expects the bgr888 file, please load r r!}r"(jXE file and when the test program expects the bgr888 file, please load jjubj|)r#}r$(jX-**display_gbr888_prog_packed_1920_1080.tigf**j}r%(j]j]j]j]j]ujjj]r&j%X)display_gbr888_prog_packed_1920_1080.tigfr'r(}r)(jUjj#ubajjubj%X file. Each video has 4 frames. Below shows the first frame. If GP EVM is used, only the left upper corner of the video is displayed as it only has an 800x480 LCD.r*r+}r,(jX file. Each video has 4 frames. Below shows the first frame. If GP EVM is used, only the left upper corner of the video is displayed as it only has an 800x480 LCD.jjubeubj^)r-}r.(jX&.. Image:: ../images/488px-Yuyv422.pngr/jjDj jǩjjaj}r0(UuriX rtos/../images/488px-Yuyv422.pngr1j]j]j]j]jd}r2U*j1sj]ujKjhj]ubj^)r3}r4(jX&.. Image:: ../images/488px-Gbr888.png jjDj jǩjjaj}r5(UuriXrtos/../images/488px-Gbr888.pngr6j]j]j]j]jd}r7U*j6sj]ujKjhj]ubjX)r8}r9(jXDThe test runs bunch of test cases as shown in the test example menu.r:jjDj jǩjj\j}r;(j]j]j]j]j]ujKjhj]r<j%XDThe test runs bunch of test cases as shown in the test example menu.r=r>}r?(jj:jj8ubaubjX)r@}rA(jX**Warning** : Due to A15 MMU protection, memory load while CPU is running is not possible. Hence below workaround needs to be done for loading the test files.jjDj jǩjj\j}rB(j]j]j]j]j]ujKjhj]rC(j|)rD}rE(jX **Warning**j}rF(j]j]j]j]j]ujj@j]rGj%XWarningrHrI}rJ(jUjjDubajjubj%X : Due to A15 MMU protection, memory load while CPU is running is not possible. Hence below workaround needs to be done for loading the test files.rKrL}rM(jX : Due to A15 MMU protection, memory load while CPU is running is not possible. Hence below workaround needs to be done for loading the test files.jj@ubeubj`)rN}rO(jUjjDj jǩjjcj}rP(jeU.j]j]j]jfUj]j]jgjhujKjhj]rQ(j)rR}rS(jXPower up the boardrTjjNj jǩjj j}rU(j]j]j]j]j]ujNjhj]rVjX)rW}rX(jjTjjRj jǩjj\j}rY(j]j]j]j]j]ujKj]rZj%XPower up the boardr[r\}r](jjTjjWubaubaubj)r^}r_(jXConnect to A15 Corer`jjNj jǩjj j}ra(j]j]j]j]j]ujNjhj]rbjX)rc}rd(jj`jj^j jǩjj\j}re(j]j]j]j]j]ujKj]rfj%XConnect to A15 Corergrh}ri(jj`jjcubaubaubj)rj}rk(jX Load both tigf files into memoryrljjNj jǩjj j}rm(j]j]j]j]j]ujNjhj]rnjX)ro}rp(jjljjjj jǩjj\j}rq(j]j]j]j]j]ujKj]rrj%X Load both tigf files into memoryrsrt}ru(jjljjoubaubaubj)rv}rw(jXDo a CPU reset on A15rxjjNj jǩjj j}ry(j]j]j]j]j]ujNjhj]rzjX)r{}r|(jjxjjvj jǩjj\j}r}(j]j]j]j]j]ujKj]r~j%XDo a CPU reset on A15rr}r(jjxjj{ubaubaubj)r}r(jXLoad example code for core typerjjNj jǩjj j}r(j]j]j]j]j]ujNjhj]rjX)r}r(jjjjj jǩjj\j}r(j]j]j]j]j]ujKj]rj%XLoad example code for core typerr}r(jjjjubaubaubj)r}r(jXRun example code jjNj jǩjj j}r(j]j]j]j]j]ujNjhj]rjX)r}r(jXRun example coderjjj jǩjj\j}r(j]j]j]j]j]ujKj]rj%XRun example coderr}r(jjjjubaubaubeubeubj)r}r(jUjj5j jǩjjj}r(j]j]j]j]rUdisplay-dss-wb-exampleraj]rhaujMjhj]r(j)r}r(jXDisplay DSS WB examplerjjj jǩjj"j}r(j]j]j]j]j]ujMjhj]rj%XDisplay DSS WB examplerr}r(jjjjubaubjb)r}r(jX *Description*rjjj jǩjjfj}r(j]rU description-1raj]j]j]j]rhxaujNjhj]rj<)r}r(jjj}r(j]j]j]j]j]ujjj]rj%X Descriptionrr}r(jUjjubajjDubaubjX)r}r(jXThe WB pipeline allows the use of the hardware processing available inside the DISPC, such as color space conversion, rescaling, and compositing to perform memory-to-memory transfer with data processing or capturing a displayed frame.rjjj jǩjj\j}r(j]j]j]j]j]ujMjhj]rj%XThe WB pipeline allows the use of the hardware processing available inside the DISPC, such as color space conversion, rescaling, and compositing to perform memory-to-memory transfer with data processing or capturing a displayed frame.rr}r(jjjjubaubjb)r}r(jX *Running Display DSS WB example*r®jjj jǩjjfj}rî(j]rĮUrunning-display-dss-wb-examplerŮaj]j]j]j]rƮhaujNjhj]rǮj<)rȮ}rɮ(jj®j}rʮ(j]j]j]j]j]ujjj]rˮj%XRunning Display DSS WB exampler̮rͮ}rή(jUjjȮubajjDubaubjX)rϮ}rЮ(jXThe test connection and procedure for this example is very much same as the running the Display DSS example. In this example, the display output that is sent to the output is captured and sent to the WriteBack pipeline.rѮjjj jǩjj\j}rҮ(j]j]j]j]j]ujMjhj]rӮj%XThe test connection and procedure for this example is very much same as the running the Display DSS example. In this example, the display output that is sent to the output is captured and sent to the WriteBack pipeline.rԮrծ}r֮(jjѮjjϮubaubjb)r׮}rخ(jX***Loopback (Capture and Display) example**rٮjjj jǩjjfj}rڮ(j]rۮU$loopback-capture-and-display-examplerܮaj]j]j]j]rݮhaujNjhj]rޮj|)r߮}r(jjٮj}r(j]j]j]j]j]ujj׮j]rj%X&Loopback (Capture and Display) examplerr}r(jUjj߮ubajjubaubjb)r}r(jX *Description*rjjj jǩjjfj}r(j]rU description-2raj]j]j]j]rhhaujNjhj]rj<)r}r(jjj}r(j]j]j]j]j]ujjj]rj%X Descriptionrr}r(jUjjubajjDubaubjX)r}r(jXThis is the capture and display example that demonstrates the VIP captures functions for the devices. VIP incorporates a multi-channel raw video parser, various video processing blocks, and a flexible Video Port Direct Memory Access (VPDMA)engine to store incoming video in various formats. This example demonstrates the video capture of 720P, YUY422 format from the camera sensor (OV2659 for idkAM57x and OV1063x for evmAM572x) to DPI1 LCD output.rjjj jǩjj\j}r(j]j]j]j]j]ujMjhj]rj%XThis is the capture and display example that demonstrates the VIP captures functions for the devices. VIP incorporates a multi-channel raw video parser, various video processing blocks, and a flexible Video Port Direct Memory Access (VPDMA)engine to store incoming video in various formats. This example demonstrates the video capture of 720P, YUY422 format from the camera sensor (OV2659 for idkAM57x and OV1063x for evmAM572x) to DPI1 LCD output.rr}r(jjjjubaubjb)r}r(jX*Running Loopback example*rjjj jǩjjfj}r(j]rUrunning-loopback-exampleraj]j]j]j]rhiaujNjhj]rj<)r}r(jjj}r(j]j]j]j]j]ujjj]rj%XRunning Loopback exampler r }r (jUjjubajjDubaubj)r }r (jUjjj jǩjjj}r(jX-j]j]j]j]j]ujM%jhj]rj)r}r(jXZMake sure OV sensor and LCD Panel is connected to to the board before running the binary. jj j jǩjj j}r(j]j]j]j]j]ujNjhj]rjX)r}r(jXYMake sure OV sensor and LCD Panel is connected to to the board before running the binary.rjjj jǩjj\j}r(j]j]j]j]j]ujM%j]rj%XYMake sure OV sensor and LCD Panel is connected to to the board before running the binary.rr}r(jjjjubaubaubaubjX)r}r(jX**CCS connection**:rjjj jǩjj\j}r(j]j]j]j]j]ujM(jhj]r (j|)r!}r"(jX**CCS connection**j}r#(j]j]j]j]j]ujjj]r$j%XCCS connectionr%r&}r'(jUjj!ubajjubj%X:r(}r)(jX:jjubeubj`)r*}r+(jUjjj jǩjjcj}r,(jeU.j]j]j]jfUj]j]jgjhujM*jhj]r-(j)r.}r/(jXPower up the boardr0jj*j jǩjj j}r1(j]j]j]j]j]ujNjhj]r2jX)r3}r4(jj0jj.j jǩjj\j}r5(j]j]j]j]j]ujM*j]r6j%XPower up the boardr7r8}r9(jj0jj3ubaubaubj)r:}r;(jXConnect to the Corer<jj*j jǩjj j}r=(j]j]j]j]j]ujNjhj]r>jX)r?}r@(jj<jj:j jǩjj\j}rA(j]j]j]j]j]ujM+j]rBj%XConnect to the CorerCrD}rE(jj<jj?ubaubaubj)rF}rG(jX.Run the application, Select any of the option.rHjj*j jǩjj j}rI(j]j]j]j]j]ujNjhj]rJjX)rK}rL(jjHjjFj jǩjj\j}rM(j]j]j]j]j]ujM,j]rNj%X.Run the application, Select any of the option.rOrP}rQ(jjHjjKubaubaubj)rR}rS(jXECaptured Content will be displayed on the LCD panel connected to EVM jj*j jǩjj j}rT(j]j]j]j]j]ujNjhj]rUjX)rV}rW(jXDCaptured Content will be displayed on the LCD panel connected to EVMrXjjRj jǩjj\j}rY(j]j]j]j]j]ujM-j]rZj%XDCaptured Content will be displayed on the LCD panel connected to EVMr[r\}r](jjXjjVubaubaubeubj)r^}r_(jUjjj jǩjjj}r`(j]j]j]j]j]ujM/jhj]raj)rb}rc(jUjKjj^j jǩjjj}rd(j]j]j]j]j]ujKjhj]ubaubeubeubj)re}rf(jUjKjjj jǩjjj}rg(j]rhXfaqriaj]j]j]rjUid266rkaj]ujM2jhj]rl(j)rm}rn(jXFAQrojjej jǩjj"j}rp(j]j]j]j]j]ujM2jhj]rqj%XFAQrrrs}rt(jjojjmubaubjb)ru}rv(jX>How to reduce the VPS test examples build time using makefile?rwjjej jǩjjfj}rx(j]ryU=how-to-reduce-the-vps-test-examples-build-time-using-makefilerzaj]j]j]j]r{haujNjhj]r|j%X>How to reduce the VPS test examples build time using makefile?r}r~}r(jjwjjuubaubjX)r}r(jXPlease refer to `Rebuilding The PDK `__ on how to invoke the build for specific core and specific platform, to save the build time.jjej jǩjj\j}r(j]j]j]j]j]ujM8jhj]r(j%XPlease refer to rr}r(jXPlease refer to jjubj)r}r(jXT`Rebuilding The PDK `__j}r(UnameXRebuilding The PDKjX;index_how_to_guides.html#rebuild-drivers-from-pdk-directoryj]j]j]j]j]ujjj]rj%XRebuilding The PDKrr}r(jUjjubajjubj%X\ on how to invoke the build for specific core and specific platform, to save the build time.rr}r(jX\ on how to invoke the build for specific core and specific platform, to save the build time.jjubeubjb)r}r(jX<How to create a CCS project other than VPS loopback example?rjjej jǩjjfj}r(j]rU;how-to-create-a-ccs-project-other-than-vps-loopback-exampleraj]j]j]j]rhaujNjhj]rj%X<How to create a CCS project other than VPS loopback example?rr}r(jjjjubaubjX)r}r(jXTo create a CCS project for other VPS examples, please use the existing text file under PDK_INSTALL_PATH\packages\ti\drv\vps\examples\ccsprojects\am57xx\bios as a template:jjej jǩjj\j}r(j]j]j]j]j]ujM@jhj]rj%XTo create a CCS project for other VPS examples, please use the existing text file under PDK_INSTALL_PATHpackagestidrvvpsexamplesccsprojectsam57xxbios as a template:rr}r(jXTo create a CCS project for other VPS examples, please use the existing text file under PDK_INSTALL_PATH\packages\ti\drv\vps\examples\ccsprojects\am57xx\bios as a template:jjubaubj)r}r(jUjjej jǩjjj}r(jX-j]j]j]j]j]ujMEjhj]r(j)r}r(jXCopy the .txt with desired processor then rename it to a new test project name accord to CCS project create convention, see `PDK Example and Test Project Creation `__jjj jǩjj j}r(j]j]j]j]j]ujNjhj]rjX)r}r(jXCopy the .txt with desired processor then rename it to a new test project name accord to CCS project create convention, see `PDK Example and Test Project Creation `__jjj jǩjj\j}r(j]j]j]j]j]ujMEj]r(j%X|Copy the .txt with desired processor then rename it to a new test project name accord to CCS project create convention, see rr}r(jX|Copy the .txt with desired processor then rename it to a new test project name accord to CCS project create convention, see jjubj)r}r(jXj`PDK Example and Test Project Creation `__j}r(UnameX%PDK Example and Test Project CreationjX>index_how_to_guides.html#pdk-example-and-test-project-creationj]j]j]j]j]ujjj]rj%X%PDK Example and Test Project Creationrr}r(jUjjubajjubeubaubj)r}r(jX0Update the linked source files and include pathsrjjj jǩjj j}r(j]j]j]j]j]ujNjhj]rjX)r}r(jjjjj jǩjj\j}r(j]j]j]j]j]ujMHj]rj%X0Update the linked source files and include pathsr¯rï}rį(jjjjubaubaubj)rů}rƯ(jX;The common configuration file and build options can be keptrǯjjj jǩjj j}rȯ(j]j]j]j]j]ujNjhj]rɯjX)rʯ}r˯(jjǯjjůj jǩjj\j}r̯(j]j]j]j]j]ujMIj]rͯj%X;The common configuration file and build options can be keptrίrϯ}rЯ(jjǯjjʯubaubaubj)rѯ}rү(jXiUpdate pre-defined symbol -D to match your SOC, like -DSOC_AM571x, -DSOC_AM572x or -DSOC_AM574xjjj jǩjj j}rӯ(j]j]j]j]j]ujNjhj]rԯjX)rկ}r֯(jXiUpdate pre-defined symbol -D to match your SOC, like -DSOC_AM571x, -DSOC_AM572x or -DSOC_AM574xrׯjjѯj jǩjj\j}rد(j]j]j]j]j]ujMJj]rٯj%XiUpdate pre-defined symbol -D to match your SOC, like -DSOC_AM571x, -DSOC_AM572x or -DSOC_AM574xrگrۯ}rܯ(jjׯjjկubaubaubj)rݯ}rޯ(jXtUpdate the configuration .bld file "-b ${PDK_INSTALL_PATH}/ti/build//config__.bld" to match your socjjj jǩjj j}r߯(j]j]j]j]j]ujNjhj]rjX)r}r(jXtUpdate the configuration .bld file "-b ${PDK_INSTALL_PATH}/ti/build//config__.bld" to match your socrjjݯj jǩjj\j}r(j]j]j]j]j]ujMLj]rj%XtUpdate the configuration .bld file "-b ${PDK_INSTALL_PATH}/ti/build//config__.bld" to match your socrr}r(jjjjubaubaubj)r}r(jXpIn rtsc.setConfiguroOptions, add -DBOARD=, which can be idkAM571x, idkAM572x, evmAM572x or idkAM574xjjj jǩjj j}r(j]j]j]j]j]ujNjhj]rjX)r}r(jXpIn rtsc.setConfiguroOptions, add -DBOARD=, which can be idkAM571x, idkAM572x, evmAM572x or idkAM574xrjjj jǩjj\j}r(j]j]j]j]j]ujMOj]rj%XpIn rtsc.setConfiguroOptions, add -DBOARD=, which can be idkAM571x, idkAM572x, evmAM572x or idkAM574xrr}r(jjjjubaubaubj)r}r(jXNSave the file and re-run pdkProjectCreate to create the new added CCS project jjj jǩjj j}r(j]j]j]j]j]ujNjhj]rjX)r}r(jXMSave the file and re-run pdkProjectCreate to create the new added CCS projectrjjj jǩjj\j}r(j]j]j]j]j]ujMQj]rj%XMSave the file and re-run pdkProjectCreate to create the new added CCS projectrr}r(jjjjubaubaubeubjX)r}r(jXDBelow is example for vps_dssExample_evmAM572x_armExampleProject.txt:rjjej jǩjj\j}r(j]j]j]j]j]ujMTjhj]rj%XDBelow is example for vps_dssExample_evmAM572x_armExampleProject.txt:rr}r(jjjjubaubjX)r }r (jX]``-ccs.linkFile "PDK_INSTALL_PATH/ti/drv/vps/examples/dss/displayDss/src/DisplayDss_main.c"``r jjej jǩjj\j}r (j]j]j]j]j]ujMVjhj]r j)r}r(jj j}r(j]j]j]j]j]ujj j]rj%XY-ccs.linkFile "PDK_INSTALL_PATH/ti/drv/vps/examples/dss/displayDss/src/DisplayDss_main.c"rr}r(jUjjubajj ubaubjX)r}r(jXh-ccs.linkFile "PDK_INSTALL_PATH/ti/drv/vps/examples/ccsprojects/common/bios/utils/bspCommonBIOS_a15.cfg"rjjej jǩjj\j}r(j]j]j]j]j]ujMXjhj]rj%Xh-ccs.linkFile "PDK_INSTALL_PATH/ti/drv/vps/examples/ccsprojects/common/bios/utils/bspCommonBIOS_a15.cfg"rr}r(jjjjubaubjX)r}r(jX~-ccs.setCompilerOptions "-c -mcpu=cortex-a15 -mtune=cortex-a15 -marm -mfloat-abi=hard -DMAKEFILE_BUILD -DNDEBUG -DTRACE_ENABLE -DASSERT_ENABLE -DVPS_VIP_BUILD -DVPS_VPE_BUILD -DVPS_DSS_BUILD -UVPS_ISS_BUILD -UVPS_SIMCOP_BUILD -UVPS_ISS_ISP_DEF -DVPS_VIP1_BUILD -DVPS_VIP2_BUILD -DVPS_VIP3_BUILD -DVPS_CAPT_BUILD -DVPS_DISP_BUILD -DSOC_AM572x -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=A15F -g -gstrict-dwarf -gdwarf-3 -Wimplicit -Wall -Wunused -Wunknown-pragmas -ffunction-sections -fdata-sections -MMD -MP -I${PDK_INSTALL_PATH}/ti/drv/vps -I${PDK_INSTALL_PATH}/ti/drv/vps/examples/dss/displayDss/src" -rtsc.enableRtscrjjej jǩjj\j}r (j]j]j]j]j]ujM[jhj]r!j%X~-ccs.setCompilerOptions "-c -mcpu=cortex-a15 -mtune=cortex-a15 -marm -mfloat-abi=hard -DMAKEFILE_BUILD -DNDEBUG -DTRACE_ENABLE -DASSERT_ENABLE -DVPS_VIP_BUILD -DVPS_VPE_BUILD -DVPS_DSS_BUILD -UVPS_ISS_BUILD -UVPS_SIMCOP_BUILD -UVPS_ISS_ISP_DEF -DVPS_VIP1_BUILD -DVPS_VIP2_BUILD -DVPS_VIP3_BUILD -DVPS_CAPT_BUILD -DVPS_DISP_BUILD -DSOC_AM572x -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=A15F -g -gstrict-dwarf -gdwarf-3 -Wimplicit -Wall -Wunused -Wunknown-pragmas -ffunction-sections -fdata-sections -MMD -MP -I${PDK_INSTALL_PATH}/ti/drv/vps -I${PDK_INSTALL_PATH}/ti/drv/vps/examples/dss/displayDss/src" -rtsc.enableRtscr"r#}r$(jjjjubaubjX)r%}r&(jX!-ccs.setLinkerOptions " -lrdimon -lgcc -lm -lnosys -nostartfiles -static -Wl,--gc-sections -L$(BIOS_INSTALL_PATH)/packages/gnu/targets/arm/libs/install-native/arm-none-eabi/lib/fpu " -rtsc.setConfiguroOptions "-b ${PDK_INSTALL_PATH}/ti/build/am572x/config_am572x_a15.bld -DBOARD=evmAM572x"r'jjej jǩjj\j}r((j]j]j]j]j]ujMgjhj]r)j%X!-ccs.setLinkerOptions " -lrdimon -lgcc -lm -lnosys -nostartfiles -static -Wl,--gc-sections -L$(BIOS_INSTALL_PATH)/packages/gnu/targets/arm/libs/install-native/arm-none-eabi/lib/fpu " -rtsc.setConfiguroOptions "-b ${PDK_INSTALL_PATH}/ti/build/am572x/config_am572x_a15.bld -DBOARD=evmAM572x"r*r+}r,(jj'jj%ubaubjb)r-}r.(jX@Can I load any jpeg file into the memory to display through DSS?r/jjej jǩjjfj}r0(j]r1U?can-i-load-any-jpeg-file-into-the-memory-to-display-through-dssr2aj]j]j]j]r3h=aujNjhj]r4j%X@Can I load any jpeg file into the memory to display through DSS?r5r6}r7(jj/jj-ubaubjX)r8}r9(jX`The display uses video, not static image as input. There is no JPEG decoder so it will not work.r:jjej jǩjj\j}r;(j]j]j]j]j]ujMrjhj]r<j%X`The display uses video, not static image as input. There is no JPEG decoder so it will not work.r=r>}r?(jj:jj8ubaubjb)r@}rA(jXhIn DSS example, two input video files are loaded for testing, what is their format and how to play them?rBjjej jǩjjfj}rC(j]rDUein-dss-example-two-input-video-files-are-loaded-for-testing-what-is-their-format-and-how-to-play-themrEaj]j]j]j]rFh9aujNjhj]rGj%XhIn DSS example, two input video files are loaded for testing, what is their format and how to play them?rHrI}rJ(jjBjj@ubaubjX)rK}rL(jXThe two files are with .tigf extension. Tigf is a local convention that TI development team followed. The file name (before the extension) shows what you are attempting to decode: e.g., 24 bit RGB or yuyv422 video file with 1920x1080 resolutions. To play them:rMjjej jǩjj\j}rN(j]j]j]j]j]ujMyjhj]rOj%XThe two files are with .tigf extension. Tigf is a local convention that TI development team followed. The file name (before the extension) shows what you are attempting to decode: e.g., 24 bit RGB or yuyv422 video file with 1920x1080 resolutions. To play them:rPrQ}rR(jjMjjKubaubj)rS}rT(jUjjej jǩjjj}rU(jX-j]j]j]j]j]ujM~jhj]rV(j)rW}rX(jXIn Linux, use avplay with syntax: avplay -video_size -pixel_format -f rawvideo