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q)q}q(hXIPCqhhhhhUtitleqh}q(h]h]h]h]h]uhKhhh]qcdocutils.nodes Text qXIPCqq}q(hhhhubaubhh)q}q(hUhhhhhhh}q(h]h]h]h]qUipc-quick-start-guideqah]qhXauhK hhh]q(h)q}q(hXIPC Quick Start Guideqhhhhhhh}q(h]h]h]h]h]uhK hhh]qhXIPC Quick Start Guideqq}q(hhhhubaubcdocutils.nodes comment q)q}q(hXKhttp://processors.wiki.ti.com/index.php/Processor_SDK_IPC_Quick_Start_GuidehhhhXBsource/linux/Foundational_Components/IPC/Quick_Start_Guide.rst.incqŅq}qbhUcommentqh}q(U xml:spaceqUpreserveqh]h]h]h]h]uhKhhh]qhXKhttp://processors.wiki.ti.com/index.php/Processor_SDK_IPC_Quick_Start_Guideqͅq}q(hUhhubaubh)q}q(hXOverviewqhhhhhUrubricqh}q(h]qU overview-ipcqah]h]h]h]qhfauhNhhh]qhXOverviewqمq}q(hhhhubaubcdocutils.nodes paragraph q)q}q(hXyThis page is meant to be a Quick Start Guide for applications using IPC (Inter Processor Communication) in Processor SDK.qhhhhhU paragraphqh}q(h]h]h]h]h]uhKhhh]qhXyThis page is meant to be a Quick Start Guide for applications using IPC (Inter Processor Communication) in Processor SDK.qㅁq}q(hhhhubaubh)q}q(hXIt begins with details about the out-of-box demo provided in the Processor SDK Linux filesystem, followed by rebuilding the demo code and running the built images. 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( This covers the use case with the Host running linux OS and the slave cores running RTOS).q녁q}q(hhhhubaubh)q}q(hXEAlso details about building and running the IPC examples are covered.qhhhhhhh}q(h]h]h]h]h]uhK hhh]qhXEAlso details about building and running the IPC examples are covered.qq}q(hhhhubaubh)q}q(hXThe goal is to provides information for users to get familiar with IPC and its build environment, in turn, to help users in developing their projects quickly.qhhhhhhh}q(h]h]h]h]h]uhKhhh]qhXThe goal is to provides information for users to get familiar with IPC and its build environment, in turn, to help users in developing their projects quickly.qq}q(hhhhubaubcdocutils.nodes line_block q)q}r(hUhhhhhU line_blockrh}r(h]h]h]h]h]uhKhhh]rcdocutils.nodes line r)r}r(hUUindentrKhhhhhhh}r(h]h]h]h]h]uhKhhh]ubaubh)r }r (hXLinux out of box demosr hhhhhhh}r (h]r Ulinux-out-of-box-demosrah]h]h]h]rh\auhNhhh]rhXLinux out of box demosrr}r(hj hj ubaubh)r}r(hX9The out of box demo is only available on Keystone-2 EVMs.rhhhhhhh}r(h]h]h]h]h]uhKhhh]rhX9The out of box demo is only available on Keystone-2 EVMs.rr}r(hjhjubaubcdocutils.nodes note r)r}r(hX.This assumes the release images are loaded in the flash/SD Card. If needed to update to latest release follow the `Linux Getting Started Guide `__ to update the release images on flash memory/SD card on the EVM using Program-evm or using the procedures for SD Card.hhhhhUnoterh}r (h]h]h]h]h]uhNhhh]r!h)r"}r#(hX.This assumes the release images are loaded in the flash/SD Card. If needed to update to latest release follow the `Linux Getting Started Guide `__ to update the release images on flash memory/SD card on the EVM using Program-evm or using the procedures for SD Card.hjhhhhh}r$(h]h]h]h]h]uhKh]r%(hXrThis assumes the release images are loaded in the flash/SD Card. If needed to update to latest release follow the r&r'}r((hXrThis assumes the release images are loaded in the flash/SD Card. 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Image:: ../images/MatrixAppLauncher.jpg :scale: 60 The result from running IPC Demo .. Image:: ../images/IPC_Demo_Result.jpg :scale: 60 hj7hNhjCh}rh(h]h]h]h]h]uhNhhh]ri(h)rj}rk(hX]Click the Multi-core Demonstrations, then Multi-core IPC Demo to start the IPC demonstration.rlhjfhhhhh}rm(h]h]h]h]h]uhK+h]rnhX]Click the Multi-core Demonstrations, then Multi-core IPC Demo to start the IPC demonstration.rorp}rq(hjlhjjubaubcdocutils.nodes image rr)rs}rt(hX:.. Image:: ../images/MatrixAppLauncher.jpg :scale: 60 h}ru(UscaleK`__hhhhhjh}r(h]h]h]h]h]uhNhhh]rh)r}r(hXTo view the out-of-box demo source code, please install Linux and RTOS Processor SDKs from `SDK download page `__hjhhhhh}r(h]h]h]h]h]uhK:h]r(hX[To view the out-of-box demo source code, please install Linux and RTOS Processor SDKs from rr}r(hX[To view the out-of-box demo source code, please install Linux and RTOS Processor SDKs from hjubj))r}r(hXR`SDK download page `__h}r(UnameXSDK download pagej-X:http://www.ti.com/lsds/ti/tools-software/processor_sw.pageh]h]h]h]h]uhjh]rhXSDK download pagerr}r(hUhjubahj2ubeubaubh)r}r(hXThe source code are located in:rhhhhhhh}r(h]h]h]h]h]uhK>hhh]rhXThe source code are located in:rr}r(hjhjubaubcdocutils.nodes literal_block r)r}r(hXLinux side application: /ipc_x_xx_xx_xx/linux/src/tests/MessageQBench.c DSP side application: /ipc_x_xx_xx_xx/packages/ti/ipc/tests/messageq_single.chhhhhU literal_blockrh}r(hhh]h]h]h]h]uhKhhh]rhXLinux side application: /ipc_x_xx_xx_xx/linux/src/tests/MessageQBench.c DSP side application: /ipc_x_xx_xx_xx/packages/ti/ipc/tests/messageq_single.crr}r(hUhjubaubh)r}r(hX**Rebuilding the demo:**rhhhhhhh}r(h]h]h]h]h]uhKEhhh]rcdocutils.nodes strong r)r}r(hjh}r(h]h]h]h]h]uhjh]rhXRebuilding the demo:rr}r(hUhjubahUstrongrubaubh)r}r(hUhhhhhjh}r(h]h]h]h]h]uhKGhhh]r(j)r}r(hUjKhjhhhhh}r(h]h]h]h]h]uhKhhh]ubj)r}r(hX**ARM Linux:**rjKhjhhhhh}r(h]h]h]h]h]uhKHhhh]rj)r}r(hjh}r(h]h]h]h]h]uhjh]rhX ARM Linux:rr}r(hUhjubahjubaubeubh)r}r(hX5**1.** Install Linux Proc SDK at the default locationrhhhhhhh}r(h]h]h]h]h]uhKJhhh]r(j)r}r(hX**1.**h}r(h]h]h]h]h]uhjh]rhX1.rr}r(hUhjubahjubhX/ Install Linux Proc SDK at the default locationrr}r(hX/ Install Linux Proc SDK at the default locationhjubeubh)r}r(hX4**2.** Include cross-compiler directory in the $PATHrhhhhhhh}r(h]h]h]h]h]uhKLhhh]r(j)r}r(hX**2.**h}r(h]h]h]h]h]uhjh]rhX2.rr}r(hUhjubahjubhX. Include cross-compiler directory in the $PATHrr}r(hX. Include cross-compiler directory in the $PATHhjubeubj)r}r(hXMexport PATH=/linux-devkit/sysroots/x86_64-arago-linux/usr/bin:$PATHhhhhhjh}r(hhh]h]h]h]h]uhKhhh]rhXMexport PATH=/linux-devkit/sysroots/x86_64-arago-linux/usr/bin:$PATHrr}r(hUhjubaubh)r}r(hX**3.** Setup TI RTOS PATH usingrhhhhhhh}r(h]h]h]h]h]uhKRhhh]r(j)r}r(hX**3.**h}r(h]h]h]h]h]uhjh]rhX3.rr}r(hUhjubahjubhX Setup TI RTOS PATH usingrr}r(hX Setup TI RTOS PATH usinghjubeubj)r}r(hXUexport TI_RTOS_PATH= export IPC_INSTALL_PATH=hhhhhjh}r(hhh]h]h]h]h]uhKhhh]rhXUexport TI_RTOS_PATH= export IPC_INSTALL_PATH=rr}r(hUhjubaubh)r}r(hX4**4.** In Linux Proc SDK, start the top level build:rhhhhhhh}r (h]h]h]h]h]uhKYhhh]r (j)r }r (hX**4.**h}r (h]h]h]h]h]uhjh]rhX4.rr}r(hUhj ubahjubhX. In Linux Proc SDK, start the top level build:rr}r(hX. In Linux Proc SDK, start the top level build:hjubeubj)r}r(hX$ make ti-ipc-linuxhhhhhjh}r(hhh]h]h]h]h]uhKhhh]rhX$ make ti-ipc-linuxrr}r(hUhjubaubcdocutils.nodes definition_list r)r}r(hUhhhhhUdefinition_listrh}r (h]h]h]h]h]uhNhhh]r!cdocutils.nodes definition_list_item r")r#}r$(hX**5.** The ARM binary will be located under the directory where the source code is /ipc\_x\_xx\_xx\_xx/linux/src/tests/ hjhhhUdefinition_list_itemr%h}r&(h]h]h]h]h]uhK`h]r'(cdocutils.nodes term r()r)}r*(hXC**5.** The ARM binary will be located under the directory where ther+hj#hhhUtermr,h}r-(h]h]h]h]h]uhK`h]r.(j)r/}r0(hX**5.**h}r1(h]h]h]h]h]uhj)h]r2hX5.r3r4}r5(hUhj/ubahjubhX= The ARM binary will be located under the directory where ther6r7}r8(hX= The ARM binary will be located under the directory where thehj)ubeubcdocutils.nodes definition r9)r:}r;(hUh}r<(h]h]h]h]h]uhj#h]r=h)r>}r?(hXLsource code is /ipc\_x\_xx\_xx\_xx/linux/src/tests/hj:hhhhh}r@(h]h]h]h]h]uhK`h]rAhXEsource code is /ipc_x_xx_xx_xx/linux/src/tests/rBrC}rD(hXLsource code is /ipc\_x\_xx\_xx\_xx/linux/src/tests/hj>ubaubahU definitionrEubeubaubj)rF}rG(hXPlease follow the build instruction in `Linux Kernel User Guide `__ to set up the build environment.hhhhhjh}rH(h]h]h]h]h]uhNhhh]rIh)rJ}rK(hXPlease follow the build instruction in `Linux Kernel User Guide `__ to set up the build environment.hjFhhhhh}rL(h]h]h]h]h]uhKdh]rM(hX'Please follow the build instruction in rNrO}rP(hX'Please follow the build instruction in hjJubj))rQ}rR(hXM`Linux Kernel User Guide `__h}rS(UnameXLinux Kernel User Guidej-X/Foundational_Components_Kernel_Users_Guide.htmlh]h]h]h]h]uhjJh]rThXLinux Kernel User GuiderUrV}rW(hUhjQubahj2ubhX! to set up the build environment.rXrY}rZ(hX! to set up the build environment.hjJubeubaubh)r[}r\(hUhhhhhjh}r](h]h]h]h]h]uhKhhhh]r^(j)r_}r`(hUjKhj[hhhhh}ra(h]h]h]h]h]uhKhhh]ubj)rb}rc(hX**DSP RTOS :**rdjKhj[hhhhh}re(h]h]h]h]h]uhKihhh]rfj)rg}rh(hjdh}ri(h]h]h]h]h]uhjbh]rjhX DSP RTOS :rkrl}rm(hUhjgubahjubaubeubh)rn}ro(hX4**1.** Install RTOS Proc SDK at the default locationrphhhhhhh}rq(h]h]h]h]h]uhKkhhh]rr(j)rs}rt(hX**1.**h}ru(h]h]h]h]h]uhjnh]rvhX1.rwrx}ry(hUhjsubahjubhX. Install RTOS Proc SDK at the default locationrzr{}r|(hX. Install RTOS Proc SDK at the default locationhjnubeubj)r}}r~(hUhhhhhjh}r(h]h]h]h]h]uhNhhh]rj")r}r(hX**2.** If RTOS Proc SDK and tools are not installed at its default location, then the environment variables, SDK\_INSTALL\_PATH and TOOLS\_INSTALL\_PATH need to be exported with their installed locations. hj}hhhj%h}r(h]h]h]h]h]uhKoh]r(j()r}r(hXB**2.** If RTOS Proc SDK and tools are not installed at its defaultrhjhhhj,h}r(h]h]h]h]h]uhKoh]r(j)r}r(hX**2.**h}r(h]h]h]h]h]uhjh]rhX2.rr}r(hUhjubahjubhX< If RTOS Proc SDK and tools are not installed at its defaultrr}r(hX< If RTOS Proc SDK and tools are not installed at its defaulthjubeubj9)r}r(hUh}r(h]h]h]h]h]uhjh]rh)r}r(hXlocation, then the environment variables, SDK\_INSTALL\_PATH and TOOLS\_INSTALL\_PATH need to be exported with their installed locations.hjhhhhh}r(h]h]h]h]h]uhKnh]rhXlocation, then the environment variables, SDK_INSTALL_PATH and TOOLS_INSTALL_PATH need to be exported with their installed locations.rr}r(hXlocation, then the environment variables, SDK\_INSTALL\_PATH and TOOLS\_INSTALL\_PATH need to be exported with their installed locations.hjubaubahjEubeubaubj)r}r(hX_export SDK_INSTALL_PATH= export TOOLS_INSTALL_PATH=hhhhhjh}r(hhh]h]h]h]h]uhKhhh]rhX_export SDK_INSTALL_PATH= export TOOLS_INSTALL_PATH=rr}r(hUhjubaubj)r}r(hXWFor ProcSDK 3.2 or older releases, tools are not included in RTOS SDK, so point to CCS:hhhhhjh}r(h]h]h]h]h]uhNhhh]rh)r}r(hXWFor ProcSDK 3.2 or older releases, tools are not included in RTOS SDK, so point to CCS:rhjhhhhh}r(h]h]h]h]h]uhKxh]rhXWFor ProcSDK 3.2 or older releases, tools are not included in RTOS SDK, so point to CCS:rr}r(hjhjubaubaubj)r}r(hX.export TOOLS_INSTALL_PATH=hhhhhjh}r(hhh]h]h]h]h]uhKhhh]rhX.export TOOLS_INSTALL_PATH=rr}r(hUhjubaubj)r}r(hUhhhhhjh}r(h]h]h]h]h]uhNhhh]rj")r}r(hX~**3.** Configure the build environment in /processor\_sdk\_rtos\_\_x\_xx\_xx\_xx directory hjhhhj%h}r(h]h]h]h]h]uhKh]r(j()r}r(hX)**3.** Configure the build environment inrhjhhhj,h}r(h]h]h]h]h]uhKh]r(j)r}r(hX**3.**h}r(h]h]h]h]h]uhjh]rhX3.rr}r(hUhjubahjubhX# Configure the build environment inrr}r(hX# Configure the build environment inhjubeubj9)r}r(hUh}r(h]h]h]h]h]uhjh]rh)r}r(hXS/processor\_sdk\_rtos\_\_x\_xx\_xx\_xx directoryhjhhhhh}r(h]h]h]h]h]uhKh]rhXI/processor_sdk_rtos__x_xx_xx_xx directoryrr}r(hXS/processor\_sdk\_rtos\_\_x\_xx\_xx\_xx directoryhjubaubahjEubeubaubj)r}r(hX[$ cd /processor_sdk_rtos__x_xx_xx_xx $ source ./setupenv.shhhhhhjh}r(hhh]h]h]h]h]uhKhhh]rhX[$ cd /processor_sdk_rtos__x_xx_xx_xx $ source ./setupenv.shrr}r(hUhjubaubh)r}r(hX!**4.** Start the top level build:rhhhhhhh}r(h]h]h]h]h]uhKhhh]r(j)r}r(hX**4.**h}r(h]h]h]h]h]uhjh]rhX4.rr}r(hUhjubahjubhX Start the top level build:rr}r(hX Start the top level build:hjubeubj)r}r(hX$ make ipc_bioshhhhhjh}r(hhh]h]h]h]h]uhKhhh]rhX$ make ipc_biosrr}r(hUhjubaubj)r}r(hUhhhhhjh}r(h]h]h]h]h]uhNhhh]rj")r}r(hXS**5.** The DSP binary will be located under the directory where the source code is hjhhhj%h}r(h]h]h]h]h]uhKh]r(j()r}r(hXC**5.** The DSP binary will be located under the directory where therhjhhhj,h}r(h]h]h]h]h]uhKh]r(j)r}r(hX**5.**h}r(h]h]h]h]h]uhjh]rhX5.r r }r (hUhjubahjubhX= The DSP binary will be located under the directory where ther r }r(hX= The DSP binary will be located under the directory where thehjubeubj9)r}r(hUh}r(h]h]h]h]h]uhjh]rh)r}r(hXsource code isrhjhhhhh}r(h]h]h]h]h]uhKh]rhXsource code isrr}r(hjhjubaubahjEubeubaubj)r}r(hX;/ipc_x_xx_xx_xx/packages/ti/ipc/testshhhhhjh}r(hhh]h]h]h]h]uhKhhh]rhX;/ipc_x_xx_xx_xx/packages/ti/ipc/testsrr }r!(hUhjubaubh)r"}r#(hUhhhhhjh}r$(h]h]h]h]h]uhKhhh]r%j)r&}r'(hUjKhj"hhhhh}r((h]h]h]h]h]uhKhhh]ubaubh)r)}r*(hXBuild IPC Linux examplesr+hhhhhhh}r,(h]r-Ubuild-ipc-linux-examplesr.ah]h]h]h]r/h$auhNhhh]r0hXBuild IPC Linux examplesr1r2}r3(hj+hj)ubaubh)r4}r5(hX&IPC package and its examples are delivered in RTOS Processor SDK, but can be built from Linux Proc SDK. To build IPC examples, both Linux and RTOS processor SDKs need to be installed. They can be downloaded from `SDK download page `__hhhhhhh}r6(h]h]h]h]h]uhKhhh]r7(hXIPC package and its examples are delivered in RTOS Processor SDK, but can be built from Linux Proc SDK. To build IPC examples, both Linux and RTOS processor SDKs need to be installed. They can be downloaded from r8r9}r:(hXIPC package and its examples are delivered in RTOS Processor SDK, but can be built from Linux Proc SDK. To build IPC examples, both Linux and RTOS processor SDKs need to be installed. They can be downloaded from hj4ubj))r;}r<(hXR`SDK download page `__h}r=(UnameXSDK download pagej-X:http://www.ti.com/lsds/ti/tools-software/processor_sw.pageh]h]h]h]h]uhj4h]r>hXSDK download pager?r@}rA(hUhj;ubahj2ubeubh)rB}rC(hXTo install Linux Proc SDK, please follow the instruction in `Download and Install the SDK `__hhhhhhh}rD(h]h]h]h]h]uhKhhh]rE(hX<To install Linux Proc SDK, please follow the instruction in rFrG}rH(hX<To install Linux Proc SDK, please follow the instruction in hjBubj))rI}rJ(hXM`Download and Install the SDK `__h}rK(UnameXDownload and Install the SDKj-X*Overview/Download_and_Install_the_SDK.htmlh]h]h]h]h]uhjBh]rLhXDownload and Install the SDKrMrN}rO(hUhjIubahj2ubeubh)rP}rQ(hXTo Install RTOS Proc SDK, please see `Processor SDK for RTOS `__hhhhhhh}rR(h]h]h]h]h]uhKhhh]rS(hX%To Install RTOS Proc SDK, please see rTrU}rV(hX%To Install RTOS Proc SDK, please see hjPubj))rW}rX(hX`Processor SDK for RTOS `__h}rY(UnameXProcessor SDK for RTOSj-Xlhttp://software-dl.ti.com/processor-sdk-rtos/esd/docs/latest/rtos/index_overview.html#processor-sdk-for-rtosh]h]h]h]h]uhjPh]rZhXProcessor SDK for RTOSr[r\}r](hUhjWubahj2ubeubh)r^}r_(hXOnce the Linux and RTOS Processor SDKs are installed at their default locations, the IPC Linux library, not included in the Linux Proc SDK, can be built on Linux host machine with the following commands:r`hhhhhhh}ra(h]h]h]h]h]uhKhhh]rbhXOnce the Linux and RTOS Processor SDKs are installed at their default locations, the IPC Linux library, not included in the Linux Proc SDK, can be built on Linux host machine with the following commands:rcrd}re(hj`hj^ubaubj)rf}rg(hX8$ cd $ make ti-ipc-linuxhhhhhjh}rh(hhh]h]h]h]h]uhMhhh]rihX8$ cd $ make ti-ipc-linuxrjrk}rl(hUhjfubaubh)rm}rn(hXeThe IPC examples in RTOS Proc SDK including out-of-box demo can be built with the following commands:rohhhhhhh}rp(h]h]h]h]h]uhKhhh]rqhXeThe IPC examples in RTOS Proc SDK including out-of-box demo can be built with the following commands:rrrs}rt(hjohjmubaubj)ru}rv(hXA$ cd $ make ti-ipc-linux-exampleshhhhhjh}rw(hhh]h]h]h]h]uhM hhh]rxhXA$ cd $ make ti-ipc-linux-examplesryrz}r{(hUhjuubaubj)r|}r}(hXPlease follow the build instruction in `Linux Kernel User Guide `__ to set up the build environment.hhhhhjh}r~(h]h]h]h]h]uhNhhh]rh)r}r(hXPlease follow the build instruction in `Linux Kernel User Guide `__ to set up the build environment.hj|hhhhh}r(h]h]h]h]h]uhKh]r(hX'Please follow the build instruction in rr}r(hX'Please follow the build instruction in hjubj))r}r(hXM`Linux Kernel User Guide `__h}r(UnameXLinux Kernel User Guidej-X/Foundational_Components_Kernel_Users_Guide.htmlh]h]h]h]h]uhjh]rhXLinux Kernel User Guiderr}r(hUhjubahj2ubhX! to set up the build environment.rr}r(hX! to set up the build environment.hjubeubaubj)r}r(hXIf RTOS Proc SDK is not installed at its default location, then the environment variables, TI\_RTOS\_PATH needs to be exported with their installed locations.hhhhhjh}r(h]h]h]h]h]uhNhhh]rh)r}r(hXIf RTOS Proc SDK is not installed at its default location, then the environment variables, TI\_RTOS\_PATH needs to be exported with their installed locations.hjhhhhh}r(h]h]h]h]h]uhKh]rhXIf RTOS Proc SDK is not installed at its default location, then the environment variables, TI_RTOS_PATH needs to be exported with their installed locations.rr}r(hXIf RTOS Proc SDK is not installed at its default location, then the environment variables, TI\_RTOS\_PATH needs to be exported with their installed locations.hjubaubaubj)r}r(hX2export TI_RTOS_PATH=hhhhhjh}r(hhh]h]h]h]h]uhMhhh]rhX2export TI_RTOS_PATH=rr}r(hUhjubaubh)r}r(hX`Also if using Processor SDK 3.2 or older release, need to also set TI_CCS_PATH to CCSV6 locationrhhhhhhh}r(h]h]h]h]h]uhKhhh]rhX`Also if using Processor SDK 3.2 or older release, need to also set TI_CCS_PATH to CCSV6 locationrr}r(hjhjubaubj)r}r(hX-export TI_CCS_PATH=/ccsv6hhhhhjh}r(hhh]h]h]h]h]uhM#hhh]rhX-export TI_CCS_PATH=/ccsv6rr}r(hUhjubaubh)r}r(hXRun IPC Linux examplesrhhhhhhh}r(h]rUrun-ipc-linux-examplesrah]h]h]h]rh[auhNhhh]rhXRun IPC Linux examplesrr}r(hjhjubaubj6)r}r(hUhhhhhj9h}r(j;U.h]h]h]j<Uh]h]j=j>uhKhhh]rj@)r}r(hXWThe executables are in RTOS Proc SDK under the ipc\_xx\_xx\_xx\_xx/examples directory. hjhhhjCh}r(h]h]h]h]h]uhNhhh]rh)r}r(hXVThe executables are in RTOS Proc SDK under the ipc\_xx\_xx\_xx\_xx/examples directory.hjhhhhh}r(h]h]h]h]h]uhKh]rhXRThe executables are in RTOS Proc SDK under the ipc_xx_xx_xx_xx/examples directory.rr}r(hXVThe executables are in RTOS Proc SDK under the ipc\_xx\_xx\_xx\_xx/examples directory.hjubaubaubaubj)r}r(hX__elf/ex/host/bin/debug/app_host __elf/ex/bin/debug/__elf/ex/bin/debug/__elf/ex/host/bin/debug/app_host __elf/ex/bin/debug/__elf/ex/bin/debug/uhKhhh]r(j@)r}r(hXHCopy the executables to the target filesystem. It can also be done by running "make ti-ipc-linux-examples\_install" to install the binaries to DESTDIR if using NFS filesystem. ( See `Moving\_Files\_to\_the\_Target\_System `__ for details of moving files to filesystem) hjhhhjCh}r(h]h]h]h]h]uhNhhh]rh)r}r(hXGCopy the executables to the target filesystem. It can also be done by running "make ti-ipc-linux-examples\_install" to install the binaries to DESTDIR if using NFS filesystem. ( See `Moving\_Files\_to\_the\_Target\_System `__ for details of moving files to filesystem)hjhhhhh}r(h]h]h]h]h]uhKh]r(hXCopy the executables to the target filesystem. It can also be done by running "make ti-ipc-linux-examples_install" to install the binaries to DESTDIR if using NFS filesystem. ( See rr}r(hXCopy the executables to the target filesystem. It can also be done by running "make ti-ipc-linux-examples\_install" to install the binaries to DESTDIR if using NFS filesystem. ( See hjubj))r}r(hXf`Moving\_Files\_to\_the\_Target\_System `__h}r(UnameX!Moving_Files_to_the_Target_Systemj-X9How_to_Guides/Host/Moving_Files_to_the_Target_System.htmlh]h]h]h]h]uhjh]rhX!Moving_Files_to_the_Target_Systemrr}r(hUhjubahj2ubhX+ for details of moving files to filesystem)rr}r(hX+ for details of moving files to filesystem)hjubeubaubj@)r}r(hX5Load and start the executable on the target DSP/IPU. hjhhhjCh}r(h]h]h]h]h]uhNhhh]rh)r}r(hX4Load and start the executable on the target DSP/IPU.rhjhhhhh}r(h]h]h]h]h]uhKh]rhX4Load and start the executable on the target DSP/IPU.rr}r(hjhjubaubaubeubh)r}r(hXFor AM57x platforms, Modify the symbolic links in /lib/firmware of the default image names to the built binaries. The images pointed by the symbolic links will be downloaded to and started execution on the corresponding processors by remoteproc during Linux Kernel boots.rhhhhhhh}r(h]h]h]h]h]uhKhhh]rhXFor AM57x platforms, Modify the symbolic links in /lib/firmware of the default image names to the built binaries. The images pointed by the symbolic links will be downloaded to and started execution on the corresponding processors by remoteproc during Linux Kernel boots.rr}r(hjhjubaubj)r}r(hXlDSP image files: dra7-dsp1-fw.xe66 dra7-dsp2-fw.xe66 IPU image files: dra7-ipu1-fw.xem4 dra7-ipu2-fw.xem4hhhhhjh}r(hhh]h]h]h]h]uhM@hhh]rhXlDSP image files: dra7-dsp1-fw.xe66 dra7-dsp2-fw.xe66 IPU image files: dra7-ipu1-fw.xem4 dra7-ipu2-fw.xem4rr}r(hUhjubaubh)r}r (hXoFor OMAP-L138 platform, Modify the symblic link in /lib/firmware of the default image names to the build binaryr hhhhhhh}r (h]h]h]h]h]uhKhhh]r hXoFor OMAP-L138 platform, Modify the symblic link in /lib/firmware of the default image names to the build binaryr r}r(hj hjubaubj)r}r(hXDSP image files: rproc-dsp-fwhhhhhjh}r(hhh]h]h]h]h]uhMHhhh]rhXDSP image files: rproc-dsp-fwrr}r(hUhjubaubh)r}r(hXFor Keystone-2 platforms, use the Multi-Processor Manager (MPM) Command Line utilities to download and start the DSP executibles. Please refer to /usr/bin/mc\_demo\_ipc.sh for exampleshhhhhhh}r(h]h]h]h]h]uhKhhh]rhXFor Keystone-2 platforms, use the Multi-Processor Manager (MPM) Command Line utilities to download and start the DSP executibles. Please refer to /usr/bin/mc_demo_ipc.sh for examplesrr}r(hXFor Keystone-2 platforms, use the Multi-Processor Manager (MPM) Command Line utilities to download and start the DSP executibles. Please refer to /usr/bin/mc\_demo\_ipc.sh for exampleshjubaubj)r}r(hXThe available commands are: mpmcl reset mpmcl status mpmcl load mpmcl run hhhhhjh}r (hhh]h]h]h]h]uhMPhhh]r!hXThe available commands are: mpmcl reset mpmcl status mpmcl load mpmcl run r"r#}r$(hUhjubaubj6)r%}r&(hUhhhhhj9h}r'(j;U.jKh]h]h]j<Uh]h]j=j>uhMhhh]r(j@)r)}r*(hXzRun the example From the Linux kernel prompt, run the host executable, app\_host. An example from running ex02\_messageq: hj%hhhjCh}r+(h]h]h]h]h]uhNhhh]r,h)r-}r.(hXyRun the example From the Linux kernel prompt, run the host executable, app\_host. An example from running ex02\_messageq:hj)hhhhh}r/(h]h]h]h]h]uhMh]r0hXwRun the example From the Linux kernel prompt, run the host executable, app_host. An example from running ex02_messageq:r1r2}r3(hXyRun the example From the Linux kernel prompt, run the host executable, app\_host. An example from running ex02\_messageq:hj-ubaubaubaubj)r4}r5(hX"root@am57xx-evm:~# ./app_host DSP1hhhhhjh}r6(hhh]h]h]h]h]uhM\hhh]r7hX"root@am57xx-evm:~# ./app_host DSP1r8r9}r:(hUhj4ubaubh)r;}r<(hXThe console output:r=hhhhhhh}r>(h]h]h]h]h]uhMhhh]r?hXThe console output:r@rA}rB(hj=hj;ubaubj)rC}rD(hX--> main: --> Main_main: --> App_create: App_create: Host is ready <-- App_create: --> App_exec: App_exec: sending message 1 App_exec: sending message 2 App_exec: sending message 3 App_exec: message received, sending message 4 App_exec: message received, sending message 5 App_exec: message received, sending message 6 App_exec: message received, sending message 7 App_exec: message received, sending message 8 App_exec: message received, sending message 9 App_exec: message received, sending message 10 App_exec: message received, sending message 11 App_exec: message received, sending message 12 App_exec: message received, sending message 13 App_exec: message received, sending message 14 App_exec: message received, sending message 15 App_exec : message received App_exec: message received App_exec: message received <-- App_exec: 0 --> App_delete: <-- App_delete: <-- Main_main: <-- main: root@am57xx-evm:~#hhhhhjh}rE(hhh]h]h]h]h]uhMbhhh]rFhX--> main: --> Main_main: --> App_create: App_create: Host is ready <-- App_create: --> App_exec: App_exec: sending message 1 App_exec: sending message 2 App_exec: sending message 3 App_exec: message received, sending message 4 App_exec: message received, sending message 5 App_exec: message received, sending message 6 App_exec: message received, sending message 7 App_exec: message received, sending message 8 App_exec: message received, sending message 9 App_exec: message received, sending message 10 App_exec: message received, sending message 11 App_exec: message received, sending message 12 App_exec: message received, sending message 13 App_exec: message received, sending message 14 App_exec: message received, sending message 15 App_exec : message received App_exec: message received App_exec: message received <-- App_exec: 0 --> App_delete: <-- App_delete: <-- Main_main: <-- main: root@am57xx-evm:~#rGrH}rI(hUhjCubaubh)rJ}rK(hUhhhhhjh}rL(h]h]h]h]h]uhM+hhh]rMj)rN}rO(hUjKhjJhhhhh}rP(h]h]h]h]h]uhKhhh]ubaubh)rQ}rR(hXBuild IPC RTOS examplesrShhhhhhh}rT(h]rUUbuild-ipc-rtos-examplesrVah]h]h]h]rWh0auhNhhh]rXhXBuild IPC RTOS examplesrYrZ}r[(hjShjQubaubh)r\}r](hXThe IPC package also includes examples for the use case with Host and the slave cores running RTOS/BIOS. They can be built from the Processor SDK RTOS package.r^hhhhhhh}r_(h]h]h]h]h]uhM0hhh]r`hXThe IPC package also includes examples for the use case with Host and the slave cores running RTOS/BIOS. They can be built from the Processor SDK RTOS package.rarb}rc(hj^hj\ubaubj)rd}re(hXmTo Install RTOS Proc SDK, please follow the instructions in `RTOS SDK Getting Started Guide `__ In the RTOS Processor SDK, the ipc examples are located under /processor\_sdk\_rtos\_\_x\_xx\_xx\_xx/ipc\_/examples/\_bios\_elf.hhhhhjh}rf(h]h]h]h]h]uhNhhh]rgh)rh}ri(hXmTo Install RTOS Proc SDK, please follow the instructions in `RTOS SDK Getting Started Guide `__ In the RTOS Processor SDK, the ipc examples are located under /processor\_sdk\_rtos\_\_x\_xx\_xx\_xx/ipc\_/examples/\_bios\_elf.hjdhhhhh}rj(h]h]h]h]h]uhM6h]rk(hX<To Install RTOS Proc SDK, please follow the instructions in rlrm}rn(hX<To Install RTOS Proc SDK, please follow the instructions in hjhubj))ro}rp(hXz`RTOS SDK Getting Started Guide `__h}rq(UnameXRTOS SDK Getting Started Guidej-XUhttp://software-dl.ti.com/processor-sdk-rtos/esd/docs/latest/rtos/index_overview.htmlh]h]h]h]h]uhjhh]rrhXRTOS SDK Getting Started Guidersrt}ru(hUhjoubahj2ubhX In the RTOS Processor SDK, the ipc examples are located under /processor_sdk_rtos__x_xx_xx_xx/ipc_/examples/_bios_elf.rvrw}rx(hX In the RTOS Processor SDK, the ipc examples are located under /processor\_sdk\_rtos\_\_x\_xx\_xx\_xx/ipc\_/examples/\_bios\_elf.hjhubeubaubh)ry}rz(hXNOTE: The platform in the directory name may be slightly different from the top level platform name. For example, platform name DRA7XX refer to common examples for DRA7XX & AM57x family of processors.r{hhhhhhh}r|(h]h]h]h]h]uhM<hhh]r}hXNOTE: The platform in the directory name may be slightly different from the top level platform name. For example, platform name DRA7XX refer to common examples for DRA7XX & AM57x family of processors.r~r}r(hj{hjyubaubh)r}r(hX}Once the RTOS Processor SDKs is installed at the default location, the IPC examples can be built with the following commands:rhhhhhhh}r(h]h]h]h]h]uhM@hhh]rhX}Once the RTOS Processor SDKs is installed at the default location, the IPC examples can be built with the following commands:rr}r(hjhjubaubj)r}r(hX1. Configure the build environment in /processor_sdk_rtos__x_xx_xx_xx directory $ cd /processor_sdk_rtos__x_xx_xx_xx $ source ./setupenv.sh 2. Start the top level build: $ make ipc_exampleshhhhhjh}r(hhh]h]h]h]h]uhMhhh]rhX1. Configure the build environment in /processor_sdk_rtos__x_xx_xx_xx directory $ cd /processor_sdk_rtos__x_xx_xx_xx $ source ./setupenv.sh 2. Start the top level build: $ make ipc_examplesrr}r(hUhjubaubj)r}r(hXIf RTOS Proc SDK and tools are not installed at its default location, then the environment variables, SDK\_INSTALL\_PATH and TOOLS\_INSTALL\_PATH need to be exported with their installed locations.hhhhhjh}r(h]h]h]h]h]uhNhhh]rh)r}r(hXIf RTOS Proc SDK and tools are not installed at its default location, then the environment variables, SDK\_INSTALL\_PATH and TOOLS\_INSTALL\_PATH need to be exported with their installed locations.hjhhhhh}r(h]h]h]h]h]uhMNh]rhXIf RTOS Proc SDK and tools are not installed at its default location, then the environment variables, SDK_INSTALL_PATH and TOOLS_INSTALL_PATH need to be exported with their installed locations.rr}r(hXIf RTOS Proc SDK and tools are not installed at its default location, then the environment variables, SDK\_INSTALL\_PATH and TOOLS\_INSTALL\_PATH need to be exported with their installed locations.hjubaubaubh)r}r(hUhhhhhjh}r(h]h]h]h]h]uhMRhhh]rj)r}r(hUjKhjhhhhh}r(h]h]h]h]h]uhKhhh]ubaubh)r}r(hXRun IPC RTOS examplesrhhhhhhh}r(h]rUrun-ipc-rtos-examplesrah]h]h]h]rh!auhNhhh]rhXRun IPC RTOS examplesrr}r(hjhjubaubh)r}r(hXThe binary images for the examples are located in the corresponding directories for host and the individual cores. The examples can be run by loading and running the binaries using CCS through JTAG.rhhhhhhh}r(h]h]h]h]h]uhMWhhh]rhXThe binary images for the examples are located in the corresponding directories for host and the individual cores. The examples can be run by loading and running the binaries using CCS through JTAG.rr}r(hjhjubaubh)r}r(hXBuild your own projectrhhhhhhh}r(h]rUbuild-your-own-projectrah]h]h]h]rhuauhNhhh]rhXBuild your own projectrr}r(hjhjubaubh)r}r(hXAfter exercising the IPC build and running examples, users can take further look at the source code of the examples as references for their own project.rhhhhhhh}r(h]h]h]h]h]uhM^hhh]rhXAfter exercising the IPC build and running examples, users can take further look at the source code of the examples as references for their own project.rr}r(hjhjubaubh)r}r(hXThe sources for examples are under ipc\_xx\_xx\_xx\_xx/examples/\_\_elf directories. Once modified the same build process described above can be used to rebuild the examples.hhhhhhh}r(h]h]h]h]h]uhMbhhh]rhXThe sources for examples are under ipc_xx_xx_xx_xx/examples/__elf directories. Once modified the same build process described above can be used to rebuild the examples.rr}r(hXThe sources for examples are under ipc\_xx\_xx\_xx\_xx/examples/\_\_elf directories. Once modified the same build process described above can be used to rebuild the examples.hjubaubeubh)r}r(hUhhhhhhh}r(h]h]h]h]rUipc-for-am57xxrah]rhZauhKhhh]r(h)r}r(hXIPC for AM57xxrhjhhhhh}r(h]h]h]h]h]uhKhhh]rhXIPC for AM57xxrr}r(hjhjubaubh)r}r(hX;http://processors.wiki.ti.com/index.php/Linux_IPC_on_AM57xxhjhhX?source/linux/Foundational_Components/IPC/IPC_for_AM57xx.rst.incrr}rbhhh}r(hhh]h]h]h]h]uhKhhh]rhX;http://processors.wiki.ti.com/index.php/Linux_IPC_on_AM57xxrr}r(hUhjubaubh)r}r(hX Introductionrhjhjhhh}r(h]rU introduction-linux-ipc-on-am57xxrah]h]h]h]rh`auhNhhh]rhX Introductionrr}r(hjhjubaubh)r}r(hXThis article is geared toward AM57xx users that are running Linux on the Cortex A15. The goal is to help users understand how to gain entitlement to the DSP (c66x) and IPU (Cortex M4) subsystems of the AM57xx.rhjhjhhh}r(h]h]h]h]h]uhKhhh]rhXThis article is geared toward AM57xx users that are running Linux on the Cortex A15. The goal is to help users understand how to gain entitlement to the DSP (c66x) and IPU (Cortex M4) subsystems of the AM57xx.rr}r(hjhjubaubh)r}r(hX1AM572x device has two IPU subsystems (IPUSS), each of which has 2 cores. IPU2 is used as a controller in multi-media applications, so if you have Processor SDK Linux running, chances are that IPU2 already has firmware loaded. However, IPU1 is open for general purpose programming to offload the ARM tasks.rhjhjhhh}r(h]h]h]h]h]uhK hhh]rhX1AM572x device has two IPU subsystems (IPUSS), each of which has 2 cores. IPU2 is used as a controller in multi-media applications, so if you have Processor SDK Linux running, chances are that IPU2 already has firmware loaded. However, IPU1 is open for general purpose programming to offload the ARM tasks.rr}r(hjhjubaubh)r}r(hXThere are many facets to this task: building, loading, debugging, MMUs, memory sharing, etc. This article intends to take incremental steps toward understanding all of those pieces.rhjhjhhh}r(h]h]h]h]h]uhKhhh]rhXThere are many facets to this task: building, loading, debugging, MMUs, memory sharing, etc. This article intends to take incremental steps toward understanding all of those pieces.rr }r (hjhjubaubh)r }r (hX$Software Dependencies to Get Startedr hjhjhhh}r(h]rU/ipc-am57xx-software-dependencies-to-get-startedrah]h]h]h]rh-auhNhhh]rhX$Software Dependencies to Get Startedrr}r(hj hj ubaubh)r}r(hX Prerequisitesrhjhjhhh}r(h]h]h]h]h]uhKhhh]rhX Prerequisitesrr}r(hjhjubaubcdocutils.nodes bullet_list r)r}r (hUhjhjhU bullet_listr!h}r"(Ubulletr#X-h]h]h]h]h]uhKhhh]r$(j@)r%}r&(hX`Processor SDK Linux for AM57xx `__ (Version 3.01 or newer needed)hjhjhjCh}r'(h]h]h]h]h]uhNhhh]r(h)r)}r*(hX`Processor SDK Linux for AM57xx `__ (Version 3.01 or newer needed)hj%hjhhh}r+(h]h]h]h]h]uhKh]r,(j))r-}r.(hXr`Processor SDK Linux for AM57xx `__h}r/(UnameXProcessor SDK Linux for AM57xxj-XMhttp://software-dl.ti.com/processor-sdk-linux/esd/AM57X/latest/index_FDS.htmlh]h]h]h]h]uhj)h]r0hXProcessor SDK Linux for AM57xxr1r2}r3(hUhj-ubahj2ubhX (Version 3.01 or newer needed)r4r5}r6(hX (Version 3.01 or newer needed)hj)ubeubaubj@)r7}r8(hXp`Processor SDK RTOS for AM57xx `__hjhjhjCh}r9(h]h]h]h]h]uhNhhh]r:h)r;}r<(hXp`Processor SDK RTOS for AM57xx `__r=hj7hjhhh}r>(h]h]h]h]h]uhKh]r?j))r@}rA(hj=h}rB(UnameXProcessor SDK RTOS for AM57xxj-XLhttp://software-dl.ti.com/processor-sdk-rtos/esd/AM57X/latest/index_FDS.htmlh]h]h]h]h]uhj;h]rChXProcessor SDK RTOS for AM57xxrDrE}rF(hUhj@ubahj2ubaubaubj@)rG}rH(hX`Code Composer Studio `__ (choose version as specified on Proc SDK download page) hjhjhjCh}rI(h]h]h]h]h]uhNhhh]rJh)rK}rL(hX`Code Composer Studio `__ (choose version as specified on Proc SDK download page)hjGhjhhh}rM(h]h]h]h]h]uhKh]rN(j))rO}rP(hXO`Code Composer Studio `__h}rQ(UnameXCode Composer Studioj-X4http://processors.wiki.ti.com/index.php/Download_CCSh]h]h]h]h]uhjKh]rRhXCode Composer StudiorSrT}rU(hUhjOubahj2ubhX8 (choose version as specified on Proc SDK download page)rVrW}rX(hX8 (choose version as specified on Proc SDK download page)hjKubeubaubeubj)rY}rZ(hX[Please be sure that you have the same version number for both Processor SDK RTOS and Linux.hjhjhjh}r[(h]h]h]h]h]uhNhhh]r\h)r]}r^(hX[Please be sure that you have the same version number for both Processor SDK RTOS and Linux.r_hjYhjhhh}r`(h]h]h]h]h]uhK"h]rahX[Please be sure that you have the same version number for both Processor SDK RTOS and Linux.rbrc}rd(hj_hj]ubaubaubh)re}rf(hXdFor reference within the context of this page, the Linux SDK is installed at the following location:rghjhjhhh}rh(h]h]h]h]h]uhK%hhh]rihXdFor reference within the context of this page, the Linux SDK is installed at the following location:rjrk}rl(hjghjeubaubj)rm}rn(hX/mnt/data/user/ti-processor-sdk-linux-am57xx-evm-xx.xx.xx.xx ├── bin ├── board-support ├── docs ├── example-applications ├── filesystem ├── ipc-build.txt ├── linux-devkit ├── Makefile ├── Rules.make └── setup.shhjhjhjh}ro(hhh]h]h]h]h]uhMhhh]rphX/mnt/data/user/ti-processor-sdk-linux-am57xx-evm-xx.xx.xx.xx ├── bin ├── board-support ├── docs ├── example-applications ├── filesystem ├── ipc-build.txt ├── linux-devkit ├── Makefile ├── Rules.make └── setup.shrqrr}rs(hUhjmubaubh)rt}ru(hXThe RTOS SDK is installed at:rvhjhjhhh}rw(h]h]h]h]h]uhK6hhh]rxhXThe RTOS SDK is installed at:ryrz}r{(hjvhjtubaubj)r|}r}(hX!/mnt/data/user/my_custom_install_sdk_rtos_am57xx_xx.xx ├── bios_6_xx_xx_xx ├── cg_xml ├── ctoolslib_x_x_x_x ├── dsplib_c66x_x_x_x_x ├── edma3_lld_2_xx_xx_xx ├── framework_components_x_xx_xx_xx ├── imglib_c66x_x_x_x_x ├── ipc_3_xx_xx_xx ├── mathlib_c66x_3_x_x_x ├── ndk_2_xx_xx_xx ├── opencl_rtos_am57xx_01_01_xx_xx ├── openmp_dsp_am57xx_2_04_xx_xx ├── pdk_am57xx_x_x_x ├── processor_sdk_rtos_am57xx_x_xx_xx_xx ├── uia_2_xx_xx_xx ├── xdais_7_xx_xx_xxhjhjhjh}r~(hhh]h]h]h]h]uhMhhh]rhX!/mnt/data/user/my_custom_install_sdk_rtos_am57xx_xx.xx ├── bios_6_xx_xx_xx ├── cg_xml ├── ctoolslib_x_x_x_x ├── dsplib_c66x_x_x_x_x ├── edma3_lld_2_xx_xx_xx ├── framework_components_x_xx_xx_xx ├── imglib_c66x_x_x_x_x ├── ipc_3_xx_xx_xx ├── mathlib_c66x_3_x_x_x ├── ndk_2_xx_xx_xx ├── opencl_rtos_am57xx_01_01_xx_xx ├── openmp_dsp_am57xx_2_04_xx_xx ├── pdk_am57xx_x_x_x ├── processor_sdk_rtos_am57xx_x_xx_xx_xx ├── uia_2_xx_xx_xx ├── xdais_7_xx_xx_xxrr}r(hUhj|ubaubh)r}r(hXCCS is installed at:rhjhjhhh}r(h]h]h]h]h]uhKLhhh]rhXCCS is installed at:rr}r(hjhjubaubj)r}r(hX[/mnt/data/user/ti/my_custom_ccs_x.x.x_install ├── ccsvX │   ├── ccs_base │   ├── doc │   ├── eclipse │   ├── install_info │   ├── install_logs │   ├── install_scripts │   ├── tools │   ├── uninstall_ccs │   ├── uninstall_ccs.dat │   ├── uninstallers │   └── utils ├── Code Composer Studio x.x.x.desktop └── xdctools_x_xx_xx_xx_core ├── bin ├── config.jar ├── docs ├── eclipse ├── etc ├── gmake ├── include ├── package ├── packages ├── package.xdc ├── tconfini.tcf ├── xdc ├── xdctools_3_xx_xx_xx_manifest.html ├── xdctools_3_xx_xx_xx_release_notes.html ├── xs └── xs.x86Uhjhjhjh}r(hhh]h]h]h]h]uhMhhh]rhX[/mnt/data/user/ti/my_custom_ccs_x.x.x_install ├── ccsvX │   ├── ccs_base │   ├── doc │   ├── eclipse │   ├── install_info │   ├── install_logs │   ├── install_scripts │   ├── tools │   ├── uninstall_ccs │   ├── uninstall_ccs.dat │   ├── uninstallers │   └── utils ├── Code Composer Studio x.x.x.desktop └── xdctools_x_xx_xx_xx_core ├── bin ├── config.jar ├── docs ├── eclipse ├── etc ├── gmake ├── include ├── package ├── packages ├── package.xdc ├── tconfini.tcf ├── xdc ├── xdctools_3_xx_xx_xx_manifest.html ├── xdctools_3_xx_xx_xx_release_notes.html ├── xs └── xs.x86Urr}r(hUhjubaubh)r}r(hUhjhjhjh}r(h]h]h]h]h]uhKphhh]rj)r}r(hUjKhjhjhhh}r(h]h]h]h]h]uhKhhh]ubaubh)r}r(hX/Typical Boot Flow on AM572x for ARM Linux usersrhjhjhhh}r(h]rU/typical-boot-flow-on-am572x-for-arm-linux-usersrah]h]h]h]rhrauhNhhh]rhX/Typical Boot Flow on AM572x for ARM Linux usersrr}r(hjhjubaubh)r}r(hX:AM57xx SOC's have multiple processor cores - Cortex A15, C66x DSP's and ARM M4 cores. The A15 typically runs a HLOS like Linux/QNX/Android and the remotecores(DSP's and M4's) run a RTOS. In the normal operation, boot loader(U-Boot/SPL) boots and loads the A15 with the HLOS. The A15 boots the DSP and the M4 cores.rhjhjhhh}r(h]h]h]h]h]uhKuhhh]rhX:AM57xx SOC's have multiple processor cores - Cortex A15, C66x DSP's and ARM M4 cores. The A15 typically runs a HLOS like Linux/QNX/Android and the remotecores(DSP's and M4's) run a RTOS. In the normal operation, boot loader(U-Boot/SPL) boots and loads the A15 with the HLOS. The A15 boots the DSP and the M4 cores.rr}r(hjhjubaubjr)r}r(hX%.. Image:: ../images/Normal-boot.png hjhjhjyh}r(UuriXlinux/../images/Normal-boot.pngrh]h]h]h]jw}rU*jsh]uhK|hhh]ubh)r}r(hXIn this sequence, the interval between the Power on Reset and the remotecores (i.e. the DSP's and the M4's) executing is dependent on the HLOS initialization time.rhjhjhhh}r(h]h]h]h]h]uhK}hhh]rhXIn this sequence, the interval between the Power on Reset and the remotecores (i.e. the DSP's and the M4's) executing is dependent on the HLOS initialization time.rr}r(hjhjubaubh)r}r(hUhjhjhjh}r(h]h]h]h]h]uhKhhh]rj)r}r(hUjKhjhjhhh}r(h]h]h]h]h]uhKhhh]ubaubh)r}r(hX'Getting Started with IPC Linux Examplesrhjhjhhh}r(h]rU2ipc-am57xx-getting-started-with-ipc-linux-examplesrah]h]h]h]rhyauhNhhh]rhX'Getting Started with IPC Linux Examplesrr}r(hjhjubaubh)r}r(hXThe figure below illustrates how remoteproc/rpmsg driver from ARM Linux kernel communicates with IPC driver on slave processor (e.g. DSP, IPU, etc) running RTOS.rhjhjhhh}r(h]h]h]h]h]uhKhhh]rhXThe figure below illustrates how remoteproc/rpmsg driver from ARM Linux kernel communicates with IPC driver on slave processor (e.g. DSP, IPU, etc) running RTOS.rr}r(hjhjubaubjr)r}r(hX2.. Image:: ../images/LinuxIPC_with_RTOS_Slave.png hjhjhjyh}r(UuriX,linux/../images/LinuxIPC_with_RTOS_Slave.pngrh]h]h]h]jw}rU*jsh]uhKhhh]ubh)r}r(hXIn order to setup IPC on slave cores, we provide some pre-built examples in IPC package that can be run from ARM Linux. The subsequent sections describe how to build and run this examples and use that as a starting point for this effort.rhjhjhhh}r(h]h]h]h]h]uhKhhh]rhXIn order to setup IPC on slave cores, we provide some pre-built examples in IPC package that can be run from ARM Linux. The subsequent sections describe how to build and run this examples and use that as a starting point for this effort.rr}r(hjhjubaubh)r}r(hX!Building the Bundled IPC Examplesrhjhjhhh}r(h]rU,ipc-am57xx-building-the-bundled-ipc-examplesrah]h]h]h]rhhauhNhhh]rhX!Building the Bundled IPC Examplesrr}r(hjhjubaubh)r}r(hXThe instructions to build IPC examples found under ipc\_3\_xx\_xx\_xx/examples/DRA7XX\_linux\_elf have been provided in the **`Processor\_SDK IPC Quick Start Guide `__.**hjhjhhh}r(h]h]h]h]h]uhKhhh]r(hXvThe instructions to build IPC examples found under ipc_3_xx_xx_xx/examples/DRA7XX_linux_elf have been provided in the rr}r(hX|The instructions to build IPC examples found under ipc\_3\_xx\_xx\_xx/examples/DRA7XX\_linux\_elf have been provided in the hjubj)r}r(hXf**`Processor\_SDK IPC Quick Start Guide `__.**h}r(h]h]h]h]h]uhjh]rhXa`Processor_SDK IPC Quick Start Guide `__.rr}r(hUhjubahjubeubh)r}r(hXLet's focus on one example in particular, ex02\_messageq, which is located at **/ipc\_3\_xx\_xx\_xx/examples/DRA7XX\_linux\_elf/ex02\_messageq**. Here are the key files that you should see after a successful build:hjhjhhh}r(h]h]h]h]h]uhKhhh]r(hXMLet's focus on one example in particular, ex02_messageq, which is located at rr}r(hXNLet's focus on one example in particular, ex02\_messageq, which is located at hjubj)r}r(hXX**/ipc\_3\_xx\_xx\_xx/examples/DRA7XX\_linux\_elf/ex02\_messageq**h}r(h]h]h]h]h]uhjh]rhXM/ipc_3_xx_xx_xx/examples/DRA7XX_linux_elf/ex02_messageqrr}r(hUhjubahjubhXF. Here are the key files that you should see after a successful build:rr}r (hXF. Here are the key files that you should see after a successful build:hjubeubj)r }r (hX├── dsp1 │   └── bin │      ├── debug │      │   └── server_dsp1.xe66 │      └── release │      └── server_dsp1.xe66 ├── dsp2 │   └── bin │      ├── debug │      │   └── server_dsp2.xe66 │      └── release │      └── server_dsp2.xe66 ├── host │      ├── debug │      │   └── app_host │      └── release │      └── app_host ├── ipu1 │   └── bin │      ├── debug │      │   └── server_ipu1.xem4 │      └── release │      └── server_ipu1.xem4 └── ipu2    └── bin       ├── debug       │   └── server_ipu2.xem4       └── release       └── server_ipu2.xem4hjhjhjh}r (hhh]h]h]h]h]uhMbhhh]r hX├── dsp1 │   └── bin │      ├── debug │      │   └── server_dsp1.xe66 │      └── release │      └── server_dsp1.xe66 ├── dsp2 │   └── bin │      ├── debug │      │   └── server_dsp2.xe66 │      └── release │      └── server_dsp2.xe66 ├── host │      ├── debug │      │   └── app_host │      └── release │      └── app_host ├── ipu1 │   └── bin │      ├── debug │      │   └── server_ipu1.xem4 │      └── release │      └── server_ipu1.xem4 └── ipu2    └── bin       ├── debug       │   └── server_ipu2.xem4       └── release       └── server_ipu2.xem4rr}r(hUhj ubaubh)r}r(hUhjhjhjh}r(h]h]h]h]h]uhKhhh]rj)r}r(hUjKhjhjhhh}r(h]h]h]h]h]uhKhhh]ubaubh)r}r(hUhjhjhjh}r(h]h]h]h]h]uhKhhh]rj)r}r(hUjKhjhjhhh}r(h]h]h]h]h]uhKhhh]ubaubh)r}r (hX Running the Bundled IPC Examplesr!hjhjhhh}r"(h]r#U+ipc-am57xx-running-the-bundled-ipc-examplesr$ah]h]h]h]r%hIauhNhhh]r&hX Running the Bundled IPC Examplesr'r(}r)(hj!hjubaubh)r*}r+(hX;On the target, let's create a directory called ipc-starter:r,hjhjhhh}r-(h]h]h]h]h]uhKhhh]r.hX;On the target, let's create a directory called ipc-starter:r/r0}r1(hj,hj*ubaubj)r2}r3(hX`root@am57xx-evm:~# mkdir -p /home/root/ipc-starter root@am57xx-evm:~# cd /home/root/ipc-starter/hjhjhjh}r4(hhh]h]h]h]h]uhMhhh]r5hX`root@am57xx-evm:~# mkdir -p /home/root/ipc-starter root@am57xx-evm:~# cd /home/root/ipc-starter/r6r7}r8(hUhj2ubaubh)r9}r:(hXYou will need to copy the ex02\_messageq directory of your host PC to that directory on the target (through SD card, NFS export, SCP, etc.). You can copy the entire directory, though we're primarily interested in these files:hjhjhhh}r;(h]h]h]h]h]uhKhhh]r<hXYou will need to copy the ex02_messageq directory of your host PC to that directory on the target (through SD card, NFS export, SCP, etc.). You can copy the entire directory, though we're primarily interested in these files:r=r>}r?(hXYou will need to copy the ex02\_messageq directory of your host PC to that directory on the target (through SD card, NFS export, SCP, etc.). You can copy the entire directory, though we're primarily interested in these files:hj9ubaubj)r@}rA(hUhjhjhj!h}rB(j#X-h]h]h]h]h]uhKhhh]rC(j@)rD}rE(hX dsp1/bin/debug/server\_dsp1.xe66rFhj@hjhjCh}rG(h]h]h]h]h]uhNhhh]rHh)rI}rJ(hjFhjDhjhhh}rK(h]h]h]h]h]uhKh]rLhXdsp1/bin/debug/server_dsp1.xe66rMrN}rO(hX dsp1/bin/debug/server\_dsp1.xe66hjIubaubaubj@)rP}rQ(hX dsp2/bin/debug/server\_dsp2.xe66rRhj@hjhjCh}rS(h]h]h]h]h]uhNhhh]rTh)rU}rV(hjRhjPhjhhh}rW(h]h]h]h]h]uhKh]rXhXdsp2/bin/debug/server_dsp2.xe66rYrZ}r[(hX dsp2/bin/debug/server\_dsp2.xe66hjUubaubaubj@)r\}r](hXhost/bin/debug/app\_hostr^hj@hjhjCh}r_(h]h]h]h]h]uhNhhh]r`h)ra}rb(hj^hj\hjhhh}rc(h]h]h]h]h]uhKh]rdhXhost/bin/debug/app_hostrerf}rg(hXhost/bin/debug/app\_hosthjaubaubaubj@)rh}ri(hX ipu1/bin/debug/server\_ipu1.xem4rjhj@hjhjCh}rk(h]h]h]h]h]uhNhhh]rlh)rm}rn(hjjhjhhjhhh}ro(h]h]h]h]h]uhKh]rphXipu1/bin/debug/server_ipu1.xem4rqrr}rs(hX ipu1/bin/debug/server\_ipu1.xem4hjmubaubaubj@)rt}ru(hX!ipu2/bin/debug/server\_ipu2.xem4 hj@hjhjCh}rv(h]h]h]h]h]uhNhhh]rwh)rx}ry(hX ipu2/bin/debug/server\_ipu2.xem4hjthjhhh}rz(h]h]h]h]h]uhKh]r{hXipu2/bin/debug/server_ipu2.xem4r|r}}r~(hX ipu2/bin/debug/server\_ipu2.xem4hjxubaubaubeubh)r}r(hXxThe remoteproc driver is hard-coded to look for specific files when loading the DSP/M4. Here are the files it looks for:rhjhjhhh}r(h]h]h]h]h]uhKhhh]rhXxThe remoteproc driver is hard-coded to look for specific files when loading the DSP/M4. Here are the files it looks for:rr}r(hjhjubaubj)r}r(hUhjhjhj!h}r(j#X-h]h]h]h]h]uhKhhh]r(j@)r}r(hX/lib/firmware/dra7-dsp1-fw.xe66rhjhjhjCh}r(h]h]h]h]h]uhNhhh]rh)r}r(hjhjhjhhh}r(h]h]h]h]h]uhKh]rhX/lib/firmware/dra7-dsp1-fw.xe66rr}r(hjhjubaubaubj@)r}r(hX/lib/firmware/dra7-dsp2-fw.xe66rhjhjhjCh}r(h]h]h]h]h]uhNhhh]rh)r}r(hjhjhjhhh}r(h]h]h]h]h]uhKh]rhX/lib/firmware/dra7-dsp2-fw.xe66rr}r(hjhjubaubaubj@)r}r(hX/lib/firmware/dra7-ipu1-fw.xem4rhjhjhjCh}r(h]h]h]h]h]uhNhhh]rh)r}r(hjhjhjhhh}r(h]h]h]h]h]uhKh]rhX/lib/firmware/dra7-ipu1-fw.xem4rr}r(hjhjubaubaubj@)r}r(hX /lib/firmware/dra7-ipu2-fw.xem4 hjhjhjCh}r(h]h]h]h]h]uhNhhh]rh)r}r(hX/lib/firmware/dra7-ipu2-fw.xem4rhjhjhhh}r(h]h]h]h]h]uhKh]rhX/lib/firmware/dra7-ipu2-fw.xem4rr}r(hjhjubaubaubeubh)r}r(hX{These are generally a soft link to the intended executable. So for example, let's update the DSP1 executable on the target:rhjhjhhh}r(h]h]h]h]h]uhKhhh]rhX{These are generally a soft link to the intended executable. So for example, let's update the DSP1 executable on the target:rr}r(hjhjubaubj)r}r(hXroot@am57xx-evm:~# cd /lib/firmware/ root@am57xx-evm:/lib/firmware# rm dra7-dsp1-fw.xe66 root@am57xx-evm:/lib/firmware# ln -s /home/root/ipc-starter/ex02_messageq/dsp1/bin/debug/server_dsp1.xe66 dra7-dsp1-fw.xe66hjhjhjh}r(hhh]h]h]h]h]uhMhhh]rhXroot@am57xx-evm:~# cd /lib/firmware/ root@am57xx-evm:/lib/firmware# rm dra7-dsp1-fw.xe66 root@am57xx-evm:/lib/firmware# ln -s /home/root/ipc-starter/ex02_messageq/dsp1/bin/debug/server_dsp1.xe66 dra7-dsp1-fw.xe66rr}r(hUhjubaubh)r}r(hXHTo reload DSP1 with this new executable, we perform the following steps:rhjhjhhh}r(h]h]h]h]h]uhKhhh]rhXHTo reload DSP1 with this new executable, we perform the following steps:rr}r(hjhjubaubj)r}r(hXroot@am57xx-evm:/lib/firmware# cd /sys/bus/platform/drivers/omap-rproc/ root@am57xx-evm:/sys/bus/platform/drivers/omap-rproc# echo 40800000.dsp > unbind [27639.985631] omap_hwmod: mmu0_dsp1: _wait_target_disable failed [27639.991534] omap-iommu 40d01000.mmu: 40d01000.mmu: version 3.0 [27639.997610] omap-iommu 40d02000.mmu: 40d02000.mmu: version 3.0 [27640.017557] omap_hwmod: mmu1_dsp1: _wait_target_disable failed [27640.030571] omap_hwmod: mmu0_dsp1: _wait_target_disable failed [27640.036605] remoteproc2: stopped remote processor 40800000.dsp [27640.042805] remoteproc2: releasing 40800000.dsp root@am57xx-evm:/sys/bus/platform/drivers/omap-rproc# echo 40800000.dsp > bind [27645.958613] omap-rproc 40800000.dsp: assigned reserved memory node dsp1_cma@99000000 [27645.966452] remoteproc2: 40800000.dsp is available [27645.971410] remoteproc2: Note: remoteproc is still under development and considered experimental. [27645.980536] remoteproc2: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. root@am57xx-evm:/sys/bus/platform/drivers/omap-rproc# [27646.008171] remoteproc2: powering up 40800000.dsp [27646.013038] remoteproc2: Booting fw image dra7-dsp1-fw.xe66, size 4706800 [27646.028920] omap_hwmod: mmu0_dsp1: _wait_target_disable failed [27646.034819] omap-iommu 40d01000.mmu: 40d01000.mmu: version 3.0 [27646.040772] omap-iommu 40d02000.mmu: 40d02000.mmu: version 3.0 [27646.058323] remoteproc2: remote processor 40800000.dsp is now up [27646.064772] virtio_rpmsg_bus virtio2: rpmsg host is online [27646.072271] remoteproc2: registered virtio2 (type 7) [27646.078026] virtio_rpmsg_bus virtio2: creating channel rpmsg-proto addr 0x3dhjhjhjh}r(hhh]h]h]h]h]uhMhhh]rhXroot@am57xx-evm:/lib/firmware# cd /sys/bus/platform/drivers/omap-rproc/ root@am57xx-evm:/sys/bus/platform/drivers/omap-rproc# echo 40800000.dsp > unbind [27639.985631] omap_hwmod: mmu0_dsp1: _wait_target_disable failed [27639.991534] omap-iommu 40d01000.mmu: 40d01000.mmu: version 3.0 [27639.997610] omap-iommu 40d02000.mmu: 40d02000.mmu: version 3.0 [27640.017557] omap_hwmod: mmu1_dsp1: _wait_target_disable failed [27640.030571] omap_hwmod: mmu0_dsp1: _wait_target_disable failed [27640.036605] remoteproc2: stopped remote processor 40800000.dsp [27640.042805] remoteproc2: releasing 40800000.dsp root@am57xx-evm:/sys/bus/platform/drivers/omap-rproc# echo 40800000.dsp > bind [27645.958613] omap-rproc 40800000.dsp: assigned reserved memory node dsp1_cma@99000000 [27645.966452] remoteproc2: 40800000.dsp is available [27645.971410] remoteproc2: Note: remoteproc is still under development and considered experimental. [27645.980536] remoteproc2: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. root@am57xx-evm:/sys/bus/platform/drivers/omap-rproc# [27646.008171] remoteproc2: powering up 40800000.dsp [27646.013038] remoteproc2: Booting fw image dra7-dsp1-fw.xe66, size 4706800 [27646.028920] omap_hwmod: mmu0_dsp1: _wait_target_disable failed [27646.034819] omap-iommu 40d01000.mmu: 40d01000.mmu: version 3.0 [27646.040772] omap-iommu 40d02000.mmu: 40d02000.mmu: version 3.0 [27646.058323] remoteproc2: remote processor 40800000.dsp is now up [27646.064772] virtio_rpmsg_bus virtio2: rpmsg host is online [27646.072271] remoteproc2: registered virtio2 (type 7) [27646.078026] virtio_rpmsg_bus virtio2: creating channel rpmsg-proto addr 0x3drr}r(hUhjubaubh)r}r(hXMore info related to loading firmware to the various cores can be found `here `__.hjhjhhh}r(h]h]h]h]h]uhMhhh]r(hXHMore info related to loading firmware to the various cores can be found rr}r(hXHMore info related to loading firmware to the various cores can be found hjubj))r}r(hXW`here `__h}r(UnameXherej-XLFoundational_Components_Multimedia_IVAHD.html#firmware-loading-and-unloadingh]h]h]h]h]uhjh]rhXhererr}r(hUhjubahj2ubhX.r}r(hX.hjubeubh)r}r(hX(Finally, we can run the example on DSP1:rhjhjhhh}r(h]h]h]h]h]uhMhhh]rhX(Finally, we can run the example on DSP1:rr}r(hjhjubaubj)r}r(hXroot@am57xx-evm:/sys/bus/platform/drivers/omap-rproc# cd /home/root/ipc-starter/ex02_messageq/host/bin/debug root@am57xx-evm:~/ipc-starter/ex02_messageq/host/bin/debug# ./app_host DSP1 --> main: [33590.700700] omap_hwmod: mmu0_dsp2: _wait_target_disable failed [33590.706609] omap-iommu 41501000.mmu: 41501000.mmu: version 3.0 [33590.718798] omap-iommu 41502000.mmu: 41502000.mmu: version 3.0 --> Main_main: --> App_create: App_create: Host is ready <-- App_create: --> App_exec: App_exec: sending message 1 App_exec: sending message 2 App_exec: sending message 3 App_exec: message received, sending message 4 App_exec: message received, sending message 5 App_exec: message received, sending message 6 App_exec: message received, sending message 7 App_exec: message received, sending message 8 App_exec: message received, sending message 9 App_exec: message received, sending message 10 App_exec: message received, sending message 11 App_exec: message received, sending message 12 App_exec: message received, sending message 13 App_exec: message received, sending message 14 App_exec: message received, sending message 15 App_exec: message received App_exec: message received App_exec: message received <-- App_exec: 0 --> App_delete: <-- App_delete: <-- Main_main: <-- main:hjhjhjh}r(hhh]h]h]h]h]uhMhhh]rhXroot@am57xx-evm:/sys/bus/platform/drivers/omap-rproc# cd /home/root/ipc-starter/ex02_messageq/host/bin/debug root@am57xx-evm:~/ipc-starter/ex02_messageq/host/bin/debug# ./app_host DSP1 --> main: [33590.700700] omap_hwmod: mmu0_dsp2: _wait_target_disable failed [33590.706609] omap-iommu 41501000.mmu: 41501000.mmu: version 3.0 [33590.718798] omap-iommu 41502000.mmu: 41502000.mmu: version 3.0 --> Main_main: --> App_create: App_create: Host is ready <-- App_create: --> App_exec: App_exec: sending message 1 App_exec: sending message 2 App_exec: sending message 3 App_exec: message received, sending message 4 App_exec: message received, sending message 5 App_exec: message received, sending message 6 App_exec: message received, sending message 7 App_exec: message received, sending message 8 App_exec: message received, sending message 9 App_exec: message received, sending message 10 App_exec: message received, sending message 11 App_exec: message received, sending message 12 App_exec: message received, sending message 13 App_exec: message received, sending message 14 App_exec: message received, sending message 15 App_exec: message received App_exec: message received App_exec: message received <-- App_exec: 0 --> App_delete: <-- App_delete: <-- Main_main: <-- main:rr}r(hUhjubaubh)r}r(hUhjhjhjh}r(h]h]h]h]h]uhM.hhh]rj)r}r(hXThe similar procedure can be used for DSP2/IPU1/IPU2 also to update the soft link of the firmware, reload the firmware at run-time, and run the host binary from A15.rjKhjhjhhh}r(h]h]h]h]h]uhM0hhh]rhXThe similar procedure can be used for DSP2/IPU1/IPU2 also to update the soft link of the firmware, reload the firmware at run-time, and run the host binary from A15.rr}r(hjhjubaubaubh)r}r(hXUnderstanding the Memory Maprhjhjhhh}r(h]rU'ipc-am57xx-understanding-the-memory-mapr ah]h]h]h]r h/auhNhhh]r hXUnderstanding the Memory Mapr r }r(hjhjubaubh)r}r(hXOverall Linux Memory Maprhjhjhhh}r(h]rUoverall-linux-memory-maprah]h]h]h]rh=auhNhhh]rhXOverall Linux Memory Maprr}r(hjhjubaubj)r}r(hX(root@am57xx-evm:~# cat /proc/iomem [snip...] 58060000-58078fff : core 58820000-5882ffff : l2ram 58882000-588820ff : /ocp/mmu@58882000 80000000-9fffffff : System RAM 80008000-808d204b : Kernel code 80926000-809c96bf : Kernel data a0000000-abffffff : CMEM ac000000-ffcfffff : System RAMhjhjhjh}r(hhh]h]h]h]h]uhMhhh]rhX(root@am57xx-evm:~# cat /proc/iomem [snip...] 58060000-58078fff : core 58820000-5882ffff : l2ram 58882000-588820ff : /ocp/mmu@58882000 80000000-9fffffff : System RAM 80008000-808d204b : Kernel code 80926000-809c96bf : Kernel data a0000000-abffffff : CMEM ac000000-ffcfffff : System RAMrr}r (hUhjubaubh)r!}r"(hUhjhjhjh}r#(h]h]h]h]h]uhMEhhh]r$j)r%}r&(hUjKhj!hjhhh}r'(h]h]h]h]h]uhKhhh]ubaubh)r(}r)(hX CMA Carveoutsr*hjhjhhh}r+(h]r,U cma-carveoutsr-ah]h]h]h]r.hauhNhhh]r/hX CMA Carveoutsr0r1}r2(hj*hj(ubaubj)r3}r4(hXdroot@am57xx-evm:~# dmesg | grep -i cma [ 0.000000] Reserved memory: created CMA memory pool at 0x0000000095800000, size 56 MiB [ 0.000000] Reserved memory: initialized node ipu2_cma@95800000, compatible id shared-dma-pool [ 0.000000] Reserved memory: created CMA memory pool at 0x0000000099000000, size 64 MiB [ 0.000000] Reserved memory: initialized node dsp1_cma@99000000, compatible id shared-dma-pool [ 0.000000] Reserved memory: created CMA memory pool at 0x000000009d000000, size 32 MiB [ 0.000000] Reserved memory: initialized node ipu1_cma@9d000000, compatible id shared-dma-pool [ 0.000000] Reserved memory: created CMA memory pool at 0x000000009f000000, size 8 MiB [ 0.000000] Reserved memory: initialized node dsp2_cma@9f000000, compatible id shared-dma-pool [ 0.000000] cma: Reserved 24 MiB at 0x00000000fe400000 [ 0.000000] Memory: 1713468K/1897472K available (6535K kernel code, 358K rwdata, 2464K rodata, 332K init, 289K bss, 28356K reserved, 155648K cma-reserved, 1283072K highmem) [ 5.492945] omap-rproc 58820000.ipu: assigned reserved memory node ipu1_cma@9d000000 [ 5.603289] omap-rproc 55020000.ipu: assigned reserved memory node ipu2_cma@95800000 [ 5.713411] omap-rproc 40800000.dsp: assigned reserved memory node dsp1_cma@9b000000 [ 5.771990] omap-rproc 41000000.dsp: assigned reserved memory node dsp2_cma@9f000000hjhjhjh}r5(hhh]h]h]h]h]uhMhhh]r6hXdroot@am57xx-evm:~# dmesg | grep -i cma [ 0.000000] Reserved memory: created CMA memory pool at 0x0000000095800000, size 56 MiB [ 0.000000] Reserved memory: initialized node ipu2_cma@95800000, compatible id shared-dma-pool [ 0.000000] Reserved memory: created CMA memory pool at 0x0000000099000000, size 64 MiB [ 0.000000] Reserved memory: initialized node dsp1_cma@99000000, compatible id shared-dma-pool [ 0.000000] Reserved memory: created CMA memory pool at 0x000000009d000000, size 32 MiB [ 0.000000] Reserved memory: initialized node ipu1_cma@9d000000, compatible id shared-dma-pool [ 0.000000] Reserved memory: created CMA memory pool at 0x000000009f000000, size 8 MiB [ 0.000000] Reserved memory: initialized node dsp2_cma@9f000000, compatible id shared-dma-pool [ 0.000000] cma: Reserved 24 MiB at 0x00000000fe400000 [ 0.000000] Memory: 1713468K/1897472K available (6535K kernel code, 358K rwdata, 2464K rodata, 332K init, 289K bss, 28356K reserved, 155648K cma-reserved, 1283072K highmem) [ 5.492945] omap-rproc 58820000.ipu: assigned reserved memory node ipu1_cma@9d000000 [ 5.603289] omap-rproc 55020000.ipu: assigned reserved memory node ipu2_cma@95800000 [ 5.713411] omap-rproc 40800000.dsp: assigned reserved memory node dsp1_cma@9b000000 [ 5.771990] omap-rproc 41000000.dsp: assigned reserved memory node dsp2_cma@9f000000r7r8}r9(hUhj3ubaubh)r:}r;(hXPFrom the output above, we can derive the location and size of each CMA carveout:r<hjhjhhh}r=(h]h]h]h]h]uhM\hhh]r>hXPFrom the output above, we can derive the location and size of each CMA carveout:r?r@}rA(hj<hj:ubaubcdocutils.nodes table rB)rC}rD(hUhjhjhUtablerEh}rF(h]h]h]h]h]uhNhhh]rGcdocutils.nodes tgroup rH)rI}rJ(hUh}rK(h]h]h]h]h]UcolsKuhjCh]rL(cdocutils.nodes colspec rM)rN}rO(hUh}rP(h]h]h]h]h]UcolwidthKuhjIh]hUcolspecrQubjM)rR}rS(hUh}rT(h]h]h]h]h]UcolwidthKuhjIh]hjQubjM)rU}rV(hUh}rW(h]h]h]h]h]UcolwidthK uhjIh]hjQubcdocutils.nodes thead rX)rY}rZ(hUh}r[(h]h]h]h]h]uhjIh]r\cdocutils.nodes row r])r^}r_(hUh}r`(h]h]h]h]h]uhjYh]ra(cdocutils.nodes entry rb)rc}rd(hUh}re(h]h]h]h]h]uhj^h]rfh)rg}rh(hXMemory Sectionrihjchjhhh}rj(h]h]h]h]h]uhM`h]rkhXMemory Sectionrlrm}rn(hjihjgubaubahUentryroubjb)rp}rq(hUh}rr(h]h]h]h]h]uhj^h]rsh)rt}ru(hXPhysical Addressrvhjphjhhh}rw(h]h]h]h]h]uhM`h]rxhXPhysical Addressryrz}r{(hjvhjtubaubahjoubjb)r|}r}(hUh}r~(h]h]h]h]h]uhj^h]rh)r}r(hXSizerhj|hjhhh}r(h]h]h]h]h]uhM`h]rhXSizerr}r(hjhjubaubahjoubehUrowrubahUtheadrubcdocutils.nodes tbody r)r}r(hUh}r(h]h]h]h]h]uhjIh]r(j])r}r(hUh}r(h]h]h]h]h]uhjh]r(jb)r}r(hUh}r(h]h]h]h]h]uhjh]rh)r}r(hXIPU2 CMArhjhjhhh}r(h]h]h]h]h]uhMbh]rhXIPU2 CMArr}r(hjhjubaubahjoubjb)r}r(hUh}r(h]h]h]h]h]uhjh]rh)r}r(hX 0x95800000rhjhjhhh}r(h]h]h]h]h]uhMbh]rhX 0x95800000rr}r(hjhjubaubahjoubjb)r}r(hUh}r(h]h]h]h]h]uhjh]rh)r}r(hX56 MBrhjhjhhh}r(h]h]h]h]h]uhMbh]rhX56 MBrr}r(hjhjubaubahjoubehjubj])r}r(hUh}r(h]h]h]h]h]uhjh]r(jb)r}r(hUh}r(h]h]h]h]h]uhjh]rh)r}r(hXDSP1 CMArhjhjhhh}r(h]h]h]h]h]uhMdh]rhXDSP1 CMArr}r(hjhjubaubahjoubjb)r}r(hUh}r(h]h]h]h]h]uhjh]rh)r}r(hX 0x99000000rhjhjhhh}r(h]h]h]h]h]uhMdh]rhX 0x99000000rr}r(hjhjubaubahjoubjb)r}r(hUh}r(h]h]h]h]h]uhjh]rh)r}r(hX64 MBrhjhjhhh}r(h]h]h]h]h]uhMdh]rhX64 MBrr}r(hjhjubaubahjoubehjubj])r}r(hUh}r(h]h]h]h]h]uhjh]r(jb)r}r(hUh}r(h]h]h]h]h]uhjh]rh)r}r(hXIPU1 CMArhjhjhhh}r(h]h]h]h]h]uhMfh]rhXIPU1 CMArr}r(hjhjubaubahjoubjb)r}r(hUh}r(h]h]h]h]h]uhjh]rh)r}r(hX 0x9d000000rhjhjhhh}r(h]h]h]h]h]uhMfh]rhX 0x9d000000rr}r(hjhjubaubahjoubjb)r}r(hUh}r(h]h]h]h]h]uhjh]rh)r}r(hX32 MBrhjhjhhh}r(h]h]h]h]h]uhMfh]rhX32 MBrr}r(hjhjubaubahjoubehjubj])r}r(hUh}r (h]h]h]h]h]uhjh]r (jb)r }r (hUh}r (h]h]h]h]h]uhjh]rh)r}r(hXDSP2 CMArhj hjhhh}r(h]h]h]h]h]uhMhh]rhXDSP2 CMArr}r(hjhjubaubahjoubjb)r}r(hUh}r(h]h]h]h]h]uhjh]rh)r}r(hX 0x9f000000rhjhjhhh}r(h]h]h]h]h]uhMhh]rhX 0x9f000000r r!}r"(hjhjubaubahjoubjb)r#}r$(hUh}r%(h]h]h]h]h]uhjh]r&h)r'}r((hX8 MBr)hj#hjhhh}r*(h]h]h]h]h]uhMhh]r+hX8 MBr,r-}r.(hj)hj'ubaubahjoubehjubj])r/}r0(hUh}r1(h]h]h]h]h]uhjh]r2(jb)r3}r4(hUh}r5(h]h]h]h]h]uhj/h]r6h)r7}r8(hX Default CMAr9hj3hjhhh}r:(h]h]h]h]h]uhMjh]r;hX Default CMAr<r=}r>(hj9hj7ubaubahjoubjb)r?}r@(hUh}rA(h]h]h]h]h]uhj/h]rBh)rC}rD(hX 0xfe400000rEhj?hjhhh}rF(h]h]h]h]h]uhMjh]rGhX 0xfe400000rHrI}rJ(hjEhjCubaubahjoubjb)rK}rL(hUh}rM(h]h]h]h]h]uhj/h]rNh)rO}rP(hX24 MBrQhjKhjhhh}rR(h]h]h]h]h]uhMjh]rShX24 MBrTrU}rV(hjQhjOubaubahjoubehjubehUtbodyrWubehUtgrouprXubaubh)rY}rZ(hXFor details on how to adjust the sizes and locations of the DSP/IPU CMA carveouts, please see the corresponding section for changing the DSP or IPU memory map.r[hjhjhhh}r\(h]h]h]h]h]uhMmhhh]r]hXFor details on how to adjust the sizes and locations of the DSP/IPU CMA carveouts, please see the corresponding section for changing the DSP or IPU memory map.r^r_}r`(hj[hjYubaubh)ra}rb(hXZTo adjust the size of the "Default CMA" section, this is done as part of the Linux config:rchjhjhhh}rd(h]h]h]h]h]uhMqhhh]rehXZTo adjust the size of the "Default CMA" section, this is done as part of the Linux config:rfrg}rh(hjchjaubaubh)ri}rj(hX3linux/arch/arm/configs/tisdk\_am57xx-evm\_defconfigrkhjhjhhh}rl(h]h]h]h]h]uhMthhh]rmhX1linux/arch/arm/configs/tisdk_am57xx-evm_defconfigrnro}rp(hX3linux/arch/arm/configs/tisdk\_am57xx-evm\_defconfighjiubaubj)rq}rr(hXa# # Default contiguous memory area size: # CONFIG_CMA_SIZE_MBYTES=24 CONFIG_CMA_SIZE_SEL_MBYTES=yhjhjhjh}rs(UlinenosrtUlanguageruXchhh]h]h]Uhighlight_argsrv}h]h]uhMvhhh]rwhXa# # Default contiguous memory area size: # CONFIG_CMA_SIZE_MBYTES=24 CONFIG_CMA_SIZE_SEL_MBYTES=yrxry}rz(hUhjqubaubh)r{}r|(hUhjhjhjh}r}(h]h]h]h]h]uhM~hhh]r~j)r}r(hUjKhj{hjhhh}r(h]h]h]h]h]uhKhhh]ubaubh)r}r(hXCMEMrhjhjhhh}r(h]rUcmemrah]h]h]h]rhBauhNhhh]rhXCMEMrr}r(hjhjubaubh)r}r(hX#To view the allocation at run-time:rhjhjhhh}r(h]h]h]h]h]uhMhhh]rhX#To view the allocation at run-time:rr}r(hjhjubaubj)r}r(hXroot@am57xx-evm:~# cat /proc/cmem Block 0: Pool 0: 1 bufs size 0xc000000 (0xc000000 requested) Pool 0 busy bufs: Pool 0 free bufs: id 0: phys addr 0xa0000000hjhjhjh}r(hhh]h]h]h]h]uhMIhhh]rhXroot@am57xx-evm:~# cat /proc/cmem Block 0: Pool 0: 1 bufs size 0xc000000 (0xc000000 requested) Pool 0 busy bufs: Pool 0 free bufs: id 0: phys addr 0xa0000000rr}r(hUhjubaubh)r}r(hXThis shows that we have defined a CMEM block at physical base address of 0xA0000000 with total size 0xc000000 (192 MB). This block contains a buffer pool consisting of 1 buffer. Each buffer in the pool (only one in this case) is defined to have a size of 0xc000000 (192 MB).rhjhjhhh}r(h]h]h]h]h]uhMhhh]rhXThis shows that we have defined a CMEM block at physical base address of 0xA0000000 with total size 0xc000000 (192 MB). This block contains a buffer pool consisting of 1 buffer. Each buffer in the pool (only one in this case) is defined to have a size of 0xc000000 (192 MB).rr}r(hjhjubaubh)r}r(hXDHere is where those sizes/addresses were defined for the AM57xx EVM:rhjhjhhh}r(h]h]h]h]h]uhMhhh]rhXDHere is where those sizes/addresses were defined for the AM57xx EVM:rr}r(hjhjubaubh)r}r(hX,linux/arch/arm/boot/dts/am57xx-evm-cmem.dtsirhjhjhhh}r(h]h]h]h]h]uhMhhh]rhX,linux/arch/arm/boot/dts/am57xx-evm-cmem.dtsirr}r(hjhjubaubj)r}r(hX}/ { reserved-memory { #address-cells = <2>; #size-cells = <2>; ranges; cmem_block_mem_0: cmem_block_mem@a0000000 { reg = <0x0 0xa0000000 0x0 0x0c000000>; no-map; status = "okay"; }; cmem_block_mem_1_ocmc3: cmem_block_mem@40500000 { reg = <0x0 0x40500000 0x0 0x100000>; no-map; status = "okay"; }; }; cmem { compatible = "ti,cmem"; #address-cells = <1>; #size-cells = <0>; #pool-size-cells = <2>; status = "okay"; cmem_block_0: cmem_block@0 { reg = <0>; memory-region = <&cmem_block_mem_0>; cmem-buf-pools = <1 0x0 0x0c000000>; }; cmem_block_1: cmem_block@1 { reg = <1>; memory-region = <&cmem_block_mem_1_ocmc3>; }; }; };hjhjhjh}r(hhh]h]h]h]h]uhM]hhh]rhX}/ { reserved-memory { #address-cells = <2>; #size-cells = <2>; ranges; cmem_block_mem_0: cmem_block_mem@a0000000 { reg = <0x0 0xa0000000 0x0 0x0c000000>; no-map; status = "okay"; }; cmem_block_mem_1_ocmc3: cmem_block_mem@40500000 { reg = <0x0 0x40500000 0x0 0x100000>; no-map; status = "okay"; }; }; cmem { compatible = "ti,cmem"; #address-cells = <1>; #size-cells = <0>; #pool-size-cells = <2>; status = "okay"; cmem_block_0: cmem_block@0 { reg = <0>; memory-region = <&cmem_block_mem_0>; cmem-buf-pools = <1 0x0 0x0c000000>; }; cmem_block_1: cmem_block@1 { reg = <1>; memory-region = <&cmem_block_mem_1_ocmc3>; }; }; };rr}r(hUhjubaubh)r}r(hUhjhjhjh}r(h]h]h]h]h]uhMhhh]rj)r}r(hUjKhjhjhhh}r(h]h]h]h]h]uhKhhh]ubaubh)r}r(hXChanging the DSP Memory Maprhjhjhhh}r(h]rUchanging-the-dsp-memory-maprah]h]h]h]rhauhNhhh]rhXChanging the DSP Memory Maprr}r(hjhjubaubh)r}r(hXFirst, it is important to understand that there are a pair of Memory Management Units (MMUs) that sit between the DSP subsystems and the L3 interconnect. One of these MMUs is for the DSP core and the other is for its local EDMA. They both serve the same purpose of translating virtual addresses (i.e. the addresses as viewed by the DSP subsystem) into physical addresses (i.e. addresses as viewed from the L3 interconnect).rhjhjhhh}r(h]h]h]h]h]uhMhhh]rhXFirst, it is important to understand that there are a pair of Memory Management Units (MMUs) that sit between the DSP subsystems and the L3 interconnect. One of these MMUs is for the DSP core and the other is for its local EDMA. They both serve the same purpose of translating virtual addresses (i.e. the addresses as viewed by the DSP subsystem) into physical addresses (i.e. addresses as viewed from the L3 interconnect).rr}r(hjhjubaubjr)r}r(hX(.. Image:: ../images/LinuxIpcDspMmu.png hjhjhjyh}r(UuriX"linux/../images/LinuxIpcDspMmu.pngrh]h]h]h]jw}rU*jsh]uhMhhh]ubh)r}r(hXDSP Physical Addressesrhjhjhhh}r(h]rUdsp-physical-addressesrah]h]h]h]rhaauhNhhh]rhXDSP Physical Addressesrr}r(hjhjubaubh)r}r(hXThe physical location where the DSP code/data will actually reside is defined by the CMA carveout. To change this location, you must change the definition of the carveout. **The DSP carveouts are defined in the Linux dts file.** For example for the AM57xx EVM:hjhjhhh}r(h]h]h]h]h]uhMhhh]r(hXThe physical location where the DSP code/data will actually reside is defined by the CMA carveout. To change this location, you must change the definition of the carveout. rr}r(hXThe physical location where the DSP code/data will actually reside is defined by the CMA carveout. To change this location, you must change the definition of the carveout. hjubj)r}r(hX8**The DSP carveouts are defined in the Linux dts file.**h}r(h]h]h]h]h]uhjh]rhX4The DSP carveouts are defined in the Linux dts file.rr}r(hUhjubahjubhX For example for the AM57xx EVM:rr}r(hX For example for the AM57xx EVM:hjubeubh)r}r(hUhjhjhjh}r(h]h]h]h]h]uhMhhh]r(j)r}r(hUjKhjhjhhh}r(h]h]h]h]h]uhKhhh]ubj)r}r(hX5linux/arch/arm/boot/dts/am57xx-beagle-x15-common.dtsirjKhjhjhhh}r (h]h]h]h]h]uhMhhh]r hX5linux/arch/arm/boot/dts/am57xx-beagle-x15-common.dtsir r }r (hjhjubaubeubj)r }r (hX dsp1_cma_pool: dsp1_cma@99000000 { compatible = "shared-dma-pool"; reg = <0x0 0x99000000 0x0 0x4000000>; reusable; status = "okay"; }; dsp2_cma_pool: dsp2_cma@9f000000 { compatible = "shared-dma-pool"; reg = <0x0 0x9f000000 0x0 0x800000>; reusable; status = "okay"; }; };hjhjhjh}r (hhh]h]h]h]h]uhMhhh]r hX dsp1_cma_pool: dsp1_cma@99000000 { compatible = "shared-dma-pool"; reg = <0x0 0x99000000 0x0 0x4000000>; reusable; status = "okay"; }; dsp2_cma_pool: dsp2_cma@9f000000 { compatible = "shared-dma-pool"; reg = <0x0 0x9f000000 0x0 0x800000>; reusable; status = "okay"; }; };r r }r (hUhj ubaubh)r }r (hXeYou are able to change both the size and location. **Be careful not to overlap any other carveouts!**hjhjhhh}r (h]h]h]h]h]uhMhhh]r (hX3You are able to change both the size and location. r r }r (hX3You are able to change both the size and location. hj ubj)r }r (hX2**Be careful not to overlap any other carveouts!**h}r (h]h]h]h]h]uhj h]r hX.Be careful not to overlap any other carveouts!r r }r (hUhj ubahjubeubj)r }r (hX?The **two** location entries for a given DSP must be identical!r hjhjhjh}r (h]h]h]h]h]uhNhhh]r h)r }r (hj hj hjhhh}r! (h]h]h]h]h]uhMh]r" (hXThe r# r$ }r% (hXThe hj ubj)r& }r' (hX**two**h}r( (h]h]h]h]h]uhj h]r) hXtwor* r+ }r, (hUhj& ubahjubhX4 location entries for a given DSP must be identical!r- r. }r/ (hX4 location entries for a given DSP must be identical!hj ubeubaubh)r0 }r1 (hXoAdditionally, when you change the carveout location, there is a corresponding change that must be made to the resource table. For starters, if you're making a memory change you will need a **custom** resource table. The resource table is a large structure that is the "bridge" between physical memory and virtual memory. This structure is utilized for configuring the MMUs that sit in front of the DSP subsystem. There is detailed information available in the article `IPC Resource customTable `__.hjhjhhh}r2 (h]h]h]h]h]uhMhhh]r3 (hXAdditionally, when you change the carveout location, there is a corresponding change that must be made to the resource table. For starters, if you're making a memory change you will need a r4 r5 }r6 (hXAdditionally, when you change the carveout location, there is a corresponding change that must be made to the resource table. For starters, if you're making a memory change you will need a hj0 ubj)r7 }r8 (hX **custom**h}r9 (h]h]h]h]h]uhj0 h]r: hXcustomr; r< }r= (hUhj7 ubahjubhX  resource table. The resource table is a large structure that is the "bridge" between physical memory and virtual memory. This structure is utilized for configuring the MMUs that sit in front of the DSP subsystem. There is detailed information available in the article r> r? }r@ (hX  resource table. The resource table is a large structure that is the "bridge" between physical memory and virtual memory. This structure is utilized for configuring the MMUs that sit in front of the DSP subsystem. There is detailed information available in the article hj0 ubj))rA }rB (hX`IPC Resource customTable `__h}rC (UnameXIPC Resource customTablej-Xzhttp://software-dl.ti.com/processor-sdk-rtos/esd/docs/latest/rtos/index_Foundational_Components.html#resource-custom-tableh]h]h]h]h]uhj0 h]rD hXIPC Resource customTablerE rF }rG (hUhjA ubahj2ubhX.rH }rI (hX.hj0 ubeubh)rJ }rK (hXOnce you've created your custom resource table, you must update the address of PHYS\_MEM\_IPC\_VRING to be the same base address as your corresponding CMA.hjhjhhh}rL (h]h]h]h]h]uhMhhh]rM hXOnce you've created your custom resource table, you must update the address of PHYS_MEM_IPC_VRING to be the same base address as your corresponding CMA.rN rO }rP (hXOnce you've created your custom resource table, you must update the address of PHYS\_MEM\_IPC\_VRING to be the same base address as your corresponding CMA.hjJ ubaubj)rQ }rR (hX#if defined (VAYU_DSP_1) #define PHYS_MEM_IPC_VRING 0x99000000 #elif defined (VAYU_DSP_2) #define PHYS_MEM_IPC_VRING 0x9F000000 #endifhjhjhjh}rS (jtjuXchhh]h]h]jv}h]h]uhMhhh]rT hX#if defined (VAYU_DSP_1) #define PHYS_MEM_IPC_VRING 0x99000000 #elif defined (VAYU_DSP_2) #define PHYS_MEM_IPC_VRING 0x9F000000 #endifrU rV }rW (hUhjQ ubaubj)rX }rY (hXsThe PHYS\_MEM\_IPC\_VRING definition from the resource table must match the address of the associated CMA carveout!hjhjhjh}rZ (h]h]h]h]h]uhNhhh]r[ h)r\ }r] (hXsThe PHYS\_MEM\_IPC\_VRING definition from the resource table must match the address of the associated CMA carveout!hjX hjhhh}r^ (h]h]h]h]h]uhM h]r_ hXpThe PHYS_MEM_IPC_VRING definition from the resource table must match the address of the associated CMA carveout!r` ra }rb (hXsThe PHYS\_MEM\_IPC\_VRING definition from the resource table must match the address of the associated CMA carveout!hj\ ubaubaubh)rc }rd (hXDSP Virtual Addressesre hjhjhhh}rf (h]rg Udsp-virtual-addressesrh ah]h]h]h]ri h;auhNhhh]rj hXDSP Virtual Addressesrk rl }rm (hje hjc ubaubh)rn }ro (hX{These addresses are the ones seen by the DSP subsystem, i.e. these will be the addresses in your linker command files, etc.rp hjhjhhh}rq (h]h]h]h]h]uhMhhh]rr hX{These addresses are the ones seen by the DSP subsystem, i.e. these will be the addresses in your linker command files, etc.rs rt }ru (hjp hjn ubaubh)rv }rw (hXYou must ensure that the sizes of your sections are consistent with the corresponding definitions in the resource table. You should create your own resource table in order to modify the memory map. This is describe in the page `IPC Resource customTable `__. You can look at an existing resource table inside IPC:hjhjhhh}rx (h]h]h]h]h]uhMhhh]ry (hXYou must ensure that the sizes of your sections are consistent with the corresponding definitions in the resource table. You should create your own resource table in order to modify the memory map. This is describe in the page rz r{ }r| (hXYou must ensure that the sizes of your sections are consistent with the corresponding definitions in the resource table. You should create your own resource table in order to modify the memory map. This is describe in the page hjv ubj))r} }r~ (hX`IPC Resource customTable `__h}r (UnameXIPC Resource customTablej-Xzhttp://software-dl.ti.com/processor-sdk-rtos/esd/docs/latest/rtos/index_Foundational_Components.html#resource-custom-tableh]h]h]h]h]uhjv h]r hXIPC Resource customTabler r }r (hUhj} ubahj2ubhX8. You can look at an existing resource table inside IPC:r r }r (hX8. You can look at an existing resource table inside IPC:hjv ubeubh)r }r (hX6ipc/packages/ti/ipc/remoteproc/rsc\_table\_vayu\_dsp.hr hjhjhhh}r (h]h]h]h]h]uhMhhh]r hX3ipc/packages/ti/ipc/remoteproc/rsc_table_vayu_dsp.hr r }r (hX6ipc/packages/ti/ipc/remoteproc/rsc\_table\_vayu\_dsp.hhj ubaubj)r }r (hX,{ TYPE_CARVEOUT, DSP_MEM_TEXT, 0, DSP_MEM_TEXT_SIZE, 0, 0, "DSP_MEM_TEXT", }, { TYPE_CARVEOUT, DSP_MEM_DATA, 0, DSP_MEM_DATA_SIZE, 0, 0, "DSP_MEM_DATA", }, { TYPE_CARVEOUT, DSP_MEM_HEAP, 0, DSP_MEM_HEAP_SIZE, 0, 0, "DSP_MEM_HEAP", }, { TYPE_CARVEOUT, DSP_MEM_IPC_DATA, 0, DSP_MEM_IPC_DATA_SIZE, 0, 0, "DSP_MEM_IPC_DATA", }, { TYPE_TRACE, TRACEBUFADDR, 0x8000, 0, "trace:dsp", }, { TYPE_DEVMEM, DSP_MEM_IPC_VRING, PHYS_MEM_IPC_VRING, DSP_MEM_IPC_VRING_SIZE, 0, 0, "DSP_MEM_IPC_VRING", },hjhjhjh}r (hhh]h]h]h]r (Ucoder Xceh]uhMChhh]r (cdocutils.nodes inline r )r }r (hX{h}r (h]h]r U punctuationr ah]h]h]uhj h]r hX{r }r (hUhj ubahUinliner ubhX r r }r (hX hj ubj )r }r (hX TYPE_CARVEOUTh}r (h]h]r Unamer ah]h]h]uhj h]r hX TYPE_CARVEOUTr r }r (hUhj ubahj ubj )r }r (hX,h}r (h]h]r U punctuationr ah]h]h]uhj h]r hX,r }r (hUhj ubahj ubhX r r }r (hX hj ubj )r }r (hX DSP_MEM_TEXTh}r (h]h]r Unamer ah]h]h]uhj h]r hX DSP_MEM_TEXTr r }r (hUhj ubahj ubj )r }r (hX,h}r (h]h]r U punctuationr ah]h]h]uhj h]r hX,r }r (hUhj ubahj ubhX r }r (hX hj ubj )r }r (hX0h}r (h]h]r (Uliteralr Unumberr Uintegerr eh]h]h]uhj h]r hX0r }r (hUhj ubahj ubj )r }r (hX,h}r (h]h]r U punctuationr ah]h]h]uhj h]r hX,r }r (hUhj ubahj ubhX r r }r (hX hj ubj )r }r (hXDSP_MEM_TEXT_SIZEh}r (h]h]r Unamer ah]h]h]uhj h]r hXDSP_MEM_TEXT_SIZEr r }r (hUhj ubahj ubj )r }r (hX,h}r (h]h]r U punctuationr ah]h]h]uhj h]r hX,r }r (hUhj ubahj ubhX r }r (hX hj ubj )r }r (hX0h}r (h]h]r (Uliteralr Unumberr Uintegerr eh]h]h]uhj h]r hX0r }r (hUhj ubahj ubj )r }r (hX,h}r (h]h]r U punctuationr ah]h]h]uhj h]r hX,r }r (hUhj ubahj ubhX r }r (hX hj ubj )r }r (hX0h}r (h]h]r (Uliteralr Unumberr Uintegerr eh]h]h]uhj h]r hX0r }r (hUhj ubahj ubj )r }r (hX,h}r (h]h]r U punctuationr ah]h]h]uhj h]r hX,r }r (hUhj ubahj ubhX r }r (hX hj ubj )r }r (hX"DSP_MEM_TEXT"h}r (h]h]r (Uliteralr Ustringr eh]h]h]uhj h]r hX"DSP_MEM_TEXT"r r! }r" (hUhj ubahj ubj )r# }r$ (hX,h}r% (h]h]r& U punctuationr' ah]h]h]uhj h]r( hX,r) }r* (hUhj# ubahj ubhX r+ }r, (hX hj ubj )r- }r. (hX},h}r/ (h]h]r0 U punctuationr1 ah]h]h]uhj h]r2 hX},r3 r4 }r5 (hUhj- ubahj ubhX r6 r7 }r8 (hX hj ubj )r9 }r: (hX{h}r; (h]h]r< U punctuationr= ah]h]h]uhj h]r> hX{r? }r@ (hUhj9 ubahj ubhX rA rB }rC (hX hj ubj )rD }rE (hX TYPE_CARVEOUTh}rF (h]h]rG UnamerH ah]h]h]uhj h]rI hX TYPE_CARVEOUTrJ rK }rL (hUhjD ubahj ubj )rM }rN (hX,h}rO (h]h]rP U punctuationrQ ah]h]h]uhj h]rR hX,rS }rT (hUhjM ubahj ubhX rU rV }rW (hX hj ubj )rX }rY (hX DSP_MEM_DATAh}rZ (h]h]r[ Unamer\ ah]h]h]uhj h]r] hX DSP_MEM_DATAr^ r_ }r` (hUhjX ubahj ubj )ra }rb (hX,h}rc (h]h]rd U punctuationre ah]h]h]uhj h]rf hX,rg }rh (hUhja ubahj ubhX ri }rj (hX hj ubj )rk }rl (hX0h}rm (h]h]rn (Uliteralro Unumberrp Uintegerrq eh]h]h]uhj h]rr hX0rs }rt (hUhjk ubahj ubj )ru }rv (hX,h}rw (h]h]rx U punctuationry ah]h]h]uhj h]rz hX,r{ }r| (hUhju ubahj ubhX r} r~ }r (hX hj ubj )r }r (hXDSP_MEM_DATA_SIZEh}r (h]h]r Unamer ah]h]h]uhj h]r hXDSP_MEM_DATA_SIZEr r }r (hUhj ubahj ubj )r }r (hX,h}r (h]h]r U punctuationr ah]h]h]uhj h]r hX,r }r (hUhj ubahj ubhX r }r (hX hj ubj )r }r (hX0h}r (h]h]r (Uliteralr Unumberr Uintegerr eh]h]h]uhj h]r hX0r }r (hUhj ubahj ubj )r }r (hX,h}r (h]h]r U punctuationr ah]h]h]uhj h]r hX,r }r (hUhj ubahj ubhX r }r (hX hj ubj )r }r (hX0h}r (h]h]r (Uliteralr Unumberr Uintegerr eh]h]h]uhj h]r hX0r }r (hUhj ubahj ubj )r }r (hX,h}r (h]h]r U punctuationr ah]h]h]uhj h]r hX,r }r (hUhj ubahj ubhX r }r (hX hj ubj )r }r (hX"DSP_MEM_DATA"h}r (h]h]r (Uliteralr Ustringr eh]h]h]uhj h]r hX"DSP_MEM_DATA"r r }r (hUhj ubahj ubj )r }r (hX,h}r (h]h]r U punctuationr ah]h]h]uhj h]r hX,r }r (hUhj ubahj ubhX r }r (hX hj ubj )r }r (hX},h}r (h]h]r U punctuationr ah]h]h]uhj h]r hX},r r }r (hUhj ubahj ubhX r r }r (hX hj ubj )r }r (hX{h}r (h]h]r U punctuationr ah]h]h]uhj h]r hX{r }r (hUhj ubahj ubhX r r }r (hX hj ubj )r }r (hX TYPE_CARVEOUTh}r (h]h]r Unamer ah]h]h]uhj h]r hX TYPE_CARVEOUTr r }r (hUhj ubahj ubj )r }r (hX,h}r (h]h]r U punctuationr ah]h]h]uhj h]r hX,r }r (hUhj ubahj ubhX r r }r (hX hj ubj )r }r (hX DSP_MEM_HEAPh}r (h]h]r Unamer ah]h]h]uhj h]r hX DSP_MEM_HEAPr r }r (hUhj ubahj ubj )r }r (hX,h}r (h]h]r U punctuationr ah]h]h]uhj h]r hX,r }r (hUhj ubahj ubhX r }r (hX hj ubj )r }r (hX0h}r (h]h]r (Uliteralr Unumberr Uintegerr eh]h]h]uhj h]r hX0r }r (hUhj ubahj ubj )r }r (hX,h}r (h]h]r U punctuationr ah]h]h]uhj h]r hX,r }r (hUhj ubahj ubhX r r }r! (hX hj ubj )r" }r# (hXDSP_MEM_HEAP_SIZEh}r$ (h]h]r% Unamer& ah]h]h]uhj h]r' hXDSP_MEM_HEAP_SIZEr( r) }r* (hUhj" ubahj ubj )r+ }r, (hX,h}r- (h]h]r. U punctuationr/ ah]h]h]uhj h]r0 hX,r1 }r2 (hUhj+ ubahj ubhX r3 }r4 (hX hj ubj )r5 }r6 (hX0h}r7 (h]h]r8 (Uliteralr9 Unumberr: Uintegerr; eh]h]h]uhj h]r< hX0r= }r> (hUhj5 ubahj ubj )r? }r@ (hX,h}rA (h]h]rB U punctuationrC ah]h]h]uhj h]rD hX,rE }rF (hUhj? ubahj ubhX rG }rH (hX hj ubj )rI }rJ (hX0h}rK (h]h]rL (UliteralrM UnumberrN UintegerrO eh]h]h]uhj h]rP hX0rQ }rR (hUhjI ubahj ubj )rS }rT (hX,h}rU (h]h]rV U punctuationrW ah]h]h]uhj h]rX hX,rY }rZ (hUhjS ubahj ubhX r[ }r\ (hX hj ubj )r] }r^ (hX"DSP_MEM_HEAP"h}r_ (h]h]r` (Uliteralra Ustringrb eh]h]h]uhj h]rc hX"DSP_MEM_HEAP"rd re }rf (hUhj] ubahj ubj )rg }rh (hX,h}ri (h]h]rj U punctuationrk ah]h]h]uhj h]rl hX,rm }rn (hUhjg ubahj ubhX ro }rp (hX hj ubj )rq }rr (hX},h}rs (h]h]rt U punctuationru ah]h]h]uhj h]rv hX},rw rx }ry (hUhjq ubahj ubhX rz r{ }r| (hX hj ubj )r} }r~ (hX{h}r (h]h]r U punctuationr ah]h]h]uhj h]r hX{r }r (hUhj} ubahj ubhX r r }r (hX hj ubj )r }r (hX TYPE_CARVEOUTh}r (h]h]r Unamer ah]h]h]uhj h]r hX TYPE_CARVEOUTr r }r (hUhj ubahj ubj )r }r (hX,h}r (h]h]r U punctuationr ah]h]h]uhj h]r hX,r }r (hUhj ubahj ubhX r r }r (hX hj ubj )r }r (hXDSP_MEM_IPC_DATAh}r (h]h]r Unamer ah]h]h]uhj h]r hXDSP_MEM_IPC_DATAr r }r (hUhj ubahj ubj )r }r (hX,h}r (h]h]r U punctuationr ah]h]h]uhj h]r hX,r }r (hUhj ubahj ubhX r }r (hX hj ubj )r }r (hX0h}r (h]h]r (Uliteralr Unumberr Uintegerr eh]h]h]uhj h]r hX0r }r (hUhj ubahj ubj )r }r (hX,h}r (h]h]r U punctuationr ah]h]h]uhj h]r hX,r }r (hUhj ubahj ubhX r r }r (hX hj ubj )r }r (hXDSP_MEM_IPC_DATA_SIZEh}r (h]h]r Unamer ah]h]h]uhj h]r hXDSP_MEM_IPC_DATA_SIZEr r }r (hUhj ubahj ubj )r }r (hX,h}r (h]h]r U punctuationr ah]h]h]uhj h]r hX,r }r (hUhj ubahj ubhX r }r (hX hj ubj )r }r (hX0h}r (h]h]r (Uliteralr Unumberr Uintegerr eh]h]h]uhj h]r hX0r }r (hUhj ubahj ubj )r }r (hX,h}r (h]h]r U punctuationr ah]h]h]uhj h]r hX,r }r (hUhj ubahj ubhX r }r (hX hj ubj )r }r (hX0h}r (h]h]r (Uliteralr Unumberr Uintegerr eh]h]h]uhj h]r hX0r }r (hUhj ubahj ubj )r }r (hX,h}r (h]h]r U punctuationr ah]h]h]uhj h]r hX,r }r (hUhj ubahj ubhX r }r (hX hj ubj )r }r (hX"DSP_MEM_IPC_DATA"h}r (h]h]r (Uliteralr Ustringr eh]h]h]uhj h]r hX"DSP_MEM_IPC_DATA"r r }r (hUhj ubahj ubj )r }r (hX,h}r (h]h]r U punctuationr ah]h]h]uhj h]r hX,r }r (hUhj ubahj ubhX r }r (hX hj ubj )r }r (hX},h}r (h]h]r U punctuationr ah]h]h]uhj h]r hX},r r }r (hUhj ubahj ubhX r r }r (hX hj ubj )r }r (hX{h}r! (h]h]r" U punctuationr# ah]h]h]uhj h]r$ hX{r% }r& (hUhj ubahj ubhX r' r( }r) (hX hj ubj )r* }r+ (hX TYPE_TRACEh}r, (h]h]r- Unamer. ah]h]h]uhj h]r/ hX TYPE_TRACEr0 r1 }r2 (hUhj* ubahj ubj )r3 }r4 (hX,h}r5 (h]h]r6 U punctuationr7 ah]h]h]uhj h]r8 hX,r9 }r: (hUhj3 ubahj ubhX r; }r< (hX hj ubj )r= }r> (hX TRACEBUFADDRh}r? (h]h]r@ UnamerA ah]h]h]uhj h]rB hX TRACEBUFADDRrC rD }rE (hUhj= ubahj ubj )rF }rG (hX,h}rH (h]h]rI U punctuationrJ ah]h]h]uhj h]rK hX,rL }rM (hUhjF ubahj ubhX rN }rO (hX hj ubj )rP }rQ (hX0x8000h}rR (h]h]rS (UliteralrT UnumberrU UhexrV eh]h]h]uhj h]rW hX0x8000rX rY }rZ (hUhjP ubahj ubj )r[ }r\ (hX,h}r] (h]h]r^ U punctuationr_ ah]h]h]uhj h]r` hX,ra }rb (hUhj[ ubahj ubhX rc }rd (hX hj ubj )re }rf (hX0h}rg (h]h]rh (Uliteralri Unumberrj Uintegerrk eh]h]h]uhj h]rl hX0rm }rn (hUhje ubahj ubj )ro }rp (hX,h}rq (h]h]rr U punctuationrs ah]h]h]uhj h]rt hX,ru }rv (hUhjo ubahj ubhX rw }rx (hX hj ubj )ry }rz (hX "trace:dsp"h}r{ (h]h]r| (Uliteralr} Ustringr~ eh]h]h]uhj h]r hX "trace:dsp"r r }r (hUhjy ubahj ubj )r }r (hX,h}r (h]h]r U punctuationr ah]h]h]uhj h]r hX,r }r (hUhj ubahj ubhX r }r (hX hj ubj )r }r (hX},h}r (h]h]r U punctuationr ah]h]h]uhj h]r hX},r r }r (hUhj ubahj ubhX r r }r (hX hj ubj )r }r (hX{h}r (h]h]r U punctuationr ah]h]h]uhj h]r hX{r }r (hUhj ubahj ubhX r r }r (hX hj ubj )r }r (hX TYPE_DEVMEMh}r (h]h]r Unamer ah]h]h]uhj h]r hX TYPE_DEVMEMr r }r (hUhj ubahj ubj )r }r (hX,h}r (h]h]r U punctuationr ah]h]h]uhj h]r hX,r }r (hUhj ubahj ubhX r r }r (hX hj ubj )r }r (hXDSP_MEM_IPC_VRINGh}r (h]h]r Unamer ah]h]h]uhj h]r hXDSP_MEM_IPC_VRINGr r }r (hUhj ubahj ubj )r }r (hX,h}r (h]h]r U punctuationr ah]h]h]uhj h]r hX,r }r (hUhj ubahj ubhX r }r (hX hj ubj )r }r (hXPHYS_MEM_IPC_VRINGh}r (h]h]r Unamer ah]h]h]uhj h]r hXPHYS_MEM_IPC_VRINGr r }r (hUhj ubahj ubj )r }r (hX,h}r (h]h]r U punctuationr ah]h]h]uhj h]r hX,r }r (hUhj ubahj ubhX r r }r (hX hj ubj )r }r (hXDSP_MEM_IPC_VRING_SIZEh}r (h]h]r Unamer ah]h]h]uhj h]r hXDSP_MEM_IPC_VRING_SIZEr r }r (hUhj ubahj ubj )r }r (hX,h}r (h]h]r U punctuationr ah]h]h]uhj h]r hX,r }r (hUhj ubahj ubhX r }r (hX hj ubj )r }r (hX0h}r (h]h]r (Uliteralr Unumberr Uintegerr eh]h]h]uhj h]r hX0r }r (hUhj ubahj ubj )r }r (hX,h}r (h]h]r U punctuationr ah]h]h]uhj h]r hX,r }r (hUhj ubahj ubhX r }r (hX hj ubj )r }r (hX0h}r (h]h]r (Uliteralr Unumberr Uintegerr eh]h]h]uhj h]r hX0r }r (hUhj ubahj ubj )r }r (hX,h}r (h]h]r U punctuationr ah]h]h]uhj h]r hX,r }r (hUhj ubahj ubhX r }r (hX hj ubj )r }r (hX"DSP_MEM_IPC_VRING"h}r (h]h]r (Uliteralr Ustringr eh]h]h]uhj h]r hX"DSP_MEM_IPC_VRING"r! r" }r# (hUhj ubahj ubj )r$ }r% (hX,h}r& (h]h]r' U punctuationr( ah]h]h]uhj h]r) hX,r* }r+ (hUhj$ ubahj ubhX r, }r- (hX hj ubj )r. }r/ (hX},h}r0 (h]h]r1 U punctuationr2 ah]h]h]uhj h]r3 hX},r4 r5 }r6 (hUhj. ubahj ubeubh)r7 }r8 (hXJLet's have a look at some of these to understand them better. For example:r9 hjhjhhh}r: (h]h]h]h]h]uhMDhhh]r; hXJLet's have a look at some of these to understand them better. For example:r< r= }r> (hj9 hj7 ubaubj)r? }r@ (hXY{ TYPE_CARVEOUT, DSP_MEM_TEXT, 0, DSP_MEM_TEXT_SIZE, 0, 0, "DSP_MEM_TEXT", },hjhjhjh}rA (jtjuXchhh]h]h]jv}h]h]uhMGhhh]rB hXY{ TYPE_CARVEOUT, DSP_MEM_TEXT, 0, DSP_MEM_TEXT_SIZE, 0, 0, "DSP_MEM_TEXT", },rC rD }rE (hUhj? ubaubh)rF }rG (hXKey points to note are:rH hjhjhhh}rI (h]h]h]h]h]uhMOhhh]rJ hXKey points to note are:rK rL }rM (hjH hjF ubaubj6)rN }rO (hUhjhjhj9h}rP (j;U.h]h]h]j<Uh]h]j=j>uhMQhhh]rQ (j@)rR }rS (hXrThe "TYPE\_CARVEOUT" indicates that the physical memory backing this entry will come from the associated CMA pool.hjN hjhjCh}rT (h]h]h]h]h]uhNhhh]rU h)rV }rW (hXrThe "TYPE\_CARVEOUT" indicates that the physical memory backing this entry will come from the associated CMA pool.hjR hjhhh}rX (h]h]h]h]h]uhMQh]rY hXqThe "TYPE_CARVEOUT" indicates that the physical memory backing this entry will come from the associated CMA pool.rZ r[ }r\ (hXrThe "TYPE\_CARVEOUT" indicates that the physical memory backing this entry will come from the associated CMA pool.hjV ubaubaubj@)r] }r^ (hXDSP\_MEM\_TEXT is a #define earlier in the code providing the address for the code section. It is 0x95000000 by default. **This must correspond to a section from your DSP linker command file, i.e. EXT\_CODE (or whatever name you choose to give it) must be linked to the same address.**hjN hjhjCh}r_ (h]h]h]h]h]uhNhhh]r` h)ra }rb (hXDSP\_MEM\_TEXT is a #define earlier in the code providing the address for the code section. It is 0x95000000 by default. **This must correspond to a section from your DSP linker command file, i.e. EXT\_CODE (or whatever name you choose to give it) must be linked to the same address.**hj] hjhhh}rc (h]h]h]h]h]uhMSh]rd (hXwDSP_MEM_TEXT is a #define earlier in the code providing the address for the code section. It is 0x95000000 by default. re rf }rg (hXyDSP\_MEM\_TEXT is a #define earlier in the code providing the address for the code section. It is 0x95000000 by default. hja ubj)rh }ri (hX**This must correspond to a section from your DSP linker command file, i.e. EXT\_CODE (or whatever name you choose to give it) must be linked to the same address.**h}rj (h]h]h]h]h]uhja h]rk hXThis must correspond to a section from your DSP linker command file, i.e. EXT_CODE (or whatever name you choose to give it) must be linked to the same address.rl rm }rn (hUhjh ubahjubeubaubj@)ro }rp (hXDSP\_MEM\_TEXT\_SIZE is the size of the MMU pagetable entry being created (1MB in this particular instance). **The actual amount of linked code in the corresponding section of your executable must be less than or equal to this size.** hjN hjhjCh}rq (h]h]h]h]h]uhNhhh]rr h)rs }rt (hXDSP\_MEM\_TEXT\_SIZE is the size of the MMU pagetable entry being created (1MB in this particular instance). **The actual amount of linked code in the corresponding section of your executable must be less than or equal to this size.**hjo hjhhh}ru (h]h]h]h]h]uhMXh]rv (hXjDSP_MEM_TEXT_SIZE is the size of the MMU pagetable entry being created (1MB in this particular instance). rw rx }ry (hXmDSP\_MEM\_TEXT\_SIZE is the size of the MMU pagetable entry being created (1MB in this particular instance). hjs ubj)rz }r{ (hX}**The actual amount of linked code in the corresponding section of your executable must be less than or equal to this size.**h}r| (h]h]h]h]h]uhjs h]r} hXyThe actual amount of linked code in the corresponding section of your executable must be less than or equal to this size.r~ r }r (hUhjz ubahjubeubaubeubh)r }r (hXLet's take another:r hjhjhhh}r (h]h]h]h]h]uhM]hhh]r hXLet's take another:r r }r (hj hj ubaubj)r }r (hX:{ TYPE_TRACE, TRACEBUFADDR, 0x8000, 0, "trace:dsp", },hjhjhjh}r (jtjuXchhh]h]h]jv}h]h]uhM_hhh]r hX:{ TYPE_TRACE, TRACEBUFADDR, 0x8000, 0, "trace:dsp", },r r }r (hUhj ubaubh)r }r (hUhjhjhjh}r (h]h]h]h]h]uhMehhh]r j)r }r (hUjKhj hjhhh}r (h]h]h]h]h]uhKhhh]ubaubh)r }r (hXKey points are:r hjhjhhh}r (h]h]h]h]h]uhMghhh]r hXKey points are:r r }r (hj hj ubaubj6)r }r (hUhjhjhj9h}r (j;U.h]h]h]j<Uh]h]j=j>uhMihhh]r (j@)r }r (hX3The "TYPE\_TRACE" indicates this is for trace info.r hj hjhjCh}r (h]h]h]h]h]uhNhhh]r h)r }r (hj hj hjhhh}r (h]h]h]h]h]uhMih]r hX2The "TYPE_TRACE" indicates this is for trace info.r r }r (hX3The "TYPE\_TRACE" indicates this is for trace info.hj ubaubaubj@)r }r (hXThe TRACEBUFADDR is defined earlier in the file as &ti\_trace\_SysMin\_Module\_State\_0\_outbuf\_\_A. That corresponds to the symbol used in TI-RTOS for the trace buffer.hj hjhjCh}r (h]h]h]h]h]uhNhhh]r h)r }r (hXThe TRACEBUFADDR is defined earlier in the file as &ti\_trace\_SysMin\_Module\_State\_0\_outbuf\_\_A. That corresponds to the symbol used in TI-RTOS for the trace buffer.hj hjhhh}r (h]h]h]h]h]uhMjh]r hXThe TRACEBUFADDR is defined earlier in the file as &ti_trace_SysMin_Module_State_0_outbuf__A. That corresponds to the symbol used in TI-RTOS for the trace buffer.r r }r (hXThe TRACEBUFADDR is defined earlier in the file as &ti\_trace\_SysMin\_Module\_State\_0\_outbuf\_\_A. That corresponds to the symbol used in TI-RTOS for the trace buffer.hj ubaubaubj@)r }r (hXThe "0x8000" is the size of the MMU mapping. The corresponding size in the cfg file should be the same (or less). It looks like this: ``SysMin.bufSize = 0x8000;`` hj hjhjCh}r (h]h]h]h]h]uhNhhh]r h)r }r (hXThe "0x8000" is the size of the MMU mapping. The corresponding size in the cfg file should be the same (or less). It looks like this: ``SysMin.bufSize = 0x8000;``hj hjhhh}r (h]h]h]h]h]uhMmh]r (hXThe "0x8000" is the size of the MMU mapping. The corresponding size in the cfg file should be the same (or less). It looks like this: r r }r (hXThe "0x8000" is the size of the MMU mapping. The corresponding size in the cfg file should be the same (or less). It looks like this: hj ubcdocutils.nodes literal r )r }r (hX``SysMin.bufSize = 0x8000;``h}r (h]h]h]h]h]uhj h]r hXSysMin.bufSize = 0x8000;r r }r (hUhj ubahUliteralr ubeubaubeubh)r }r (hX.Finally, let's look at a TYPE\_DEVMEM example:r hjhjhhh}r (h]h]h]h]h]uhMqhhh]r hX-Finally, let's look at a TYPE_DEVMEM example:r r }r (hX.Finally, let's look at a TYPE\_DEVMEM example:hj ubaubj)r }r (hXn{ TYPE_DEVMEM, DSP_PERIPHERAL_L4CFG, L4_PERIPHERAL_L4CFG, SZ_16M, 0, 0, "DSP_PERIPHERAL_L4CFG", },hjhjhjh}r (jtjuXchhh]h]h]jv}h]h]uhMshhh]r hXn{ TYPE_DEVMEM, DSP_PERIPHERAL_L4CFG, L4_PERIPHERAL_L4CFG, SZ_16M, 0, 0, "DSP_PERIPHERAL_L4CFG", },r r }r (hUhj ubaubh)r }r (hUhjhjhjh}r (h]h]h]h]h]uhM{hhh]r j)r }r (hUjKhj hjhhh}r (h]h]h]h]h]uhKhhh]ubaubh)r }r (hX Key points:r hjhjhhh}r (h]h]h]h]h]uhM}hhh]r hX Key points:r r }r (hj hj ubaubj6)r }r (hUhjhjhj9h}r (j;U.h]h]h]j<Uh]h]j=j>uhMhhh]r (j@)r }r (hXThe "TYPE\_DEVMEM" indicates that we are making an MMU mapping, but this **does not come from the CMA pool**. This is intended for mapping peripherals, etc. that already exist in the device memory map.hj hjhjCh}r (h]h]h]h]h]uhNhhh]r h)r }r (hXThe "TYPE\_DEVMEM" indicates that we are making an MMU mapping, but this **does not come from the CMA pool**. This is intended for mapping peripherals, etc. that already exist in the device memory map.hj hjhhh}r (h]h]h]h]h]uhMh]r (hXHThe "TYPE_DEVMEM" indicates that we are making an MMU mapping, but this r r }r (hXIThe "TYPE\_DEVMEM" indicates that we are making an MMU mapping, but this hj ubj)r }r (hX#**does not come from the CMA pool**h}r (h]h]h]h]h]uhj h]r hXdoes not come from the CMA poolr r}r(hUhj ubahjubhX]. This is intended for mapping peripherals, etc. that already exist in the device memory map.rr}r(hX]. This is intended for mapping peripherals, etc. that already exist in the device memory map.hj ubeubaubj@)r}r(hXDSP\_PERIPHERAL\_L4CFG (0x4A000000) is the virtual address while L4\_PERIPHERAL\_L4CFG (0x4A000000) is the physical address. **This is an identity mapping, meaning that peripherals can be referenced by the DSP using their physical address.** hj hjhjCh}r(h]h]h]h]h]uhNhhh]rh)r }r (hXDSP\_PERIPHERAL\_L4CFG (0x4A000000) is the virtual address while L4\_PERIPHERAL\_L4CFG (0x4A000000) is the physical address. **This is an identity mapping, meaning that peripherals can be referenced by the DSP using their physical address.**hjhjhhh}r (h]h]h]h]h]uhMh]r (hXyDSP_PERIPHERAL_L4CFG (0x4A000000) is the virtual address while L4_PERIPHERAL_L4CFG (0x4A000000) is the physical address. r r}r(hX}DSP\_PERIPHERAL\_L4CFG (0x4A000000) is the virtual address while L4\_PERIPHERAL\_L4CFG (0x4A000000) is the physical address. hj ubj)r}r(hXt**This is an identity mapping, meaning that peripherals can be referenced by the DSP using their physical address.**h}r(h]h]h]h]h]uhj h]rhXpThis is an identity mapping, meaning that peripherals can be referenced by the DSP using their physical address.rr}r(hUhjubahjubeubaubeubh)r}r(hXDSP Access to Peripheralsrhjhjhhh}r(h]rUdsp-access-to-peripheralsrah]h]h]h]rhauhNhhh]rhXDSP Access to Peripheralsrr }r!(hjhjubaubh)r"}r#(hX:The default resource table creates the following mappings:r$hjhjhhh}r%(h]h]h]h]h]uhMhhh]r&hX:The default resource table creates the following mappings:r'r(}r)(hj$hj"ubaubjB)r*}r+(hUhjhjhjEh}r,(h]h]h]h]h]uhNhhh]r-jH)r.}r/(hUh}r0(h]h]h]h]h]UcolsKuhj*h]r1(jM)r2}r3(hUh}r4(h]h]h]h]h]UcolwidthKuhj.h]hjQubjM)r5}r6(hUh}r7(h]h]h]h]h]UcolwidthKuhj.h]hjQubjM)r8}r9(hUh}r:(h]h]h]h]h]UcolwidthK uhj.h]hjQubjM)r;}r<(hUh}r=(h]h]h]h]h]UcolwidthKuhj.h]hjQubjX)r>}r?(hUh}r@(h]h]h]h]h]uhj.h]rAj])rB}rC(hUh}rD(h]h]h]h]h]uhj>h]rE(jb)rF}rG(hUh}rH(h]h]h]h]h]uhjBh]rIh)rJ}rK(hXVirtual AddressrLhjFhjhhh}rM(h]h]h]h]h]uhMh]rNhXVirtual AddressrOrP}rQ(hjLhjJubaubahjoubjb)rR}rS(hUh}rT(h]h]h]h]h]uhjBh]rUh)rV}rW(hXPhysical AddressrXhjRhjhhh}rY(h]h]h]h]h]uhMh]rZhXPhysical Addressr[r\}r](hjXhjVubaubahjoubjb)r^}r_(hUh}r`(h]h]h]h]h]uhjBh]rah)rb}rc(hXSizerdhj^hjhhh}re(h]h]h]h]h]uhMh]rfhXSizergrh}ri(hjdhjbubaubahjoubjb)rj}rk(hUh}rl(h]h]h]h]h]uhjBh]rmh)rn}ro(hXCommentrphjjhjhhh}rq(h]h]h]h]h]uhMh]rrhXCommentrsrt}ru(hjphjnubaubahjoubehjubahjubj)rv}rw(hUh}rx(h]h]h]h]h]uhj.h]ry(j])rz}r{(hUh}r|(h]h]h]h]h]uhjvh]r}(jb)r~}r(hUh}r(h]h]h]h]h]uhjzh]rh)r}r(hX 0x4A000000rhj~hjhhh}r(h]h]h]h]h]uhMh]rhX 0x4A000000rr}r(hjhjubaubahjoubjb)r}r(hUh}r(h]h]h]h]h]uhjzh]rh)r}r(hX 0x4A000000rhjhjhhh}r(h]h]h]h]h]uhMh]rhX 0x4A000000rr}r(hjhjubaubahjoubjb)r}r(hUh}r(h]h]h]h]h]uhjzh]rh)r}r(hX16 MBrhjhjhhh}r(h]h]h]h]h]uhMh]rhX16 MBrr}r(hjhjubaubahjoubjb)r}r(hUh}r(h]h]h]h]h]uhjzh]rh)r}r(hXL4CFG + L4WKUPrhjhjhhh}r(h]h]h]h]h]uhMh]rhXL4CFG + L4WKUPrr}r(hjhjubaubahjoubehjubj])r}r(hUh}r(h]h]h]h]h]uhjvh]r(jb)r}r(hUh}r(h]h]h]h]h]uhjh]rh)r}r(hX 0x48000000rhjhjhhh}r(h]h]h]h]h]uhMh]rhX 0x48000000rr}r(hjhjubaubahjoubjb)r}r(hUh}r(h]h]h]h]h]uhjh]rh)r}r(hX 0x48000000rhjhjhhh}r(h]h]h]h]h]uhMh]rhX 0x48000000rr}r(hjhjubaubahjoubjb)r}r(hUh}r(h]h]h]h]h]uhjh]rh)r}r(hX2 MBrhjhjhhh}r(h]h]h]h]h]uhMh]rhX2 MBrr}r(hjhjubaubahjoubjb)r}r(hUh}r(h]h]h]h]h]uhjh]rh)r}r(hXL4PER1rhjhjhhh}r(h]h]h]h]h]uhMh]rhXL4PER1rr}r(hjhjubaubahjoubehjubj])r}r(hUh}r(h]h]h]h]h]uhjvh]r(jb)r}r(hUh}r(h]h]h]h]h]uhjh]rh)r}r(hX 0x48400000rhjhjhhh}r(h]h]h]h]h]uhMh]rhX 0x48400000rr}r(hjhjubaubahjoubjb)r}r(hUh}r(h]h]h]h]h]uhjh]rh)r}r(hX 0x48400000rhjhjhhh}r(h]h]h]h]h]uhMh]rhX 0x48400000rr}r(hjhjubaubahjoubjb)r}r(hUh}r(h]h]h]h]h]uhjh]rh)r}r(hX4 MBrhjhjhhh}r(h]h]h]h]h]uhMh]rhX4 MBrr}r (hjhjubaubahjoubjb)r }r (hUh}r (h]h]h]h]h]uhjh]r h)r}r(hXL4PER2rhj hjhhh}r(h]h]h]h]h]uhMh]rhXL4PER2rr}r(hjhjubaubahjoubehjubj])r}r(hUh}r(h]h]h]h]h]uhjvh]r(jb)r}r(hUh}r(h]h]h]h]h]uhjh]rh)r}r(hX 0x48800000r hjhjhhh}r!(h]h]h]h]h]uhMh]r"hX 0x48800000r#r$}r%(hj hjubaubahjoubjb)r&}r'(hUh}r((h]h]h]h]h]uhjh]r)h)r*}r+(hX 0x48800000r,hj&hjhhh}r-(h]h]h]h]h]uhMh]r.hX 0x48800000r/r0}r1(hj,hj*ubaubahjoubjb)r2}r3(hUh}r4(h]h]h]h]h]uhjh]r5h)r6}r7(hX8 MBr8hj2hjhhh}r9(h]h]h]h]h]uhMh]r:hX8 MBr;r<}r=(hj8hj6ubaubahjoubjb)r>}r?(hUh}r@(h]h]h]h]h]uhjh]rAh)rB}rC(hXL4PER3rDhj>hjhhh}rE(h]h]h]h]h]uhMh]rFhXL4PER3rGrH}rI(hjDhjBubaubahjoubehjubj])rJ}rK(hUh}rL(h]h]h]h]h]uhjvh]rM(jb)rN}rO(hUh}rP(h]h]h]h]h]uhjJh]rQh)rR}rS(hX 0x54000000rThjNhjhhh}rU(h]h]h]h]h]uhMh]rVhX 0x54000000rWrX}rY(hjThjRubaubahjoubjb)rZ}r[(hUh}r\(h]h]h]h]h]uhjJh]r]h)r^}r_(hX 0x54000000r`hjZhjhhh}ra(h]h]h]h]h]uhMh]rbhX 0x54000000rcrd}re(hj`hj^ubaubahjoubjb)rf}rg(hUh}rh(h]h]h]h]h]uhjJh]rih)rj}rk(hX16 MBrlhjfhjhhh}rm(h]h]h]h]h]uhMh]rnhX16 MBrorp}rq(hjlhjjubaubahjoubjb)rr}rs(hUh}rt(h]h]h]h]h]uhjJh]ruh)rv}rw(hXL3\_INSTR + CT\_TBRhjrhjhhh}rx(h]h]h]h]h]uhMh]ryhXL3_INSTR + CT_TBRrzr{}r|(hXL3\_INSTR + CT\_TBRhjvubaubahjoubehjubj])r}}r~(hUh}r(h]h]h]h]h]uhjvh]r(jb)r}r(hUh}r(h]h]h]h]h]uhj}h]rh)r}r(hX 0x4E000000rhjhjhhh}r(h]h]h]h]h]uhMh]rhX 0x4E000000rr}r(hjhjubaubahjoubjb)r}r(hUh}r(h]h]h]h]h]uhj}h]rh)r}r(hX 0x4E000000rhjhjhhh}r(h]h]h]h]h]uhMh]rhX 0x4E000000rr}r(hjhjubaubahjoubjb)r}r(hUh}r(h]h]h]h]h]uhj}h]rh)r}r(hX1 MBrhjhjhhh}r(h]h]h]h]h]uhMh]rhX1 MBrr}r(hjhjubaubahjoubjb)r}r(hUh}r(h]h]h]h]h]uhj}h]rh)r}r(hX DMM configrhjhjhhh}r(h]h]h]h]h]uhMh]rhX DMM configrr}r(hjhjubaubahjoubehjubehjWubehjXubaubh)r}r(hXmIn other words, the peripherals can be accessed at their physical addresses since we use an identity mapping.rhjhjhhh}r(h]h]h]h]h]uhMhhh]rhXmIn other words, the peripherals can be accessed at their physical addresses since we use an identity mapping.rr}r(hjhjubaubh)r}r(hX0Inspecting the DSP IOMMU Page Tables at Run-Timerhjhjhhh}r(h]rU0inspecting-the-dsp-iommu-page-tables-at-run-timerah]h]h]h]rhCauhNhhh]rhX0Inspecting the DSP IOMMU Page Tables at Run-Timerr}r(hjhjubaubh)r}r(hXCYou can dump the DSP IOMMU page tables with the following commands:rhjhjhhh}r(h]h]h]h]h]uhMhhh]rhXCYou can dump the DSP IOMMU page tables with the following commands:rr}r(hjhjubaubjB)r}r(hUhjhjhjEh}r(h]h]h]h]h]uhNhhh]rjH)r}r(hUh}r(h]h]h]h]h]UcolsKuhjh]r(jM)r}r(hUh}r(h]h]h]h]h]UcolwidthKuhjh]hjQubjM)r}r(hUh}r(h]h]h]h]h]UcolwidthKuhjh]hjQubjM)r}r(hUh}r(h]h]h]h]h]UcolwidthKhj8hjhhh}r?(h]h]h]h]h]uhMh]r@hXDSP1rArB}rC(hj>hj<ubaubahjoubjb)rD}rE(hUh}rF(h]h]h]h]h]uhj4h]rGh)rH}rI(hXMMU1rJhjDhjhhh}rK(h]h]h]h]h]uhMh]rLhXMMU1rMrN}rO(hjJhjHubaubahjoubjb)rP}rQ(hUh}rR(h]h]h]h]h]uhj4h]rSh)rT}rU(hX8cat /sys/kernel/debug/omap\_iommu/40d02000.mmu/pagetablehjPhjhhh}rV(h]h]h]h]h]uhMh]rWhX7cat /sys/kernel/debug/omap_iommu/40d02000.mmu/pagetablerXrY}rZ(hX8cat /sys/kernel/debug/omap\_iommu/40d02000.mmu/pagetablehjTubaubahjoubehjubj])r[}r\(hUh}r](h]h]h]h]h]uhj h]r^(jb)r_}r`(hUh}ra(h]h]h]h]h]uhj[h]rbh)rc}rd(hXDSP2rehj_hjhhh}rf(h]h]h]h]h]uhMh]rghXDSP2rhri}rj(hjehjcubaubahjoubjb)rk}rl(hUh}rm(h]h]h]h]h]uhj[h]rnh)ro}rp(hXMMU0rqhjkhjhhh}rr(h]h]h]h]h]uhMh]rshXMMU0rtru}rv(hjqhjoubaubahjoubjb)rw}rx(hUh}ry(h]h]h]h]h]uhj[h]rzh)r{}r|(hX8cat /sys/kernel/debug/omap\_iommu/41501000.mmu/pagetablehjwhjhhh}r}(h]h]h]h]h]uhMh]r~hX7cat /sys/kernel/debug/omap_iommu/41501000.mmu/pagetablerr}r(hX8cat /sys/kernel/debug/omap\_iommu/41501000.mmu/pagetablehj{ubaubahjoubehjubj])r}r(hUh}r(h]h]h]h]h]uhj h]r(jb)r}r(hUh}r(h]h]h]h]h]uhjh]rh)r}r(hXDSP2rhjhjhhh}r(h]h]h]h]h]uhMh]rhXDSP2rr}r(hjhjubaubahjoubjb)r}r(hUh}r(h]h]h]h]h]uhjh]rh)r}r(hXMMU1rhjhjhhh}r(h]h]h]h]h]uhMh]rhXMMU1rr}r(hjhjubaubahjoubjb)r}r(hUh}r(h]h]h]h]h]uhjh]rh)r}r(hX8cat /sys/kernel/debug/omap\_iommu/41502000.mmu/pagetablehjhjhhh}r(h]h]h]h]h]uhMh]rhX7cat /sys/kernel/debug/omap_iommu/41502000.mmu/pagetablerr}r(hX8cat /sys/kernel/debug/omap\_iommu/41502000.mmu/pagetablehjubaubahjoubehjubehjWubehjXubaubh)r}r(hXIn general, MMU0 and MMU1 are being programmed identically so you really only need to take a look at one or the other to understand the mapping for a given DSP.rhjhjhhh}r(h]h]h]h]h]uhMhhh]rhXIn general, MMU0 and MMU1 are being programmed identically so you really only need to take a look at one or the other to understand the mapping for a given DSP.rr}r(hjhjubaubh)r}r(hX For example:rhjhjhhh}r(h]h]h]h]h]uhMhhh]rhX For example:rr}r(hjhjubaubj)r}r(hXhroot@am57xx-evm:~# cat /sys/kernel/debug/omap_iommu/40d01000.mmu/pagetable L: da: pte: -------------------------- 1: 0x48000000 0x48000002 1: 0x48100000 0x48100002 1: 0x48400000 0x48400002 1: 0x48500000 0x48500002 1: 0x48600000 0x48600002 1: 0x48700000 0x48700002 1: 0x48800000 0x48800002 1: 0x48900000 0x48900002 1: 0x48a00000 0x48a00002 1: 0x48b00000 0x48b00002 1: 0x48c00000 0x48c00002 1: 0x48d00000 0x48d00002 1: 0x48e00000 0x48e00002 1: 0x48f00000 0x48f00002 1: 0x4a000000 0x4a040002 1: 0x4a100000 0x4a040002 1: 0x4a200000 0x4a040002 1: 0x4a300000 0x4a040002 1: 0x4a400000 0x4a040002 1: 0x4a500000 0x4a040002 1: 0x4a600000 0x4a040002 1: 0x4a700000 0x4a040002 1: 0x4a800000 0x4a040002 1: 0x4a900000 0x4a040002 1: 0x4aa00000 0x4a040002 1: 0x4ab00000 0x4a040002 1: 0x4ac00000 0x4a040002 1: 0x4ad00000 0x4a040002 1: 0x4ae00000 0x4a040002 1: 0x4af00000 0x4a040002hjhjhjh}r(hhh]h]h]h]h]uhMzhhh]rhXhroot@am57xx-evm:~# cat /sys/kernel/debug/omap_iommu/40d01000.mmu/pagetable L: da: pte: -------------------------- 1: 0x48000000 0x48000002 1: 0x48100000 0x48100002 1: 0x48400000 0x48400002 1: 0x48500000 0x48500002 1: 0x48600000 0x48600002 1: 0x48700000 0x48700002 1: 0x48800000 0x48800002 1: 0x48900000 0x48900002 1: 0x48a00000 0x48a00002 1: 0x48b00000 0x48b00002 1: 0x48c00000 0x48c00002 1: 0x48d00000 0x48d00002 1: 0x48e00000 0x48e00002 1: 0x48f00000 0x48f00002 1: 0x4a000000 0x4a040002 1: 0x4a100000 0x4a040002 1: 0x4a200000 0x4a040002 1: 0x4a300000 0x4a040002 1: 0x4a400000 0x4a040002 1: 0x4a500000 0x4a040002 1: 0x4a600000 0x4a040002 1: 0x4a700000 0x4a040002 1: 0x4a800000 0x4a040002 1: 0x4a900000 0x4a040002 1: 0x4aa00000 0x4a040002 1: 0x4ab00000 0x4a040002 1: 0x4ac00000 0x4a040002 1: 0x4ad00000 0x4a040002 1: 0x4ae00000 0x4a040002 1: 0x4af00000 0x4a040002rr}r(hUhjubaubh)r}r(hXThe first column tells us whether the mapping is a Level 1 or Level 2 descriptor. All the lines above are a first level descriptor, so we look at the associated format from the TRM:rhjhjhhh}r(h]h]h]h]h]uhMhhh]rhXThe first column tells us whether the mapping is a Level 1 or Level 2 descriptor. All the lines above are a first level descriptor, so we look at the associated format from the TRM:rr}r(hjhjubaubjr)r}r(hX6.. Image:: ../images/LinuxIpcPageTableDescriptor1.png hjhjhjyh}r(UuriX0linux/../images/LinuxIpcPageTableDescriptor1.pngrh]h]h]h]jw}rU*jsh]uhMhhh]ubh)r}r(hXIThe "da" ("device address") column reflects the virtual address. It is **derived** from the index into the table, i.e. there does not exist a "da" register or field in the page table. Each MB of the address space maps to an entry in the table. The "da" column is displayed to make it easy to find the virtual address of interest.hjhjhhh}r(h]h]h]h]h]uhMhhh]r(hXGThe "da" ("device address") column reflects the virtual address. It is rr}r(hXGThe "da" ("device address") column reflects the virtual address. It is hjubj)r}r(hX **derived**h}r(h]h]h]h]h]uhjh]rhXderivedrr}r(hUhjubahjubhX from the index into the table, i.e. there does not exist a "da" register or field in the page table. Each MB of the address space maps to an entry in the table. The "da" column is displayed to make it easy to find the virtual address of interest.rr}r(hX from the index into the table, i.e. there does not exist a "da" register or field in the page table. Each MB of the address space maps to an entry in the table. The "da" column is displayed to make it easy to find the virtual address of interest.hjubeubh)r}r(hXfThe "pte" ("page table entry") column can be decoded according to Table 20-4 shown above. For example:rhjhjhhh}r(h]h]h]h]h]uhMhhh]rhXfThe "pte" ("page table entry") column can be decoded according to Table 20-4 shown above. For example:rr}r(hjhjubaubj)r}r(hX1: 0x4a000000 0x4a040002hjhjhjh}r(hhh]h]h]h]h]uhMhhh]rhX1: 0x4a000000 0x4a040002rr}r(hUhjubaubh)r}r(hXThe 0x4a040002 shows us that it is a Supersection with base address 0x4A000000. This gives us a 16 MB memory page. Note the repeated entries afterward. That's a requirement of the MMU. Here's an excerpt from the TRM:rhjhjhhh}r(h]h]h]h]h]uhMhhh]rhXThe 0x4a040002 shows us that it is a Supersection with base address 0x4A000000. This gives us a 16 MB memory page. Note the repeated entries afterward. That's a requirement of the MMU. Here's an excerpt from the TRM:rr}r(hjhjubaubj)r}r(hXSupersection descriptors must be repeated 16 times, because each descriptor in the first level translation table describes 1 MiB of memory. If an access points to a descriptor that is not initialized, the MMU will behave in an unpredictable way.hjhjhjh}r(h]h]h]h]h]uhNhhh]rh)r}r(hXSupersection descriptors must be repeated 16 times, because each descriptor in the first level translation table describes 1 MiB of memory. If an access points to a descriptor that is not initialized, the MMU will behave in an unpredictable way.rhjhjhhh}r(h]h]h]h]h]uhMh]rhXSupersection descriptors must be repeated 16 times, because each descriptor in the first level translation table describes 1 MiB of memory. If an access points to a descriptor that is not initialized, the MMU will behave in an unpredictable way.rr}r(hjhjubaubaubh)r}r(hUhjhjhjh}r(h]h]h]h]h]uhMhhh]rj)r}r(hUjKhjhjhhh}r(h]h]h]h]h]uhKhhh]ubaubh)r}r (hX!Changing Cortex M4 IPU Memory Mapr hjhjhhh}r (h]r U!changing-cortex-m4-ipu-memory-mapr ah]h]h]h]rhAauhNhhh]rhX!Changing Cortex M4 IPU Memory Maprr}r(hj hjubaubh)r}r(hXIn order to fully understand the memory mapping of the Cortex M4 IPU Subsystems, it's helpful to recognize that there are two distinct/independent levels of memory translation. Here's a snippet from the TRM to illustrate:rhjhjhhh}r(h]h]h]h]h]uhMhhh]rhXIn order to fully understand the memory mapping of the Cortex M4 IPU Subsystems, it's helpful to recognize that there are two distinct/independent levels of memory translation. Here's a snippet from the TRM to illustrate:rr}r(hjhjubaubjr)r}r(hX(.. Image:: ../images/LinuxIpcIpuMmu.png hjhjhjyh}r(UuriX"linux/../images/LinuxIpcIpuMmu.pngrh]h]h]h]jw}rU*jsh]uhMhhh]ubh)r }r!(hX Cortex M4 IPU Physical Addressesr"hjhjhhh}r#(h]r$U cortex-m4-ipu-physical-addressesr%ah]h]h]h]r&hRauhNhhh]r'hX Cortex M4 IPU Physical Addressesr(r)}r*(hj"hj ubaubh)r+}r,(hXThe physical location where the M4 code/data will actually reside is defined by the CMA carveout. To change this location, you must change the definition of the carveout. **The M4 carveouts are defined in the Linux dts file.** For example for the AM57xx EVM:hjhjhhh}r-(h]h]h]h]h]uhMhhh]r.(hXThe physical location where the M4 code/data will actually reside is defined by the CMA carveout. To change this location, you must change the definition of the carveout. r/r0}r1(hXThe physical location where the M4 code/data will actually reside is defined by the CMA carveout. To change this location, you must change the definition of the carveout. hj+ubj)r2}r3(hX7**The M4 carveouts are defined in the Linux dts file.**h}r4(h]h]h]h]h]uhj+h]r5hX3The M4 carveouts are defined in the Linux dts file.r6r7}r8(hUhj2ubahjubhX For example for the AM57xx EVM:r9r:}r;(hX For example for the AM57xx EVM:hj+ubeubh)r<}r=(hUhjhjhjh}r>(h]h]h]h]h]uhM hhh]r?(j)r@}rA(hUjKhj<hjhhh}rB(h]h]h]h]h]uhKhhh]ubj)rC}rD(hX5linux/arch/arm/boot/dts/am57xx-beagle-x15-common.dtsirEjKhj<hjhhh}rF(h]h]h]h]h]uhM hhh]rGhX5linux/arch/arm/boot/dts/am57xx-beagle-x15-common.dtsirHrI}rJ(hjEhjCubaubeubj)rK}rL(hX ipu2_cma_pool: ipu2_cma@95800000 { compatible = "shared-dma-pool"; reg = <0x0 95800000 0x0 0x3800000>; reusable; status = "okay"; }; ipu1_cma_pool: ipu1_cma@9d000000 { compatible = "shared-dma-pool"; reg = <0x0 9d000000 0x0 0x2000000>; reusable; status = "okay"; }; };hjhjhjh}rM(hhh]h]h]h]h]uhMhhh]rNhX ipu2_cma_pool: ipu2_cma@95800000 { compatible = "shared-dma-pool"; reg = <0x0 95800000 0x0 0x3800000>; reusable; status = "okay"; }; ipu1_cma_pool: ipu1_cma@9d000000 { compatible = "shared-dma-pool"; reg = <0x0 9d000000 0x0 0x2000000>; reusable; status = "okay"; }; };rOrP}rQ(hUhjKubaubh)rR}rS(hUhjhjhjh}rT(h]h]h]h]h]uhM hhh]rUj)rV}rW(hXeYou are able to change both the size and location. **Be careful not to overlap any other carveouts!**jKhjRhjhhh}rX(h]h]h]h]h]uhM!hhh]rY(hX3You are able to change both the size and location. rZr[}r\(hX3You are able to change both the size and location. hjVubj)r]}r^(hX2**Be careful not to overlap any other carveouts!**h}r_(h]h]h]h]h]uhjVh]r`hX.Be careful not to overlap any other carveouts!rarb}rc(hUhj]ubahjubeubaubj)rd}re(hXDThe **two** location entries for a given carveout must be identical!hjhjhjh}rf(h]h]h]h]h]uhNhhh]rgh)rh}ri(hXDThe **two** location entries for a given carveout must be identical!hjdhjhhh}rj(h]h]h]h]h]uhM$h]rk(hXThe rlrm}rn(hXThe hjhubj)ro}rp(hX**two**h}rq(h]h]h]h]h]uhjhh]rrhXtworsrt}ru(hUhjoubahjubhX9 location entries for a given carveout must be identical!rvrw}rx(hX9 location entries for a given carveout must be identical!hjhubeubaubh)ry}rz(hUhjhjhjh}r{(h]h]h]h]h]uhM'hhh]r|j)r}}r~(hXdAdditionally, when you change the carveout location, there is a corresponding change that must be made to the resource table. For starters, if you're making a memory change you will need a **custom** resource table. The resource table is a large structure that is the "bridge" between physical memory and virtual memory. This structure is utilized for configuring the IPUx\_MMU (not the Unicache MMU). There is detailed information available in the article `IPC Resource customTable `__.jKhjyhjhhh}r(h]h]h]h]h]uhM/hhh]r(hXAdditionally, when you change the carveout location, there is a corresponding change that must be made to the resource table. For starters, if you're making a memory change you will need a rr}r(hXAdditionally, when you change the carveout location, there is a corresponding change that must be made to the resource table. For starters, if you're making a memory change you will need a hj}ubj)r}r(hX **custom**h}r(h]h]h]h]h]uhj}h]rhXcustomrr}r(hUhjubahjubhX resource table. The resource table is a large structure that is the "bridge" between physical memory and virtual memory. This structure is utilized for configuring the IPUx_MMU (not the Unicache MMU). There is detailed information available in the article rr}r(hX resource table. The resource table is a large structure that is the "bridge" between physical memory and virtual memory. This structure is utilized for configuring the IPUx\_MMU (not the Unicache MMU). There is detailed information available in the article hj}ubj))r}r(hX`IPC Resource customTable `__h}r(UnameXIPC Resource customTablej-Xzhttp://software-dl.ti.com/processor-sdk-rtos/esd/docs/latest/rtos/index_Foundational_Components.html#resource-custom-tableh]h]h]h]h]uhj}h]rhXIPC Resource customTablerr}r(hUhjubahj2ubhX.r}r(hX.hj}ubeubaubh)r}r(hXOnce you've created your custom resource table, you must update the address of PHYS\_MEM\_IPC\_VRING to be the same base address as your corresponding CMA.hjhjhhh}r(h]h]h]h]h]uhM1hhh]rhXOnce you've created your custom resource table, you must update the address of PHYS_MEM_IPC_VRING to be the same base address as your corresponding CMA.rr}r(hXOnce you've created your custom resource table, you must update the address of PHYS\_MEM\_IPC\_VRING to be the same base address as your corresponding CMA.hjubaubj)r}r(hX#if defined(VAYU_IPU_1) #define PHYS_MEM_IPC_VRING 0x9D000000 #elif defined (VAYU_IPU_2) #define PHYS_MEM_IPC_VRING 0x95800000 #endifhjhjhjh}r(jtjuXchhh]h]h]jv}h]h]uhM5hhh]rhX#if defined(VAYU_IPU_1) #define PHYS_MEM_IPC_VRING 0x9D000000 #elif defined (VAYU_IPU_2) #define PHYS_MEM_IPC_VRING 0x95800000 #endifrr}r(hUhjubaubj)r}r(hXsThe PHYS\_MEM\_IPC\_VRING definition from the resource table must match the address of the associated CMA carveout!hjhjhjh}r(h]h]h]h]h]uhNhhh]rh)r}r(hXsThe PHYS\_MEM\_IPC\_VRING definition from the resource table must match the address of the associated CMA carveout!hjhjhhh}r(h]h]h]h]h]uhM?h]rhXpThe PHYS_MEM_IPC_VRING definition from the resource table must match the address of the associated CMA carveout!rr}r(hXsThe PHYS\_MEM\_IPC\_VRING definition from the resource table must match the address of the associated CMA carveout!hjubaubaubh)r}r(hXCortex M4 IPU Virtual Addressesrhjhjhhh}r(h]rUcortex-m4-ipu-virtual-addressesrah]h]h]h]rhoauhNhhh]rhXCortex M4 IPU Virtual Addressesrr}r(hjhjubaubh)r}r(hX Unicache MMUrhjhjhhh}r(h]rU unicache-mmurah]h]h]h]rhauhNhhh]rhX Unicache MMUrr}r(hjhjubaubh)r}r(hXTThe Unicache MMU sits closest to the Cortex M4. It provides the first level of address translation. The Unicache MMU is actually "self programmed" by the Cortex M4. The Unicache MMU is also referred to as the Attribute MMU (AMMU). There are a fixed number of small, medium and large pages. Here's a snippet showing some of the key mappings:rhjhjhhh}r(h]h]h]h]h]uhMHhhh]rhXTThe Unicache MMU sits closest to the Cortex M4. It provides the first level of address translation. The Unicache MMU is actually "self programmed" by the Cortex M4. The Unicache MMU is also referred to as the Attribute MMU (AMMU). There are a fixed number of small, medium and large pages. Here's a snippet showing some of the key mappings:rr}r(hjhjubaubh)r}r(hXNipc\_3\_43\_02\_04/examples/DRA7XX\_linux\_elf/ex02\_messageq/ipu1/IpuAmmu.cfgrhjhjhhh}r(h]h]h]h]h]uhMNhhh]rhXGipc_3_43_02_04/examples/DRA7XX_linux_elf/ex02_messageq/ipu1/IpuAmmu.cfgrr}r(hXNipc\_3\_43\_02\_04/examples/DRA7XX\_linux\_elf/ex02\_messageq/ipu1/IpuAmmu.cfghjubaubj)r}r(hXs/*********************** Large Pages *************************/ /* Instruction Code: Large page (512M); cacheable */ /* config large page[0] to map 512MB VA 0x0 to L3 0x0 */ AMMU.largePages[0].pageEnabled = AMMU.Enable_YES; AMMU.largePages[0].logicalAddress = 0x0; AMMU.largePages[0].translationEnabled = AMMU.Enable_NO; AMMU.largePages[0].size = AMMU.Large_512M; AMMU.largePages[0].L1_cacheable = AMMU.CachePolicy_CACHEABLE; AMMU.largePages[0].L1_posted = AMMU.PostedPolicy_POSTED; /* Peripheral regions: Large Page (512M); non-cacheable */ /* config large page[1] to map 512MB VA 0x60000000 to L3 0x60000000 */ AMMU.largePages[1].pageEnabled = AMMU.Enable_YES; AMMU.largePages[1].logicalAddress = 0x60000000; AMMU.largePages[1].translationEnabled = AMMU.Enable_NO; AMMU.largePages[1].size = AMMU.Large_512M; AMMU.largePages[1].L1_cacheable = AMMU.CachePolicy_NON_CACHEABLE; AMMU.largePages[1].L1_posted = AMMU.PostedPolicy_POSTED; /* Private, Shared and IPC Data regions: Large page (512M); cacheable */ /* config large page[2] to map 512MB VA 0x80000000 to L3 0x80000000 */ AMMU.largePages[2].pageEnabled = AMMU.Enable_YES; AMMU.largePages[2].logicalAddress = 0x80000000; AMMU.largePages[2].translationEnabled = AMMU.Enable_NO; AMMU.largePages[2].size = AMMU.Large_512M; AMMU.largePages[2].L1_cacheable = AMMU.CachePolicy_CACHEABLE; AMMU.largePages[2].L1_posted = AMMU.PostedPolicy_POSTED;hjhjhjh}r(jtjuX javascripthhh]h]h]jv}h]h]uhMPhhh]rhXs/*********************** Large Pages *************************/ /* Instruction Code: Large page (512M); cacheable */ /* config large page[0] to map 512MB VA 0x0 to L3 0x0 */ AMMU.largePages[0].pageEnabled = AMMU.Enable_YES; AMMU.largePages[0].logicalAddress = 0x0; AMMU.largePages[0].translationEnabled = AMMU.Enable_NO; AMMU.largePages[0].size = AMMU.Large_512M; AMMU.largePages[0].L1_cacheable = AMMU.CachePolicy_CACHEABLE; AMMU.largePages[0].L1_posted = AMMU.PostedPolicy_POSTED; /* Peripheral regions: Large Page (512M); non-cacheable */ /* config large page[1] to map 512MB VA 0x60000000 to L3 0x60000000 */ AMMU.largePages[1].pageEnabled = AMMU.Enable_YES; AMMU.largePages[1].logicalAddress = 0x60000000; AMMU.largePages[1].translationEnabled = AMMU.Enable_NO; AMMU.largePages[1].size = AMMU.Large_512M; AMMU.largePages[1].L1_cacheable = AMMU.CachePolicy_NON_CACHEABLE; AMMU.largePages[1].L1_posted = AMMU.PostedPolicy_POSTED; /* Private, Shared and IPC Data regions: Large page (512M); cacheable */ /* config large page[2] to map 512MB VA 0x80000000 to L3 0x80000000 */ AMMU.largePages[2].pageEnabled = AMMU.Enable_YES; AMMU.largePages[2].logicalAddress = 0x80000000; AMMU.largePages[2].translationEnabled = AMMU.Enable_NO; AMMU.largePages[2].size = AMMU.Large_512M; AMMU.largePages[2].L1_cacheable = AMMU.CachePolicy_CACHEABLE; AMMU.largePages[2].L1_posted = AMMU.PostedPolicy_POSTED;rr}r(hUhjubaubh)r}r(hUhjhjhjh}r(h]h]h]h]h]uhMnhhh]rj)r}r(hUjKhjhjhhh}r(h]h]h]h]h]uhKhhh]ubaubjB)r}r(hUhjhjhjEh}r(h]h]h]h]h]uhNhhh]rjH)r}r(hUh}r(h]h]h]h]h]UcolsKuhjh]r(jM)r}r(hUh}r(h]h]h]h]h]UcolwidthKuhjh]hjQubjM)r}r(hUh}r(h]h]h]h]h]UcolwidthKuhjh]hjQubjM)r}r(hUh}r(h]h]h]h]h]UcolwidthKuhjh]hjQubjM)r}r(hUh}r(h]h]h]h]h]UcolwidthK uhjh]hjQubjM)r}r(hUh}r(h]h]h]h]h]UcolwidthKuhjh]hjQubjX)r}r(hUh}r(h]h]h]h]h]uhjh]rj])r}r(hUh}r(h]h]h]h]h]uhjh]r(jb)r}r(hUh}r(h]h]h]h]h]uhjh]rh)r}r(hXPager hjhjhhh}r (h]h]h]h]h]uhMqh]r hXPager r }r(hj hjubaubahjoubjb)r}r(hUh}r(h]h]h]h]h]uhjh]rh)r}r(hXCortex M4 Addressrhjhjhhh}r(h]h]h]h]h]uhMqh]rhXCortex M4 Addressrr}r(hjhjubaubahjoubjb)r}r(hUh}r(h]h]h]h]h]uhjh]rh)r}r (hXIntermediate Addressr!hjhjhhh}r"(h]h]h]h]h]uhMqh]r#hXIntermediate Addressr$r%}r&(hj!hjubaubahjoubjb)r'}r((hUh}r)(h]h]h]h]h]uhjh]r*h)r+}r,(hXSizer-hj'hjhhh}r.(h]h]h]h]h]uhMqh]r/hXSizer0r1}r2(hj-hj+ubaubahjoubjb)r3}r4(hUh}r5(h]h]h]h]h]uhjh]r6h)r7}r8(hXCommentr9hj3hjhhh}r:(h]h]h]h]h]uhMqh]r;hXCommentr<r=}r>(hj9hj7ubaubahjoubehjubahjubj)r?}r@(hUh}rA(h]h]h]h]h]uhjh]rB(j])rC}rD(hUh}rE(h]h]h]h]h]uhj?h]rF(jb)rG}rH(hUh}rI(h]h]h]h]h]uhjCh]rJh)rK}rL(hX Large Page 0rMhjGhjhhh}rN(h]h]h]h]h]uhMsh]rOhX Large Page 0rPrQ}rR(hjMhjKubaubahjoubjb)rS}rT(hUh}rU(h]h]h]h]h]uhjCh]rVh)rW}rX(hX0x00000000-0x1fffffffrYhjShjhhh}rZ(h]h]h]h]h]uhMsh]r[hX0x00000000-0x1fffffffr\r]}r^(hjYhjWubaubahjoubjb)r_}r`(hUh}ra(h]h]h]h]h]uhjCh]rbh)rc}rd(hX0x00000000-0x1fffffffrehj_hjhhh}rf(h]h]h]h]h]uhMsh]rghX0x00000000-0x1fffffffrhri}rj(hjehjcubaubahjoubjb)rk}rl(hUh}rm(h]h]h]h]h]uhjCh]rnh)ro}rp(hX512 MBrqhjkhjhhh}rr(h]h]h]h]h]uhMsh]rshX512 MBrtru}rv(hjqhjoubaubahjoubjb)rw}rx(hUh}ry(h]h]h]h]h]uhjCh]rzh)r{}r|(hXCoder}hjwhjhhh}r~(h]h]h]h]h]uhMsh]rhXCoderr}r(hj}hj{ubaubahjoubehjubj])r}r(hUh}r(h]h]h]h]h]uhj?h]r(jb)r}r(hUh}r(h]h]h]h]h]uhjh]rh)r}r(hX Large Page 1rhjhjhhh}r(h]h]h]h]h]uhMuh]rhX Large Page 1rr}r(hjhjubaubahjoubjb)r}r(hUh}r(h]h]h]h]h]uhjh]rh)r}r(hX0x60000000-0x7fffffffrhjhjhhh}r(h]h]h]h]h]uhMuh]rhX0x60000000-0x7fffffffrr}r(hjhjubaubahjoubjb)r}r(hUh}r(h]h]h]h]h]uhjh]rh)r}r(hX0x60000000-0x7fffffffrhjhjhhh}r(h]h]h]h]h]uhMuh]rhX0x60000000-0x7fffffffrr}r(hjhjubaubahjoubjb)r}r(hUh}r(h]h]h]h]h]uhjh]rh)r}r(hX512 MBrhjhjhhh}r(h]h]h]h]h]uhMuh]rhX512 MBrr}r(hjhjubaubahjoubjb)r}r(hUh}r(h]h]h]h]h]uhjh]rh)r}r(hX Peripheralsrhjhjhhh}r(h]h]h]h]h]uhMuh]rhX Peripheralsrr}r(hjhjubaubahjoubehjubj])r}r(hUh}r(h]h]h]h]h]uhj?h]r(jb)r}r(hUh}r(h]h]h]h]h]uhjh]rh)r}r(hX Large Page 2rhjhjhhh}r(h]h]h]h]h]uhMwh]rhX Large Page 2rr}r(hjhjubaubahjoubjb)r}r(hUh}r(h]h]h]h]h]uhjh]rh)r}r(hX0x80000000-0x9fffffffrhjhjhhh}r(h]h]h]h]h]uhMwh]rhX0x80000000-0x9fffffffrr}r(hjhjubaubahjoubjb)r}r(hUh}r(h]h]h]h]h]uhjh]rh)r}r(hX0x80000000-0x9fffffffrhjhjhhh}r(h]h]h]h]h]uhMwh]rhX0x80000000-0x9fffffffrr}r(hjhjubaubahjoubjb)r}r(hUh}r(h]h]h]h]h]uhjh]rh)r}r(hX512 MBrhjhjhhh}r(h]h]h]h]h]uhMwh]rhX512 MBrr}r(hjhjubaubahjoubjb)r}r(hUh}r(h]h]h]h]h]uhjh]rh)r}r(hXDatarhjhjhhh}r(h]h]h]h]h]uhMwh]rhXDatarr}r(hjhjubaubahjoubehjubehjWubehjXubaubh)r}r(hXThese 3 pages are "identity" mappings, performing a passthrough of requests to the associated address ranges. These intermediate addresses get mapped to their physical addresses in the next level of translation (IOMMU).rhjhjhhh}r(h]h]h]h]h]uhMzhhh]rhXThese 3 pages are "identity" mappings, performing a passthrough of requests to the associated address ranges. These intermediate addresses get mapped to their physical addresses in the next level of translation (IOMMU).rr }r (hjhjubaubh)r }r (hXThe AMMU ranges for code and data **need** to be identity mappings because otherwise the remoteproc loader wouldn't be able to match up the sections from the ELF file with the associated IOMMU mapping. These mappings should suffice for any application, i.e. no need to adjust these. The more likely area for modification is the resource table in the next section. The AMMU mappings are needed mainly to understand the full picture with respect to the Cortex M4 memory map.hjhjhhh}r (h]h]h]h]h]uhMhhh]r(hX"The AMMU ranges for code and data rr}r(hX"The AMMU ranges for code and data hj ubj)r}r(hX**need**h}r(h]h]h]h]h]uhj h]rhXneedrr}r(hUhjubahjubhX to be identity mappings because otherwise the remoteproc loader wouldn't be able to match up the sections from the ELF file with the associated IOMMU mapping. These mappings should suffice for any application, i.e. no need to adjust these. The more likely area for modification is the resource table in the next section. The AMMU mappings are needed mainly to understand the full picture with respect to the Cortex M4 memory map.rr}r(hX to be identity mappings because otherwise the remoteproc loader wouldn't be able to match up the sections from the ELF file with the associated IOMMU mapping. These mappings should suffice for any application, i.e. no need to adjust these. The more likely area for modification is the resource table in the next section. The AMMU mappings are needed mainly to understand the full picture with respect to the Cortex M4 memory map.hj ubeubh)r}r(hUhjhjhjh}r(h]h]h]h]h]uhMhhh]rj)r }r!(hUjKhjhjhhh}r"(h]h]h]h]h]uhKhhh]ubaubh)r#}r$(hXIOMMUr%hjhjhhh}r&(h]r'Uiommur(ah]h]h]h]r)h)auhNhhh]r*hXIOMMUr+r,}r-(hj%hj#ubaubh)r.}r/(hXThe IOMMU sits closest to the L3 interconnect. It takes the intermediate address output from the AMMU and translates it to the physical address used by the L3 interconnect. The IOMMU is programmed by the ARM based on the associated resource table. If you're planning any memory changes then you'll want to make a custom resource table as described in the page `IPC Resource customTable `__.hjhjhhh}r0(h]h]h]h]h]uhMhhh]r1(hXhThe IOMMU sits closest to the L3 interconnect. It takes the intermediate address output from the AMMU and translates it to the physical address used by the L3 interconnect. The IOMMU is programmed by the ARM based on the associated resource table. If you're planning any memory changes then you'll want to make a custom resource table as described in the page r2r3}r4(hXhThe IOMMU sits closest to the L3 interconnect. It takes the intermediate address output from the AMMU and translates it to the physical address used by the L3 interconnect. The IOMMU is programmed by the ARM based on the associated resource table. If you're planning any memory changes then you'll want to make a custom resource table as described in the page hj.ubj))r5}r6(hX`IPC Resource customTable `__h}r7(UnameXIPC Resource customTablej-Xzhttp://software-dl.ti.com/processor-sdk-rtos/esd/docs/latest/rtos/index_Foundational_Components.html#resource-custom-tableh]h]h]h]h]uhj.h]r8hXIPC Resource customTabler9r:}r;(hUhj5ubahj2ubhX.r<}r=(hX.hj.ubeubh)r>}r?(hXgThe default resource table (which can be adapted to make a custom table) can be found at this location:r@hjhjhhh}rA(h]h]h]h]h]uhMhhh]rBhXgThe default resource table (which can be adapted to make a custom table) can be found at this location:rCrD}rE(hj@hj>ubaubh)rF}rG(hX6ipc/packages/ti/ipc/remoteproc/rsc\_table\_vayu\_ipu.hrHhjhjhhh}rI(h]h]h]h]h]uhMhhh]rJhX3ipc/packages/ti/ipc/remoteproc/rsc_table_vayu_ipu.hrKrL}rM(hX6ipc/packages/ti/ipc/remoteproc/rsc\_table\_vayu\_ipu.hhjFubaubj)rN}rO(hX#define IPU_MEM_TEXT 0x0 #define IPU_MEM_DATA 0x80000000 #define IPU_MEM_IOBUFS 0x90000000 #define IPU_MEM_IPC_DATA 0x9F000000 #define IPU_MEM_IPC_VRING 0x60000000 #define IPU_MEM_RPMSG_VRING0 0x60000000 #define IPU_MEM_RPMSG_VRING1 0x60004000 #define IPU_MEM_VRING_BUFS0 0x60040000 #define IPU_MEM_VRING_BUFS1 0x60080000 #define IPU_MEM_IPC_VRING_SIZE SZ_1M #define IPU_MEM_IPC_DATA_SIZE SZ_1M #if defined(VAYU_IPU_1) #define IPU_MEM_TEXT_SIZE (SZ_1M) #elif defined(VAYU_IPU_2) #define IPU_MEM_TEXT_SIZE (SZ_1M * 6) #endif #if defined(VAYU_IPU_1) #define IPU_MEM_DATA_SIZE (SZ_1M * 5) #elif defined(VAYU_IPU_2) #define IPU_MEM_DATA_SIZE (SZ_1M * 48) #endifhjhjhjh}rP(jtjuXchhh]h]h]jv}h]h]uhMhhh]rQhX#define IPU_MEM_TEXT 0x0 #define IPU_MEM_DATA 0x80000000 #define IPU_MEM_IOBUFS 0x90000000 #define IPU_MEM_IPC_DATA 0x9F000000 #define IPU_MEM_IPC_VRING 0x60000000 #define IPU_MEM_RPMSG_VRING0 0x60000000 #define IPU_MEM_RPMSG_VRING1 0x60004000 #define IPU_MEM_VRING_BUFS0 0x60040000 #define IPU_MEM_VRING_BUFS1 0x60080000 #define IPU_MEM_IPC_VRING_SIZE SZ_1M #define IPU_MEM_IPC_DATA_SIZE SZ_1M #if defined(VAYU_IPU_1) #define IPU_MEM_TEXT_SIZE (SZ_1M) #elif defined(VAYU_IPU_2) #define IPU_MEM_TEXT_SIZE (SZ_1M * 6) #endif #if defined(VAYU_IPU_1) #define IPU_MEM_DATA_SIZE (SZ_1M * 5) #elif defined(VAYU_IPU_2) #define IPU_MEM_DATA_SIZE (SZ_1M * 48) #endifrRrS}rT(hUhjNubaubh)rU}rV(hUhjhjhjh}rW(h]h]h]h]h]uhMhhh]rXj)rY}rZ(hUjKhjUhjhhh}r[(h]h]h]h]h]uhKhhh]ubaubh)r\}r](hX r^hjhjhhh}r_(h]h]h]h]h]uhMhhh]r`hX rarb}rc(hj^hj\ubaubh)rd}re(hUhjhjhjh}rf(h]h]h]h]h]uhMhhh]rgj)rh}ri(hUjKhjdhjhhh}rj(h]h]h]h]h]uhKhhh]ubaubj)rk}rl(hX{ TYPE_CARVEOUT, IPU_MEM_TEXT, 0, IPU_MEM_TEXT_SIZE, 0, 0, "IPU_MEM_TEXT", }, { TYPE_CARVEOUT, IPU_MEM_DATA, 0, IPU_MEM_DATA_SIZE, 0, 0, "IPU_MEM_DATA", }, { TYPE_CARVEOUT, IPU_MEM_IPC_DATA, 0, IPU_MEM_IPC_DATA_SIZE, 0, 0, "IPU_MEM_IPC_DATA", },hjhjhjh}rm(jtjuXchhh]h]h]jv}h]h]uhMhhh]rnhX{ TYPE_CARVEOUT, IPU_MEM_TEXT, 0, IPU_MEM_TEXT_SIZE, 0, 0, "IPU_MEM_TEXT", }, { TYPE_CARVEOUT, IPU_MEM_DATA, 0, IPU_MEM_DATA_SIZE, 0, 0, "IPU_MEM_DATA", }, { TYPE_CARVEOUT, IPU_MEM_IPC_DATA, 0, IPU_MEM_IPC_DATA_SIZE, 0, 0, "IPU_MEM_IPC_DATA", },rorp}rq(hUhjkubaubh)rr}rs(hXThe 3 entries above from the resource table all come from the associated IPU CMA pool (i.e. as dictated by the TYPE\_CARVEOUT). The second parameter represents the virtual address (i.e. input address to the IOMMU). **These addresses must be consistent with both the AMMU mapping as well as the linker command file.** The ex02\_messageq example from ipc defines these memory sections in the file examples/DRA7XX\_linux\_elf/ex02\_messageq/shared/config.bld.hjhjhhh}rt(h]h]h]h]h]uhMhhh]ru(hXThe 3 entries above from the resource table all come from the associated IPU CMA pool (i.e. as dictated by the TYPE_CARVEOUT). The second parameter represents the virtual address (i.e. input address to the IOMMU). rvrw}rx(hXThe 3 entries above from the resource table all come from the associated IPU CMA pool (i.e. as dictated by the TYPE\_CARVEOUT). The second parameter represents the virtual address (i.e. input address to the IOMMU). hjrubj)ry}rz(hXe**These addresses must be consistent with both the AMMU mapping as well as the linker command file.**h}r{(h]h]h]h]h]uhjrh]r|hXaThese addresses must be consistent with both the AMMU mapping as well as the linker command file.r}r~}r(hUhjyubahjubhX The ex02_messageq example from ipc defines these memory sections in the file examples/DRA7XX_linux_elf/ex02_messageq/shared/config.bld.rr}r(hX The ex02\_messageq example from ipc defines these memory sections in the file examples/DRA7XX\_linux\_elf/ex02\_messageq/shared/config.bld.hjrubeubh)r}r(hXCYou can dump the IPU IOMMU page tables with the following commands:rhjhjhhh}r(h]h]h]h]h]uhMhhh]rhXCYou can dump the IPU IOMMU page tables with the following commands:rr}r(hjhjubaubjB)r}r(hUhjhjhjEh}r(h]h]h]h]h]uhNhhh]rjH)r}r(hUh}r(h]h]h]h]h]UcolsKuhjh]r(jM)r}r(hUh}r(h]h]h]h]h]UcolwidthKuhjh]hjQubjM)r}r(hUh}r(h]h]h]h]h]UcolwidthK`__ for more details on interpreting the output.hjhjhhh}r(h]h]h]h]h]uhMhhh]r(hXPlease see the rr}r(hXPlease see the hjubj))r}r(hXw`corresponding DSP documentation `__h}r(UnameXcorresponding DSP documentationj-XQFoundational_Components_IPC.html#inspecting-the-dsp-iommu-page-tables-at-run-timeh]h]h]h]h]uhjh]rhXcorresponding DSP documentationrr}r(hUhjubahj2ubhX- for more details on interpreting the output.rr}r(hX- for more details on interpreting the output.hjubeubh)r}r(hUhjhjhjh}r(h]h]h]h]h]uhMhhh]rj)r}r (hUjKhjhjhhh}r (h]h]h]h]h]uhKhhh]ubaubh)r }r (hX#Cortex M4 IPU Access to Peripheralsr hjhjhhh}r(h]rU#cortex-m4-ipu-access-to-peripheralsrah]h]h]h]rhKauhNhhh]rhX#Cortex M4 IPU Access to Peripheralsrr}r(hj hj ubaubh)r}r(hX:The default resource table creates the following mappings:rhjhjhhh}r(h]h]h]h]h]uhMhhh]rhX:The default resource table creates the following mappings:rr}r(hjhjubaubjB)r}r(hUhjhjhjEh}r (h]h]h]h]h]uhNhhh]r!jH)r"}r#(hUh}r$(h]h]h]h]h]UcolsKuhjh]r%(jM)r&}r'(hUh}r((h]h]h]h]h]UcolwidthK%uhj"h]hjQubjM)r)}r*(hUh}r+(h]h]h]h]h]UcolwidthK%uhj"h]hjQubjM)r,}r-(hUh}r.(h]h]h]h]h]UcolwidthKuhj"h]hjQubjM)r/}r0(hUh}r1(h]h]h]h]h]UcolwidthK uhj"h]hjQubjM)r2}r3(hUh}r4(h]h]h]h]h]UcolwidthKuhj"h]hjQubjX)r5}r6(hUh}r7(h]h]h]h]h]uhj"h]r8j])r9}r:(hUh}r;(h]h]h]h]h]uhj5h]r<(jb)r=}r>(hUh}r?(h]h]h]h]h]uhj9h]r@h)rA}rB(hX!Virtual Address used by Cortex M4rChj=hjhhh}rD(h]h]h]h]h]uhMh]rEhX!Virtual Address used by Cortex M4rFrG}rH(hjChjAubaubahjoubjb)rI}rJ(hUh}rK(h]h]h]h]h]uhj9h]rLh)rM}rN(hX!Address at output of Unicache MMUrOhjIhjhhh}rP(h]h]h]h]h]uhMh]rQhX!Address at output of Unicache MMUrRrS}rT(hjOhjMubaubahjoubjb)rU}rV(hUh}rW(h]h]h]h]h]uhj9h]rXh)rY}rZ(hXAddress at output of IOMMUr[hjUhjhhh}r\(h]h]h]h]h]uhMh]r]hXAddress at output of IOMMUr^r_}r`(hj[hjYubaubahjoubjb)ra}rb(hUh}rc(h]h]h]h]h]uhj9h]rdh)re}rf(hXSizerghjahjhhh}rh(h]h]h]h]h]uhMh]rihXSizerjrk}rl(hjghjeubaubahjoubjb)rm}rn(hUh}ro(h]h]h]h]h]uhj9h]rph)rq}rr(hXCommentrshjmhjhhh}rt(h]h]h]h]h]uhMh]ruhXCommentrvrw}rx(hjshjqubaubahjoubehjubahjubj)ry}rz(hUh}r{(h]h]h]h]h]uhj"h]r|(j])r}}r~(hUh}r(h]h]h]h]h]uhjyh]r(jb)r}r(hUh}r(h]h]h]h]h]uhj}h]rh)r}r(hX 0x6A000000rhjhjhhh}r(h]h]h]h]h]uhMh]rhX 0x6A000000rr}r(hjhjubaubahjoubjb)r}r(hUh}r(h]h]h]h]h]uhj}h]rh)r}r(hX 0x6A000000rhjhjhhh}r(h]h]h]h]h]uhMh]rhX 0x6A000000rr}r(hjhjubaubahjoubjb)r}r(hUh}r(h]h]h]h]h]uhj}h]rh)r}r(hX 0x4A000000rhjhjhhh}r(h]h]h]h]h]uhMh]rhX 0x4A000000rr}r(hjhjubaubahjoubjb)r}r(hUh}r(h]h]h]h]h]uhj}h]rh)r}r(hX16 MBrhjhjhhh}r(h]h]h]h]h]uhMh]rhX16 MBrr}r(hjhjubaubahjoubjb)r}r(hUh}r(h]h]h]h]h]uhj}h]rh)r}r(hXL4CFG + L4WKUPrhjhjhhh}r(h]h]h]h]h]uhMh]rhXL4CFG + L4WKUPrr}r(hjhjubaubahjoubehjubj])r}r(hUh}r(h]h]h]h]h]uhjyh]r(jb)r}r(hUh}r(h]h]h]h]h]uhjh]rh)r}r(hX 0x68000000rhjhjhhh}r(h]h]h]h]h]uhMh]rhX 0x68000000rr}r(hjhjubaubahjoubjb)r}r(hUh}r(h]h]h]h]h]uhjh]rh)r}r(hX 0x68000000rhjhjhhh}r(h]h]h]h]h]uhMh]rhX 0x68000000rr}r(hjhjubaubahjoubjb)r}r(hUh}r(h]h]h]h]h]uhjh]rh)r}r(hX 0x48000000rhjhjhhh}r(h]h]h]h]h]uhMh]rhX 0x48000000rr}r(hjhjubaubahjoubjb)r}r(hUh}r(h]h]h]h]h]uhjh]rh)r}r(hX2 MBrhjhjhhh}r(h]h]h]h]h]uhMh]rhX2 MBrr}r(hjhjubaubahjoubjb)r}r(hUh}r(h]h]h]h]h]uhjh]rh)r}r(hXL4PER1rhjhjhhh}r(h]h]h]h]h]uhMh]rhXL4PER1rr}r(hjhjubaubahjoubehjubj])r}r(hUh}r(h]h]h]h]h]uhjyh]r(jb)r}r(hUh}r(h]h]h]h]h]uhjh]rh)r}r(hX 0x68400000rhjhjhhh}r(h]h]h]h]h]uhMh]r hX 0x68400000r r }r (hjhjubaubahjoubjb)r }r(hUh}r(h]h]h]h]h]uhjh]rh)r}r(hX 0x68400000rhj hjhhh}r(h]h]h]h]h]uhMh]rhX 0x68400000rr}r(hjhjubaubahjoubjb)r}r(hUh}r(h]h]h]h]h]uhjh]rh)r}r(hX 0x48400000rhjhjhhh}r (h]h]h]h]h]uhMh]r!hX 0x48400000r"r#}r$(hjhjubaubahjoubjb)r%}r&(hUh}r'(h]h]h]h]h]uhjh]r(h)r)}r*(hX4 MBr+hj%hjhhh}r,(h]h]h]h]h]uhMh]r-hX4 MBr.r/}r0(hj+hj)ubaubahjoubjb)r1}r2(hUh}r3(h]h]h]h]h]uhjh]r4h)r5}r6(hXL4PER2r7hj1hjhhh}r8(h]h]h]h]h]uhMh]r9hXL4PER2r:r;}r<(hj7hj5ubaubahjoubehjubj])r=}r>(hUh}r?(h]h]h]h]h]uhjyh]r@(jb)rA}rB(hUh}rC(h]h]h]h]h]uhj=h]rDh)rE}rF(hX 0x68800000rGhjAhjhhh}rH(h]h]h]h]h]uhMh]rIhX 0x68800000rJrK}rL(hjGhjEubaubahjoubjb)rM}rN(hUh}rO(h]h]h]h]h]uhj=h]rPh)rQ}rR(hX 0x68800000rShjMhjhhh}rT(h]h]h]h]h]uhMh]rUhX 0x68800000rVrW}rX(hjShjQubaubahjoubjb)rY}rZ(hUh}r[(h]h]h]h]h]uhj=h]r\h)r]}r^(hX 0x48800000r_hjYhjhhh}r`(h]h]h]h]h]uhMh]rahX 0x48800000rbrc}rd(hj_hj]ubaubahjoubjb)re}rf(hUh}rg(h]h]h]h]h]uhj=h]rhh)ri}rj(hX8 MBrkhjehjhhh}rl(h]h]h]h]h]uhMh]rmhX8 MBrnro}rp(hjkhjiubaubahjoubjb)rq}rr(hUh}rs(h]h]h]h]h]uhj=h]rth)ru}rv(hXL4PER3rwhjqhjhhh}rx(h]h]h]h]h]uhMh]ryhXL4PER3rzr{}r|(hjwhjuubaubahjoubehjubj])r}}r~(hUh}r(h]h]h]h]h]uhjyh]r(jb)r}r(hUh}r(h]h]h]h]h]uhj}h]rh)r}r(hX 0x74000000rhjhjhhh}r(h]h]h]h]h]uhMh]rhX 0x74000000rr}r(hjhjubaubahjoubjb)r}r(hUh}r(h]h]h]h]h]uhj}h]rh)r}r(hX 0x74000000rhjhjhhh}r(h]h]h]h]h]uhMh]rhX 0x74000000rr}r(hjhjubaubahjoubjb)r}r(hUh}r(h]h]h]h]h]uhj}h]rh)r}r(hX 0x54000000rhjhjhhh}r(h]h]h]h]h]uhMh]rhX 0x54000000rr}r(hjhjubaubahjoubjb)r}r(hUh}r(h]h]h]h]h]uhj}h]rh)r}r(hX16 MBrhjhjhhh}r(h]h]h]h]h]uhMh]rhX16 MBrr}r(hjhjubaubahjoubjb)r}r(hUh}r(h]h]h]h]h]uhj}h]rh)r}r(hXL3\_INSTR + CT\_TBRhjhjhhh}r(h]h]h]h]h]uhMh]rhXL3_INSTR + CT_TBRrr}r(hXL3\_INSTR + CT\_TBRhjubaubahjoubehjubehjWubehjXubaubh)r}r(hX!Example: Accessing UART5 from IPUrhjhjhhh}r(h]h]h]h]h]uhMhhh]rhX!Example: Accessing UART5 from IPUrr}r(hjhjubaubj6)r}r(hUhjhjhj9h}r(j;U.h]h]h]j<Uh]h]j=j>uhMhhh]r(j@)r}r(hXFor this example, it's assumed the pin-muxing was already setup in the bootloader. If that's not the case, you would need to do that here.hjhjhjCh}r(h]h]h]h]h]uhNhhh]rh)r}r(hXFor this example, it's assumed the pin-muxing was already setup in the bootloader. If that's not the case, you would need to do that here.rhjhjhhh}r(h]h]h]h]h]uhMh]rhXFor this example, it's assumed the pin-muxing was already setup in the bootloader. If that's not the case, you would need to do that here.rr}r(hjhjubaubaubj@)r}r(hXThe UART5 module needs to be enabled via the CM\_L4PER\_UART5\_CLKCTRL register. This is located at physical address 0x4A009870. So from the M4 we would program this register at virtual address 0x6A009870. Writing a value of 2 to this register will enable the peripheral.hjhjhjCh}r(h]h]h]h]h]uhNhhh]rh)r}r(hXThe UART5 module needs to be enabled via the CM\_L4PER\_UART5\_CLKCTRL register. This is located at physical address 0x4A009870. So from the M4 we would program this register at virtual address 0x6A009870. Writing a value of 2 to this register will enable the peripheral.hjhjhhh}r(h]h]h]h]h]uhMh]rhX The UART5 module needs to be enabled via the CM_L4PER_UART5_CLKCTRL register. This is located at physical address 0x4A009870. So from the M4 we would program this register at virtual address 0x6A009870. Writing a value of 2 to this register will enable the peripheral.rr}r(hXThe UART5 module needs to be enabled via the CM\_L4PER\_UART5\_CLKCTRL register. This is located at physical address 0x4A009870. So from the M4 we would program this register at virtual address 0x6A009870. Writing a value of 2 to this register will enable the peripheral.hjubaubaubj@)r}r(hXAfter completing the previous step, the UART5 registers will become accessible. Normally UART5 is accessible at physical base address 0x48066000. This would correspondingly be accessed from the IPU at 0x68066000. hjhjhjCh}r(h]h]h]h]h]uhNhhh]rh)r}r(hXAfter completing the previous step, the UART5 registers will become accessible. Normally UART5 is accessible at physical base address 0x48066000. This would correspondingly be accessed from the IPU at 0x68066000.rhjhjhhh}r(h]h]h]h]h]uhMh]rhXAfter completing the previous step, the UART5 registers will become accessible. Normally UART5 is accessible at physical base address 0x48066000. This would correspondingly be accessed from the IPU at 0x68066000.rr}r(hjhjubaubaubeubh)r}r(hXPower Managementrhjhjhhh}r(h]rUpower-managementrah]h]h]h]rhauhNhhh]rhXPower Managementrr}r(hjhjubaubh)r}r(hX@The IPUs and DSPs auto-idle by default. This can prevent you from being able to connect to the device using JTAG or from accessing local memory via devmem2. There are some options sprinkled throughout sysfs that are needed in order to force these subsystems on, as is sometimes needed for development and debug purposes.rhjhjhhh}r(h]h]h]h]h]uhMhhh]rhX@The IPUs and DSPs auto-idle by default. This can prevent you from being able to connect to the device using JTAG or from accessing local memory via devmem2. There are some options sprinkled throughout sysfs that are needed in order to force these subsystems on, as is sometimes needed for development and debug purposes.rr}r(hjhjubaubh)r}r(hXzThere are some hard-coded device names that originate in the device tree (dra7.dtsi) that are needed for these operations:rhjhjhhh}r(h]h]h]h]h]uhMhhh]rhXzThere are some hard-coded device names that originate in the device tree (dra7.dtsi) that are needed for these operations:rr}r(hjhjubaubjB)r}r(hUhjhjhjEh}r(h]h]h]h]h]uhNhhh]r jH)r }r (hUh}r (h]h]h]h]h]UcolsKuhjh]r (jM)r}r(hUh}r(h]h]h]h]h]UcolwidthKuhj h]hjQubjM)r}r(hUh}r(h]h]h]h]h]UcolwidthKuhj h]hjQubjM)r}r(hUh}r(h]h]h]h]h]UcolwidthKuhj h]hjQubjX)r}r(hUh}r(h]h]h]h]h]uhj h]rj])r}r(hUh}r(h]h]h]h]h]uhjh]r(jb)r}r (hUh}r!(h]h]h]h]h]uhjh]r"h)r#}r$(hX Remote Corer%hjhjhhh}r&(h]h]h]h]h]uhMh]r'hX Remote Corer(r)}r*(hj%hj#ubaubahjoubjb)r+}r,(hUh}r-(h]h]h]h]h]uhjh]r.h)r/}r0(hXDefinition in dra7.dtsir1hj+hjhhh}r2(h]h]h]h]h]uhMh]r3hXDefinition in dra7.dtsir4r5}r6(hj1hj/ubaubahjoubjb)r7}r8(hUh}r9(h]h]h]h]h]uhjh]r:h)r;}r<(hXSystem FS Namer=hj7hjhhh}r>(h]h]h]h]h]uhMh]r?hXSystem FS Namer@rA}rB(hj=hj;ubaubahjoubehjubahjubj)rC}rD(hUh}rE(h]h]h]h]h]uhj h]rF(j])rG}rH(hUh}rI(h]h]h]h]h]uhjCh]rJ(jb)rK}rL(hUh}rM(h]h]h]h]h]uhjGh]rNh)rO}rP(hXIPU1rQhjKhjhhh}rR(h]h]h]h]h]uhMh]rShXIPU1rTrU}rV(hjQhjOubaubahjoubjb)rW}rX(hUh}rY(h]h]h]h]h]uhjGh]rZh)r[}r\(hX ipu@58820000r]hjWhjhhh}r^(h]h]h]h]h]uhMh]r_j))r`}ra(hj]h}rb(UrefuriXmailto:ipu@58820000h]h]h]h]h]uhj[h]rchX ipu@58820000rdre}rf(hUhj`ubahj2ubaubahjoubjb)rg}rh(hUh}ri(h]h]h]h]h]uhjGh]rjh)rk}rl(hX 58820000.ipurmhjghjhhh}rn(h]h]h]h]h]uhMh]rohX 58820000.ipurprq}rr(hjmhjkubaubahjoubehjubj])rs}rt(hUh}ru(h]h]h]h]h]uhjCh]rv(jb)rw}rx(hUh}ry(h]h]h]h]h]uhjsh]rzh)r{}r|(hXIPU2r}hjwhjhhh}r~(h]h]h]h]h]uhMh]rhXIPU2rr}r(hj}hj{ubaubahjoubjb)r}r(hUh}r(h]h]h]h]h]uhjsh]rh)r}r(hX ipu@55020000rhjhjhhh}r(h]h]h]h]h]uhMh]rj))r}r(hjh}r(UrefuriXmailto:ipu@55020000h]h]h]h]h]uhjh]rhX ipu@55020000rr}r(hUhjubahj2ubaubahjoubjb)r}r(hUh}r(h]h]h]h]h]uhjsh]rh)r}r(hX 55020000.ipurhjhjhhh}r(h]h]h]h]h]uhMh]rhX 55020000.ipurr}r(hjhjubaubahjoubehjubj])r}r(hUh}r(h]h]h]h]h]uhjCh]r(jb)r}r(hUh}r(h]h]h]h]h]uhjh]rh)r}r(hXDSP1rhjhjhhh}r(h]h]h]h]h]uhMh]rhXDSP1rr}r(hjhjubaubahjoubjb)r}r(hUh}r(h]h]h]h]h]uhjh]rh)r}r(hX dsp@40800000rhjhjhhh}r(h]h]h]h]h]uhMh]rj))r}r(hjh}r(UrefuriXmailto:dsp@40800000h]h]h]h]h]uhjh]rhX dsp@40800000rr}r(hUhjubahj2ubaubahjoubjb)r}r(hUh}r(h]h]h]h]h]uhjh]rh)r}r(hX 40800000.dsprhjhjhhh}r(h]h]h]h]h]uhMh]rhX 40800000.dsprr}r(hjhjubaubahjoubehjubj])r}r(hUh}r(h]h]h]h]h]uhjCh]r(jb)r}r(hUh}r(h]h]h]h]h]uhjh]rh)r}r(hXDSP2rhjhjhhh}r(h]h]h]h]h]uhM!h]rhXDSP2rr}r(hjhjubaubahjoubjb)r}r(hUh}r(h]h]h]h]h]uhjh]rh)r}r(hX dsp@41000000rhjhjhhh}r(h]h]h]h]h]uhM!h]rj))r}r(hjh}r(UrefuriXmailto:dsp@41000000h]h]h]h]h]uhjh]rhX dsp@41000000rr}r(hUhjubahj2ubaubahjoubjb)r}r(hUh}r(h]h]h]h]h]uhjh]rh)r}r(hX 41000000.dsprhjhjhhh}r(h]h]h]h]h]uhM!h]rhX 41000000.dsprr}r(hjhjubaubahjoubehjubj])r}r(hUh}r(h]h]h]h]h]uhjCh]r(jb)r}r(hUh}r(h]h]h]h]h]uhjh]rh)r}r(hX ICSS1-PRU0rhjhjhhh}r(h]h]h]h]h]uhM#h]rhX ICSS1-PRU0rr}r(hjhjubaubahjoubjb)r}r(hUh}r (h]h]h]h]h]uhjh]r h)r }r (hX pru@4b234000r hjhjhhh}r(h]h]h]h]h]uhM#h]rj))r}r(hj h}r(UrefuriXmailto:pru@4b234000h]h]h]h]h]uhj h]rhX pru@4b234000rr}r(hUhjubahj2ubaubahjoubjb)r}r(hUh}r(h]h]h]h]h]uhjh]rh)r}r(hX 4b234000.pru0rhjhjhhh}r(h]h]h]h]h]uhM#h]rhX 4b234000.pru0r r!}r"(hjhjubaubahjoubehjubj])r#}r$(hUh}r%(h]h]h]h]h]uhjCh]r&(jb)r'}r((hUh}r)(h]h]h]h]h]uhj#h]r*h)r+}r,(hX ICSS1-PRU1r-hj'hjhhh}r.(h]h]h]h]h]uhM%h]r/hX ICSS1-PRU1r0r1}r2(hj-hj+ubaubahjoubjb)r3}r4(hUh}r5(h]h]h]h]h]uhj#h]r6h)r7}r8(hX pru@4b238000r9hj3hjhhh}r:(h]h]h]h]h]uhM%h]r;j))r<}r=(hj9h}r>(UrefuriXmailto:pru@4b238000h]h]h]h]h]uhj7h]r?hX pru@4b238000r@rA}rB(hUhj<ubahj2ubaubahjoubjb)rC}rD(hUh}rE(h]h]h]h]h]uhj#h]rFh)rG}rH(hX 4b238000.pru1rIhjChjhhh}rJ(h]h]h]h]h]uhM%h]rKhX 4b238000.pru1rLrM}rN(hjIhjGubaubahjoubehjubj])rO}rP(hUh}rQ(h]h]h]h]h]uhjCh]rR(jb)rS}rT(hUh}rU(h]h]h]h]h]uhjOh]rVh)rW}rX(hX ICSS2-PRU0rYhjShjhhh}rZ(h]h]h]h]h]uhM'h]r[hX ICSS2-PRU0r\r]}r^(hjYhjWubaubahjoubjb)r_}r`(hUh}ra(h]h]h]h]h]uhjOh]rbh)rc}rd(hX pru@4b2b4000rehj_hjhhh}rf(h]h]h]h]h]uhM'h]rgj))rh}ri(hjeh}rj(UrefuriXmailto:pru@4b2b4000h]h]h]h]h]uhjch]rkhX pru@4b2b4000rlrm}rn(hUhjhubahj2ubaubahjoubjb)ro}rp(hUh}rq(h]h]h]h]h]uhjOh]rrh)rs}rt(hX 4b2b4000.pru0ruhjohjhhh}rv(h]h]h]h]h]uhM'h]rwhX 4b2b4000.pru0rxry}rz(hjuhjsubaubahjoubehjubj])r{}r|(hUh}r}(h]h]h]h]h]uhjCh]r~(jb)r}r(hUh}r(h]h]h]h]h]uhj{h]rh)r}r(hX ICSS2-PRU1rhjhjhhh}r(h]h]h]h]h]uhM)h]rhX ICSS2-PRU1rr}r(hjhjubaubahjoubjb)r}r(hUh}r(h]h]h]h]h]uhj{h]rh)r}r(hX pru@4b2b8000rhjhjhhh}r(h]h]h]h]h]uhM)h]rj))r}r(hjh}r(UrefuriXmailto:pru@4b2b8000h]h]h]h]h]uhjh]rhX pru@4b2b8000rr}r(hUhjubahj2ubaubahjoubjb)r}r(hUh}r(h]h]h]h]h]uhj{h]rh)r}r(hX 4b2b8000.pru1rhjhjhhh}r(h]h]h]h]h]uhM)h]rhX 4b2b8000.pru1rr}r(hjhjubaubahjoubehjubehjWubehjXubaubh)r}r(hXdTo map these System FS names to the associated remoteproc entry, you can run the following commands:rhjhjhhh}r(h]h]h]h]h]uhM,hhh]rhXdTo map these System FS names to the associated remoteproc entry, you can run the following commands:rr}r(hjhjubaubj)r}r(hX{root@am57xx-evm:~# ls -l /sys/kernel/debug/remoteproc/ root@am57xx-evm:~# cat /sys/kernel/debug/remoteproc/remoteproc*/namehjhjhjh}r(hhh]h]h]h]h]uhMhhh]rhX{root@am57xx-evm:~# ls -l /sys/kernel/debug/remoteproc/ root@am57xx-evm:~# cat /sys/kernel/debug/remoteproc/remoteproc*/namerr}r(hUhjubaubh)r}r(hXqThe results of the commands will be a one-to-one mapping. For example, 58820000.ipu corresponds with remoteproc0.rhjhjhhh}r(h]h]h]h]h]uhM4hhh]rhXqThe results of the commands will be a one-to-one mapping. For example, 58820000.ipu corresponds with remoteproc0.rr}r(hjhjubaubh)r}r(hX7Similarly, to see the power state of each of the cores:rhjhjhhh}r(h]h]h]h]h]uhM7hhh]rhX7Similarly, to see the power state of each of the cores:rr}r(hjhjubaubj)r}r(hX>root@am57xx-evm:~# cat /sys/class/remoteproc/remoteproc*/statehjhjhjh}r(hhh]h]h]h]h]uhMhhh]rhX>root@am57xx-evm:~# cat /sys/class/remoteproc/remoteproc*/staterr}r(hUhjubaubh)r}r(hXThe state can be suspended, running, offline, etc. You can only attach JTAG if the state is "running". If it shows as "suspended" then you must force it to run. For example, let's say DSP0 is "suspended". You can run the following command to force it on:rhjhjhhh}r(h]h]h]h]h]uhM=hhh]rhXThe state can be suspended, running, offline, etc. You can only attach JTAG if the state is "running". If it shows as "suspended" then you must force it to run. For example, let's say DSP0 is "suspended". You can run the following command to force it on:rr}r(hjhjubaubj)r}r(hXQroot@am57xx-evm:~# echo on > /sys/bus/platform/devices/40800000.dsp/power/controlhjhjhjh}r(hhh]h]h]h]h]uhMhhh]rhXQroot@am57xx-evm:~# echo on > /sys/bus/platform/devices/40800000.dsp/power/controlrr}r(hUhjubaubh)r}r(hXxThe same is true for any of the cores, but replace 40800000.dsp with the associated System FS name from the chart above.rhjhjhhh}r(h]h]h]h]h]uhMFhhh]rhXxThe same is true for any of the cores, but replace 40800000.dsp with the associated System FS name from the chart above.rr}r(hjhjubaubh)r}r(hX<Adding IPC to an Existing TI-RTOS Application on slave coresrhjhjhhh}r(h]rUuhMchhh]r(j@)r}r(hXZBuild and run the out-of-box LED blink example on the EVM using Code Composer Studio (CCS)hjhjhjCh}r(h]h]h]h]h]uhNhhh]rh)r }r!(hXZBuild and run the out-of-box LED blink example on the EVM using Code Composer Studio (CCS)r"hjhjhhh}r#(h]h]h]h]h]uhMch]r$hXZBuild and run the out-of-box LED blink example on the EVM using Code Composer Studio (CCS)r%r&}r'(hj"hj ubaubaubj@)r(}r)(hXTake the ex02\_message example from the IPC software bundle and turn it into a CCS project. Build it and modify the Linux startup code to use this new image. This is just a sanity check step to make sure we can build the IPC examples in CCS and have them run at boot up on the EVM.hjhjhjCh}r*(h]h]h]h]h]uhNhhh]r+h)r,}r-(hXTake the ex02\_message example from the IPC software bundle and turn it into a CCS project. Build it and modify the Linux startup code to use this new image. This is just a sanity check step to make sure we can build the IPC examples in CCS and have them run at boot up on the EVM.hj(hjhhh}r.(h]h]h]h]h]uhMeh]r/hXTake the ex02_message example from the IPC software bundle and turn it into a CCS project. Build it and modify the Linux startup code to use this new image. This is just a sanity check step to make sure we can build the IPC examples in CCS and have them run at boot up on the EVM.r0r1}r2(hXTake the ex02\_message example from the IPC software bundle and turn it into a CCS project. Build it and modify the Linux startup code to use this new image. This is just a sanity check step to make sure we can build the IPC examples in CCS and have them run at boot up on the EVM.hj,ubaubaubj@)r3}r4(hX In CCS, make a clone of the out-of-box LED example and rename it to denote it's the IPC version of the example. Then using the ex02\_messageq example as a reference, add in the IPC pieces to the LED example. Build from CCS then add it to the Linux firmware folder. hjhjhjCh}r5(h]h]h]h]h]uhNhhh]r6h)r7}r8(hXIn CCS, make a clone of the out-of-box LED example and rename it to denote it's the IPC version of the example. Then using the ex02\_messageq example as a reference, add in the IPC pieces to the LED example. Build from CCS then add it to the Linux firmware folder.hj3hjhhh}r9(h]h]h]h]h]uhMjh]r:hXIn CCS, make a clone of the out-of-box LED example and rename it to denote it's the IPC version of the example. Then using the ex02_messageq example as a reference, add in the IPC pieces to the LED example. Build from CCS then add it to the Linux firmware folder.r;r<}r=(hXIn CCS, make a clone of the out-of-box LED example and rename it to denote it's the IPC version of the example. Then using the ex02\_messageq example as a reference, add in the IPC pieces to the LED example. Build from CCS then add it to the Linux firmware folder.hj7ubaubaubeubh)r>}r?(hX&Running LED Blink PDK Example from CCSr@hjhjhhh}rA(h]rBU&running-led-blink-pdk-example-from-ccsrCah]h]h]h]rDh^auhNhhh]rEhX&Running LED Blink PDK Example from CCSrFrG}rH(hj@hj>ubaubh)rI}rJ(hXTODO - Fill this section in with instructions on how to run the LED blink example using JTAG and CCS after the board has booted Linux.rKhjhjhhh}rL(h]h]h]h]h]uhMrhhh]rMhXTODO - Fill this section in with instructions on how to run the LED blink example using JTAG and CCS after the board has booted Linux.rNrO}rP(hjKhjIubaubj)rQ}rR(hXSome edits were made to the LED blink example to allow it to run in a Linux environment, specifically, removed the GPIO interrupts and then added a Clock object to call the LED GPIO toggle function on a periodic bases.hjhjhjh}rS(h]h]h]h]h]uhNhhh]rTh)rU}rV(hXSome edits were made to the LED blink example to allow it to run in a Linux environment, specifically, removed the GPIO interrupts and then added a Clock object to call the LED GPIO toggle function on a periodic bases.rWhjQhjhhh}rX(h]h]h]h]h]uhMvh]rYhXSome edits were made to the LED blink example to allow it to run in a Linux environment, specifically, removed the GPIO interrupts and then added a Clock object to call the LED GPIO toggle function on a periodic bases.rZr[}r\(hjWhjUubaubaubh)r]}r^(hUhjhjhjh}r_(h]h]h]h]h]uhM{hhh]r`j)ra}rb(hUjKhj]hjhhh}rc(h]h]h]h]h]uhKhhh]ubaubh)rd}re(hX2Make CCS project out of ex02\_messageq IPC examplehjhjhhh}rf(h]rgU1make-ccs-project-out-of-ex02-messageq-ipc-examplerhah]h]h]h]rih,auhNhhh]rjhX1Make CCS project out of ex02_messageq IPC examplerkrl}rm(hX2Make CCS project out of ex02\_messageq IPC examplehjdubaubh)rn}ro(hXoTODO - fill this section in with instructions on how to make a CCS project out of the IPC example source files.rphjhjhhh}rq(h]h]h]h]h]uhMhhh]rrhXoTODO - fill this section in with instructions on how to make a CCS project out of the IPC example source files.rsrt}ru(hjphjnubaubh)rv}rw(hUhjhjhjh}rx(h]h]h]h]h]uhMhhh]ryj)rz}r{(hUjKhjvhjhhh}r|(h]h]h]h]h]uhKhhh]ubaubh)r}}r~(hX Add IPC to the LED Blink Examplerhjhjhhh}r(h]rU add-ipc-to-the-led-blink-examplerah]h]h]h]rh]auhNhhh]rhX Add IPC to the LED Blink Examplerr}r(hjhj}ubaubh)r}r(hXThe first step is to clone our out-of-box LED blink CCS project and rename it to denote it's using IPC. The easiest way to do this is using CCS. Here are the steps...rhjhjhhh}r(h]h]h]h]h]uhMhhh]rhXThe first step is to clone our out-of-box LED blink CCS project and rename it to denote it's using IPC. The easiest way to do this is using CCS. Here are the steps...rr}r(hjhjubaubj)r}r(hUhjhjhj!h}r(j#X-h]h]h]h]h]uhMhhh]r(j@)r}r(hXIn the **Edit** perspective, go into your **Project Explorer** window and right click on your GPIO\_LedBlink\_evmAM572x+c66xExampleProject project and select **copy** from the pop-up menu. Maske sure the project is not is a closed state.hjhjhjCh}r(h]h]h]h]h]uhNhhh]rh)r}r(hXIn the **Edit** perspective, go into your **Project Explorer** window and right click on your GPIO\_LedBlink\_evmAM572x+c66xExampleProject project and select **copy** from the pop-up menu. Maske sure the project is not is a closed state.hjhjhhh}r(h]h]h]h]h]uhMh]r(hXIn the rr}r(hXIn the hjubj)r}r(hX**Edit**h}r(h]h]h]h]h]uhjh]rhXEditrr}r(hUhjubahjubhX perspective, go into your rr}r(hX perspective, go into your hjubj)r}r(hX**Project Explorer**h}r(h]h]h]h]h]uhjh]rhXProject Explorerrr}r(hUhjubahjubhX^ window and right click on your GPIO_LedBlink_evmAM572x+c66xExampleProject project and select rr}r(hX` window and right click on your GPIO\_LedBlink\_evmAM572x+c66xExampleProject project and select hjubj)r}r(hX**copy**h}r(h]h]h]h]h]uhjh]rhXcopyrr}r(hUhjubahjubhXG from the pop-up menu. Maske sure the project is not is a closed state.rr}r(hXG from the pop-up menu. Maske sure the project is not is a closed state.hjubeubaubj@)r}r(hXLRick click in and empty area of the project explorer window and select past.hjhjhjCh}r(h]h]h]h]h]uhNhhh]rh)r}r(hXLRick click in and empty area of the project explorer window and select past.rhjhjhhh}r(h]h]h]h]h]uhMh]rhXLRick click in and empty area of the project explorer window and select past.rr}r(hjhjubaubaubj@)r}r(hXA dialog box pops up, modify the name to denote it's using IPC. A good name is GPIO\_LedBlink\_evmAM572x+c66xExampleProjec\_with\_ipc. hjhjhjCh}r(h]h]h]h]h]uhNhhh]rh)r}r(hXA dialog box pops up, modify the name to denote it's using IPC. A good name is GPIO\_LedBlink\_evmAM572x+c66xExampleProjec\_with\_ipc.hjhjhhh}r(h]h]h]h]h]uhMh]rhXA dialog box pops up, modify the name to denote it's using IPC. A good name is GPIO_LedBlink_evmAM572x+c66xExampleProjec_with_ipc.rr}r(hXA dialog box pops up, modify the name to denote it's using IPC. A good name is GPIO\_LedBlink\_evmAM572x+c66xExampleProjec\_with\_ipc.hjubaubaubeubh)r}r(hUhjhjhjh}r(h]h]h]h]h]uhMhhh]rj)r}r(hUjKhjhjhhh}r(h]h]h]h]h]uhKhhh]ubaubh)r}r(hXThis is the project we'll be working with from here on. The next thing we want to do is select the proper RTSC platform and other components. To do this, follow these steps.rhjhjhhh}r(h]h]h]h]h]uhMhhh]rhXThis is the project we'll be working with from here on. The next thing we want to do is select the proper RTSC platform and other components. To do this, follow these steps.rr}r(hjhjubaubj)r}r(hUhjhjhj!h}r(j#X-h]h]h]h]h]uhMhhh]r(j@)r}r(hXkRight click on the GPIO\_LedBlink\_evmAM572x+c66xExampleProjec\_with\_ipc project and select **Properties**hjhjhjCh}r(h]h]h]h]h]uhNhhh]rh)r}r(hXkRight click on the GPIO\_LedBlink\_evmAM572x+c66xExampleProjec\_with\_ipc project and select **Properties**hjhjhhh}r(h]h]h]h]h]uhMh]r(hXYRight click on the GPIO_LedBlink_evmAM572x+c66xExampleProjec_with_ipc project and select rr}r(hX]Right click on the GPIO\_LedBlink\_evmAM572x+c66xExampleProjec\_with\_ipc project and select hjubj)r}r(hX**Properties**h}r(h]h]h]h]h]uhjh]rhX Propertiesrr}r(hUhjubahjubeubaubj@)r}r(hX0In the left hand pane, click on **CCS General**.rhjhjhjCh}r(h]h]h]h]h]uhNhhh]rh)r}r(hjhjhjhhh}r(h]h]h]h]h]uhMh]r(hX In the left hand pane, click on rr}r(hX In the left hand pane, click on hjubj)r}r(hX**CCS General**h}r(h]h]h]h]h]uhjh]rhX CCS Generalr r }r (hUhjubahjubhX.r }r (hX.hjubeubaubj@)r}r(hX1On the right hand side, click on the **RTSC** tabrhjhjhjCh}r(h]h]h]h]h]uhNhhh]rh)r}r(hjhjhjhhh}r(h]h]h]h]h]uhMh]r(hX%On the right hand side, click on the rr}r(hX%On the right hand side, click on the hjubj)r}r(hX**RTSC**h}r(h]h]h]h]h]uhjh]rhXRTSCrr}r (hUhjubahjubhX tabr!r"}r#(hX tabhjubeubaubj@)r$}r%(hX0For **XDCtools version:** select 3.32.0.06\_corer&hjhjhjCh}r'(h]h]h]h]h]uhNhhh]r(h)r)}r*(hj&hj$hjhhh}r+(h]h]h]h]h]uhMh]r,(hXFor r-r.}r/(hXFor hj)ubj)r0}r1(hX**XDCtools version:**h}r2(h]h]h]h]h]uhj)h]r3hXXDCtools version:r4r5}r6(hUhj0ubahjubhX select 3.32.0.06_corer7r8}r9(hX select 3.32.0.06\_corehj)ubeubaubj@)r:}r;(hXIn the list of **Products and Repositories**, **check** the following... - IPC 3.43.2.04 - SYS/BIOS 6.45.1.29 - am57xx PDK 1.0.4 hjhNhjCh}r<(h]h]h]h]h]uhNhhh]r=(h)r>}r?(hXHIn the list of **Products and Repositories**, **check** the following...hj:hjhhh}r@(h]h]h]h]h]uhMh]rA(hXIn the list of rBrC}rD(hXIn the list of hj>ubj)rE}rF(hX**Products and Repositories**h}rG(h]h]h]h]h]uhj>h]rHhXProducts and RepositoriesrIrJ}rK(hUhjEubahjubhX, rLrM}rN(hX, hj>ubj)rO}rP(hX **check**h}rQ(h]h]h]h]h]uhj>h]rRhXcheckrSrT}rU(hUhjOubahjubhX the following...rVrW}rX(hX the following...hj>ubeubj)rY}rZ(hUh}r[(j#X-h]h]h]h]h]uhj:h]r\(j@)r]}r^(hX IPC 3.43.2.04r_h}r`(h]h]h]h]h]uhjYh]rah)rb}rc(hj_hj]hjhhh}rd(h]h]h]h]h]uhMh]rehX IPC 3.43.2.04rfrg}rh(hj_hjbubaubahjCubj@)ri}rj(hXSYS/BIOS 6.45.1.29rkh}rl(h]h]h]h]h]uhjYh]rmh)rn}ro(hjkhjihjhhh}rp(h]h]h]h]h]uhMh]rqhXSYS/BIOS 6.45.1.29rrrs}rt(hjkhjnubaubahjCubj@)ru}rv(hXam57xx PDK 1.0.4 h}rw(h]h]h]h]h]uhjYh]rxh)ry}rz(hXam57xx PDK 1.0.4r{hjuhjhhh}r|(h]h]h]h]h]uhMh]r}hXam57xx PDK 1.0.4r~r}r(hj{hjyubaubahjCubehj!ubeubj@)r}r(hX)For **Target**, select ti.targets.elf.C66rhjhjhjCh}r(h]h]h]h]h]uhNhhh]rh)r}r(hjhjhjhhh}r(h]h]h]h]h]uhMh]r(hXFor rr}r(hXFor hjubj)r}r(hX **Target**h}r(h]h]h]h]h]uhjh]rhXTargetrr}r(hUhjubahjubhX, select ti.targets.elf.C66rr}r(hX, select ti.targets.elf.C66hjubeubaubj@)r}r(hX/For **Platform**, select ti.platforms.evmDRA7XXrhjhjhjCh}r(h]h]h]h]h]uhNhhh]rh)r}r(hjhjhjhhh}r(h]h]h]h]h]uhMh]r(hXFor rr}r(hXFor hjubj)r}r(hX **Platform**h}r(h]h]h]h]h]uhjh]rhXPlatformrr}r(hUhjubahjubhX, select ti.platforms.evmDRA7XXrr}r(hX, select ti.platforms.evmDRA7XXhjubeubaubj@)r}r(hXOnce the platform is selected, edit its name buy hand and append :dsp1 to the end. After this it should be ti.platforms.evmDRA7XX:dsp1hjhjhjCh}r(h]h]h]h]h]uhNhhh]rh)r}r(hXOnce the platform is selected, edit its name buy hand and append :dsp1 to the end. After this it should be ti.platforms.evmDRA7XX:dsp1rhjhjhhh}r(h]h]h]h]h]uhMh]rhXOnce the platform is selected, edit its name buy hand and append :dsp1 to the end. After this it should be ti.platforms.evmDRA7XX:dsp1rr}r(hjhjubaubaubj@)r}r(hX6Go ahead and leave the **Build-profile** set to debug.rhjhjhjCh}r(h]h]h]h]h]uhNhhh]rh)r}r(hjhjhjhhh}r(h]h]h]h]h]uhMh]r(hXGo ahead and leave the rr}r(hXGo ahead and leave the hjubj)r}r(hX**Build-profile**h}r(h]h]h]h]h]uhjh]rhX Build-profilerr}r(hUhjubahjubhX set to debug.rr}r(hX set to debug.hjubeubaubj@)r}r(hXHit the OK button. hjhjhjCh}r(h]h]h]h]h]uhNhhh]rh)r}r(hXHit the OK button.rhjhjhhh}r(h]h]h]h]h]uhMh]rhXHit the OK button.rr}r(hjhjubaubaubeubh)r}r(hUhjhjhjh}r(h]h]h]h]h]uhMhhh]rj)r}r(hUjKhjhjhhh}r(h]h]h]h]h]uhKhhh]ubaubh)r}r(hXhNow we want to copy configuration and source files from the ex02\_messageq IPC example into our project. The IPC example is located at **C:\\ti\\ipc\_3\_43\_02\_04\\examples\\DRA7XX\_linux\_elf\\ex02\_messageq**. To copy files into your CCS project, you can simply select the files you want in Windows explorer then drag and drop them into your project in CCS.hjhjhhh}r(h]h]h]h]h]uhMhhh]r(hXNow we want to copy configuration and source files from the ex02_messageq IPC example into our project. The IPC example is located at rr}r(hXNow we want to copy configuration and source files from the ex02\_messageq IPC example into our project. The IPC example is located at hjubj)r}r(hXL**C:\\ti\\ipc\_3\_43\_02\_04\\examples\\DRA7XX\_linux\_elf\\ex02\_messageq**h}r(h]h]h]h]h]uhjh]rhX<C:\ti\ipc_3_43_02_04\examples\DRA7XX_linux_elf\ex02_messageqrr}r(hUhjubahjubhX. To copy files into your CCS project, you can simply select the files you want in Windows explorer then drag and drop them into your project in CCS.rr}r(hX. To copy files into your CCS project, you can simply select the files you want in Windows explorer then drag and drop them into your project in CCS.hjubeubh)r}r(hX)Copy these files into your CCS project...rhjhjhhh}r(h]h]h]h]h]uhMhhh]rhX)Copy these files into your CCS project...rr}r(hjhjubaubj)r}r(hUhjhjhj!h}r(j#X-h]h]h]h]h]uhMhhh]r(j@)r}r(hX]C:\\ti\\ipc\_3\_43\_02\_04\\examples\\DRA7XX\_linux\_elf\\ex02\_messageq\\shared\\AppCommon.hrhjhjhjCh}r(h]h]h]h]h]uhNhhh]rh)r}r(hjhjhjhhh}r(h]h]h]h]h]uhMh]rhXOC:\ti\ipc_3_43_02_04\examples\DRA7XX_linux_elf\ex02_messageq\shared\AppCommon.hrr }r (hX]C:\\ti\\ipc\_3\_43\_02\_04\\examples\\DRA7XX\_linux\_elf\\ex02\_messageq\\shared\\AppCommon.hhjubaubaubj@)r }r (hX\C:\\ti\\ipc\_3\_43\_02\_04\\examples\\DRA7XX\_linux\_elf\\ex02\_messageq\\shared\\config.bldr hjhjhjCh}r(h]h]h]h]h]uhNhhh]rh)r}r(hj hj hjhhh}r(h]h]h]h]h]uhMh]rhXNC:\ti\ipc_3_43_02_04\examples\DRA7XX_linux_elf\ex02_messageq\shared\config.bldrr}r(hX\C:\\ti\\ipc\_3\_43\_02\_04\\examples\\DRA7XX\_linux\_elf\\ex02\_messageq\\shared\\config.bldhjubaubaubj@)r}r(hX]C:\\ti\\ipc\_3\_43\_02\_04\\examples\\DRA7XX\_linux\_elf\\ex02\_messageq\\shared\\ipc.cfg.xs hjhjhjCh}r(h]h]h]h]h]uhNhhh]rh)r}r(hX\C:\\ti\\ipc\_3\_43\_02\_04\\examples\\DRA7XX\_linux\_elf\\ex02\_messageq\\shared\\ipc.cfg.xshjhjhhh}r(h]h]h]h]h]uhMh]rhXNC:\ti\ipc_3_43_02_04\examples\DRA7XX_linux_elf\ex02_messageq\shared\ipc.cfg.xsrr }r!(hX\C:\\ti\\ipc\_3\_43\_02\_04\\examples\\DRA7XX\_linux\_elf\\ex02\_messageq\\shared\\ipc.cfg.xshjubaubaubeubh)r"}r#(hUhjhjhjh}r$(h]h]h]h]h]uhMhhh]r%j)r&}r'(hUjKhj"hjhhh}r((h]h]h]h]h]uhKhhh]ubaubh)r)}r*(hX-Now copy these files into your CCS project...r+hjhjhhh}r,(h]h]h]h]h]uhMhhh]r-hX-Now copy these files into your CCS project...r.r/}r0(hj+hj)ubaubj)r1}r2(hUhjhjhj!h}r3(j#X-h]h]h]h]h]uhMhhh]r4(j@)r5}r6(hXXC:\\ti\\ipc\_3\_43\_02\_04\\examples\\DRA7XX\_linux\_elf\\ex02\_messageq\\dsp1\\Dsp1.cfgr7hj1hjhjCh}r8(h]h]h]h]h]uhNhhh]r9h)r:}r;(hj7hj5hjhhh}r<(h]h]h]h]h]uhMh]r=hXJC:\ti\ipc_3_43_02_04\examples\DRA7XX_linux_elf\ex02_messageq\dsp1\Dsp1.cfgr>r?}r@(hXXC:\\ti\\ipc\_3\_43\_02\_04\\examples\\DRA7XX\_linux\_elf\\ex02\_messageq\\dsp1\\Dsp1.cfghj:ubaubaubj@)rA}rB(hXZC:\\ti\\ipc\_3\_43\_02\_04\\examples\\DRA7XX\_linux\_elf\\ex02\_messageq\\dsp1\\MainDsp1.crChj1hjhjCh}rD(h]h]h]h]h]uhNhhh]rEh)rF}rG(hjChjAhjhhh}rH(h]h]h]h]h]uhMh]rIhXLC:\ti\ipc_3_43_02_04\examples\DRA7XX_linux_elf\ex02_messageq\dsp1\MainDsp1.crJrK}rL(hXZC:\\ti\\ipc\_3\_43\_02\_04\\examples\\DRA7XX\_linux\_elf\\ex02\_messageq\\dsp1\\MainDsp1.chjFubaubaubj@)rM}rN(hXXC:\\ti\\ipc\_3\_43\_02\_04\\examples\\DRA7XX\_linux\_elf\\ex02\_messageq\\dsp1\\Server.crOhj1hjhjCh}rP(h]h]h]h]h]uhNhhh]rQh)rR}rS(hjOhjMhjhhh}rT(h]h]h]h]h]uhMh]rUhXJC:\ti\ipc_3_43_02_04\examples\DRA7XX_linux_elf\ex02_messageq\dsp1\Server.crVrW}rX(hXXC:\\ti\\ipc\_3\_43\_02\_04\\examples\\DRA7XX\_linux\_elf\\ex02\_messageq\\dsp1\\Server.chjRubaubaubj@)rY}rZ(hXYC:\\ti\\ipc\_3\_43\_02\_04\\examples\\DRA7XX\_linux\_elf\\ex02\_messageq\\dsp1\\Server.h hj1hjhjCh}r[(h]h]h]h]h]uhNhhh]r\h)r]}r^(hXXC:\\ti\\ipc\_3\_43\_02\_04\\examples\\DRA7XX\_linux\_elf\\ex02\_messageq\\dsp1\\Server.hhjYhjhhh}r_(h]h]h]h]h]uhMh]r`hXJC:\ti\ipc_3_43_02_04\examples\DRA7XX_linux_elf\ex02_messageq\dsp1\Server.hrarb}rc(hXXC:\\ti\\ipc\_3\_43\_02\_04\\examples\\DRA7XX\_linux\_elf\\ex02\_messageq\\dsp1\\Server.hhj]ubaubaubeubh)rd}re(hUhjhjhjh}rf(h]h]h]h]h]uhMhhh]rgj)rh}ri(hUjKhjdhjhhh}rj(h]h]h]h]h]uhKhhh]ubaubj)rk}rl(hXWhen you copy Dsp1.cfg into your CCS project, it should show up greyed out. This is because the LED blink example already has a cfg file (gpio\_test\_evmAM572x.cfg). The Dsp1.cfg will be used for copying and pasting. When it's all done, you can delete it from your project.hjhjhjh}rm(h]h]h]h]h]uhNhhh]rnh)ro}rp(hXWhen you copy Dsp1.cfg into your CCS project, it should show up greyed out. This is because the LED blink example already has a cfg file (gpio\_test\_evmAM572x.cfg). The Dsp1.cfg will be used for copying and pasting. When it's all done, you can delete it from your project.hjkhjhhh}rq(h]h]h]h]h]uhMh]rrhXWhen you copy Dsp1.cfg into your CCS project, it should show up greyed out. This is because the LED blink example already has a cfg file (gpio_test_evmAM572x.cfg). The Dsp1.cfg will be used for copying and pasting. When it's all done, you can delete it from your project.rsrt}ru(hXWhen you copy Dsp1.cfg into your CCS project, it should show up greyed out. This is because the LED blink example already has a cfg file (gpio\_test\_evmAM572x.cfg). The Dsp1.cfg will be used for copying and pasting. When it's all done, you can delete it from your project.hjoubaubaubh)rv}rw(hXiFinally, you will likely want to use a custom resource table so copy these files into your CCS project...rxhjhjhhh}ry(h]h]h]h]h]uhMhhh]rzhXiFinally, you will likely want to use a custom resource table so copy these files into your CCS project...r{r|}r}(hjxhjvubaubj)r~}r(hUhjhjhj!h}r(j#X-h]h]h]h]h]uhMhhh]r(j@)r}r(hXRC:\\ti\\ipc\_3\_43\_02\_04\\packages\\ti\\ipc\\remoteproc\\rsc\_table\_vayu\_dsp.hrhj~hjhjCh}r(h]h]h]h]h]uhNhhh]rh)r}r(hjhjhjhhh}r(h]h]h]h]h]uhMh]rhXDC:\ti\ipc_3_43_02_04\packages\ti\ipc\remoteproc\rsc_table_vayu_dsp.hrr}r(hXRC:\\ti\\ipc\_3\_43\_02\_04\\packages\\ti\\ipc\\remoteproc\\rsc\_table\_vayu\_dsp.hhjubaubaubj@)r}r(hXHC:\\ti\\ipc\_3\_43\_02\_04\\packages\\ti\\ipc\\remoteproc\\rsc\_types.h hj~hjhjCh}r(h]h]h]h]h]uhNhhh]rh)r}r(hXGC:\\ti\\ipc\_3\_43\_02\_04\\packages\\ti\\ipc\\remoteproc\\rsc\_types.hhjhjhhh}r(h]h]h]h]h]uhMh]rhX;C:\ti\ipc_3_43_02_04\packages\ti\ipc\remoteproc\rsc_types.hrr}r(hXGC:\\ti\\ipc\_3\_43\_02\_04\\packages\\ti\\ipc\\remoteproc\\rsc\_types.hhjubaubaubeubh)r}r(hXeThe rsc\_table\_vayu\_dsp.h file defines an initialized structure so let's make a **.c** source file.hjhjhhh}r(h]h]h]h]h]uhMhhh]r(hXOThe rsc_table_vayu_dsp.h file defines an initialized structure so let's make a rr}r(hXRThe rsc\_table\_vayu\_dsp.h file defines an initialized structure so let's make a hjubj)r}r(hX**.c**h}r(h]h]h]h]h]uhjh]rhX.crr}r(hUhjubahjubhX source file.rr}r(hX source file.hjubeubj)r}r(hUhjhjhj!h}r(j#X-h]h]h]h]h]uhMhhh]rj@)r}r(hXOIn your CCS project, rename rsc\_table\_vayu\_dsp.h to rsc\_table\_vayu\_dsp.c hjhjhjCh}r(h]h]h]h]h]uhNhhh]rh)r}r(hXNIn your CCS project, rename rsc\_table\_vayu\_dsp.h to rsc\_table\_vayu\_dsp.chjhjhhh}r(h]h]h]h]h]uhMh]rhXHIn your CCS project, rename rsc_table_vayu_dsp.h to rsc_table_vayu_dsp.crr}r(hXNIn your CCS project, rename rsc\_table\_vayu\_dsp.h to rsc\_table\_vayu\_dsp.chjubaubaubaubh)r}r(hUhjhjhjh}r(h]h]h]h]h]uhMhhh]rj)r}r(hUjKhjhjhhh}r(h]h]h]h]h]uhKhhh]ubaubh)r}r(hXNow we want to **merge** the IPC example configuration file with the LED blink example configuration file. Follow these steps...hjhjhhh}r(h]h]h]h]h]uhMhhh]r(hXNow we want to rr}r(hXNow we want to hjubj)r}r(hX **merge**h}r(h]h]h]h]h]uhjh]rhXmergerr}r(hUhjubahjubhXh the IPC example configuration file with the LED blink example configuration file. Follow these steps...rr}r(hXh the IPC example configuration file with the LED blink example configuration file. Follow these steps...hjubeubj)r}r(hUhjhjhj!h}r(j#X-h]h]h]h]h]uhMhhh]r(j@)r}r(hXOpen up **Dsp1.cfg** using a text editor (don't open it using the GUI). Right click on it and select **Open With -> XDCscript Editor**hjhjhjCh}r(h]h]h]h]h]uhNhhh]rh)r}r(hXOpen up **Dsp1.cfg** using a text editor (don't open it using the GUI). Right click on it and select **Open With -> XDCscript Editor**hjhjhhh}r(h]h]h]h]h]uhMh]r(hXOpen up rr}r(hXOpen up hjubj)r}r(hX **Dsp1.cfg**h}r(h]h]h]h]h]uhjh]rhXDsp1.cfgrr}r(hUhjubahjubhXQ using a text editor (don't open it using the GUI). Right click on it and select rr}r(hXQ using a text editor (don't open it using the GUI). Right click on it and select hjubj)r}r(hX!**Open With -> XDCscript Editor**h}r(h]h]h]h]h]uhjh]rhXOpen With -> XDCscript Editorrr}r(hUhjubahjubeubaubj@)r}r(hXLWe want to copy the entire contents into the clipboard. Select all and copy.hjhjhjCh}r(h]h]h]h]h]uhNhhh]rh)r}r(hXLWe want to copy the entire contents into the clipboard. Select all and copy.rhjhjhhh}r(h]h]h]h]h]uhMh]rhXLWe want to copy the entire contents into the clipboard. Select all and copy.rr}r(hjhjubaubaubj@)r}r(hXNow just like above, open the gpio\_test\_evmAM572x.cfg config file in the text editor. Go to the very bottom and **paste** in the contents from the Dsp1.cfg file. Basically we've appended the contents of Dsp1.cfg into gpio\_test\_evmAM572x.cfg. hjhjhjCh}r(h]h]h]h]h]uhNhhh]rh)r}r(hXNow just like above, open the gpio\_test\_evmAM572x.cfg config file in the text editor. Go to the very bottom and **paste** in the contents from the Dsp1.cfg file. Basically we've appended the contents of Dsp1.cfg into gpio\_test\_evmAM572x.cfg.hjhjhhh}r(h]h]h]h]h]uhMh]r(hXpNow just like above, open the gpio_test_evmAM572x.cfg config file in the text editor. Go to the very bottom and rr}r(hXrNow just like above, open the gpio\_test\_evmAM572x.cfg config file in the text editor. Go to the very bottom and hjubj)r}r (hX **paste**h}r (h]h]h]h]h]uhjh]r hXpaster r }r(hUhjubahjubhXx in the contents from the Dsp1.cfg file. Basically we've appended the contents of Dsp1.cfg into gpio_test_evmAM572x.cfg.rr}r(hXz in the contents from the Dsp1.cfg file. Basically we've appended the contents of Dsp1.cfg into gpio\_test\_evmAM572x.cfg.hjubeubaubeubh)r}r(hUhjhjhjh}r(h]h]h]h]h]uhMhhh]rj)r}r(hUjKhjhjhhh}r(h]h]h]h]h]uhKhhh]ubaubh)r}r(hXWe've now added in all the necessary configuration and source files into our project. Don't expect it to build at this point, we have to make edits first. These edits are listed below.rhjhjhhh}r(h]h]h]h]h]uhMhhh]rhXWe've now added in all the necessary configuration and source files into our project. Don't expect it to build at this point, we have to make edits first. These edits are listed below.rr}r (hjhjubaubj)r!}r"(hX~NOTE, you can download the full CCS project with source files to use as a reference. See link towards the end of this section.hjhjhjh}r#(hhh]h]h]h]h]uhMhhh]r$hX~NOTE, you can download the full CCS project with source files to use as a reference. See link towards the end of this section.r%r&}r'(hUhj!ubaubh)r(}r)(hUhjhjhjh}r*(h]h]h]h]h]uhMhhh]r+j)r,}r-(hUjKhj(hjhhh}r.(h]h]h]h]h]uhKhhh]ubaubj)r/}r0(hUhjhjhj!h}r1(j#X-h]h]h]h]h]uhMhhh]r2j@)r3}r4(hX#Edit **gpio\_test\_evmAM572x.cfg** hj/hjhjCh}r5(h]h]h]h]h]uhNhhh]r6h)r7}r8(hX"Edit **gpio\_test\_evmAM572x.cfg**hj3hjhhh}r9(h]h]h]h]h]uhMh]r:(hXEdit r;r<}r=(hXEdit hj7ubj)r>}r?(hX**gpio\_test\_evmAM572x.cfg**h}r@(h]h]h]h]h]uhj7h]rAhXgpio_test_evmAM572x.cfgrBrC}rD(hUhj>ubahjubeubaubaubh)rE}rF(hUhjhjhjh}rG(h]h]h]h]h]uhMhhh]rHj)rI}rJ(hUjKhjEhjhhh}rK(h]h]h]h]h]uhKhhh]ubaubh)rL}rM(hX=Add the following to the beginning of your configuration filerNhjhjhhh}rO(h]h]h]h]h]uhMhhh]rPhX=Add the following to the beginning of your configuration filerQrR}rS(hjNhjLubaubj)rT}rU(hX/var Program = xdc.useModule('xdc.cfg.Program');hjhjhjh}rV(jtjuX javascripthhh]h]h]jv}h]h]uhMhhh]rWhX/var Program = xdc.useModule('xdc.cfg.Program');rXrY}rZ(hUhjTubaubh)r[}r\(hUhjhjhjh}r](h]h]h]h]h]uhMhhh]r^j)r_}r`(hUjKhj[hjhhh}ra(h]h]h]h]h]uhKhhh]ubaubh)rb}rc(hX<Comment out the Memory sections configuration as shown belowrdhjhjhhh}re(h]h]h]h]h]uhMhhh]rfhX<Comment out the Memory sections configuration as shown belowrgrh}ri(hjdhjbubaubj)rj}rk(hX5/* ================ Memory sections configuration ================ */ //Program.sectMap[".text"] = "EXT_RAM"; //Program.sectMap[".const"] = "EXT_RAM"; //Program.sectMap[".plt"] = "EXT_RAM"; /* Program.sectMap["BOARD_IO_DELAY_DATA"] = "OCMC_RAM1"; */ /* Program.sectMap["BOARD_IO_DELAY_CODE"] = "OCMC_RAM1"; */hjhjhjh}rl(jtjuX javascripthhh]h]h]jv}h]h]uhMhhh]rmhX5/* ================ Memory sections configuration ================ */ //Program.sectMap[".text"] = "EXT_RAM"; //Program.sectMap[".const"] = "EXT_RAM"; //Program.sectMap[".plt"] = "EXT_RAM"; /* Program.sectMap["BOARD_IO_DELAY_DATA"] = "OCMC_RAM1"; */ /* Program.sectMap["BOARD_IO_DELAY_CODE"] = "OCMC_RAM1"; */rnro}rp(hUhjjubaubh)rq}rr(hUhjhjhjh}rs(h]h]h]h]h]uhMhhh]rtj)ru}rv(hUjKhjqhjhhh}rw(h]h]h]h]h]uhKhhh]ubaubh)rx}ry(hXGSince we are no longer using a shared folder, make the following changerzhjhjhhh}r{(h]h]h]h]h]uhMhhh]r|hXGSince we are no longer using a shared folder, make the following changer}r~}r(hjzhjxubaubj)r}r(hXh//var ipc_cfg = xdc.loadCapsule("../shared/ipc.cfg.xs"); var ipc_cfg = xdc.loadCapsule("../ipc.cfg.xs");hjhjhjh}r(jtjuX javascripthhh]h]h]jv}h]h]uhMhhh]rhXh//var ipc_cfg = xdc.loadCapsule("../shared/ipc.cfg.xs"); var ipc_cfg = xdc.loadCapsule("../ipc.cfg.xs");rr}r(hUhjubaubh)r}r(hUhjhjhjh}r(h]h]h]h]h]uhMhhh]rj)r}r(hUjKhjhjhhh}r(h]h]h]h]h]uhKhhh]ubaubh)r}r(hXMComment out the following. We'll be calling this function directly from main.rhjhjhhh}r(h]h]h]h]h]uhMhhh]rhXMComment out the following. We'll be calling this function directly from main.rr}r(hjhjubaubj)r}r(hX4//BIOS.addUserStartupFunction('&IpcMgr_ipcStartup');hjhjhjh}r(jtjuXchhh]h]h]jv}h]h]uhMhhh]rhX4//BIOS.addUserStartupFunction('&IpcMgr_ipcStartup');rr}r(hUhjubaubh)r}r(hUhjhjhjh}r(h]h]h]h]h]uhM"hhh]rj)r}r(hUjKhjhjhhh}r(h]h]h]h]h]uhKhhh]ubaubh)r}r(hXIncrease the system stack sizerhjhjhhh}r(h]h]h]h]h]uhM$hhh]rhXIncrease the system stack sizerr}r(hjhjubaubj)r}r(hX1//Program.stack = 0x1000; Program.stack = 0x8000;hjhjhjh}r(jtjuX javascripthhh]h]h]jv}h]h]uhM&hhh]rhX1//Program.stack = 0x1000; Program.stack = 0x8000;rr}r(hUhjubaubh)r}r(hUhjhjhjh}r(h]h]h]h]h]uhM+hhh]rj)r}r(hUjKhjhjhhh}r(h]h]h]h]h]uhKhhh]ubaubh)r}r(hX#Comment out the entire TICK sectionrhjhjhhh}r(h]h]h]h]h]uhM-hhh]rhX#Comment out the entire TICK sectionrr}r(hjhjubaubj)r}r(hX=/* --------------------------- TICK --------------------------------------*/ // var Clock = xdc.useModule('ti.sysbios.knl.Clock'); // Clock.tickSource = Clock.TickSource_NULL; // //Clock.tickSource = Clock.TickSource_USER; // /* Configure BIOS clock source as GPTimer5 */ // //Clock.timerId = 0; // // var Timer = xdc.useModule('ti.sysbios.timers.dmtimer.Timer'); // // /* Skip the Timer frequency verification check. Need to remove this later */ // Timer.checkFrequency = false; // // /* Match this to the SYS_CLK frequency sourcing the dmTimers. // * Not needed once the SYS/BIOS family settings is updated. */ // Timer.intFreq.hi = 0; // Timer.intFreq.lo = 19200000; // // //var timerParams = new Timer.Params(); // //timerParams.period = Clock.tickPeriod; // //timerParams.periodType = Timer.PeriodType_MICROSECS; // /* Switch off Software Reset to make the below settings effective */ // //timerParams.tiocpCfg.softreset = 0x0; // /* Smart-idle wake-up-capable mode */ // //timerParams.tiocpCfg.idlemode = 0x3; // /* Wake-up generation for Overflow */ // //timerParams.twer.ovf_wup_ena = 0x1; // //Timer.create(Clock.timerId, Clock.doTick, timerParams); // // var Idle = xdc.useModule('ti.sysbios.knl.Idle'); // var Deh = xdc.useModule('ti.deh.Deh'); // // /* Must be placed before pwr mgmt */ // Idle.addFunc('&ti_deh_Deh_idleBegin');hjhjhjh}r(jtjuX javascripthhh]h]h]jv}h]h]uhM/hhh]rhX=/* --------------------------- TICK --------------------------------------*/ // var Clock = xdc.useModule('ti.sysbios.knl.Clock'); // Clock.tickSource = Clock.TickSource_NULL; // //Clock.tickSource = Clock.TickSource_USER; // /* Configure BIOS clock source as GPTimer5 */ // //Clock.timerId = 0; // // var Timer = xdc.useModule('ti.sysbios.timers.dmtimer.Timer'); // // /* Skip the Timer frequency verification check. Need to remove this later */ // Timer.checkFrequency = false; // // /* Match this to the SYS_CLK frequency sourcing the dmTimers. // * Not needed once the SYS/BIOS family settings is updated. */ // Timer.intFreq.hi = 0; // Timer.intFreq.lo = 19200000; // // //var timerParams = new Timer.Params(); // //timerParams.period = Clock.tickPeriod; // //timerParams.periodType = Timer.PeriodType_MICROSECS; // /* Switch off Software Reset to make the below settings effective */ // //timerParams.tiocpCfg.softreset = 0x0; // /* Smart-idle wake-up-capable mode */ // //timerParams.tiocpCfg.idlemode = 0x3; // /* Wake-up generation for Overflow */ // //timerParams.twer.ovf_wup_ena = 0x1; // //Timer.create(Clock.timerId, Clock.doTick, timerParams); // // var Idle = xdc.useModule('ti.sysbios.knl.Idle'); // var Deh = xdc.useModule('ti.deh.Deh'); // // /* Must be placed before pwr mgmt */ // Idle.addFunc('&ti_deh_Deh_idleBegin');rr}r(hUhjubaubh)r}r(hUhjhjhjh}r(h]h]h]h]h]uhMThhh]rj)r}r(hUjKhjhjhhh}r(h]h]h]h]h]uhKhhh]ubaubh)r}r(hXSMake configuration change to use custom resource table. Add to the end of the file.rhjhjhhh}r(h]h]h]h]h]uhMVhhh]rhXSMake configuration change to use custom resource table. Add to the end of the file.rr}r(hjhjubaubj)r}r(hX/* Override the default resource table with my own */ var Resource = xdc.useModule('ti.ipc.remoteproc.Resource'); Resource.customTable = true;hjhjhjh}r(jtjuX javascripthhh]h]h]jv}h]h]uhMYhhh]rhX/* Override the default resource table with my own */ var Resource = xdc.useModule('ti.ipc.remoteproc.Resource'); Resource.customTable = true;rr}r(hUhjubaubh)r}r(hUhjhjhjh}r(h]h]h]h]h]uhM_hhh]rj)r}r(hUjKhjhjhhh}r(h]h]h]h]h]uhKhhh]ubaubj)r}r(hUhjhjhj!h}r(j#X-h]h]h]h]h]uhMahhh]rj@)r}r(hXEdit **main\_led\_blink.c** hjhjhjCh}r(h]h]h]h]h]uhNhhh]rh)r}r(hXEdit **main\_led\_blink.c**hjhjhhh}r(h]h]h]h]h]uhMah]r(hXEdit rr}r(hXEdit hjubj)r}r(hX**main\_led\_blink.c**h}r(h]h]h]h]h]uhjh]rhXmain_led_blink.crr}r(hUhjubahjubeubaubaubh)r}r(hUhjhjhjh}r(h]h]h]h]h]uhMchhh]rj)r}r(hUjKhjhjhhh}r(h]h]h]h]h]uhKhhh]ubaubh)r}r(hX'Add the following external declarationsrhjhjhhh}r(h]h]h]h]h]uhMehhh]rhX'Add the following external declarationsrr }r (hjhjubaubj)r }r (hX;extern Int ipc_main(); extern Void IpcMgr_ipcStartup(Void);hjhjhjh}r (jtjuXchhh]h]h]jv}h]h]uhMghhh]rhX;extern Int ipc_main(); extern Void IpcMgr_ipcStartup(Void);rr}r(hUhj ubaubh)r}r(hUhjhjhjh}r(h]h]h]h]h]uhMlhhh]rj)r}r(hUjKhjhjhhh}r(h]h]h]h]h]uhKhhh]ubaubh)r}r(hXWIn main(), add a call to ipc\_main() and IpcMgr\_ipcStartup() just before BIOS\_start()hjhjhhh}r(h]h]h]h]h]uhMnhhh]rhXTIn main(), add a call to ipc_main() and IpcMgr_ipcStartup() just before BIOS_start()rr}r(hXWIn main(), add a call to ipc\_main() and IpcMgr\_ipcStartup() just before BIOS\_start()hjubaubj)r }r!(hXiipc_main(); if (callIpcStartup) { IpcMgr_ipcStartup(); } /* Start BIOS */ BIOS_start(); return (0);hjhjhjh}r"(jtjuXchhh]h]h]jv}h]h]uhMqhhh]r#hXiipc_main(); if (callIpcStartup) { IpcMgr_ipcStartup(); } /* Start BIOS */ BIOS_start(); return (0);r$r%}r&(hUhj ubaubh)r'}r((hUhjhjhjh}r)(h]h]h]h]h]uhM}hhh]r*j)r+}r,(hUjKhj'hjhhh}r-(h]h]h]h]h]uhKhhh]ubaubh)r.}r/(hXComment out the line that calls Board\_init(boardCfg). This call is in the original example because it assumes TI-RTOS is running on the Arm but in our case here, we are running Linux and this call is destructive so we comment it out.hjhjhhh}r0(h]h]h]h]h]uhMhhh]r1hXComment out the line that calls Board_init(boardCfg). This call is in the original example because it assumes TI-RTOS is running on the Arm but in our case here, we are running Linux and this call is destructive so we comment it out.r2r3}r4(hXComment out the line that calls Board\_init(boardCfg). This call is in the original example because it assumes TI-RTOS is running on the Arm but in our case here, we are running Linux and this call is destructive so we comment it out.hj.ubaubj)r5}r6(hX#if defined(EVM_K2E) || defined(EVM_C6678) boardCfg = BOARD_INIT_MODULE_CLOCK | BOARD_INIT_UART_STDIO; #else boardCfg = BOARD_INIT_PINMUX_CONFIG | BOARD_INIT_MODULE_CLOCK | BOARD_INIT_UART_STDIO; #endif //Board_init(boardCfg);hjhjhjh}r7(jtjuXchhh]h]h]jv}h]h]uhMhhh]r8hX#if defined(EVM_K2E) || defined(EVM_C6678) boardCfg = BOARD_INIT_MODULE_CLOCK | BOARD_INIT_UART_STDIO; #else boardCfg = BOARD_INIT_PINMUX_CONFIG | BOARD_INIT_MODULE_CLOCK | BOARD_INIT_UART_STDIO; #endif //Board_init(boardCfg);r9r:}r;(hUhj5ubaubh)r<}r=(hUhjhjhjh}r>(h]h]h]h]h]uhMhhh]r?j)r@}rA(hUjKhj<hjhhh}rB(h]h]h]h]h]uhKhhh]ubaubj)rC}rD(hUhjhjhj!h}rE(j#X-h]h]h]h]h]uhMhhh]rFj@)rG}rH(hXEdit **MainDsp1.c** hjChjhjCh}rI(h]h]h]h]h]uhNhhh]rJh)rK}rL(hXEdit **MainDsp1.c**hjGhjhhh}rM(h]h]h]h]h]uhMh]rN(hXEdit rOrP}rQ(hXEdit hjKubj)rR}rS(hX**MainDsp1.c**h}rT(h]h]h]h]h]uhjKh]rUhX MainDsp1.crVrW}rX(hUhjRubahjubeubaubaubh)rY}rZ(hUhjhjhjh}r[(h]h]h]h]h]uhMhhh]r\j)r]}r^(hUjKhjYhjhhh}r_(h]h]h]h]h]uhKhhh]ubaubh)r`}ra(hXGThe app now has it's own main(), so rename this one and get rid of argsrbhjhjhhh}rc(h]h]h]h]h]uhMhhh]rdhXGThe app now has it's own main(), so rename this one and get rid of argsrerf}rg(hjbhj`ubaubj)rh}ri(hX3//Int main(Int argc, Char* argv[]) Int ipc_main() {hjhjhjh}rj(jtjuXchhh]h]h]jv}h]h]uhMhhh]rkhX3//Int main(Int argc, Char* argv[]) Int ipc_main() {rlrm}rn(hUhjhubaubh)ro}rp(hUhjhjhjh}rq(h]h]h]h]h]uhMhhh]rrj)rs}rt(hUjKhjohjhhh}ru(h]h]h]h]h]uhKhhh]ubaubh)rv}rw(hX+No longer using args so comment these linesrxhjhjhhh}ry(h]h]h]h]h]uhMhhh]rzhX+No longer using args so comment these linesr{r|}r}(hjxhjvubaubj)r~}r(hX?//taskParams.arg0 = (UArg)argc; //taskParams.arg1 = (UArg)argv;hjhjhjh}r(jtjuXchhh]h]h]jv}h]h]uhMhhh]rhX?//taskParams.arg0 = (UArg)argc; //taskParams.arg1 = (UArg)argv;rr}r(hUhj~ubaubh)r}r(hUhjhjhjh}r(h]h]h]h]h]uhMhhh]rj)r}r(hUjKhjhjhhh}r(h]h]h]h]h]uhKhhh]ubaubh)r}r(hX>BIOS\_start() is done in the app main() so comment it out hererhjhjhhh}r(h]h]h]h]h]uhMhhh]rhX=BIOS_start() is done in the app main() so comment it out hererr}r(hX>BIOS\_start() is done in the app main() so comment it out herehjubaubj)r}r(hX9/* start scheduler, this never returns */ //BIOS_start();hjhjhjh}r(jtjuXchhh]h]h]jv}h]h]uhMhhh]rhX9/* start scheduler, this never returns */ //BIOS_start();rr}r(hUhjubaubh)r}r(hUhjhjhjh}r(h]h]h]h]h]uhMhhh]rj)r}r(hUjKhjhjhhh}r(h]h]h]h]h]uhKhhh]ubaubh)r}r(hXComment this outrhjhjhhh}r(h]h]h]h]h]uhMhhh]rhXComment this outrr}r(hjhjubaubj)r}r(hX&//Log_print0(Diags_EXIT, "<-- main:");hjhjhjh}r(jtjuXchhh]h]h]jv}h]h]uhMhhh]rhX&//Log_print0(Diags_EXIT, "<-- main:");rr}r(hUhjubaubh)r}r(hUhjhjhjh}r(h]h]h]h]h]uhMhhh]rj)r}r(hUjKhjhjhhh}r(h]h]h]h]h]uhKhhh]ubaubj)r}r(hUhjhjhj!h}r(j#X-h]h]h]h]h]uhMhhh]rj@)r}r(hX!Edit **rsc\_table\_vayu\_dsp.c** hjhjhjCh}r(h]h]h]h]h]uhNhhh]rh)r}r(hX Edit **rsc\_table\_vayu\_dsp.c**hjhjhhh}r(h]h]h]h]h]uhMh]r(hXEdit rr}r(hXEdit hjubj)r}r(hX**rsc\_table\_vayu\_dsp.c**h}r(h]h]h]h]h]uhjh]rhXrsc_table_vayu_dsp.crr}r(hUhjubahjubeubaubaubh)r}r(hUhjhjhjh}r(h]h]h]h]h]uhMhhh]rj)r}r(hUjKhjhjhhh}r(h]h]h]h]h]uhKhhh]ubaubh)r}r(hXGSet this #define before it's used to select PHYS\_MEM\_IPC\_VRING valuerhjhjhhh}r(h]h]h]h]h]uhMhhh]rhXDSet this #define before it's used to select PHYS_MEM_IPC_VRING valuerr}r(hXGSet this #define before it's used to select PHYS\_MEM\_IPC\_VRING valuehjubaubj)r}r(hX#define VAYU_DSP_1hjhjhjh}r(jtjuXchhh]h]h]jv}h]h]uhMhhh]rhX#define VAYU_DSP_1rr}r(hUhjubaubh)r}r(hUhjhjhjh}r(h]h]h]h]h]uhMhhh]rj)r}r(hUjKhjhjhhh}r(h]h]h]h]h]uhKhhh]ubaubh)r}r(hX:Add this extern declaration prior to the symbol being usedrhjhjhhh}r(h]h]h]h]h]uhMhhh]rhX:Add this extern declaration prior to the symbol being usedrr}r(hjhjubaubj)r}r(hX5extern char ti_trace_SysMin_Module_State_0_outbuf__A;hjhjhjh}r(jtjuXchhh]h]h]jv}h]h]uhMhhh]rhX5extern char ti_trace_SysMin_Module_State_0_outbuf__A;rr}r(hUhjubaubh)r}r(hUhjhjhjh}r(h]h]h]h]h]uhMhhh]rj)r}r(hUjKhjhjhhh}r(h]h]h]h]h]uhKhhh]ubaubj)r}r(hUhjhjhj!h}r(j#X-h]h]h]h]h]uhMhhh]rj@)r}r(hXEdit **Server.c** hjhjhjCh}r(h]h]h]h]h]uhNhhh]rh)r }r (hXEdit **Server.c**hjhjhhh}r (h]h]h]h]h]uhMh]r (hXEdit r r}r(hXEdit hj ubj)r}r(hX **Server.c**h}r(h]h]h]h]h]uhj h]rhXServer.crr}r(hUhjubahjubeubaubaubh)r}r(hUhjhjhjh}r(h]h]h]h]h]uhMhhh]rj)r}r(hUjKhjhjhhh}r(h]h]h]h]h]uhKhhh]ubaubh)r}r(hX3No longer have shared folder so change include pathr hjhjhhh}r!(h]h]h]h]h]uhMhhh]r"hX3No longer have shared folder so change include pathr#r$}r%(hj hjubaubj)r&}r'(hXU/* local header files */ //#include "../shared/AppCommon.h" #include "../AppCommon.h"hjhjhjh}r((jtjuXchhh]h]h]jv}h]h]uhMhhh]r)hXU/* local header files */ //#include "../shared/AppCommon.h" #include "../AppCommon.h"r*r+}r,(hUhj&ubaubh)r-}r.(hUhjhjhjh}r/(h]h]h]h]h]uhMhhh]r0j)r1}r2(hUjKhj-hjhhh}r3(h]h]h]h]h]uhKhhh]ubaubh)r4}r5(hXDownload the Full CCS Projectr6hjhjhhh}r7(h]r8Udownload-the-full-ccs-projectr9ah]h]h]h]r:h7auhNhhh]r;hXDownload the Full CCS Projectr<r=}r>(hj6hj4ubaubh)r?}r@(hX:download:`GPIO\_LedBlink\_evmAM572x\_c66xExampleProject\_with\_ipc.zip <../files/GPIO_LedBlink_evmAM572x_c66xExampleProject_with_ipc.zip>`rAhjhjhhh}rB(h]h]h]h]h]uhMhhh]rCcsphinx.addnodes download_reference rD)rE}rF(hX:download:`GPIO\_LedBlink\_evmAM572x\_c66xExampleProject\_with\_ipc.zip <../files/GPIO_LedBlink_evmAM572x_c66xExampleProject_with_ipc.zip>`rGhj?hjhUdownload_referencerHh}rI(UreftypeXdownloadrJUrefwarnrKU reftargetrLX@../files/GPIO_LedBlink_evmAM572x_c66xExampleProject_with_ipc.zipU refdomainUh]h]U refexplicith]h]h]UrefdocrMX!linux/Foundational_Components_IPCrNUfilenamerOX7GPIO_LedBlink_evmAM572x_c66xExampleProject_with_ipc.ziprPuhMh]rQj )rR}rS(hjGh}rT(h]h]rU(UxrefrVjJeh]h]h]uhjEh]rWhX7GPIO_LedBlink_evmAM572x_c66xExampleProject_with_ipc.ziprXrY}rZ(hUhjRubahj ubaubaubh)r[}r\(hX8Adding IPC to an existing TI RTOS application on the IPUr]hjhjhhh}r^(h]r_U8adding-ipc-to-an-existing-ti-rtos-application-on-the-ipur`ah]h]h]h]rah.auhNhhh]rbhX8Adding IPC to an existing TI RTOS application on the IPUrcrd}re(hj]hj[ubaubh)rf}rg(hXLA common thing people want to do is take an existing IPU application that may be controlling serial or control interfaces and add IPC to it so that the firmware can be loaded from the ARM. This is common when migrating from a IPU only solution to a heterogeneous SoC with an MPUSS (ARM) and IPUSS. This is the focus of this section.rhhjhjhhh}ri(h]h]h]h]h]uhMhhh]rjhXLA common thing people want to do is take an existing IPU application that may be controlling serial or control interfaces and add IPC to it so that the firmware can be loaded from the ARM. This is common when migrating from a IPU only solution to a heterogeneous SoC with an MPUSS (ARM) and IPUSS. This is the focus of this section.rkrl}rm(hjhhjfubaubh)rn}ro(hX}In order to describe this process, we need an example TI RTOS test case to work with. For this purpose, we'll be using the UART\_BasicExample\_evmAM572x\_m4ExampleProject example that's part of the PDK (installed as part of the Processor SDK RTOS). This example uses TI RTOS and does serial IO using UART3 port on the AM572x GP EVM, it's labeled Serial Debug on the EVM silkscreen.hjhjhhh}rp(h]h]h]h]h]uhMhhh]rqhXzIn order to describe this process, we need an example TI RTOS test case to work with. For this purpose, we'll be using the UART_BasicExample_evmAM572x_m4ExampleProject example that's part of the PDK (installed as part of the Processor SDK RTOS). This example uses TI RTOS and does serial IO using UART3 port on the AM572x GP EVM, it's labeled Serial Debug on the EVM silkscreen.rrrs}rt(hX}In order to describe this process, we need an example TI RTOS test case to work with. For this purpose, we'll be using the UART\_BasicExample\_evmAM572x\_m4ExampleProject example that's part of the PDK (installed as part of the Processor SDK RTOS). This example uses TI RTOS and does serial IO using UART3 port on the AM572x GP EVM, it's labeled Serial Debug on the EVM silkscreen.hjnubaubh)ru}rv(hUhjhjhjh}rw(h]h]h]h]h]uhMhhh]rxj)ry}rz(hUjKhjuhjhhh}r{(h]h]h]h]h]uhKhhh]ubaubh)r|}r}(hXuThere were several steps taken to make this whole process work, each of which will be described in following sectionsr~hjhjhhh}r(h]h]h]h]h]uhMhhh]rhXuThere were several steps taken to make this whole process work, each of which will be described in following sectionsrr}r(hj~hj|ubaubj6)r}r(hUhjhjhj9h}r(j;U.h]h]h]j<Uh]h]j=j>uhMhhh]r(j@)r}r(hXXBuild and run the out-of-box UART M4 example on the EVM using Code Composer Studio (CCS)hjhjhjCh}r(h]h]h]h]h]uhNhhh]rh)r}r(hXXBuild and run the out-of-box UART M4 example on the EVM using Code Composer Studio (CCS)rhjhjhhh}r(h]h]h]h]h]uhMh]rhXXBuild and run the out-of-box UART M4 example on the EVM using Code Composer Studio (CCS)rr}r(hjhjubaubaubj@)r}r(hX#Build and run the ex02\_messageQ example from the IPC software bundle and turn it into a CCS project. Build it and modify the Linux startup code to use this new image. This is just a sanity check step to make sure we can build the IPC examples in CCS and have them run at boot up on the EVM.hjhjhjCh}r(h]h]h]h]h]uhNhhh]rh)r}r(hX#Build and run the ex02\_messageQ example from the IPC software bundle and turn it into a CCS project. Build it and modify the Linux startup code to use this new image. This is just a sanity check step to make sure we can build the IPC examples in CCS and have them run at boot up on the EVM.hjhjhhh}r(h]h]h]h]h]uhMh]rhX"Build and run the ex02_messageQ example from the IPC software bundle and turn it into a CCS project. Build it and modify the Linux startup code to use this new image. This is just a sanity check step to make sure we can build the IPC examples in CCS and have them run at boot up on the EVM.rr}r(hX#Build and run the ex02\_messageQ example from the IPC software bundle and turn it into a CCS project. Build it and modify the Linux startup code to use this new image. This is just a sanity check step to make sure we can build the IPC examples in CCS and have them run at boot up on the EVM.hjubaubaubj@)r}r(hXIn CCS, make a clone of the out-of-box UART M4 example and rename it to denote it's the IPC version of the example. Then using the ex02\_messageq example as a reference, add in the IPC pieces to the UART example code. Build from CCS then add it to the Linux firmware folder. hjhjhjCh}r(h]h]h]h]h]uhNhhh]rh)r}r(hXIn CCS, make a clone of the out-of-box UART M4 example and rename it to denote it's the IPC version of the example. Then using the ex02\_messageq example as a reference, add in the IPC pieces to the UART example code. Build from CCS then add it to the Linux firmware folder.hjhjhhh}r(h]h]h]h]h]uhMh]rhXIn CCS, make a clone of the out-of-box UART M4 example and rename it to denote it's the IPC version of the example. Then using the ex02_messageq example as a reference, add in the IPC pieces to the UART example code. Build from CCS then add it to the Linux firmware folder.rr}r(hXIn CCS, make a clone of the out-of-box UART M4 example and rename it to denote it's the IPC version of the example. Then using the ex02\_messageq example as a reference, add in the IPC pieces to the UART example code. Build from CCS then add it to the Linux firmware folder.hjubaubaubeubh)r}r(hX,Running UART Read/Write PDK Example from CCSrhjhjhhh}r(h]rU+running-uart-readwrite-pdk-example-from-ccsrah]h]h]h]rhauhNhhh]rhX,Running UART Read/Write PDK Example from CCSrr}r(hjhjubaubh)r}r(hXDevelopers are required to run pdkProjectCreate script to generate this example as described in the `Processor SDK RTOS article `__.hjhjhhh}r(h]h]h]h]h]uhMhhh]r(hXdDevelopers are required to run pdkProjectCreate script to generate this example as described in the rr}r(hXdDevelopers are required to run pdkProjectCreate script to generate this example as described in the hjubj))r}r(hX`Processor SDK RTOS article `__h}r(UnameXProcessor SDK RTOS articlej-Xkhttp://software-dl.ti.com/processor-sdk-rtos/esd/docs/latest/rtos/index_overview.html#rebuilding-componentsh]h]h]h]h]uhjh]rhXProcessor SDK RTOS articlerr}r(hUhjubahj2ubhX.r}r(hX.hjubeubh)r}r(hXDFor the UART M4 example run the script with the following arguments:rhjhjhhh}r(h]h]h]h]h]uhM hhh]rhXDFor the UART M4 example run the script with the following arguments:rr}r(hjhjubaubj)r}r(hX4pdkProjectCreate.bat AM572x evmAM572x little uart m4hjhjhjh}r(hhh]h]h]h]h]uhMhhh]rhX4pdkProjectCreate.bat AM572x evmAM572x little uart m4rr}r(hUhjubaubh)r}r(hUhjhjhjh}r(h]h]h]h]h]uhMhhh]rj)r}r(hUjKhjhjhhh}r(h]h]h]h]h]uhKhhh]ubaubh)r}r(hXAfter you run the script, you can find the UART M4 example project at \\pdk\_am57xx\_1\_0\_4\\packages\\MyExampleProjects\\UART\_BasicExample\_evmAM572x\_m4ExampleProject.hjhjhhh}r(h]h]h]h]h]uhMhhh]rhXAfter you run the script, you can find the UART M4 example project at \pdk_am57xx_1_0_4\packages\MyExampleProjects\UART_BasicExample_evmAM572x_m4ExampleProject.rr}r(hXAfter you run the script, you can find the UART M4 example project at \\pdk\_am57xx\_1\_0\_4\\packages\\MyExampleProjects\\UART\_BasicExample\_evmAM572x\_m4ExampleProject.hjubaubh)r}r(hXImport the project in CCS and build the example. You can now connect to the EVM using an emulator and CCS using the instructions provided in `AM572x GP EVM Hardware Setup `__hjhjhhh}r(h]h]h]h]h]uhMhhh]r(hXImport the project in CCS and build the example. You can now connect to the EVM using an emulator and CCS using the instructions provided in rr}r(hXImport the project in CCS and build the example. You can now connect to the EVM using an emulator and CCS using the instructions provided in hjubj))r}r(hXj`AM572x GP EVM Hardware Setup `__h}r(UnameXAM572x GP EVM Hardware Setupj-XGHow_to_Guides_Hardware_Setup_with_CCS.html#am572x-gp-evm-hardware-setuph]h]h]h]h]uhjh]rhXAM572x GP EVM Hardware Setuprr}r(hUhjubahj2ubeubh)r}r(hXConnect to the ARM core and make sure GEL runs multicore initialization and brings the IPUSS out of reset. Connect to IPU2 core0 and load and run the M4 UART example. When you run the code you should see the following log on the serial IO console:rhjhjhhh}r(h]h]h]h]h]uhMhhh]rhXConnect to the ARM core and make sure GEL runs multicore initialization and brings the IPUSS out of reset. Connect to IPU2 core0 and load and run the M4 UART example. When you run the code you should see the following log on the serial IO console:rr}r(hjhjubaubj)r}r(hXuart driver and utils example test cases : Enter 16 characters or press Esc 1234567890123456 <- user input Data received is 1234567890123456 <- loopback from user input uart driver and utils example test cases : Enter 16 characters or press Eschjhjhjh}r(hhh]h]h]h]h]uhMhhh]rhXuart driver and utils example test cases : Enter 16 characters or press Esc 1234567890123456 <- user input Data received is 1234567890123456 <- loopback from user input uart driver and utils example test cases : Enter 16 characters or press Escrr}r(hUhjubaubh)r}r(hUhjhjhjh}r(h]h]h]h]h]uhM*hhh]rj)r}r(hUjKhjhjhhh}r(h]h]h]h]h]uhKhhh]ubaubh)r}r(hX(Build and Run ex02\_messageq IPC examplehjhjhhh}r(h]r U'build-and-run-ex02-messageq-ipc-exampler ah]h]h]h]r h*auhNhhh]r hX'Build and Run ex02_messageq IPC exampler r}r(hX(Build and Run ex02\_messageq IPC examplehjubaubh)r}r(hX|Follow instructions described in Article `Run IPC Linux Examples `__hjhjhhh}r(h]h]h]h]h]uhM/hhh]r(hX)Follow instructions described in Article rr}r(hX)Follow instructions described in Article hjubj))r}r(hXS`Run IPC Linux Examples `__h}r(UnameXRun IPC Linux Examplesj-X6Foundational_Components_IPC.html#ipc-quick-start-guideh]h]h]h]h]uhjh]rhXRun IPC Linux Examplesrr}r(hUhjubahj2ubeubh)r}r(hXLUpdate Linux Kernel device tree to remove UART that will be controlled by M4r hjhjhhh}r!(h]r"ULupdate-linux-kernel-device-tree-to-remove-uart-that-will-be-controlled-by-m4r#ah]h]h]h]r$hjauhNhhh]r%hXLUpdate Linux Kernel device tree to remove UART that will be controlled by M4r&r'}r((hj hjubaubh)r)}r*(hXLinux kernel enables all SOC HW modules which are required for its configuration. Appropriate drivers configure required clocks and initialize HW registers. For all unused IPs clocks are not configured.r+hjhjhhh}r,(h]h]h]h]h]uhM6hhh]r-hXLinux kernel enables all SOC HW modules which are required for its configuration. Appropriate drivers configure required clocks and initialize HW registers. For all unused IPs clocks are not configured.r.r/}r0(hj+hj)ubaubh)r1}r2(hXrThe uart3 node is disabled in kernel using device tree. Also this restricts kernel to put those IPs to sleep mode.r3hjhjhhh}r4(h]h]h]h]h]uhM:hhh]r5hXrThe uart3 node is disabled in kernel using device tree. Also this restricts kernel to put those IPs to sleep mode.r6r7}r8(hj3hj1ubaubj)r9}r:(hX4&uart3 { status = "disabled"; ti,no-idle; };hjhjhjh}r;(hhh]h]h]h]h]uhMhhh]r<hX4&uart3 { status = "disabled"; ti,no-idle; };r=r>}r?(hUhj9ubaubh)r@}rA(hXAdd IPC to the UART ExamplerBhjhjhhh}rC(h]rDUadd-ipc-to-the-uart-examplerEah]h]h]h]rFhVauhNhhh]rGhXAdd IPC to the UART ExamplerHrI}rJ(hjBhj@ubaubh)rK}rL(hXThe first step is to clone our out-of-box UART example CCS project and rename it to denote it's using IPC. The easiest way to do this is using CCS. Here are the steps...rMhjhjhhh}rN(h]h]h]h]h]uhMGhhh]rOhXThe first step is to clone our out-of-box UART example CCS project and rename it to denote it's using IPC. The easiest way to do this is using CCS. Here are the steps...rPrQ}rR(hjMhjKubaubj)rS}rT(hUhjhjhj!h}rU(j#X-h]h]h]h]h]uhMKhhh]rV(j@)rW}rX(hXIn the **Edit** perspective, go into your **Project Explorer** window and right click on your UART\_BasicExample\_evmAM572x\_m4ExampleProject project and select **copy** from the pop-up menu. Maske sure the project is not is a closed state.hjShjhjCh}rY(h]h]h]h]h]uhNhhh]rZh)r[}r\(hXIn the **Edit** perspective, go into your **Project Explorer** window and right click on your UART\_BasicExample\_evmAM572x\_m4ExampleProject project and select **copy** from the pop-up menu. Maske sure the project is not is a closed state.hjWhjhhh}r](h]h]h]h]h]uhMKh]r^(hXIn the r_r`}ra(hXIn the hj[ubj)rb}rc(hX**Edit**h}rd(h]h]h]h]h]uhj[h]rehXEditrfrg}rh(hUhjbubahjubhX perspective, go into your rirj}rk(hX perspective, go into your hj[ubj)rl}rm(hX**Project Explorer**h}rn(h]h]h]h]h]uhj[h]rohXProject Explorerrprq}rr(hUhjlubahjubhX` window and right click on your UART_BasicExample_evmAM572x_m4ExampleProject project and select rsrt}ru(hXc window and right click on your UART\_BasicExample\_evmAM572x\_m4ExampleProject project and select hj[ubj)rv}rw(hX**copy**h}rx(h]h]h]h]h]uhj[h]ryhXcopyrzr{}r|(hUhjvubahjubhXG from the pop-up menu. Maske sure the project is not is a closed state.r}r~}r(hXG from the pop-up menu. Maske sure the project is not is a closed state.hj[ubeubaubj@)r}r(hXLRick click in and empty area of the project explorer window and select past.hjShjhjCh}r(h]h]h]h]h]uhNhhh]rh)r}r(hXLRick click in and empty area of the project explorer window and select past.rhjhjhhh}r(h]h]h]h]h]uhMOh]rhXLRick click in and empty area of the project explorer window and select past.rr}r(hjhjubaubaubj@)r}r(hXA dialog box pops up, modify the name to denote it's using IPC. A good name is UART\_BasicExample\_evmAM572x\_m4ExampleProject\_with\_ipc. hjShjhjCh}r(h]h]h]h]h]uhNhhh]rh)r}r(hXA dialog box pops up, modify the name to denote it's using IPC. A good name is UART\_BasicExample\_evmAM572x\_m4ExampleProject\_with\_ipc.hjhjhhh}r(h]h]h]h]h]uhMQh]rhXA dialog box pops up, modify the name to denote it's using IPC. A good name is UART_BasicExample_evmAM572x_m4ExampleProject_with_ipc.rr}r(hXA dialog box pops up, modify the name to denote it's using IPC. A good name is UART\_BasicExample\_evmAM572x\_m4ExampleProject\_with\_ipc.hjubaubaubeubh)r}r(hUhjhjhjh}r(h]h]h]h]h]uhMUhhh]rj)r}r(hUjKhjhjhhh}r(h]h]h]h]h]uhKhhh]ubaubh)r}r(hXThis is the project we'll be working with from here on. The next thing we want to do is select the proper RTSC platform and other components. To do this, follow these steps.rhjhjhhh}r(h]h]h]h]h]uhMWhhh]rhXThis is the project we'll be working with from here on. The next thing we want to do is select the proper RTSC platform and other components. To do this, follow these steps.rr}r(hjhjubaubj)r}r(hUhjhjhj!h}r(j#X-h]h]h]h]h]uhM[hhh]r(j@)r}r(hXoRight click on the UART\_BasicExample\_evmAM572x\_m4ExampleProject\_with\_ipc project and select **Properties**hjhjhjCh}r(h]h]h]h]h]uhNhhh]rh)r}r(hXoRight click on the UART\_BasicExample\_evmAM572x\_m4ExampleProject\_with\_ipc project and select **Properties**hjhjhhh}r(h]h]h]h]h]uhM[h]r(hX\Right click on the UART_BasicExample_evmAM572x_m4ExampleProject_with_ipc project and select rr}r(hXaRight click on the UART\_BasicExample\_evmAM572x\_m4ExampleProject\_with\_ipc project and select hjubj)r}r(hX**Properties**h}r(h]h]h]h]h]uhjh]rhX Propertiesrr}r(hUhjubahjubeubaubj@)r}r(hX0In the left hand pane, click on **CCS General**.rhjhjhjCh}r(h]h]h]h]h]uhNhhh]rh)r}r(hjhjhjhhh}r(h]h]h]h]h]uhM^h]r(hX In the left hand pane, click on rr}r(hX In the left hand pane, click on hjubj)r}r(hX**CCS General**h}r(h]h]h]h]h]uhjh]rhX CCS Generalrr}r(hUhjubahjubhX.r}r(hX.hjubeubaubj@)r}r(hX1On the right hand side, click on the **RTSC** tabrhjhjhjCh}r(h]h]h]h]h]uhNhhh]rh)r}r(hjhjhjhhh}r(h]h]h]h]h]uhM_h]r(hX%On the right hand side, click on the rr}r(hX%On the right hand side, click on the hjubj)r}r(hX**RTSC**h}r(h]h]h]h]h]uhjh]rhXRTSCrr}r(hUhjubahjubhX tabrr}r(hX tabhjubeubaubj@)r}r(hX0For **XDCtools version:** select 3.xx.x.xx\_corerhjhjhjCh}r(h]h]h]h]h]uhNhhh]rh)r}r(hjhjhjhhh}r(h]h]h]h]h]uhM`h]r(hXFor rr}r(hXFor hjubj)r}r(hX**XDCtools version:**h}r(h]h]h]h]h]uhjh]rhXXDCtools version:rr}r(hUhjubahjubhX select 3.xx.x.xx_corerr}r(hX select 3.xx.x.xx\_corehjubeubaubj@)r}r(hXIn the list of **Products and Repositories**, **check** the following... - IPC 3.xx.x.xx - SYS/BIOS 6.4x.x.xx - am57xx PDK x.x.x hjhNhjCh}r(h]h]h]h]h]uhNhhh]r(h)r}r(hXHIn the list of **Products and Repositories**, **check** the following...hjhjhhh}r(h]h]h]h]h]uhMah]r(hXIn the list of rr}r(hXIn the list of hjubj)r}r (hX**Products and Repositories**h}r (h]h]h]h]h]uhjh]r hXProducts and Repositoriesr r }r(hUhjubahjubhX, rr}r(hX, hjubj)r}r(hX **check**h}r(h]h]h]h]h]uhjh]rhXcheckrr}r(hUhjubahjubhX the following...rr}r(hX the following...hjubeubj)r}r(hUh}r(j#X-h]h]h]h]h]uhjh]r(j@)r }r!(hX IPC 3.xx.x.xxr"h}r#(h]h]h]h]h]uhjh]r$h)r%}r&(hj"hj hjhhh}r'(h]h]h]h]h]uhMch]r(hX IPC 3.xx.x.xxr)r*}r+(hj"hj%ubaubahjCubj@)r,}r-(hXSYS/BIOS 6.4x.x.xxr.h}r/(h]h]h]h]h]uhjh]r0h)r1}r2(hj.hj,hjhhh}r3(h]h]h]h]h]uhMdh]r4hXSYS/BIOS 6.4x.x.xxr5r6}r7(hj.hj1ubaubahjCubj@)r8}r9(hXam57xx PDK x.x.x h}r:(h]h]h]h]h]uhjh]r;h)r<}r=(hXam57xx PDK x.x.xr>hj8hjhhh}r?(h]h]h]h]h]uhMeh]r@hXam57xx PDK x.x.xrArB}rC(hj>hj<ubaubahjCubehj!ubeubj@)rD}rE(hX0For **Target**, select **ti.targets.arm.elf.M4**rFhjhjhjCh}rG(h]h]h]h]h]uhNhhh]rHh)rI}rJ(hjFhjDhjhhh}rK(h]h]h]h]h]uhMgh]rL(hXFor rMrN}rO(hXFor hjIubj)rP}rQ(hX **Target**h}rR(h]h]h]h]h]uhjIh]rShXTargetrTrU}rV(hUhjPubahjubhX , select rWrX}rY(hX , select hjIubj)rZ}r[(hX**ti.targets.arm.elf.M4**h}r\(h]h]h]h]h]uhjIh]r]hXti.targets.arm.elf.M4r^r_}r`(hUhjZubahjubeubaubj@)ra}rb(hX3For **Platform**, select **ti.platforms.evmDRA7XX**rchjhjhjCh}rd(h]h]h]h]h]uhNhhh]reh)rf}rg(hjchjahjhhh}rh(h]h]h]h]h]uhMhh]ri(hXFor rjrk}rl(hXFor hjfubj)rm}rn(hX **Platform**h}ro(h]h]h]h]h]uhjfh]rphXPlatformrqrr}rs(hUhjmubahjubhX , select rtru}rv(hX , select hjfubj)rw}rx(hX**ti.platforms.evmDRA7XX**h}ry(h]h]h]h]h]uhjfh]rzhXti.platforms.evmDRA7XXr{r|}r}(hUhjwubahjubeubaubj@)r~}r(hXOnce the platform is selected, edit its name buy hand and append :ipu2 to the end. After this it should be ti.platforms.evmDRA7XX:ipu2hjhjhjCh}r(h]h]h]h]h]uhNhhh]rh)r}r(hXOnce the platform is selected, edit its name buy hand and append :ipu2 to the end. After this it should be ti.platforms.evmDRA7XX:ipu2rhj~hjhhh}r(h]h]h]h]h]uhMih]rhXOnce the platform is selected, edit its name buy hand and append :ipu2 to the end. After this it should be ti.platforms.evmDRA7XX:ipu2rr}r(hjhjubaubaubj@)r}r(hX6Go ahead and leave the **Build-profile** set to debug.rhjhjhjCh}r(h]h]h]h]h]uhNhhh]rh)r}r(hjhjhjhhh}r(h]h]h]h]h]uhMlh]r(hXGo ahead and leave the rr}r(hXGo ahead and leave the hjubj)r}r(hX**Build-profile**h}r(h]h]h]h]h]uhjh]rhX Build-profilerr}r(hUhjubahjubhX set to debug.rr}r(hX set to debug.hjubeubaubj@)r}r(hXHit the OK button. hjhjhjCh}r(h]h]h]h]h]uhNhhh]rh)r}r(hXHit the OK button.rhjhjhhh}r(h]h]h]h]h]uhMmh]rhXHit the OK button.rr}r(hjhjubaubaubeubh)r}r(hUhjhjhjh}r(h]h]h]h]h]uhMohhh]rj)r}r(hUjKhjhjhhh}r(h]h]h]h]h]uhKhhh]ubaubh)r}r(hXhNow we want to copy configuration and source files from the ex02\_messageq IPC example into our project. The IPC example is located at **C:\\ti\\ipc\_3\_xx\_xx\_xx\\examples\\DRA7XX\_linux\_elf\\ex02\_messageq**. To copy files into your CCS project, you can simply select the files you want in Windows explorer then drag and drop them into your project in CCS.hjhjhhh}r(h]h]h]h]h]uhMqhhh]r(hXNow we want to copy configuration and source files from the ex02_messageq IPC example into our project. The IPC example is located at rr}r(hXNow we want to copy configuration and source files from the ex02\_messageq IPC example into our project. The IPC example is located at hjubj)r}r(hXL**C:\\ti\\ipc\_3\_xx\_xx\_xx\\examples\\DRA7XX\_linux\_elf\\ex02\_messageq**h}r(h]h]h]h]h]uhjh]rhX<C:\ti\ipc_3_xx_xx_xx\examples\DRA7XX_linux_elf\ex02_messageqrr}r(hUhjubahjubhX. To copy files into your CCS project, you can simply select the files you want in Windows explorer then drag and drop them into your project in CCS.rr}r(hX. To copy files into your CCS project, you can simply select the files you want in Windows explorer then drag and drop them into your project in CCS.hjubeubh)r}r(hX)Copy these files into your CCS project...rhjhjhhh}r(h]h]h]h]h]uhMyhhh]rhX)Copy these files into your CCS project...rr}r(hjhjubaubj)r}r(hUhjhjhj!h}r(j#X-h]h]h]h]h]uhM{hhh]r(j@)r}r(hX]C:\\ti\\ipc\_3\_xx\_xx\_xx\\examples\\DRA7XX\_linux\_elf\\ex02\_messageq\\shared\\AppCommon.hrhjhjhjCh}r(h]h]h]h]h]uhNhhh]rh)r}r(hjhjhjhhh}r(h]h]h]h]h]uhM{h]rhXOC:\ti\ipc_3_xx_xx_xx\examples\DRA7XX_linux_elf\ex02_messageq\shared\AppCommon.hrr}r(hX]C:\\ti\\ipc\_3\_xx\_xx\_xx\\examples\\DRA7XX\_linux\_elf\\ex02\_messageq\\shared\\AppCommon.hhjubaubaubj@)r}r(hX\C:\\ti\\ipc\_3\_xx\_xx\_xx\\examples\\DRA7XX\_linux\_elf\\ex02\_messageq\\shared\\config.bldrhjhjhjCh}r(h]h]h]h]h]uhNhhh]rh)r}r(hjhjhjhhh}r(h]h]h]h]h]uhM|h]rhXNC:\ti\ipc_3_xx_xx_xx\examples\DRA7XX_linux_elf\ex02_messageq\shared\config.bldrr}r(hX\C:\\ti\\ipc\_3\_xx\_xx\_xx\\examples\\DRA7XX\_linux\_elf\\ex02\_messageq\\shared\\config.bldhjubaubaubj@)r}r(hX]C:\\ti\\ipc\_3\_xx\_xx\_xx\\examples\\DRA7XX\_linux\_elf\\ex02\_messageq\\shared\\ipc.cfg.xs hjhjhjCh}r(h]h]h]h]h]uhNhhh]rh)r}r(hX\C:\\ti\\ipc\_3\_xx\_xx\_xx\\examples\\DRA7XX\_linux\_elf\\ex02\_messageq\\shared\\ipc.cfg.xshjhjhhh}r(h]h]h]h]h]uhM}h]rhXNC:\ti\ipc_3_xx_xx_xx\examples\DRA7XX_linux_elf\ex02_messageq\shared\ipc.cfg.xsrr}r(hX\C:\\ti\\ipc\_3\_xx\_xx\_xx\\examples\\DRA7XX\_linux\_elf\\ex02\_messageq\\shared\\ipc.cfg.xshjubaubaubeubh)r}r(hUhjhjhjh}r(h]h]h]h]h]uhMhhh]rj)r}r(hUjKhjhjhhh}r(h]h]h]h]h]uhKhhh]ubaubh)r}r(hX-Now copy these files into your CCS project...rhjhjhhh}r(h]h]h]h]h]uhMhhh]rhX-Now copy these files into your CCS project...rr }r (hjhjubaubj)r }r (hUhjhjhj!h}r (j#X-h]h]h]h]h]uhMhhh]r (j@)r }r (hXXC:\\ti\\ipc\_3\_xx\_xx\_xx\\examples\\DRA7XX\_linux\_elf\\ex02\_messageq\\ipu2\\Ipu2.cfgr hj hjhjCh}r (h]h]h]h]h]uhNhhh]r h)r }r (hj hj hjhhh}r (h]h]h]h]h]uhMh]r hXJC:\ti\ipc_3_xx_xx_xx\examples\DRA7XX_linux_elf\ex02_messageq\ipu2\Ipu2.cfgr r }r (hXXC:\\ti\\ipc\_3\_xx\_xx\_xx\\examples\\DRA7XX\_linux\_elf\\ex02\_messageq\\ipu2\\Ipu2.cfghj ubaubaubj@)r }r (hXZC:\\ti\\ipc\_3\_xx\_xx\_xx\\examples\\DRA7XX\_linux\_elf\\ex02\_messageq\\ipu2\\MainIpu2.cr hj hjhjCh}r (h]h]h]h]h]uhNhhh]r h)r }r (hj hj hjhhh}r (h]h]h]h]h]uhMh]r hXLC:\ti\ipc_3_xx_xx_xx\examples\DRA7XX_linux_elf\ex02_messageq\ipu2\MainIpu2.cr r }r (hXZC:\\ti\\ipc\_3\_xx\_xx\_xx\\examples\\DRA7XX\_linux\_elf\\ex02\_messageq\\ipu2\\MainIpu2.chj ubaubaubj@)r }r (hXXC:\\ti\\ipc\_3\_xx\_xx\_xx\\examples\\DRA7XX\_linux\_elf\\ex02\_messageq\\ipu2\\Server.cr hj hjhjCh}r! (h]h]h]h]h]uhNhhh]r" h)r# }r$ (hj hj hjhhh}r% (h]h]h]h]h]uhMh]r& hXJC:\ti\ipc_3_xx_xx_xx\examples\DRA7XX_linux_elf\ex02_messageq\ipu2\Server.cr' r( }r) (hXXC:\\ti\\ipc\_3\_xx\_xx\_xx\\examples\\DRA7XX\_linux\_elf\\ex02\_messageq\\ipu2\\Server.chj# ubaubaubj@)r* }r+ (hXYC:\\ti\\ipc\_3\_xx\_xx\_xx\\examples\\DRA7XX\_linux\_elf\\ex02\_messageq\\ipu2\\Server.h hj hjhjCh}r, (h]h]h]h]h]uhNhhh]r- h)r. }r/ (hXXC:\\ti\\ipc\_3\_xx\_xx\_xx\\examples\\DRA7XX\_linux\_elf\\ex02\_messageq\\ipu2\\Server.hhj* hjhhh}r0 (h]h]h]h]h]uhMh]r1 hXJC:\ti\ipc_3_xx_xx_xx\examples\DRA7XX_linux_elf\ex02_messageq\ipu2\Server.hr2 r3 }r4 (hXXC:\\ti\\ipc\_3\_xx\_xx\_xx\\examples\\DRA7XX\_linux\_elf\\ex02\_messageq\\ipu2\\Server.hhj. ubaubaubeubh)r5 }r6 (hUhjhjhjh}r7 (h]h]h]h]h]uhMhhh]r8 j)r9 }r: (hUjKhj5 hjhhh}r; (h]h]h]h]h]uhKhhh]ubaubj)r< }r= (hX9When you copy Ipu2.cfg into your CCS project, it should show up greyed out. If not, right click and exclude it from build. This is because the UART example already has a cfg file (uart\_m4\_evmAM572x.cfg). The Ipu2.cfg will be used for copying and pasting. When it's all done, you can delete it from your project.hjhjhjh}r> (h]h]h]h]h]uhNhhh]r? h)r@ }rA (hX9When you copy Ipu2.cfg into your CCS project, it should show up greyed out. If not, right click and exclude it from build. This is because the UART example already has a cfg file (uart\_m4\_evmAM572x.cfg). The Ipu2.cfg will be used for copying and pasting. When it's all done, you can delete it from your project.hj< hjhhh}rB (h]h]h]h]h]uhMh]rC hX7When you copy Ipu2.cfg into your CCS project, it should show up greyed out. If not, right click and exclude it from build. This is because the UART example already has a cfg file (uart_m4_evmAM572x.cfg). The Ipu2.cfg will be used for copying and pasting. When it's all done, you can delete it from your project.rD rE }rF (hX9When you copy Ipu2.cfg into your CCS project, it should show up greyed out. If not, right click and exclude it from build. This is because the UART example already has a cfg file (uart\_m4\_evmAM572x.cfg). The Ipu2.cfg will be used for copying and pasting. When it's all done, you can delete it from your project.hj@ ubaubaubh)rG }rH (hXiFinally, you will likely want to use a custom resource table so copy these files into your CCS project...rI hjhjhhh}rJ (h]h]h]h]h]uhMhhh]rK hXiFinally, you will likely want to use a custom resource table so copy these files into your CCS project...rL rM }rN (hjI hjG ubaubj)rO }rP (hUhjhjhj!h}rQ (j#X-h]h]h]h]h]uhMhhh]rR (j@)rS }rT (hXRC:\\ti\\ipc\_3\_xx\_xx\_xx\\packages\\ti\\ipc\\remoteproc\\rsc\_table\_vayu\_ipu.hrU hjO hjhjCh}rV (h]h]h]h]h]uhNhhh]rW h)rX }rY (hjU hjS hjhhh}rZ (h]h]h]h]h]uhMh]r[ hXDC:\ti\ipc_3_xx_xx_xx\packages\ti\ipc\remoteproc\rsc_table_vayu_ipu.hr\ r] }r^ (hXRC:\\ti\\ipc\_3\_xx\_xx\_xx\\packages\\ti\\ipc\\remoteproc\\rsc\_table\_vayu\_ipu.hhjX ubaubaubj@)r_ }r` (hXHC:\\ti\\ipc\_3\_xx\_xx\_xx\\packages\\ti\\ipc\\remoteproc\\rsc\_types.h hjO hjhjCh}ra (h]h]h]h]h]uhNhhh]rb h)rc }rd (hXGC:\\ti\\ipc\_3\_xx\_xx\_xx\\packages\\ti\\ipc\\remoteproc\\rsc\_types.hhj_ hjhhh}re (h]h]h]h]h]uhMh]rf hX;C:\ti\ipc_3_xx_xx_xx\packages\ti\ipc\remoteproc\rsc_types.hrg rh }ri (hXGC:\\ti\\ipc\_3\_xx\_xx\_xx\\packages\\ti\\ipc\\remoteproc\\rsc\_types.hhjc ubaubaubeubh)rj }rk (hXeThe rsc\_table\_vayu\_dsp.h file defines an initialized structure so let's make a **.c** source file.hjhjhhh}rl (h]h]h]h]h]uhMhhh]rm (hXOThe rsc_table_vayu_dsp.h file defines an initialized structure so let's make a rn ro }rp (hXRThe rsc\_table\_vayu\_dsp.h file defines an initialized structure so let's make a hjj ubj)rq }rr (hX**.c**h}rs (h]h]h]h]h]uhjj h]rt hX.cru rv }rw (hUhjq ubahjubhX source file.rx ry }rz (hX source file.hjj ubeubj)r{ }r| (hUhjhjhj!h}r} (j#X-h]h]h]h]h]uhMhhh]r~ j@)r }r (hXOIn your CCS project, rename rsc\_table\_vayu\_ipu.h to rsc\_table\_vayu\_ipu.c hj{ hjhjCh}r (h]h]h]h]h]uhNhhh]r h)r }r (hXNIn your CCS project, rename rsc\_table\_vayu\_ipu.h to rsc\_table\_vayu\_ipu.chj hjhhh}r (h]h]h]h]h]uhMh]r hXHIn your CCS project, rename rsc_table_vayu_ipu.h to rsc_table_vayu_ipu.cr r }r (hXNIn your CCS project, rename rsc\_table\_vayu\_ipu.h to rsc\_table\_vayu\_ipu.chj ubaubaubaubh)r }r (hUhjhjhjh}r (h]h]h]h]h]uhMhhh]r j)r }r (hUjKhj hjhhh}r (h]h]h]h]h]uhKhhh]ubaubh)r }r (hXNow we want to **merge** the IPC example configuration file with the LED blink example configuration file. Follow these steps...hjhjhhh}r (h]h]h]h]h]uhMhhh]r (hXNow we want to r r }r (hXNow we want to hj ubj)r }r (hX **merge**h}r (h]h]h]h]h]uhj h]r hXmerger r }r (hUhj ubahjubhXh the IPC example configuration file with the LED blink example configuration file. Follow these steps...r r }r (hXh the IPC example configuration file with the LED blink example configuration file. Follow these steps...hj ubeubj)r }r (hUhjhjhj!h}r (j#X-h]h]h]h]h]uhMhhh]r (j@)r }r (hXOpen up **Ipu2.cfg** using a text editor (don't open it using the GUI). Right click on it and select **Open With -> XDCscript Editor**hj hjhjCh}r (h]h]h]h]h]uhNhhh]r h)r }r (hXOpen up **Ipu2.cfg** using a text editor (don't open it using the GUI). Right click on it and select **Open With -> XDCscript Editor**hj hjhhh}r (h]h]h]h]h]uhMh]r (hXOpen up r r }r (hXOpen up hj ubj)r }r (hX **Ipu2.cfg**h}r (h]h]h]h]h]uhj h]r hXIpu2.cfgr r }r (hUhj ubahjubhXQ using a text editor (don't open it using the GUI). Right click on it and select r r }r (hXQ using a text editor (don't open it using the GUI). Right click on it and select hj ubj)r }r (hX!**Open With -> XDCscript Editor**h}r (h]h]h]h]h]uhj h]r hXOpen With -> XDCscript Editorr r }r (hUhj ubahjubeubaubj@)r }r (hXLWe want to copy the entire contents into the clipboard. Select all and copy.hj hjhjCh}r (h]h]h]h]h]uhNhhh]r h)r }r (hXLWe want to copy the entire contents into the clipboard. Select all and copy.r hj hjhhh}r (h]h]h]h]h]uhMh]r hXLWe want to copy the entire contents into the clipboard. Select all and copy.r r }r (hj hj ubaubaubj@)r }r (hXNow just like above, open the uart\_m4\_evmAM572x.cfg config file in the text editor. Go to the very bottom and **paste** in the contents from the Ipu2.cfg file. Basically we've appended the contents of Ipu2.cfg into uart\_m4\_evmAM572x.cfg. hj hjhjCh}r (h]h]h]h]h]uhNhhh]r h)r }r (hXNow just like above, open the uart\_m4\_evmAM572x.cfg config file in the text editor. Go to the very bottom and **paste** in the contents from the Ipu2.cfg file. Basically we've appended the contents of Ipu2.cfg into uart\_m4\_evmAM572x.cfg.hj hjhhh}r (h]h]h]h]h]uhMh]r (hXnNow just like above, open the uart_m4_evmAM572x.cfg config file in the text editor. Go to the very bottom and r r }r (hXpNow just like above, open the uart\_m4\_evmAM572x.cfg config file in the text editor. Go to the very bottom and hj ubj)r }r (hX **paste**h}r (h]h]h]h]h]uhj h]r hXpaster r }r (hUhj ubahjubhXv in the contents from the Ipu2.cfg file. Basically we've appended the contents of Ipu2.cfg into uart_m4_evmAM572x.cfg.r r }r (hXx in the contents from the Ipu2.cfg file. Basically we've appended the contents of Ipu2.cfg into uart\_m4\_evmAM572x.cfg.hj ubeubaubeubh)r }r (hUhjhjhjh}r (h]h]h]h]h]uhMhhh]r j)r }r (hUjKhj hjhhh}r (h]h]h]h]h]uhKhhh]ubaubh)r }r (hXWe've now added in all the necessary configuration and source files into our project. Don't expect it to build at this point, we have to make edits first. These edits are listed below.r hjhjhhh}r (h]h]h]h]h]uhMhhh]r hXWe've now added in all the necessary configuration and source files into our project. Don't expect it to build at this point, we have to make edits first. These edits are listed below.r r }r (hj hj ubaubj)r }r (hX~NOTE, you can download the full CCS project with source files to use as a reference. See link towards the end of this section.hjhjhjh}r (hhh]h]h]h]h]uhMuhhh]r hX~NOTE, you can download the full CCS project with source files to use as a reference. See link towards the end of this section.r r }r (hUhj ubaubj)r }r (hUhjhjhj!h}r (j#X-h]h]h]h]h]uhMhhh]r j@)r }r (hX!Edit **uart\_m4\_evmAM572x.cfg** hj hjhjCh}r (h]h]h]h]h]uhNhhh]r!h)r!}r!(hX Edit **uart\_m4\_evmAM572x.cfg**hj hjhhh}r!(h]h]h]h]h]uhMh]r!(hXEdit r!r!}r!(hXEdit hj!ubj)r!}r !(hX**uart\_m4\_evmAM572x.cfg**h}r !(h]h]h]h]h]uhj!h]r !hXuart_m4_evmAM572x.cfgr !r !}r!(hUhj!ubahjubeubaubaubh)r!}r!(hUhjhjhjh}r!(h]h]h]h]h]uhMhhh]r!j)r!}r!(hUjKhj!hjhhh}r!(h]h]h]h]h]uhKhhh]ubaubh)r!}r!(hXIAdd the following to the beginning(at the top) of your configuration filer!hjhjhhh}r!(h]h]h]h]h]uhMhhh]r!hXIAdd the following to the beginning(at the top) of your configuration filer!r!}r!(hj!hj!ubaubj)r!}r!(hX/var Program = xdc.useModule('xdc.cfg.Program');hjhjhjh}r !(jtjuX javascripthhh]h]h]jv}h]h]uhMhhh]r!!hX/var Program = xdc.useModule('xdc.cfg.Program');r"!r#!}r$!(hUhj!ubaubh)r%!}r&!(hXGSince we are no longer using a shared folder, make the following changer'!hjhjhhh}r(!(h]h]h]h]h]uhMhhh]r)!hXGSince we are no longer using a shared folder, make the following changer*!r+!}r,!(hj'!hj%!ubaubj)r-!}r.!(hXh//var ipc_cfg = xdc.loadCapsule("../shared/ipc.cfg.xs"); var ipc_cfg = xdc.loadCapsule("../ipc.cfg.xs");hjhjhjh}r/!(jtjuX javascripthhh]h]h]jv}h]h]uhMhhh]r0!hXh//var ipc_cfg = xdc.loadCapsule("../shared/ipc.cfg.xs"); var ipc_cfg = xdc.loadCapsule("../ipc.cfg.xs");r1!r2!}r3!(hUhj-!ubaubh)r4!}r5!(hUhjhjhjh}r6!(h]h]h]h]h]uhMhhh]r7!j)r8!}r9!(hUjKhj4!hjhhh}r:!(h]h]h]h]h]uhKhhh]ubaubh)r;!}r!(h]h]h]h]h]uhMhhh]r?!hXMComment out the following. We'll be calling this function directly from main.r@!rA!}rB!(hj=!hj;!ubaubj)rC!}rD!(hX4//BIOS.addUserStartupFunction('&IpcMgr_ipcStartup');hjhjhjh}rE!(jtjuX javascripthhh]h]h]jv}h]h]uhMhhh]rF!hX4//BIOS.addUserStartupFunction('&IpcMgr_ipcStartup');rG!rH!}rI!(hUhjC!ubaubh)rJ!}rK!(hUhjhjhjh}rL!(h]h]h]h]h]uhMhhh]rM!j)rN!}rO!(hUjKhjJ!hjhhh}rP!(h]h]h]h]h]uhKhhh]ubaubh)rQ!}rR!(hXIncrease the system stack sizerS!hjhjhhh}rT!(h]h]h]h]h]uhMhhh]rU!hXIncrease the system stack sizerV!rW!}rX!(hjS!hjQ!ubaubj)rY!}rZ!(hX1//Program.stack = 0x1000; Program.stack = 0x8000;hjhjhjh}r[!(jtjuX javascripthhh]h]h]jv}h]h]uhMhhh]r\!hX1//Program.stack = 0x1000; Program.stack = 0x8000;r]!r^!}r_!(hUhjY!ubaubh)r`!}ra!(hUhjhjhjh}rb!(h]h]h]h]h]uhMhhh]rc!j)rd!}re!(hUjKhj`!hjhhh}rf!(h]h]h]h]h]uhKhhh]ubaubh)rg!}rh!(hX#Comment out the entire TICK sectionri!hjhjhhh}rj!(h]h]h]h]h]uhMhhh]rk!hX#Comment out the entire TICK sectionrl!rm!}rn!(hji!hjg!ubaubj)ro!}rp!(hX=/* --------------------------- TICK --------------------------------------*/ // var Clock = xdc.useModule('ti.sysbios.knl.Clock'); // Clock.tickSource = Clock.TickSource_NULL; // //Clock.tickSource = Clock.TickSource_USER; // /* Configure BIOS clock source as GPTimer5 */ // //Clock.timerId = 0; // // var Timer = xdc.useModule('ti.sysbios.timers.dmtimer.Timer'); // // /* Skip the Timer frequency verification check. Need to remove this later */ // Timer.checkFrequency = false; // // /* Match this to the SYS_CLK frequency sourcing the dmTimers. // * Not needed once the SYS/BIOS family settings is updated. */ // Timer.intFreq.hi = 0; // Timer.intFreq.lo = 19200000; // // //var timerParams = new Timer.Params(); // //timerParams.period = Clock.tickPeriod; // //timerParams.periodType = Timer.PeriodType_MICROSECS; // /* Switch off Software Reset to make the below settings effective */ // //timerParams.tiocpCfg.softreset = 0x0; // /* Smart-idle wake-up-capable mode */ // //timerParams.tiocpCfg.idlemode = 0x3; // /* Wake-up generation for Overflow */ // //timerParams.twer.ovf_wup_ena = 0x1; // //Timer.create(Clock.timerId, Clock.doTick, timerParams); // // var Idle = xdc.useModule('ti.sysbios.knl.Idle'); // var Deh = xdc.useModule('ti.deh.Deh'); // // /* Must be placed before pwr mgmt */ // Idle.addFunc('&ti_deh_Deh_idleBegin');hjhjhjh}rq!(jtjuX javascripthhh]h]h]jv}h]h]uhMhhh]rr!hX=/* --------------------------- TICK --------------------------------------*/ // var Clock = xdc.useModule('ti.sysbios.knl.Clock'); // Clock.tickSource = Clock.TickSource_NULL; // //Clock.tickSource = Clock.TickSource_USER; // /* Configure BIOS clock source as GPTimer5 */ // //Clock.timerId = 0; // // var Timer = xdc.useModule('ti.sysbios.timers.dmtimer.Timer'); // // /* Skip the Timer frequency verification check. Need to remove this later */ // Timer.checkFrequency = false; // // /* Match this to the SYS_CLK frequency sourcing the dmTimers. // * Not needed once the SYS/BIOS family settings is updated. */ // Timer.intFreq.hi = 0; // Timer.intFreq.lo = 19200000; // // //var timerParams = new Timer.Params(); // //timerParams.period = Clock.tickPeriod; // //timerParams.periodType = Timer.PeriodType_MICROSECS; // /* Switch off Software Reset to make the below settings effective */ // //timerParams.tiocpCfg.softreset = 0x0; // /* Smart-idle wake-up-capable mode */ // //timerParams.tiocpCfg.idlemode = 0x3; // /* Wake-up generation for Overflow */ // //timerParams.twer.ovf_wup_ena = 0x1; // //Timer.create(Clock.timerId, Clock.doTick, timerParams); // // var Idle = xdc.useModule('ti.sysbios.knl.Idle'); // var Deh = xdc.useModule('ti.deh.Deh'); // // /* Must be placed before pwr mgmt */ // Idle.addFunc('&ti_deh_Deh_idleBegin');rs!rt!}ru!(hUhjo!ubaubh)rv!}rw!(hUhjhjhjh}rx!(h]h]h]h]h]uhMhhh]ry!j)rz!}r{!(hUjKhjv!hjhhh}r|!(h]h]h]h]h]uhKhhh]ubaubh)r}!}r~!(hXSMake configuration change to use custom resource table. Add to the end of the file.r!hjhjhhh}r!(h]h]h]h]h]uhMhhh]r!hXSMake configuration change to use custom resource table. Add to the end of the file.r!r!}r!(hj!hj}!ubaubj)r!}r!(hX/* Override the default resource table with my own */ var Resource = xdc.useModule('ti.ipc.remoteproc.Resource'); Resource.customTable = true;hjhjhjh}r!(jtjuX javascripthhh]h]h]jv}h]h]uhMhhh]r!hX/* Override the default resource table with my own */ var Resource = xdc.useModule('ti.ipc.remoteproc.Resource'); Resource.customTable = true;r!r!}r!(hUhj!ubaubj)r!}r!(hUhjhjhj!h}r!(j#X-h]h]h]h]h]uhM hhh]r!j@)r!}r!(hXEdit **main\_uart\_example.c** hj!hjhjCh}r!(h]h]h]h]h]uhNhhh]r!h)r!}r!(hXEdit **main\_uart\_example.c**hj!hjhhh}r!(h]h]h]h]h]uhM h]r!(hXEdit r!r!}r!(hXEdit hj!ubj)r!}r!(hX**main\_uart\_example.c**h}r!(h]h]h]h]h]uhj!h]r!hXmain_uart_example.cr!r!}r!(hUhj!ubahjubeubaubaubh)r!}r!(hUhjhjhjh}r!(h]h]h]h]h]uhMhhh]r!j)r!}r!(hUjKhj!hjhhh}r!(h]h]h]h]h]uhKhhh]ubaubh)r!}r!(hX'Add the following external declarationsr!hjhjhhh}r!(h]h]h]h]h]uhMhhh]r!hX'Add the following external declarationsr!r!}r!(hj!hj!ubaubj)r!}r!(hX;extern Int ipc_main(); extern Void IpcMgr_ipcStartup(Void);hjhjhjh}r!(jtjuXchhh]h]h]jv}h]h]uhMhhh]r!hX;extern Int ipc_main(); extern Void IpcMgr_ipcStartup(Void);r!r!}r!(hUhj!ubaubh)r!}r!(hUhjhjhjh}r!(h]h]h]h]h]uhMhhh]r!j)r!}r!(hUjKhj!hjhhh}r!(h]h]h]h]h]uhKhhh]ubaubh)r!}r!(hXWIn main(), add a call to ipc\_main() and IpcMgr\_ipcStartup() just before BIOS\_start()hjhjhhh}r!(h]h]h]h]h]uhMhhh]r!hXTIn main(), add a call to ipc_main() and IpcMgr_ipcStartup() just before BIOS_start()r!r!}r!(hXWIn main(), add a call to ipc\_main() and IpcMgr\_ipcStartup() just before BIOS\_start()hj!ubaubj)r!}r!(hXjipc_main(); if (callIpcStartup) { IpcMgr_ipcStartup(); } /* Start BIOS */ BIOS_start(); return (0);hjhjhjh}r!(jtjuXchhh]h]h]jv}h]h]uhMhhh]r!hXjipc_main(); if (callIpcStartup) { IpcMgr_ipcStartup(); } /* Start BIOS */ BIOS_start(); return (0);r!r!}r!(hUhj!ubaubh)r!}r!(hUhjhjhjh}r!(h]h]h]h]h]uhM'hhh]r!j)r!}r!(hUjKhj!hjhhh}r!(h]h]h]h]h]uhKhhh]ubaubh)r!}r!(hXNComment out the line that calls Board\_init(boardCfg). This call is in the original example because it assumes TI-RTOS is running on the Arm but in our case here, we are running Linux and this call is destructive so we comment it out. The board init call does all pinmux configuration, module clock and UART peripheral initialization.hjhjhhh}r!(h]h]h]h]h]uhM)hhh]r!hXMComment out the line that calls Board_init(boardCfg). This call is in the original example because it assumes TI-RTOS is running on the Arm but in our case here, we are running Linux and this call is destructive so we comment it out. The board init call does all pinmux configuration, module clock and UART peripheral initialization.r!r!}r!(hXNComment out the line that calls Board\_init(boardCfg). This call is in the original example because it assumes TI-RTOS is running on the Arm but in our case here, we are running Linux and this call is destructive so we comment it out. The board init call does all pinmux configuration, module clock and UART peripheral initialization.hj!ubaubh)r!}r!(hX=In order to run the UART Example on M4, you need to disable the UART in the Linux DTB file and interact with the Linux kernel using Telnet (This will be described later in the article). Since Linux will be running uboot performs the pinmux configuration but clock and UART Stdio setup needs to be performed by the M4.r!hjhjhhh}r!(h]h]h]h]h]uhM/hhh]r!hX=In order to run the UART Example on M4, you need to disable the UART in the Linux DTB file and interact with the Linux kernel using Telnet (This will be described later in the article). Since Linux will be running uboot performs the pinmux configuration but clock and UART Stdio setup needs to be performed by the M4.r!r!}r!(hj!hj!ubaubh)r!}r!(hX**Original code**r!hjhjhhh}r!(h]h]h]h]h]uhM5hhh]r!j)r!}r!(hj!h}r!(h]h]h]h]h]uhj!h]r!hX Original coder!r!}r!(hUhj!ubahjubaubj)r!}r!(hX#if defined(EVM_K2E) || defined(EVM_C6678) boardCfg = BOARD_INIT_MODULE_CLOCK | BOARD_INIT_UART_STDIO; #else boardCfg = BOARD_INIT_PINMUX_CONFIG | BOARD_INIT_MODULE_CLOCK | BOARD_INIT_UART_STDIO; #endif Board_init(boardCfg);hjhjhjh}r!(jtjuXchhh]h]h]jv}h]h]uhM7hhh]r!hX#if defined(EVM_K2E) || defined(EVM_C6678) boardCfg = BOARD_INIT_MODULE_CLOCK | BOARD_INIT_UART_STDIO; #else boardCfg = BOARD_INIT_PINMUX_CONFIG | BOARD_INIT_MODULE_CLOCK | BOARD_INIT_UART_STDIO; #endif Board_init(boardCfg);r!r!}r!(hUhj!ubaubh)r!}r!(hUhjhjhjh}r!(h]h]h]h]h]uhM@hhh]r!j)r!}r!(hUjKhj!hjhhh}r!(h]h]h]h]h]uhKhhh]ubaubh)r!}r!(hX**Modified Code :**r!hjhjhhh}r"(h]h]h]h]h]uhMBhhh]r"j)r"}r"(hj!h}r"(h]h]h]h]h]uhj!h]r"hXModified Code :r"r"}r"(hUhj"ubahjubaubj)r "}r "(hX8boardCfg = BOARD_INIT_UART_STDIO; Board\_init(boardCfg);hjhjhjh}r "(hhh]h]h]h]h]uhM hhh]r "hX8boardCfg = BOARD_INIT_UART_STDIO; Board\_init(boardCfg);r "r"}r"(hUhj "ubaubh)r"}r"(hXWe are not done yet as we still need to configure turn the clock control on for the UART without impacting the other clocks. We can do that by adding the following code before Board\_init API call:hjhjhhh}r"(h]h]h]h]h]uhMIhhh]r"hXWe are not done yet as we still need to configure turn the clock control on for the UART without impacting the other clocks. We can do that by adding the following code before Board_init API call:r"r"}r"(hXWe are not done yet as we still need to configure turn the clock control on for the UART without impacting the other clocks. We can do that by adding the following code before Board\_init API call:hj"ubaubj)r"}r"(hXCSL_l4per_cm_core_componentRegs *l4PerCmReg = (CSL_l4per_cm_core_componentRegs *)CSL_MPU_L4PER_CM_CORE_REGS; CSL_FINST(l4PerCmReg->CM_L4PER_UART3_CLKCTRL_REG, L4PER_CM_CORE_COMPONENT_CM_L4PER_UART3_CLKCTRL_REG_MODULEMODE, ENABLE); while(CSL_L4PER_CM_CORE_COMPONENT_CM_L4PER_UART3_CLKCTRL_REG_IDLEST_FUNC != CSL_FEXT(l4PerCmReg->CM_L4PER_UART3_CLKCTRL_REG, L4PER_CM_CORE_COMPONENT_CM_L4PER_UART3_CLKCTRL_REG_IDLEST));hjhjhjh}r"(hhh]h]h]h]h]uhM hhh]r"hXCSL_l4per_cm_core_componentRegs *l4PerCmReg = (CSL_l4per_cm_core_componentRegs *)CSL_MPU_L4PER_CM_CORE_REGS; CSL_FINST(l4PerCmReg->CM_L4PER_UART3_CLKCTRL_REG, L4PER_CM_CORE_COMPONENT_CM_L4PER_UART3_CLKCTRL_REG_MODULEMODE, ENABLE); while(CSL_L4PER_CM_CORE_COMPONENT_CM_L4PER_UART3_CLKCTRL_REG_IDLEST_FUNC != CSL_FEXT(l4PerCmReg->CM_L4PER_UART3_CLKCTRL_REG, L4PER_CM_CORE_COMPONENT_CM_L4PER_UART3_CLKCTRL_REG_IDLEST));r"r"}r"(hUhj"ubaubj)r"}r"(hUhjhjhj!h}r "(j#X-h]h]h]h]h]uhMWhhh]r!"j@)r""}r#"(hXEdit **MainIpu2.c** hj"hjhjCh}r$"(h]h]h]h]h]uhNhhh]r%"h)r&"}r'"(hXEdit **MainIpu2.c**hj""hjhhh}r("(h]h]h]h]h]uhMWh]r)"(hXEdit r*"r+"}r,"(hXEdit hj&"ubj)r-"}r."(hX**MainIpu2.c**h}r/"(h]h]h]h]h]uhj&"h]r0"hX MainIpu2.cr1"r2"}r3"(hUhj-"ubahjubeubaubaubh)r4"}r5"(hUhjhjhjh}r6"(h]h]h]h]h]uhMYhhh]r7"j)r8"}r9"(hUjKhj4"hjhhh}r:"(h]h]h]h]h]uhKhhh]ubaubh)r;"}r<"(hXGThe app now has it's own main(), so rename this one and get rid of argsr="hjhjhhh}r>"(h]h]h]h]h]uhM[hhh]r?"hXGThe app now has it's own main(), so rename this one and get rid of argsr@"rA"}rB"(hj="hj;"ubaubj)rC"}rD"(hX3//Int main(Int argc, Char* argv[]) Int ipc_main() {hjhjhjh}rE"(jtjuXchhh]h]h]jv}h]h]uhM]hhh]rF"hX3//Int main(Int argc, Char* argv[]) Int ipc_main() {rG"rH"}rI"(hUhjC"ubaubh)rJ"}rK"(hX+No longer using args so comment these linesrL"hjhjhhh}rM"(h]h]h]h]h]uhMchhh]rN"hX+No longer using args so comment these linesrO"rP"}rQ"(hjL"hjJ"ubaubj)rR"}rS"(hX?//taskParams.arg0 = (UArg)argc; //taskParams.arg1 = (UArg)argv;hjhjhjh}rT"(hhh]h]h]h]h]uhM) hhh]rU"hX?//taskParams.arg0 = (UArg)argc; //taskParams.arg1 = (UArg)argv;rV"rW"}rX"(hUhjR"ubaubh)rY"}rZ"(hX>BIOS\_start() is done in the app main() so comment it out herer["hjhjhhh}r\"(h]h]h]h]h]uhMjhhh]r]"hX=BIOS_start() is done in the app main() so comment it out herer^"r_"}r`"(hX>BIOS\_start() is done in the app main() so comment it out herehjY"ubaubj)ra"}rb"(hX9/* start scheduler, this never returns */ //BIOS_start();hjhjhjh}rc"(hhh]h]h]h]h]uhM0 hhh]rd"hX9/* start scheduler, this never returns */ //BIOS_start();re"rf"}rg"(hUhja"ubaubh)rh"}ri"(hUhjhjhjh}rj"(h]h]h]h]h]uhMqhhh]rk"j)rl"}rm"(hUjKhjh"hjhhh}rn"(h]h]h]h]h]uhKhhh]ubaubh)ro"}rp"(hXComment this outrq"hjhjhhh}rr"(h]h]h]h]h]uhMshhh]rs"hXComment this outrt"ru"}rv"(hjq"hjo"ubaubj)rw"}rx"(hX&//Log_print0(Diags_EXIT, "<-- main:");hjhjhjh}ry"(hhh]h]h]h]h]uhM9 hhh]rz"hX&//Log_print0(Diags_EXIT, "<-- main:");r{"r|"}r}"(hUhjw"ubaubh)r~"}r"(hUhjhjhjh}r"(h]h]h]h]h]uhMyhhh]r"j)r"}r"(hUjKhj~"hjhhh}r"(h]h]h]h]h]uhKhhh]ubaubj)r"}r"(hUhjhjhj!h}r"(j#X-h]h]h]h]h]uhM{hhh]r"j@)r"}r"(hX!Edit **rsc\_table\_vayu\_ipu.c** hj"hjhjCh}r"(h]h]h]h]h]uhNhhh]r"h)r"}r"(hX Edit **rsc\_table\_vayu\_ipu.c**hj"hjhhh}r"(h]h]h]h]h]uhM{h]r"(hXEdit r"r"}r"(hXEdit hj"ubj)r"}r"(hX**rsc\_table\_vayu\_ipu.c**h}r"(h]h]h]h]h]uhj"h]r"hXrsc_table_vayu_ipu.cr"r"}r"(hUhj"ubahjubeubaubaubh)r"}r"(hUhjhjhjh}r"(h]h]h]h]h]uhM}hhh]r"j)r"}r"(hUjKhj"hjhhh}r"(h]h]h]h]h]uhKhhh]ubaubh)r"}r"(hXGSet this #define before it's used to select PHYS\_MEM\_IPC\_VRING valuer"hjhjhhh}r"(h]h]h]h]h]uhMhhh]r"hXDSet this #define before it's used to select PHYS_MEM_IPC_VRING valuer"r"}r"(hXGSet this #define before it's used to select PHYS\_MEM\_IPC\_VRING valuehj"ubaubj)r"}r"(hX#define VAYU_IPU_2hjhjhjh}r"(hhh]h]h]h]h]uhME hhh]r"hX#define VAYU_IPU_2r"r"}r"(hUhj"ubaubh)r"}r"(hUhjhjhjh}r"(h]h]h]h]h]uhMhhh]r"j)r"}r"(hUjKhj"hjhhh}r"(h]h]h]h]h]uhKhhh]ubaubh)r"}r"(hX:Add this extern declaration prior to the symbol being usedr"hjhjhhh}r"(h]h]h]h]h]uhMhhh]r"hX:Add this extern declaration prior to the symbol being usedr"r"}r"(hj"hj"ubaubj)r"}r"(hX5extern char ti_trace_SysMin_Module_State_0_outbuf__A;hjhjhjh}r"(hhh]h]h]h]h]uhMM hhh]r"hX5extern char ti_trace_SysMin_Module_State_0_outbuf__A;r"r"}r"(hUhj"ubaubh)r"}r"(hUhjhjhjh}r"(h]h]h]h]h]uhMhhh]r"j)r"}r"(hUjKhj"hjhhh}r"(h]h]h]h]h]uhKhhh]ubaubj)r"}r"(hUhjhjhj!h}r"(j#X-h]h]h]h]h]uhMhhh]r"j@)r"}r"(hXEdit **Server.c** hj"hjhjCh}r"(h]h]h]h]h]uhNhhh]r"h)r"}r"(hXEdit **Server.c**hj"hjhhh}r"(h]h]h]h]h]uhMh]r"(hXEdit r"r"}r"(hXEdit hj"ubj)r"}r"(hX **Server.c**h}r"(h]h]h]h]h]uhj"h]r"hXServer.cr"r"}r"(hUhj"ubahjubeubaubaubh)r"}r"(hUhjhjhjh}r"(h]h]h]h]h]uhMhhh]r"j)r"}r"(hUjKhj"hjhhh}r"(h]h]h]h]h]uhKhhh]ubaubh)r"}r"(hX3No longer have shared folder so change include pathr"hjhjhhh}r"(h]h]h]h]h]uhMhhh]r"hX3No longer have shared folder so change include pathr"r"}r"(hj"hj"ubaubj)r"}r"(hXU/* local header files */ //#include "../shared/AppCommon.h" #include "../AppCommon.h"hjhjhjh}r"(jtjuXchhh]h]h]jv}h]h]uhMhhh]r"hXU/* local header files */ //#include "../shared/AppCommon.h" #include "../AppCommon.h"r"r"}r"(hUhj"ubaubh)r"}r"(hX*Handling AMMU (L1 Unicache MMU) and L2 MMUr"hjhjhhh}r"(h]r"U(handling-ammu-l1-unicache-mmu-and-l2-mmur"ah]h]h]h]r#h#auhNhhh]r#hX*Handling AMMU (L1 Unicache MMU) and L2 MMUr#r#}r#(hj"hj"ubaubh)r#}r#(hXThere are two MMUs inside each of the IPU1, and IPU2 subsystems. The L1 MMU is referred to as IPU\_UNICACHE\_MMU or AMMU and L2 MMU. The description of how this is configured in IPC-remoteproc has been described in section `Changing\_Cortex\_M4\_IPU\_Memory\_Map `__. IPC handling of L1 and L2 MMU is different from how the PDK driver examples setup the memory access using these MMUs which the users need to manage when integrating the components. This difference is highlighted below:hjhjhhh}r#(h]h]h]h]h]uhMhhh]r#(hXThere are two MMUs inside each of the IPU1, and IPU2 subsystems. The L1 MMU is referred to as IPU_UNICACHE_MMU or AMMU and L2 MMU. The description of how this is configured in IPC-remoteproc has been described in section r #r #}r #(hXThere are two MMUs inside each of the IPU1, and IPU2 subsystems. The L1 MMU is referred to as IPU\_UNICACHE\_MMU or AMMU and L2 MMU. The description of how this is configured in IPC-remoteproc has been described in section hj#ubj))r #}r #(hX\`Changing\_Cortex\_M4\_IPU\_Memory\_Map `__h}r#(UnameX!Changing_Cortex_M4_IPU_Memory_Mapj-X/Foundational_Components_IPC.html#ipc-for-am57xxh]h]h]h]h]uhj#h]r#hX!Changing_Cortex_M4_IPU_Memory_Mapr#r#}r#(hUhj #ubahj2ubhX. IPC handling of L1 and L2 MMU is different from how the PDK driver examples setup the memory access using these MMUs which the users need to manage when integrating the components. This difference is highlighted below:r#r#}r#(hX. IPC handling of L1 and L2 MMU is different from how the PDK driver examples setup the memory access using these MMUs which the users need to manage when integrating the components. This difference is highlighted below:hj#ubeubjr)r#}r#(hX3.. Image:: ../images/IPU_MMU_Peripheral_access.png hjhjhjyh}r#(UuriX-linux/../images/IPU_MMU_Peripheral_access.pngr#h]h]h]h]jw}r#U*j#sh]uhMhhh]ubj)r#}r#(hUhjhjhj!h}r#(j#X-h]h]h]h]h]uhMhhh]r#(j@)r#}r #(hXPDK examples use addresses (0x4X000000) to peripheral registers and use following MMU setting - L2 MMU uses default 1:1 Mapping - AMMU configuration translates physical 0x4X000000 access to logical 0x4X000000 hj#hNhjCh}r!#(h]h]h]h]h]uhNhhh]r"#(h)r##}r$#(hX]PDK examples use addresses (0x4X000000) to peripheral registers and use following MMU settingr%#hj#hjhhh}r&#(h]h]h]h]h]uhMh]r'#hX]PDK examples use addresses (0x4X000000) to peripheral registers and use following MMU settingr(#r)#}r*#(hj%#hj##ubaubj)r+#}r,#(hUh}r-#(j#X-h]h]h]h]h]uhj#h]r.#(j@)r/#}r0#(hXL2 MMU uses default 1:1 Mappingr1#h}r2#(h]h]h]h]h]uhj+#h]r3#h)r4#}r5#(hj1#hj/#hjhhh}r6#(h]h]h]h]h]uhMh]r7#hXL2 MMU uses default 1:1 Mappingr8#r9#}r:#(hj1#hj4#ubaubahjCubj@)r;#}r<#(hXOAMMU configuration translates physical 0x4X000000 access to logical 0x4X000000 h}r=#(h]h]h]h]h]uhj+#h]r>#h)r?#}r@#(hXNAMMU configuration translates physical 0x4X000000 access to logical 0x4X000000rA#hj;#hjhhh}rB#(h]h]h]h]h]uhMh]rC#hXNAMMU configuration translates physical 0x4X000000 access to logical 0x4X000000rD#rE#}rF#(hjA#hj?#ubaubahjCubehj!ubeubj@)rG#}rH#(hXIPC+ Remote Proc ARM+M4 requires IPU to use logical address (0x6X000000) and uses following MMU setting - L2 MMU is configured such that MMU translates 0x6X000000 access to addresss 0x4X000000 - AMMU is configured for 1:1 mapping 0x6X000000 and 0x6X000000 hj#hNhjCh}rI#(h]h]h]h]h]uhNhhh]rJ#(h)rK#}rL#(hXgIPC+ Remote Proc ARM+M4 requires IPU to use logical address (0x6X000000) and uses following MMU settingrM#hjG#hjhhh}rN#(h]h]h]h]h]uhMh]rO#hXgIPC+ Remote Proc ARM+M4 requires IPU to use logical address (0x6X000000) and uses following MMU settingrP#rQ#}rR#(hjM#hjK#ubaubj)rS#}rT#(hUh}rU#(j#X-h]h]h]h]h]uhjG#h]rV#(j@)rW#}rX#(hXVL2 MMU is configured such that MMU translates 0x6X000000 access to addresss 0x4X000000h}rY#(h]h]h]h]h]uhjS#h]rZ#h)r[#}r\#(hXVL2 MMU is configured such that MMU translates 0x6X000000 access to addresss 0x4X000000r]#hjW#hjhhh}r^#(h]h]h]h]h]uhMh]r_#hXVL2 MMU is configured such that MMU translates 0x6X000000 access to addresss 0x4X000000r`#ra#}rb#(hj]#hj[#ubaubahjCubj@)rc#}rd#(hX=AMMU is configured for 1:1 mapping 0x6X000000 and 0x6X000000 h}re#(h]h]h]h]h]uhjS#h]rf#h)rg#}rh#(hX<AMMU is configured for 1:1 mapping 0x6X000000 and 0x6X000000ri#hjc#hjhhh}rj#(h]h]h]h]h]uhMh]rk#hX<AMMU is configured for 1:1 mapping 0x6X000000 and 0x6X000000rl#rm#}rn#(hji#hjg#ubaubahjCubehj!ubeubeubh)ro#}rp#(hXTherefore after integrating IPC with PDK drivers, it is recommended that the alias addresses are used to access peripherals and PRCM registers. This requires changes to the addresses used by PDK drivers and in application code.rq#hjhjhhh}rr#(h]h]h]h]h]uhMhhh]rs#hXTherefore after integrating IPC with PDK drivers, it is recommended that the alias addresses are used to access peripherals and PRCM registers. This requires changes to the addresses used by PDK drivers and in application code.rt#ru#}rv#(hjq#hjo#ubaubh)rw#}rx#(hXHThe following changes were then made to the IPU application source code:ry#hjhjhhh}rz#(h]h]h]h]h]uhMhhh]r{#hXHThe following changes were then made to the IPU application source code:r|#r}#}r~#(hjy#hjw#ubaubh)r#}r#(hXAdd UART\_soc.c file to the project and modify the base addresses for all IPU UART register instance in the UART\_HwAttrs to use alias addresses:hjhjhhh}r#(h]h]h]h]h]uhMhhh]r#hXAdd UART_soc.c file to the project and modify the base addresses for all IPU UART register instance in the UART_HwAttrs to use alias addresses:r#r#}r#(hXAdd UART\_soc.c file to the project and modify the base addresses for all IPU UART register instance in the UART\_HwAttrs to use alias addresses:hj#ubaubj)r#}r#(hX#ifdef _TMS320C6X CSL_DSP_UART3_REGS, OSAL_REGINT_INTVEC_EVENT_COMBINER, #elif defined(__ARM_ARCH_7A__) CSL_MPU_UART3_REGS, 106, #else (CSL_IPU_UART3_REGS + 0x20000000), //Base Addr = 0x48000000 + 0x20000000 = 0x68000000 45, #endifhjhjhjh}r#(jtjuXchhh]h]h]jv}h]h]uhMhhh]r#hX#ifdef _TMS320C6X CSL_DSP_UART3_REGS, OSAL_REGINT_INTVEC_EVENT_COMBINER, #elif defined(__ARM_ARCH_7A__) CSL_MPU_UART3_REGS, 106, #else (CSL_IPU_UART3_REGS + 0x20000000), //Base Addr = 0x48000000 + 0x20000000 = 0x68000000 45, #endifr#r#}r#(hUhj#ubaubh)r#}r#(hXAdding custom SOC configuration also means that you should use the generic UART driver instead of driver with built in SOC setup. To do this comment the following line in .cfg:r#hjhjhhh}r#(h]h]h]h]h]uhMhhh]r#hXAdding custom SOC configuration also means that you should use the generic UART driver instead of driver with built in SOC setup. To do this comment the following line in .cfg:r#r#}r#(hj#hj#ubaubj)r#}r#(hXZvar Uart = xdc.loadPackage('ti.drv.uart'); //Uart.Settings.socType = socType;hjhjhjh}r#(hhh]h]h]h]h]uhM hhh]r#hXZvar Uart = xdc.loadPackage('ti.drv.uart'); //Uart.Settings.socType = socType;r#r#}r#(hUhj#ubaubh)r#}r#(hX~There is also an instance in the application code where we added pointer to PRCM registers that need to be changed as follows.r#hjhjhhh}r#(h]h]h]h]h]uhMhhh]r#hX~There is also an instance in the application code where we added pointer to PRCM registers that need to be changed as follows.r#r#}r#(hj#hj#ubaubj)r#}r#(hX} CSL_l4per_cm_core_componentRegs *l4PerCmReg = (CSL_l4per_cm_core_componentRegs \*) 0x6a009700; //CSL_MPU_L4PER_CM_CORE_REGS;hjhjhjh}r#(hhh]h]h]h]h]uhM hhh]r#hX} CSL_l4per_cm_core_componentRegs *l4PerCmReg = (CSL_l4per_cm_core_componentRegs \*) 0x6a009700; //CSL_MPU_L4PER_CM_CORE_REGS;r#r#}r#(hUhj#ubaubh)r#}r#(hXNow, you are ready to build the firmware. After the .out is built, change the extension to .xem4 and copy it over to the location in the filesystem that is used to load M4 firmware.r#hjhjhhh}r#(h]h]h]h]h]uhMhhh]r#hXNow, you are ready to build the firmware. After the .out is built, change the extension to .xem4 and copy it over to the location in the filesystem that is used to load M4 firmware.r#r#}r#(hj#hj#ubaubh)r#}r#(hXDownload the Full CCS Projectr#hjhjhhh}r#(h]r#Udownload-the-full-ccs-project-1r#ah]h]h]h]r#hJauhNhhh]r#hXDownload the Full CCS Projectr#r#}r#(hj#hj#ubaubh)r#}r#(hX:download:`UART\_BasicExample\_evmAM572x\_m4ExampleProject\_with\_ipc.zip <../files/UART_BasicExample_evmAM572x_m4ExampleProject_with_ipc.zip>`r#hjhjhhh}r#(h]h]h]h]h]uhMhhh]r#jD)r#}r#(hX:download:`UART\_BasicExample\_evmAM572x\_m4ExampleProject\_with\_ipc.zip <../files/UART_BasicExample_evmAM572x_m4ExampleProject_with_ipc.zip>`r#hj#hjhjHh}r#(UreftypeXdownloadr#jKjLXB../files/UART_BasicExample_evmAM572x_m4ExampleProject_with_ipc.zipU refdomainUh]h]U refexplicith]h]h]jMjNjOX9UART_BasicExample_evmAM572x_m4ExampleProject_with_ipc.zipr#uhMh]r#j )r#}r#(hj#h}r#(h]h]r#(jVj#eh]h]h]uhj#h]r#hX9UART_BasicExample_evmAM572x_m4ExampleProject_with_ipc.zipr#r#}r#(hUhj#ubahj ubaubaubeubh)r#}r#(hUhhhhhhh}r#(h]h]h]h]r#U ipc-early-boot-for-am57xx-dra7xxr#ah]r#hDauhKhhh]r#(h)r#}r#(hX IPC Early Boot for AM57xx/DRA7xxr#hj#hhhhh}r#(h]h]h]h]h]uhKhhh]r#hX IPC Early Boot for AM57xx/DRA7xxr#r#}r#(hj#hj#ubaubh)r#}r#(hX#Early Boot and Late Attach in Linuxr#hj#hhX?source/linux/Foundational_Components/IPC/IPC_Early_Boot.rst.incr#r#}r#bhhh}r#(h]r#U firstheadingr#ah]h]h]h]r#h>auhNhhh]r#hX#Early Boot and Late Attach in Linuxr#r#}r#(hj#hj#ubaubh)r#}r#(hX Introductionr#hj#hj#hhh}r#(h]r#U introductionr#ah]h]h]h]r#hGauhNhhh]r#hX Introductionr#r#}r#(hj#hj#ubaubh)r#}r#(hXKDRA7xx/AM57xx SOCs have multiple processor cores - Cortex A15, C66x DSPs and ARM M4 cores. The A15 typically runs a HLOS like Linux/Android and the remotecores(DSPs and M4s) run an RTOS. In the normal operation, bootloader (U-Boot/SPL) boots and loads the A15 with the HLOS. The A15 boots the DSP and the M4 cores. In this sequence, the interval between the Power on Reset and the remotecores (i.e. the DSPs and the M4s) executing is dependent on the HLOS initialization time. This delay may not be suitable for realizing some usecases with tight time constraints. e.g. Rear View Camera.r#hj#hj#hhh}r#(h]h]h]h]h]uhKhhh]r#hXKDRA7xx/AM57xx SOCs have multiple processor cores - Cortex A15, C66x DSPs and ARM M4 cores. The A15 typically runs a HLOS like Linux/Android and the remotecores(DSPs and M4s) run an RTOS. In the normal operation, bootloader (U-Boot/SPL) boots and loads the A15 with the HLOS. The A15 boots the DSP and the M4 cores. In this sequence, the interval between the Power on Reset and the remotecores (i.e. the DSPs and the M4s) executing is dependent on the HLOS initialization time. This delay may not be suitable for realizing some usecases with tight time constraints. e.g. Rear View Camera.r#r$}r$(hj#hj#ubaubjr)r$}r$(hX_.. Image:: ../images/Normal-boot.png :class: thumbimage :width: 511px :height: 263px hj#hj#hjyh}r$(h]UuriXlinux/../images/Normal-boot.pngr$h]h]UwidthX511pxh]r$U thumbimager$ajw}r$U*j$sh]UheightX263pxuhNhhh]ubh)r $}r $(hXTo address the early boot usecase, one may need the bootloader to boot a remote core before booting the A15 with the linux kernel, i.e. booting the remotecore early. The kernel then attaches to the already booted remote core for further communication i.e. connecting to the remotecore later in its execution. We refer to this feature as the "Early Boot - Late Attach" functionality. The "Early Boot" functionality is provided by the boot loader. The "Late Attach" functionality is a feature of the Linux Kernel.r $hj#hj#hhh}r $(h]h]h]h]h]uhKhhh]r $hXTo address the early boot usecase, one may need the bootloader to boot a remote core before booting the A15 with the linux kernel, i.e. booting the remotecore early. The kernel then attaches to the already booted remote core for further communication i.e. connecting to the remotecore later in its execution. We refer to this feature as the "Early Boot - Late Attach" functionality. The "Early Boot" functionality is provided by the boot loader. The "Late Attach" functionality is a feature of the Linux Kernel.r$r$}r$(hj $hj $ubaubjr)r$}r$(hX].. Image:: ../images/Early-boot.png :class: thumbimage :width: 511px :height: 263px hj#hj#hjyh}r$(h]UuriXlinux/../images/Early-boot.pngr$h]h]UwidthX511pxh]r$U thumbimager$ajw}r$U*j$sh]UheightX263pxuhNhhh]ubh)r$}r$(hX{The following sections describe how to use this feature and how to troubleshoot any issues with early boot and late attach.r$hj#hj#hhh}r$(h]h]h]h]h]uhK%hhh]r$hX{The following sections describe how to use this feature and how to troubleshoot any issues with early boot and late attach.r$r$}r$(hj$hj$ubaubh)r $}r!$(hXUsing Early Boot/Late Attachr"$hj#hj#hhh}r#$(h]r$$Uusing-early-bootlate-attachr%$ah]h]h]h]r&$h9auhNhhh]r'$hXUsing Early Boot/Late Attachr($r)$}r*$(hj"$hj $ubaubh)r+$}r,$(hXEarly Boot/Late Attach functionality is supported for IPUs and enabled by default for IPU1 remote processor on the TI SDKs for all TI DRA7xx/AM57xx platforms. The functionality relies on matching configuration/code between SPL and Linux kernel in terms of memory and timers used by the firmwares, and matching firmwares in boot media (used by SPL) and in the rootfs in /lib/firmware folder (used by kernel).r-$hj#hj#hhh}r.$(h]h]h]h]h]uhK,hhh]r/$hXEarly Boot/Late Attach functionality is supported for IPUs and enabled by default for IPU1 remote processor on the TI SDKs for all TI DRA7xx/AM57xx platforms. The functionality relies on matching configuration/code between SPL and Linux kernel in terms of memory and timers used by the firmwares, and matching firmwares in boot media (used by SPL) and in the rootfs in /lib/firmware folder (used by kernel).r0$r1$}r2$(hj-$hj+$ubaubh)r3$}r4$(hXPre-flight checksr5$hj#hj#hhh}r6$(h]r7$Upre-flight-checksr8$ah]h]h]h]r9$hYauhNhhh]r:$hXPre-flight checksr;$r<$}r=$(hj5$hj3$ubaubj6)r>$}r?$(hUhj#hj#hj9h}r@$(j;U.h]h]h]j<Uh]h]j=j>uhK6hhh]rA$(j@)rB$}rC$(hXBefore attempting to early boot a remotecore from U-Boot SPL, please ensure that the remotecore binary can be loaded by Linux without any issues. This ensures that the memory map and MMU configuration are done correctly. The test should be done by using a carveout (DMA pool) for the remoteproc instead of the default preferred CMA pool. This is achieved by replacing the "reusable" property with a "no-map" property in the reserved-memory node used by the remoteproc in the board dts file. hj>$hj#hjCh}rD$(h]h]h]h]h]uhNhhh]rE$h)rF$}rG$(hXBefore attempting to early boot a remotecore from U-Boot SPL, please ensure that the remotecore binary can be loaded by Linux without any issues. This ensures that the memory map and MMU configuration are done correctly. The test should be done by using a carveout (DMA pool) for the remoteproc instead of the default preferred CMA pool. This is achieved by replacing the "reusable" property with a "no-map" property in the reserved-memory node used by the remoteproc in the board dts file.rH$hjB$hj#hhh}rI$(h]h]h]h]h]uhK6h]rJ$hXBefore attempting to early boot a remotecore from U-Boot SPL, please ensure that the remotecore binary can be loaded by Linux without any issues. This ensures that the memory map and MMU configuration are done correctly. The test should be done by using a carveout (DMA pool) for the remoteproc instead of the default preferred CMA pool. This is achieved by replacing the "reusable" property with a "no-map" property in the reserved-memory node used by the remoteproc in the board dts file.rK$rL$}rM$(hjH$hjF$ubaubaubj@)rN$}rO$(hXMLO uses the same memory allocation strategy as the kernel for the carveouts specified in the resource table from the memory pool used by the kernel. The location of the memory pools for each of the remotecores is hardcoded in MLO to kernel defaults. In case the memory allocations in kernel are modified, U-Boot should be modified to match with the configuration specified in the kernel. The U-Boot source file to modify is ``drivers/remoteproc/ipu_rproc.c``. :: #define DRA7\_RPROC\_CMA\_BASE\_IPU1 0x9d000000 #define DRA7\_RPROC\_CMA\_BASE\_IPU2 0x95800000 #define DRA7\_RPROC\_CMA\_SIZE\_IPU1 0x02000000 #define DRA7\_RPROC\_CMA\_SIZE\_IPU2 0x03800000 The definitions above should match the reserved-memory node region definitions in the corresponding dts board file in the kernel. For example, see the defined reserved-memory nodes in arch/arm/boot/dts/am57xx-beagle-x15-common.dtsi file used for all AM57xx EVM boards: :: ipu1_cma_pool: ipu1_cma@9d000000 { compatible = "shared-dma-pool"; reg = <0x9d000000 0x2000000>; reusable; status = "okay"; }; ipu2_cma_pool: ipu2_cma@95800000 { compatible = "shared-dma-pool"; reg = <0x95800000 0x3800000>; reusable; status = "okay"; }; If the allocations do not match, the MLO execution may fail when trying to allocate memory for the carveouts. Further, the kernel can overwrite the memory being used by firmwares and can result in crashes. hj>$hj#hjCh}rP$(h]h]h]h]h]uhNhhh]rQ$(h)rR$}rS$(hXMLO uses the same memory allocation strategy as the kernel for the carveouts specified in the resource table from the memory pool used by the kernel. The location of the memory pools for each of the remotecores is hardcoded in MLO to kernel defaults. In case the memory allocations in kernel are modified, U-Boot should be modified to match with the configuration specified in the kernel.rT$hjN$hj#hhh}rU$(h]h]h]h]h]uhK?h]rV$hXMLO uses the same memory allocation strategy as the kernel for the carveouts specified in the resource table from the memory pool used by the kernel. The location of the memory pools for each of the remotecores is hardcoded in MLO to kernel defaults. In case the memory allocations in kernel are modified, U-Boot should be modified to match with the configuration specified in the kernel.rW$rX$}rY$(hjT$hjR$ubaubh)rZ$}r[$(hXJThe U-Boot source file to modify is ``drivers/remoteproc/ipu_rproc.c``. ::hjN$hj#hhh}r\$(h]h]h]h]h]uhKFh]r]$(hX$The U-Boot source file to modify is r^$r_$}r`$(hX$The U-Boot source file to modify is hjZ$ubj )ra$}rb$(hX"``drivers/remoteproc/ipu_rproc.c``h}rc$(h]h]h]h]h]uhjZ$h]rd$hXdrivers/remoteproc/ipu_rproc.cre$rf$}rg$(hUhja$ubahj ubhX.rh$}ri$(hX.hjZ$ubeubj)rj$}rk$(hX#define DRA7\_RPROC\_CMA\_BASE\_IPU1 0x9d000000 #define DRA7\_RPROC\_CMA\_BASE\_IPU2 0x95800000 #define DRA7\_RPROC\_CMA\_SIZE\_IPU1 0x02000000 #define DRA7\_RPROC\_CMA\_SIZE\_IPU2 0x03800000hjN$hjh}rl$(hhh]h]h]h]h]uhM h]rm$hX#define DRA7\_RPROC\_CMA\_BASE\_IPU1 0x9d000000 #define DRA7\_RPROC\_CMA\_BASE\_IPU2 0x95800000 #define DRA7\_RPROC\_CMA\_SIZE\_IPU1 0x02000000 #define DRA7\_RPROC\_CMA\_SIZE\_IPU2 0x03800000rn$ro$}rp$(hUhjj$ubaubh)rq$}rr$(hXThe definitions above should match the reserved-memory node region definitions in the corresponding dts board file in the kernel. For example, see the defined reserved-memory nodes in arch/arm/boot/dts/am57xx-beagle-x15-common.dtsi file used for all AM57xx EVM boards: ::hjN$hj#hhh}rs$(h]h]h]h]h]uhKOh]rt$hX The definitions above should match the reserved-memory node region definitions in the corresponding dts board file in the kernel. For example, see the defined reserved-memory nodes in arch/arm/boot/dts/am57xx-beagle-x15-common.dtsi file used for all AM57xx EVM boards:ru$rv$}rw$(hX The definitions above should match the reserved-memory node region definitions in the corresponding dts board file in the kernel. For example, see the defined reserved-memory nodes in arch/arm/boot/dts/am57xx-beagle-x15-common.dtsi file used for all AM57xx EVM boards:hjq$ubaubj)rx$}ry$(hXipu1_cma_pool: ipu1_cma@9d000000 { compatible = "shared-dma-pool"; reg = <0x9d000000 0x2000000>; reusable; status = "okay"; }; ipu2_cma_pool: ipu2_cma@95800000 { compatible = "shared-dma-pool"; reg = <0x95800000 0x3800000>; reusable; status = "okay"; };hjN$hjh}rz$(hhh]h]h]h]h]uhM h]r{$hXipu1_cma_pool: ipu1_cma@9d000000 { compatible = "shared-dma-pool"; reg = <0x9d000000 0x2000000>; reusable; status = "okay"; }; ipu2_cma_pool: ipu2_cma@95800000 { compatible = "shared-dma-pool"; reg = <0x95800000 0x3800000>; reusable; status = "okay"; };r|$r}$}r~$(hUhjx$ubaubh)r$}r$(hXIf the allocations do not match, the MLO execution may fail when trying to allocate memory for the carveouts. Further, the kernel can overwrite the memory being used by firmwares and can result in crashes.r$hjN$hj#hhh}r$(h]h]h]h]h]uhKdh]r$hXIf the allocations do not match, the MLO execution may fail when trying to allocate memory for the carveouts. Further, the kernel can overwrite the memory being used by firmwares and can result in crashes.r$r$}r$(hj$hj$ubaubeubj@)r$}r$(hXIThere is an additional memory that needs to be carved out in linux kernel for storing the MMU page tables of the individual cores. This additional memory is at 0x95700000, and is specified in the late attach device tree dra7-ipu-common-early-boot.dtsi as shown below. :: &reserved_mem { mmu-early-page-tables@95700000 { reg = <0x0 0x95700000 0x0 0x100000>; no-map; status = "okay"; }; }; For each core, we reserve 16 KB for the Level 1 page table and an additional 16 KB for Level 2 page tables i.e. 32 KB for core. This information is passed to the boot loader via the below macros in ``drivers/remoteproc/ipu_rproc.c``. In U-boot 2019.01, ``drivers/remoteproc/ipu_rproc.c``, :: #define DRA7\_PGTBL\_BASE\_IPU1 0x95700000 #define DRA7\_PGTBL\_BASE\_IPU2 0x95740000 hj>$hj#hjCh}r$(h]h]h]h]h]uhNhhh]r$(h)r$}r$(hX There is an additional memory that needs to be carved out in linux kernel for storing the MMU page tables of the individual cores. This additional memory is at 0x95700000, and is specified in the late attach device tree dra7-ipu-common-early-boot.dtsi as shown below.r$hj$hj#hhh}r$(h]h]h]h]h]uhKhh]r$hX There is an additional memory that needs to be carved out in linux kernel for storing the MMU page tables of the individual cores. This additional memory is at 0x95700000, and is specified in the late attach device tree dra7-ipu-common-early-boot.dtsi as shown below.r$r$}r$(hj$hj$ubaubj)r$}r$(hX&reserved_mem { mmu-early-page-tables@95700000 { reg = <0x0 0x95700000 0x0 0x100000>; no-map; status = "okay"; }; };hj$hjh}r$(hhh]h]h]h]h]uhM! h]r$hX&reserved_mem { mmu-early-page-tables@95700000 { reg = <0x0 0x95700000 0x0 0x100000>; no-map; status = "okay"; }; };r$r$}r$(hUhj$ubaubh)r$}r$(hXFor each core, we reserve 16 KB for the Level 1 page table and an additional 16 KB for Level 2 page tables i.e. 32 KB for core. This information is passed to the boot loader via the below macros in ``drivers/remoteproc/ipu_rproc.c``.hj$hj#hhh}r$(h]h]h]h]h]uhKxh]r$(hXFor each core, we reserve 16 KB for the Level 1 page table and an additional 16 KB for Level 2 page tables i.e. 32 KB for core. This information is passed to the boot loader via the below macros in r$r$}r$(hXFor each core, we reserve 16 KB for the Level 1 page table and an additional 16 KB for Level 2 page tables i.e. 32 KB for core. This information is passed to the boot loader via the below macros in hj$ubj )r$}r$(hX"``drivers/remoteproc/ipu_rproc.c``h}r$(h]h]h]h]h]uhj$h]r$hXdrivers/remoteproc/ipu_rproc.cr$r$}r$(hUhj$ubahj ubhX.r$}r$(hX.hj$ubeubh)r$}r$(hX6In U-boot 2019.01, ``drivers/remoteproc/ipu_rproc.c``,hj$hj#hhh}r$(h]h]h]h]h]uhK~h]r$(hXIn U-boot 2019.01, r$r$}r$(hXIn U-boot 2019.01, hj$ubj )r$}r$(hX"``drivers/remoteproc/ipu_rproc.c``h}r$(h]h]h]h]h]uhj$h]r$hXdrivers/remoteproc/ipu_rproc.cr$r$}r$(hUhj$ubahj ubhX,r$}r$(hX,hj$ubeubj)r$}r$(hXU#define DRA7\_PGTBL\_BASE\_IPU1 0x95700000 #define DRA7\_PGTBL\_BASE\_IPU2 0x95740000hj$hjh}r$(hhh]h]h]h]h]uhM3 h]r$hXU#define DRA7\_PGTBL\_BASE\_IPU1 0x95700000 #define DRA7\_PGTBL\_BASE\_IPU2 0x95740000r$r$}r$(hUhj$ubaubeubeubcdocutils.nodes block_quote r$)r$}r$(hUhj#hj#hU block_quoter$h}r$(h]h]h]h]h]uhNhhh]r$h)r$}r$(hXAThe memory for the page tables (256 KB per IPU) is placed just before the carveout memories for the remote processors. 16 KB of memory is needed for the L1 page table (4096 entries * 4 bytes per 1 MB section). Any smaller page (64 KB or 4 KB) entries are supported through L2 page tables (1 KB per table). The remaining 240 KB can provide support for 240 L2 page tables. Any remoteproc firmware image requiring more than 240 L2 page table entries would need more memory to be reserved. The carveout in memory can be reduced to 128 KB if the system is under a memory constraint.r$hj$hj#hhh}r$(h]h]h]h]h]uhKh]r$hXAThe memory for the page tables (256 KB per IPU) is placed just before the carveout memories for the remote processors. 16 KB of memory is needed for the L1 page table (4096 entries * 4 bytes per 1 MB section). Any smaller page (64 KB or 4 KB) entries are supported through L2 page tables (1 KB per table). The remaining 240 KB can provide support for 240 L2 page tables. Any remoteproc firmware image requiring more than 240 L2 page table entries would need more memory to be reserved. The carveout in memory can be reduced to 128 KB if the system is under a memory constraint.r$r$}r$(hj$hj$ubaubaubj6)r$}r$(hUhj#hj#hj9h}r$(j;U.jKh]h]h]j<Uh]h]j=j>uhKhhh]r$j@)r$}r$(hXMLO first loads the remotecore binaries from storage media to a temporary DDR address. Then MLO parses the binaries and copies the code/data sections to the their final locations. Please ensure that the physical addresses used by the remotecore binaries during execution do not overlap with these temporary load addresses. The location of the macros controlling these temporary load locations is listed below. In U-Boot 2019.01, each core is assigned a distinct temporary load address. The source file in which the macro is defined is also modified. +--------------------------+--------------------------+------------------------------------------+ | Core | Load Address | Defined in | +==========================+==========================+==========================================+ | IPU1 | ``IPU1_LOAD_ADDR`` | ``arch/arm/mach-omap2/boot-common.c | | | | and drivers/remoteproc/ipu_rproc.c`` | +--------------------------+--------------------------+------------------------------------------+ | IPU2 | ``IPU2_LOAD_ADDR`` | ``arch/arm/mach-omap2/boot-common.c | | | | and drivers/remoteproc/ipu_rproc.c`` | +--------------------------+--------------------------+------------------------------------------+ Table: U-boot 2019.01:Temporary load address for Early boot binaries hj$hj#hjCh}r$(h]h]h]h]h]uhNhhh]r$(h)r$}r$(hXBMLO first loads the remotecore binaries from storage media to a temporary DDR address. Then MLO parses the binaries and copies the code/data sections to the their final locations. Please ensure that the physical addresses used by the remotecore binaries during execution do not overlap with these temporary load addresses.r$hj$hj#hhh}r$(h]h]h]h]h]uhKh]r$hXBMLO first loads the remotecore binaries from storage media to a temporary DDR address. Then MLO parses the binaries and copies the code/data sections to the their final locations. Please ensure that the physical addresses used by the remotecore binaries during execution do not overlap with these temporary load addresses.r$r$}r$(hj$hj$ubaubh)r$}r$(hXVThe location of the macros controlling these temporary load locations is listed below.r$hj$hj#hhh}r$(h]h]h]h]h]uhKh]r$hXVThe location of the macros controlling these temporary load locations is listed below.r$r$}r$(hj$hj$ubaubh)r$}r$(hXIn U-Boot 2019.01, each core is assigned a distinct temporary load address. The source file in which the macro is defined is also modified.r$hj$hj#hhh}r$(h]h]h]h]h]uhKh]r$hXIn U-Boot 2019.01, each core is assigned a distinct temporary load address. The source file in which the macro is defined is also modified.r$r$}r$(hj$hj$ubaubh)r$}r$(hXDTable: U-boot 2019.01:Temporary load address for Early boot binariesr$hj$hj#hhh}r$(h]h]h]h]h]uhKh]r$hXDTable: U-boot 2019.01:Temporary load address for Early boot binariesr$r$}r$(hj$hj$ubaubeubaubj)r$}r$(hXCONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL_DM_RESET=y CONFIG_SPL_REMOTEPROC=y CONFIG_FS_LOADER=y CONFIG_REMOTEPROC_TI_IPU=y CONFIG_DM_RESET=y CONFIG_RESET_DRA7=yhj#hj#hjh}r$(hhh]h]h]h]h]uhMc hhh]r$hXCONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL_DM_RESET=y CONFIG_SPL_REMOTEPROC=y CONFIG_FS_LOADER=y CONFIG_REMOTEPROC_TI_IPU=y CONFIG_DM_RESET=y CONFIG_RESET_DRA7=yr$r$}r$(hUhj$ubaubh)r$}r$(hXThe default firmware location, timers, remoteprocs to be enabled are defined in dts file. Please see the file arch/arm/dts/dra7-ipu-common-early-boot.dtsi, which defines the peripherals used for booting the IPU1, and is then included in the corresponding board's U-Boot dts file.r%hj#hj#hhh}r%(h]h]h]h]h]uhKhhh]r%hXThe default firmware location, timers, remoteprocs to be enabled are defined in dts file. Please see the file arch/arm/dts/dra7-ipu-common-early-boot.dtsi, which defines the peripherals used for booting the IPU1, and is then included in the corresponding board's U-Boot dts file.r%r%}r%(hj%hj$ubaubh)r%}r%(hX$Customizing Early Boot for a Usecaser%hj#hj#hhh}r %(h]r %U$customizing-early-boot-for-a-usecaser %ah]h]h]h]r %hauhNhhh]r %hX$Customizing Early Boot for a Usecaser%r%}r%(hj%hj%ubaubh)r%}r%(hXThe Early boot code in U-Boot does the necessary configuration to bring up a remotecore. This includes the timers and the MMUs. It does not configure any other peripherals by default. Some usecases may require additional peripheral configuration before running the remotecore. U-Boot includes placeholder functions that can be populated for this purpose. These can be found in the file ``drivers/remoteproc/ipu_rproc.c``.hj#hj#hhh}r%(h]h]h]h]h]uhKhhh]r%(hXThe Early boot code in U-Boot does the necessary configuration to bring up a remotecore. This includes the timers and the MMUs. It does not configure any other peripherals by default. Some usecases may require additional peripheral configuration before running the remotecore. U-Boot includes placeholder functions that can be populated for this purpose. These can be found in the file r%r%}r%(hXThe Early boot code in U-Boot does the necessary configuration to bring up a remotecore. This includes the timers and the MMUs. It does not configure any other peripherals by default. Some usecases may require additional peripheral configuration before running the remotecore. U-Boot includes placeholder functions that can be populated for this purpose. These can be found in the file hj%ubj )r%}r%(hX"``drivers/remoteproc/ipu_rproc.c``h}r%(h]h]h]h]h]uhj%h]r%hXdrivers/remoteproc/ipu_rproc.cr%r%}r%(hUhj%ubahj ubhX.r%}r %(hX.hj%ubeubj)r!%}r"%(hXg* If the remotecore binary expects any peripherals to be setup before it has * booted, configure them here. * * These functions are left empty by default as their operation is usecase * specific. u32 ipu1\_config\_peripherals(u32 core\_id, struct rproc \*cfg) { return 0; } u32 ipu2\_config\_peripherals(u32 core\_id, struct rproc \*cfg) { return 0; }hj#hj#hjh}r#%(hhh]h]h]h]h]uhM hhh]r$%hXg* If the remotecore binary expects any peripherals to be setup before it has * booted, configure them here. * * These functions are left empty by default as their operation is usecase * specific. u32 ipu1\_config\_peripherals(u32 core\_id, struct rproc \*cfg) { return 0; } u32 ipu2\_config\_peripherals(u32 core\_id, struct rproc \*cfg) { return 0; }r%%r&%}r'%(hUhj!%ubaubh)r(%}r)%(hXTesting early bootr*%hj#hj#hhh}r+%(h]r,%Utesting-early-bootr-%ah]h]h]h]r.%hauhNhhh]r/%hXTesting early bootr0%r1%}r2%(hj*%hj(%ubaubj6)r3%}r4%(hUhj#hj#hj9h}r5%(j;U.h]h]h]j<Uh]h]j=j>uhKhhh]r6%(j@)r7%}r8%(hXxPlace the MLO built with early boot enabled and the remotecore binaries in the specified locations and power on the EVM.hj3%hj#hjCh}r9%(h]h]h]h]h]uhNhhh]r:%h)r;%}r<%(hXxPlace the MLO built with early boot enabled and the remotecore binaries in the specified locations and power on the EVM.r=%hj7%hj#hhh}r>%(h]h]h]h]h]uhKh]r?%hXxPlace the MLO built with early boot enabled and the remotecore binaries in the specified locations and power on the EVM.r@%rA%}rB%(hj=%hj;%ubaubaubj@)rC%}rD%(hXfThe MLO should locate the remotecore binary and proceed to load it and then jump to U-Boot or Kernel. hj3%hj#hjCh}rE%(h]h]h]h]h]uhNhhh]rF%h)rG%}rH%(hXeThe MLO should locate the remotecore binary and proceed to load it and then jump to U-Boot or Kernel.rI%hjC%hj#hhh}rJ%(h]h]h]h]h]uhKh]rK%hXeThe MLO should locate the remotecore binary and proceed to load it and then jump to U-Boot or Kernel.rL%rM%}rN%(hjI%hjG%ubaubaubeubh)rO%}rP%(hUhj#hj#hjh}rQ%(h]h]h]h]h]uhKhhh]rR%(j)rS%}rT%(hXAn easy way to verify that early boot is working is by stopping the A15 execution at the U-Boot prompt and connecting to the remotecore via a JTAG. If connecting to a remotecore via JTAG does not work, please refer to the section of "Debugging Early Boot" later in the document.rU%jKhjO%hj#hhh}rV%(h]h]h]h]h]uhKhhh]rW%hXAn easy way to verify that early boot is working is by stopping the A15 execution at the U-Boot prompt and connecting to the remotecore via a JTAG. If connecting to a remotecore via JTAG does not work, please refer to the section of "Debugging Early Boot" later in the document.rX%rY%}rZ%(hjU%hjS%ubaubj)r[%}r\%(hX\Another way to check the functionality is to execute the below command after kernel boot-up.r]%jKhjO%hj#hhh}r^%(h]h]h]h]h]uhKhhh]r_%hX\Another way to check the functionality is to execute the below command after kernel boot-up.r`%ra%}rb%(hj]%hj[%ubaubeubj)rc%}rd%(hXroot@dra7xx-evm:~# cat /sys/kernel/debug/remoteproc/remoteproc0/trace0 [0][ 0.000] Watchdog enabled: TimerBase = 0x68824000 SMP-Core = 0 Freq = 19200000 [0][ 0.000] Watchdog enabled: TimerBase = 0x68826000 SMP-Core = 1 Freq = 19200000 [0][ 0.000] Watchdog_restore registered as a resume callback [0][ 0.000] 18 Resource entries at 0x3000 [0][ 0.000] messageq_single.c:main: MultiProc id = 2 [0][ 0.000] Time at reset() is 51615 ticks [0][ 0.000] Time at startup() is 51726 ticks [0][ 0.000] Time at main() is 51804 ticks [0][ 0.000] registering rpmsg-proto:rpmsg-proto service on 61 with HOST [0][ 0.000] tsk1Fxn: created MessageQ: SLAVE_IPU1; QueueID: 0x20080 [0][ 0.000] Awaiting sync message from host...hj#hj#hjh}re%(hhh]h]h]h]h]uhM hhh]rf%hXroot@dra7xx-evm:~# cat /sys/kernel/debug/remoteproc/remoteproc0/trace0 [0][ 0.000] Watchdog enabled: TimerBase = 0x68824000 SMP-Core = 0 Freq = 19200000 [0][ 0.000] Watchdog enabled: TimerBase = 0x68826000 SMP-Core = 1 Freq = 19200000 [0][ 0.000] Watchdog_restore registered as a resume callback [0][ 0.000] 18 Resource entries at 0x3000 [0][ 0.000] messageq_single.c:main: MultiProc id = 2 [0][ 0.000] Time at reset() is 51615 ticks [0][ 0.000] Time at startup() is 51726 ticks [0][ 0.000] Time at main() is 51804 ticks [0][ 0.000] registering rpmsg-proto:rpmsg-proto service on 61 with HOST [0][ 0.000] tsk1Fxn: created MessageQ: SLAVE_IPU1; QueueID: 0x20080 [0][ 0.000] Awaiting sync message from host...rg%rh%}ri%(hUhjc%ubaubh)rj%}rk%(hXIn the next section, we describe the kernel modifications necessary to allow it to connect to a remotecore already loaded by MLO.rl%hj#hj#hhh}rm%(h]h]h]h]h]uhKhhh]rn%hXIn the next section, we describe the kernel modifications necessary to allow it to connect to a remotecore already loaded by MLO.ro%rp%}rq%(hjl%hjj%ubaubh)rr%}rs%(hXEnabling Late attachrt%hj#hj#hhh}ru%(h]rv%Uenabling-late-attachrw%ah]h]h]h]rx%h8auhNhhh]ry%hXEnabling Late attachrz%r{%}r|%(hjt%hjr%ubaubh)r}%}r~%(hX-Loading the remotecores in the kernel is done via the ``remoteproc`` module. Each remotecore requires timers for OS tick and watchdog purposes and MMU's for mapping virtual addresses to physical addresses. The remoteproc module uses device tree determine the timers and mmu's used for each remotecore.hj#hj#hhh}r%(h]h]h]h]h]uhMhhh]r%(hX6Loading the remotecores in the kernel is done via the r%r%}r%(hX6Loading the remotecores in the kernel is done via the hj}%ubj )r%}r%(hX``remoteproc``h}r%(h]h]h]h]h]uhj}%h]r%hX remoteprocr%r%}r%(hUhj%ubahj ubhX module. Each remotecore requires timers for OS tick and watchdog purposes and MMU's for mapping virtual addresses to physical addresses. The remoteproc module uses device tree determine the timers and mmu's used for each remotecore.r%r%}r%(hX module. Each remotecore requires timers for OS tick and watchdog purposes and MMU's for mapping virtual addresses to physical addresses. The remoteproc module uses device tree determine the timers and mmu's used for each remotecore.hj}%ubeubh)r%}r%(hXThe device tree nodes for each of the cores are shown below. The allocation of timers to remotecores is from the file ``arch/arm/boot/dts/dra7-ipu-dsp-common.dtsi`` and ``arch/arm/boot/dts/dra74-ipu-dsp-common.dtsi`` in the kernel source tree.hj#hj#hhh}r%(h]h]h]h]h]uhM hhh]r%(hXvThe device tree nodes for each of the cores are shown below. The allocation of timers to remotecores is from the file r%r%}r%(hXvThe device tree nodes for each of the cores are shown below. The allocation of timers to remotecores is from the file hj%ubj )r%}r%(hX.``arch/arm/boot/dts/dra7-ipu-dsp-common.dtsi``h}r%(h]h]h]h]h]uhj%h]r%hX*arch/arm/boot/dts/dra7-ipu-dsp-common.dtsir%r%}r%(hUhj%ubahj ubhX and r%r%}r%(hX and hj%ubj )r%}r%(hX/``arch/arm/boot/dts/dra74-ipu-dsp-common.dtsi``h}r%(h]h]h]h]h]uhj%h]r%hX+arch/arm/boot/dts/dra74-ipu-dsp-common.dtsir%r%}r%(hUhj%ubahj ubhX in the kernel source tree.r%r%}r%(hX in the kernel source tree.hj%ubeubjB)r%}r%(hUhj#hj#hjEh}r%(h]h]h]h]h]uhNhhh]r%jH)r%}r%(hUh}r%(h]h]h]h]h]UcolsKuhj%h]r%(jM)r%}r%(hUh}r%(h]h]h]h]h]UcolwidthKuhj%h]hjQubjM)r%}r%(hUh}r%(h]h]h]h]h]UcolwidthKuhj%h]hjQubjM)r%}r%(hUh}r%(h]h]h]h]h]UcolwidthKuhj%h]hjQubjM)r%}r%(hUh}r%(h]h]h]h]h]UcolwidthKuhj%h]hjQubjM)r%}r%(hUh}r%(h]h]h]h]h]UcolwidthKuhj%h]hjQubjX)r%}r%(hUh}r%(h]h]h]h]h]uhj%h]r%j])r%}r%(hUh}r%(h]h]h]h]h]uhj%h]r%(jb)r%}r%(hUh}r%(h]h]h]h]h]uhj%h]r%h)r%}r%(hXCorer%hj%hj#hhh}r%(h]h]h]h]h]uhMh]r%hXCorer%r%}r%(hj%hj%ubaubahjoubjb)r%}r%(hUh}r%(h]h]h]h]h]uhj%h]r%h)r%}r%(hXRemotecore noder%hj%hj#hhh}r%(h]h]h]h]h]uhMh]r%hXRemotecore noder%r%}r%(hj%hj%ubaubahjoubjb)r%}r%(hUh}r%(h]h]h]h]h]uhj%h]r%h)r%}r%(hX OS timer noder%hj%hj#hhh}r%(h]h]h]h]h]uhMh]r%hX OS timer noder%r%}r%(hj%hj%ubaubahjoubjb)r%}r%(hUh}r%(h]h]h]h]h]uhj%h]r%h)r%}r%(hXWatch dog timer node(s)r%hj%hj#hhh}r%(h]h]h]h]h]uhMh]r%hXWatch dog timer node(s)r%r%}r%(hj%hj%ubaubahjoubjb)r%}r%(hUh}r%(h]h]h]h]h]uhj%h]r%h)r%}r%(hX MMU node(s)r%hj%hj#hhh}r%(h]h]h]h]h]uhMh]r&hX MMU node(s)r&r&}r&(hj%hj%ubaubahjoubehjubahjubj)r&}r&(hUh}r&(h]h]h]h]h]uhj%h]r&(j])r&}r &(hUh}r &(h]h]h]h]h]uhj&h]r &(jb)r &}r &(hUh}r&(h]h]h]h]h]uhj&h]r&h)r&}r&(hXIPU2r&hj &hj#hhh}r&(h]h]h]h]h]uhMh]r&hXIPU2r&r&}r&(hj&hj&ubaubahjoubjb)r&}r&(hUh}r&(h]h]h]h]h]uhj&h]r&h)r&}r&(hXipu2r&hj&hj#hhh}r&(h]h]h]h]h]uhMh]r &hXipu2r!&r"&}r#&(hj&hj&ubaubahjoubjb)r$&}r%&(hUh}r&&(h]h]h]h]h]uhj&h]r'&h)r(&}r)&(hXtimer3r*&hj$&hj#hhh}r+&(h]h]h]h]h]uhMh]r,&hXtimer3r-&r.&}r/&(hj*&hj(&ubaubahjoubjb)r0&}r1&(hUh}r2&(h]h]h]h]h]uhj&h]r3&h)r4&}r5&(hX timer4,timer9r6&hj0&hj#hhh}r7&(h]h]h]h]h]uhMh]r8&hX timer4,timer9r9&r:&}r;&(hj6&hj4&ubaubahjoubjb)r<&}r=&(hUh}r>&(h]h]h]h]h]uhj&h]r?&h)r@&}rA&(hX mmu\_ipu2hj<&hj#hhh}rB&(h]h]h]h]h]uhMh]rC&hXmmu_ipu2rD&rE&}rF&(hX mmu\_ipu2hj@&ubaubahjoubehjubj])rG&}rH&(hUh}rI&(h]h]h]h]h]uhj&h]rJ&(jb)rK&}rL&(hUh}rM&(h]h]h]h]h]uhjG&h]rN&h)rO&}rP&(hXIPU1rQ&hjK&hj#hhh}rR&(h]h]h]h]h]uhMh]rS&hXIPU1rT&rU&}rV&(hjQ&hjO&ubaubahjoubjb)rW&}rX&(hUh}rY&(h]h]h]h]h]uhjG&h]rZ&h)r[&}r\&(hXipu1r]&hjW&hj#hhh}r^&(h]h]h]h]h]uhMh]r_&hXipu1r`&ra&}rb&(hj]&hj[&ubaubahjoubjb)rc&}rd&(hUh}re&(h]h]h]h]h]uhjG&h]rf&h)rg&}rh&(hXtimer11ri&hjc&hj#hhh}rj&(h]h]h]h]h]uhMh]rk&hXtimer11rl&rm&}rn&(hji&hjg&ubaubahjoubjb)ro&}rp&(hUh}rq&(h]h]h]h]h]uhjG&h]rr&h)rs&}rt&(hX timer7,timer8ru&hjo&hj#hhh}rv&(h]h]h]h]h]uhMh]rw&hX timer7,timer8rx&ry&}rz&(hju&hjs&ubaubahjoubjb)r{&}r|&(hUh}r}&(h]h]h]h]h]uhjG&h]r~&h)r&}r&(hX mmu\_ipu1hj{&hj#hhh}r&(h]h]h]h]h]uhMh]r&hXmmu_ipu1r&r&}r&(hX mmu\_ipu1hj&ubaubahjoubehjubj])r&}r&(hUh}r&(h]h]h]h]h]uhj&h]r&(jb)r&}r&(hUh}r&(h]h]h]h]h]uhj&h]r&h)r&}r&(hXDSP2r&hj&hj#hhh}r&(h]h]h]h]h]uhMh]r&hXDSP2r&r&}r&(hj&hj&ubaubahjoubjb)r&}r&(hUh}r&(h]h]h]h]h]uhj&h]r&h)r&}r&(hXdsp2r&hj&hj#hhh}r&(h]h]h]h]h]uhMh]r&hXdsp2r&r&}r&(hj&hj&ubaubahjoubjb)r&}r&(hUh}r&(h]h]h]h]h]uhj&h]r&h)r&}r&(hXtimer6r&hj&hj#hhh}r&(h]h]h]h]h]uhMh]r&hXtimer6r&r&}r&(hj&hj&ubaubahjoubjb)r&}r&(hUh}r&(h]h]h]h]h]uhj&h]hjoubjb)r&}r&(hUh}r&(h]h]h]h]h]uhj&h]r&h)r&}r&(hXmmu0\_dsp2,mmu 1\_dsp2hj&hj#hhh}r&(h]h]h]h]h]uhMh]r&hXmmu0_dsp2,mmu 1_dsp2r&r&}r&(hXmmu0\_dsp2,mmu 1\_dsp2hj&ubaubahjoubehjubj])r&}r&(hUh}r&(h]h]h]h]h]uhj&h]r&(jb)r&}r&(hUh}r&(h]h]h]h]h]uhj&h]r&h)r&}r&(hXDSP1r&hj&hj#hhh}r&(h]h]h]h]h]uhMh]r&hXDSP1r&r&}r&(hj&hj&ubaubahjoubjb)r&}r&(hUh}r&(h]h]h]h]h]uhj&h]r&h)r&}r&(hXdsp1r&hj&hj#hhh}r&(h]h]h]h]h]uhMh]r&hXdsp1r&r&}r&(hj&hj&ubaubahjoubjb)r&}r&(hUh}r&(h]h]h]h]h]uhj&h]r&h)r&}r&(hXtimer5r&hj&hj#hhh}r&(h]h]h]h]h]uhMh]r&hXtimer5r&r&}r&(hj&hj&ubaubahjoubjb)r&}r&(hUh}r&(h]h]h]h]h]uhj&h]r&h)r&}r&(hXtimer10r&hj&hj#hhh}r&(h]h]h]h]h]uhMh]r&hXtimer10r&r&}r&(hj&hj&ubaubahjoubjb)r&}r&(hUh}r&(h]h]h]h]h]uhj&h]r&h)r&}r&(hXmmu0\_dsp1,mmu 1\_dsp1hj&hj#hhh}r&(h]h]h]h]h]uhMh]r&hXmmu0_dsp1,mmu 1_dsp1r&r&}r&(hXmmu0\_dsp1,mmu 1\_dsp1hj&ubaubahjoubehjubehjWubehjXubaubh)r&}r&(hXcDuring the normal boot flow, Linux kernel resets, idles and configures all functional blocks to reach a known initial state. This sequence of operations will terminate execution on a remotecore started by the boot loader. To prevent this from happening, the following attributes need to be set on **each** device tree node corresponding to the remotecore.hj#hj#hhh}r&(h]h]h]h]h]uhMhhh]r&(hX)During the normal boot flow, Linux kernel resets, idles and configures all functional blocks to reach a known initial state. This sequence of operations will terminate execution on a remotecore started by the boot loader. To prevent this from happening, the following attributes need to be set on r&r'}r'(hX)During the normal boot flow, Linux kernel resets, idles and configures all functional blocks to reach a known initial state. This sequence of operations will terminate execution on a remotecore started by the boot loader. To prevent this from happening, the following attributes need to be set on hj&ubj)r'}r'(hX**each**h}r'(h]h]h]h]h]uhj&h]r'hXeachr'r'}r'(hUhj'ubahjubhX2 device tree node corresponding to the remotecore.r 'r '}r '(hX2 device tree node corresponding to the remotecore.hj&ubeubj6)r '}r '(hUhj#hj#hj9h}r'(j;U.h]h]h]j<Uh]h]j=j>uhM$hhh]r'(j@)r'}r'(hX``ti,no-idle-on-init``r'hj 'hj#hjCh}r'(h]h]h]h]h]uhNhhh]r'h)r'}r'(hj'hj'hj#hhh}r'(h]h]h]h]h]uhM$h]r'j )r'}r'(hj'h}r'(h]h]h]h]h]uhj'h]r'hXti,no-idle-on-initr'r'}r'(hUhj'ubahj ubaubaubj@)r '}r!'(hX``ti,no-reset-on-init``. hj 'hj#hjCh}r"'(h]h]h]h]h]uhNhhh]r#'h)r$'}r%'(hX``ti,no-reset-on-init``.hj 'hj#hhh}r&'(h]h]h]h]h]uhM%h]r''(j )r('}r)'(hX``ti,no-reset-on-init``h}r*'(h]h]h]h]h]uhj$'h]r+'hXti,no-reset-on-initr,'r-'}r.'(hUhj('ubahj ubhX.r/'}r0'(hX.hj$'ubeubaubeubh)r1'}r2'(hXThese attributes together signal to the kernel that remotecore and other nodes have been configured and are in use before the kernel boot. These should not be reset or idled during kernel boot.r3'hj#hj#hhh}r4'(h]h]h]h]h]uhM'hhh]r5'hXThese attributes together signal to the kernel that remotecore and other nodes have been configured and are in use before the kernel boot. These should not be reset or idled during kernel boot.r6'r7'}r8'(hj3'hj1'ubaubj6)r9'}r:'(hUhj#hj#hj9h}r;'(j;U.h]h]h]j<Uh]h]j=j>uhM-hhh]r<'(j@)r='}r>'(hX``ti,no-idle-on-init``r?'hj9'hj#hjCh}r@'(h]h]h]h]h]uhNhhh]rA'h)rB'}rC'(hj?'hj='hj#hhh}rD'(h]h]h]h]h]uhM-h]rE'j )rF'}rG'(hj?'h}rH'(h]h]h]h]h]uhjB'h]rI'hXti,no-idle-on-initrJ'rK'}rL'(hUhjF'ubahj ubaubaubj@)rM'}rN'(hX``ti,no-reset-on-init``. hj9'hj#hjCh}rO'(h]h]h]h]h]uhNhhh]rP'h)rQ'}rR'(hX``ti,no-reset-on-init``.hjM'hj#hhh}rS'(h]h]h]h]h]uhM.h]rT'(j )rU'}rV'(hX``ti,no-reset-on-init``h}rW'(h]h]h]h]h]uhjQ'h]rX'hXti,no-reset-on-initrY'rZ'}r['(hUhjU'ubahj ubhX.r\'}r]'(hX.hjQ'ubeubaubeubh)r^'}r_'(hX%Refer dra7-ipu-common-early-boot.dtsir`'hj#hj#hhh}ra'(h]h]h]h]h]uhM0hhh]rb'hX%Refer dra7-ipu-common-early-boot.dtsirc'rd'}re'(hj`'hj^'ubaubh)rf'}rg'(hXAn example showing the device tree modifications necessary when late attaching to IPU1 are shown below. Please note that the attributes are set on the ``ipu1`` node as well as the timers and mmu nodes used by IPU1.hj#hj#hhh}rh'(h]h]h]h]h]uhM2hhh]ri'(hXAn example showing the device tree modifications necessary when late attaching to IPU1 are shown below. Please note that the attributes are set on the rj'rk'}rl'(hXAn example showing the device tree modifications necessary when late attaching to IPU1 are shown below. Please note that the attributes are set on the hjf'ubj )rm'}rn'(hX``ipu1``h}ro'(h]h]h]h]h]uhjf'h]rp'hXipu1rq'rr'}rs'(hUhjm'ubahj ubhX7 node as well as the timers and mmu nodes used by IPU1.rt'ru'}rv'(hX7 node as well as the timers and mmu nodes used by IPU1.hjf'ubeubj)rw'}rx'(hX9&ipu1 { ti,no-idle-on-init; ti,no-reset-on-init; }; &timer11 { ti,no-idle-on-init; ti,no-reset-on-init; }; &timer7 { ti,no-idle-on-init; ti,no-reset-on-init; }; &timer8 { ti,no-idle-on-init; ti,no-reset-on-init; }; &mmu_ipu1{ ti,no-idle-on-init; ti,no-reset-on-init; };hj#hj#hjh}ry'(hhh]h]h]h]h]uhM hhh]rz'hX9&ipu1 { ti,no-idle-on-init; ti,no-reset-on-init; }; &timer11 { ti,no-idle-on-init; ti,no-reset-on-init; }; &timer7 { ti,no-idle-on-init; ti,no-reset-on-init; }; &timer8 { ti,no-idle-on-init; ti,no-reset-on-init; }; &mmu_ipu1{ ti,no-idle-on-init; ti,no-reset-on-init; };r{'r|'}r}'(hUhjw'ubaubh)r~'}r'(hXDebugging Late Attachr'hj#hj#hhh}r'(h]r'Udebugging-late-attachr'ah]h]h]h]r'hWauhNhhh]r'hXDebugging Late Attachr'r'}r'(hj'hj~'ubaubj6)r'}r'(hUhj#hj#hj9h}r'(j;U.h]h]h]j<Uh]h]j=j>uhMWhhh]r'(j@)r'}r'(hXEnsure that both the late attach attributes are set on the device tree nodes corresponding to the remotecore node being loaded from the boot loader. Otherwise the kernel will reset and reload the remotecore as in the normal boot flow.hj'hj#hjCh}r'(h]h]h]h]h]uhNhhh]r'h)r'}r'(hXEnsure that both the late attach attributes are set on the device tree nodes corresponding to the remotecore node being loaded from the boot loader. Otherwise the kernel will reset and reload the remotecore as in the normal boot flow.r'hj'hj#hhh}r'(h]h]h]h]h]uhMWh]r'hXEnsure that both the late attach attributes are set on the device tree nodes corresponding to the remotecore node being loaded from the boot loader. Otherwise the kernel will reset and reload the remotecore as in the normal boot flow.r'r'}r'(hj'hj'ubaubaubj@)r'}r'(hX*Ensure that both the late attach attributes are set **only** on the device tree nodes corresponding to the remotecore node being loaded from the boot loader. Otherwise the kernel will try to communicate with a remotecore that is not loaded and run into an error or a crash in a worst case scenario.hj'hj#hjCh}r'(h]h]h]h]h]uhNhhh]r'h)r'}r'(hX*Ensure that both the late attach attributes are set **only** on the device tree nodes corresponding to the remotecore node being loaded from the boot loader. Otherwise the kernel will try to communicate with a remotecore that is not loaded and run into an error or a crash in a worst case scenario.hj'hj#hhh}r'(h]h]h]h]h]uhM[h]r'(hX4Ensure that both the late attach attributes are set r'r'}r'(hX4Ensure that both the late attach attributes are set hj'ubj)r'}r'(hX**only**h}r'(h]h]h]h]h]uhj'h]r'hXonlyr'r'}r'(hUhj'ubahjubhX on the device tree nodes corresponding to the remotecore node being loaded from the boot loader. Otherwise the kernel will try to communicate with a remotecore that is not loaded and run into an error or a crash in a worst case scenario.r'r'}r'(hX on the device tree nodes corresponding to the remotecore node being loaded from the boot loader. Otherwise the kernel will try to communicate with a remotecore that is not loaded and run into an error or a crash in a worst case scenario.hj'ubeubaubj@)r'}r'(hXEnsure that the peripherals accessed by the remotecore are not being handled by the kernel. This can be accomplished by removing the corresponding nodes from the device tree. hj'hj#hjCh}r'(h]h]h]h]h]uhNhhh]r'h)r'}r'(hXEnsure that the peripherals accessed by the remotecore are not being handled by the kernel. This can be accomplished by removing the corresponding nodes from the device tree.r'hj'hj#hhh}r'(h]h]h]h]h]uhM`h]r'hXEnsure that the peripherals accessed by the remotecore are not being handled by the kernel. This can be accomplished by removing the corresponding nodes from the device tree.r'r'}r'(hj'hj'ubaubaubeubh)r'}r'(hUhj#hj#hjh}r'(h]h]h]h]h]uhMdhhh]r'j)r'}r'(hUjKhj'hj#hhh}r'(h]h]h]h]h]uhKhhh]ubaubeubh)r'}r'(hUhhhhhhh}r'(h]h]h]h]r'Uipc-for-am65xxr'ah]r'h+auhKhhh]r'(h)r'}r'(hXIPC for AM65xxr'hj'hhhhh}r'(h]h]h]h]h]uhKhhh]r'hXIPC for AM65xxr'r'}r'(hj'hj'ubaubh)r'}r'(hX Introductionr'hj'hhX?source/linux/Foundational_Components/IPC/IPC_for_AM65xx.rst.incr'r'}r'bhhh}r'(h]r'U introduction-linux-ipc-on-am65xxr'ah]h]h]h]r'hauhNhhh]r'hX Introductionr'r'}r'(hj'hj'ubaubh)r'}r'(hXThe AM65xx device has an MCU subsystem in addition to the Cortex-A53 cores. The MCU subsystem consists of 2 Cortex-R5F cores which can work as seperate cores or in lock-step mode.r'hj'hj'hhh}r'(h]h]h]h]h]uhKhhh]r'hXThe AM65xx device has an MCU subsystem in addition to the Cortex-A53 cores. The MCU subsystem consists of 2 Cortex-R5F cores which can work as seperate cores or in lock-step mode.r'r'}r'(hj'hj'ubaubh)r'}r'(hXThis article is geared toward AM65xx users that are running Linux on the Cortex A53 core. The goal is to help users understand how to establish communication with the R5F cores.r'hj'hj'hhh}r'(h]h]h]h]h]uhKhhh]r'hXThis article is geared toward AM65xx users that are running Linux on the Cortex A53 core. The goal is to help users understand how to establish communication with the R5F cores.r'r'}r'(hj'hj'ubaubh)r'}r'(hXThere are many facets to this task: building, loading, debugging, memory sharing, etc. This article intends to take incremental steps toward understanding all of those pieces.r'hj'hj'hhh}r'(h]h]h]h]h]uhK hhh]r'hXThere are many facets to this task: building, loading, debugging, memory sharing, etc. This article intends to take incremental steps toward understanding all of those pieces.r'r'}r'(hj'hj'ubaubh)r'}r'(hX$Software Dependencies to Get Startedr'hj'hj'hhh}r'(h]r'U/ipc-am65xx-software-dependencies-to-get-startedr'ah]h]h]h]r'hOauhNhhh]r'hX$Software Dependencies to Get Startedr'r'}r((hj'hj'ubaubh)r(}r((hX Prerequisitesr(hj'hj'hhh}r((h]h]h]h]h]uhKhhh]r(hX Prerequisitesr(r(}r((hj(hj(ubaubj)r (}r ((hUhj'hj'hj!h}r ((j#X-h]h]h]h]h]uhKhhh]r ((j@)r (}r((hX`Processor SDK Linux for AM65xx `__ (Version 5.1 or newer needed)hj (hj'hjCh}r((h]h]h]h]h]uhNhhh]r(h)r(}r((hX`Processor SDK Linux for AM65xx `__ (Version 5.1 or newer needed)hj (hj'hhh}r((h]h]h]h]h]uhKh]r((j))r(}r((hXr`Processor SDK Linux for AM65xx `__h}r((UnameXProcessor SDK Linux for AM65xxj-XMhttp://software-dl.ti.com/processor-sdk-linux/esd/AM65X/latest/index_FDS.htmlh]h]h]h]h]uhj(h]r(hXProcessor SDK Linux for AM65xxr(r(}r((hUhj(ubahj2ubhX (Version 5.1 or newer needed)r(r(}r((hX (Version 5.1 or newer needed)hj(ubeubaubj@)r(}r ((hXp`Processor SDK RTOS for AM65xx `__hj (hj'hjCh}r!((h]h]h]h]h]uhNhhh]r"(h)r#(}r$((hXp`Processor SDK RTOS for AM65xx `__r%(hj(hj'hhh}r&((h]h]h]h]h]uhKh]r'(j))r((}r)((hj%(h}r*((UnameXProcessor SDK RTOS for AM65xxj-XLhttp://software-dl.ti.com/processor-sdk-rtos/esd/AM65X/latest/index_FDS.htmlh]h]h]h]h]uhj#(h]r+(hXProcessor SDK RTOS for AM65xxr,(r-(}r.((hUhj((ubahj2ubaubaubj@)r/(}r0((hX`Code Composer Studio `__ (choose version as specified on Proc SDK download page) hj (hj'hjCh}r1((h]h]h]h]h]uhNhhh]r2(h)r3(}r4((hX`Code Composer Studio `__ (choose version as specified on Proc SDK download page)hj/(hj'hhh}r5((h]h]h]h]h]uhKh]r6((j))r7(}r8((hXO`Code Composer Studio `__h}r9((UnameXCode Composer Studioj-X4http://processors.wiki.ti.com/index.php/Download_CCSh]h]h]h]h]uhj3(h]r:(hXCode Composer Studior;(r<(}r=((hUhj7(ubahj2ubhX8 (choose version as specified on Proc SDK download page)r>(r?(}r@((hX8 (choose version as specified on Proc SDK download page)hj3(ubeubaubeubj)rA(}rB((hX[Please be sure that you have the same version number for both Processor SDK RTOS and Linux.hj'hj'hjh}rC((h]h]h]h]h]uhNhhh]rD(h)rE(}rF((hX[Please be sure that you have the same version number for both Processor SDK RTOS and Linux.rG(hjA(hj'hhh}rH((h]h]h]h]h]uhKh]rI(hX[Please be sure that you have the same version number for both Processor SDK RTOS and Linux.rJ(rK(}rL((hjG(hjE(ubaubaubh)rM(}rN((hXdFor reference within the context of this page, the Linux SDK is installed at the following location:rO(hj'hj'hhh}rP((h]h]h]h]h]uhKhhh]rQ(hXdFor reference within the context of this page, the Linux SDK is installed at the following location:rR(rS(}rT((hjO(hjM(ubaubj)rU(}rV((hX/mnt/data/user/ti-processor-sdk-linux-am65xx-evm-xx.xx.xx.xx ├── bin ├── board-support ├── docs ├── example-applications ├── filesystem ├── ipc-build.txt ├── linux-devkit ├── Makefile ├── Rules.make └── setup.shhj'hj'hjh}rW((hhh]h]h]h]h]uhM? hhh]rX(hX/mnt/data/user/ti-processor-sdk-linux-am65xx-evm-xx.xx.xx.xx ├── bin ├── board-support ├── docs ├── example-applications ├── filesystem ├── ipc-build.txt ├── linux-devkit ├── Makefile ├── Rules.make └── setup.shrY(rZ(}r[((hUhjU(ubaubh)r\(}r]((hXThe RTOS SDK is installed at:r^(hj'hj'hhh}r_((h]h]h]h]h]uhK0hhh]r`(hXThe RTOS SDK is installed at:ra(rb(}rc((hj^(hj\(ubaubj)rd(}re((hX/mnt/data/user/my_custom_install_sdk_rtos_am65xx_xx.xx ├── bios_6_xx_xx_xx ├── cg_xml ├── ctoolslib_x_x_x_x ├── framework_components_x_xx_xx_xx ├── gcc-linaro--x86_64_aarch64-elf ├── ipc_3_xx_xx_xx ├── ndk_3_xx_xx_xx ├── ns_2_xx_xx_xx ├── pdk_am65xx_x_x_x ├── processor_sdk_rtos_am65xx_x_xx_xx_xx ├── uia_2_xx_xx_xx ├── xdais_7_xx_xx_xx ├── xdctools_3_xx_xx_xxhj'hj'hjh}rf((hhh]h]h]h]h]uhMO hhh]rg(hX/mnt/data/user/my_custom_install_sdk_rtos_am65xx_xx.xx ├── bios_6_xx_xx_xx ├── cg_xml ├── ctoolslib_x_x_x_x ├── framework_components_x_xx_xx_xx ├── gcc-linaro--x86_64_aarch64-elf ├── ipc_3_xx_xx_xx ├── ndk_3_xx_xx_xx ├── ns_2_xx_xx_xx ├── pdk_am65xx_x_x_x ├── processor_sdk_rtos_am65xx_x_xx_xx_xx ├── uia_2_xx_xx_xx ├── xdais_7_xx_xx_xx ├── xdctools_3_xx_xx_xxrh(ri(}rj((hUhjd(ubaubh)rk(}rl((hUhj'hj'hjh}rm((h]h]h]h]h]uhKChhh]rn(j)ro(}rp((hUjKhjk(hj'hhh}rq((h]h]h]h]h]uhKhhh]ubaubh)rr(}rs((hX/Typical Boot Flow on AM65xx for ARM Linux usersrt(hj'hj'hhh}ru((h]rv(U/typical-boot-flow-on-am65xx-for-arm-linux-usersrw(ah]h]h]h]rx(hvauhNhhh]ry(hX/Typical Boot Flow on AM65xx for ARM Linux usersrz(r{(}r|((hjt(hjr(ubaubh)r}(}r~((hXAM65xx SOC's have multiple processor cores - Cortex A53, ARM R5F cores. The A53 typically runs a HLOS like Linux/Android and the remote cores (R5Fs) run TI-RTOS. In the normal operation, boot loader(U-Boot/SPL) boots and loads the A53 with the HLOS. The A53 boots the R5 cores.r(hj'hj'hhh}r((h]h]h]h]h]uhKHhhh]r(hXAM65xx SOC's have multiple processor cores - Cortex A53, ARM R5F cores. The A53 typically runs a HLOS like Linux/Android and the remote cores (R5Fs) run TI-RTOS. In the normal operation, boot loader(U-Boot/SPL) boots and loads the A53 with the HLOS. The A53 boots the R5 cores.r(r(}r((hj(hj}(ubaubjr)r(}r((hX).. Image:: ../images/Normal-boot-a53.png hj'hj'hjyh}r((UuriX#linux/../images/Normal-boot-a53.pngr(h]h]h]h]jw}r(U*j(sh]uhKMhhh]ubh)r(}r((hXIn this sequence, the interval between the Power on Reset and the remote cores (i.e. the R5Fs) executing is dependent on the HLOS initialization time.r(hj'hj'hhh}r((h]h]h]h]h]uhKNhhh]r(hXIn this sequence, the interval between the Power on Reset and the remote cores (i.e. the R5Fs) executing is dependent on the HLOS initialization time.r(r(}r((hj(hj(ubaubh)r(}r((hUhj'hj'hjh}r((h]h]h]h]h]uhKRhhh]r(j)r(}r((hUjKhj(hj'hhh}r((h]h]h]h]h]uhKhhh]ubaubh)r(}r((hX'Getting Started with IPC Linux Examplesr(hj'hj'hhh}r((h]r(U2ipc-am65xx-getting-started-with-ipc-linux-examplesr(ah]h]h]h]r(h6auhNhhh]r(hX'Getting Started with IPC Linux Examplesr(r(}r((hj(hj(ubaubh)r(}r((hXThe figure below illustrates how remoteproc/rpmsg driver from ARM Linux kernel communicates with IPC driver on slave processor (e.g. R5F) running RTOS.r(hj'hj'hhh}r((h]h]h]h]h]uhKWhhh]r(hXThe figure below illustrates how remoteproc/rpmsg driver from ARM Linux kernel communicates with IPC driver on slave processor (e.g. R5F) running RTOS.r(r(}r((hj(hj(ubaubjr)r(}r((hX2.. Image:: ../images/LinuxIPC_with_RTOS_Slave.png hj'hj'hjyh}r((UuriX,linux/../images/LinuxIPC_with_RTOS_Slave.pngr(h]h]h]h]jw}r(U*j(sh]uhK[hhh]ubh)r(}r((hXIn order to setup IPC on slave cores, we provide some pre-built examples in IPC package that can be run from ARM Linux. The subsequent sections describe how to build and run this examples and use that as a starting point for this effort.r(hj'hj'hhh}r((h]h]h]h]h]uhK\hhh]r(hXIn order to setup IPC on slave cores, we provide some pre-built examples in IPC package that can be run from ARM Linux. The subsequent sections describe how to build and run this examples and use that as a starting point for this effort.r(r(}r((hj(hj(ubaubh)r(}r((hX!Building the Bundled IPC Examplesr(hj'hj'hhh}r((h]r(U,ipc-am65xx-building-the-bundled-ipc-examplesr(ah]h]h]h]r(hUauhNhhh]r(hX!Building the Bundled IPC Examplesr(r(}r((hj(hj(ubaubh)r(}r((hXThe instructions to build IPC examples found under ipc\_3\_xx\_xx\_xx/examples/AM65XX\_linux\_elf have been provided in the `Processor SDK IPC Quick Start Guide `__.hj'hj'hhh}r((h]h]h]h]h]uhKdhhh]r((hXvThe instructions to build IPC examples found under ipc_3_xx_xx_xx/examples/AM65XX_linux_elf have been provided in the r(r(}r((hX|The instructions to build IPC examples found under ipc\_3\_xx\_xx\_xx/examples/AM65XX\_linux\_elf have been provided in the hj(ubj))r(}r((hXc`Processor SDK IPC Quick Start Guide `__h}r((UnameX#Processor SDK IPC Quick Start Guidej-X9Foundational_Components_IPC.html#build-ipc-linux-examplesh]h]h]h]h]uhj(h]r(hX#Processor SDK IPC Quick Start Guider(r(}r((hUhj(ubahj2ubhX.r(}r((hX.hj(ubeubh)r(}r((hXLet's focus on one example in particular, ex02\_messageq, which is located at **/ipc\_3\_xx\_xx\_xx/examples/AM65XX\_linux\_elf/ex02\_messageq**. Here are the key files that you should see after a successful build:hj'hj'hhh}r((h]h]h]h]h]uhKhhhh]r((hXMLet's focus on one example in particular, ex02_messageq, which is located at r(r(}r((hXNLet's focus on one example in particular, ex02\_messageq, which is located at hj(ubj)r(}r((hXX**/ipc\_3\_xx\_xx\_xx/examples/AM65XX\_linux\_elf/ex02\_messageq**h}r((h]h]h]h]h]uhj(h]r(hXM/ipc_3_xx_xx_xx/examples/AM65XX_linux_elf/ex02_messageqr(r(}r((hUhj(ubahjubhXF. Here are the key files that you should see after a successful build:r(r(}r((hXF. Here are the key files that you should see after a successful build:hj(ubeubj)r(}r((hX.├── r5f-0 │   └── bin │      ├── debug │      │   └── server_r5f-0.xer5f │      └── release │      │   └── server_r5f-0.xer5f ├── r5f-1 │   └── bin │      ├── debug │      │   └── server_r5f-1.xer5f │      └── release │      │   └── server_r5f-1.xer5f ├── host │      ├── debug │      │   └── app_host │      └── release │      └── app_hosthj'hj'hjh}r((hhh]h]h]h]h]uhM hhh]r(hX.├── r5f-0 │   └── bin │      ├── debug │      │   └── server_r5f-0.xer5f │      └── release │      │   └── server_r5f-0.xer5f ├── r5f-1 │   └── bin │      ├── debug │      │   └── server_r5f-1.xer5f │      └── release │      │   └── server_r5f-1.xer5f ├── host │      ├── debug │      │   └── app_host │      └── release │      └── app_hostr(r(}r((hUhj(ubaubh)r(}r((hUhj'hj'hjh}r((h]h]h]h]h]uhKhhh]r(j)r(}r((hUjKhj(hj'hhh}r((h]h]h]h]h]uhKhhh]ubaubh)r(}r((hX Running the Bundled IPC Examplesr(hj'hj'hhh}r((h]r(U+ipc-am65xx-running-the-bundled-ipc-examplesr(ah]h]h]h]r(h5auhNhhh]r(hX Running the Bundled IPC Examplesr(r(}r((hj(hj(ubaubh)r(}r((hX;On the target, let's create a directory called ipc-starter:r)hj'hj'hhh}r)(h]h]h]h]h]uhKhhh]r)hX;On the target, let's create a directory called ipc-starter:r)r)}r)(hj)hj(ubaubj)r)}r)(hX`root@am65xx-evm:~# mkdir -p /home/root/ipc-starter root@am65xx-evm:~# cd /home/root/ipc-starter/hj'hj'hjh}r)(hhh]h]h]h]h]uhM hhh]r )hX`root@am65xx-evm:~# mkdir -p /home/root/ipc-starter root@am65xx-evm:~# cd /home/root/ipc-starter/r )r )}r )(hUhj)ubaubh)r )}r)(hXYou will need to copy the ex02\_messageq directory of your host PC to that directory on the target (through SD card, NFS export, SCP, etc.). You can copy the entire directory, though we're primarily interested in these files:hj'hj'hhh}r)(h]h]h]h]h]uhKhhh]r)hXYou will need to copy the ex02_messageq directory of your host PC to that directory on the target (through SD card, NFS export, SCP, etc.). You can copy the entire directory, though we're primarily interested in these files:r)r)}r)(hXYou will need to copy the ex02\_messageq directory of your host PC to that directory on the target (through SD card, NFS export, SCP, etc.). You can copy the entire directory, though we're primarily interested in these files:hj )ubaubj)r)}r)(hUhj'hj'hj!h}r)(j#X-h]h]h]h]h]uhKhhh]r)(j@)r)}r)(hX"r5f-0/bin/debug/server_r5f-0.xer5fr)hj)hj'hjCh}r)(h]h]h]h]h]uhNhhh]r)h)r)}r)(hj)hj)hj'hhh}r)(h]h]h]h]h]uhKh]r )hX"r5f-0/bin/debug/server_r5f-0.xer5fr!)r")}r#)(hj)hj)ubaubaubj@)r$)}r%)(hX"r5f-1/bin/debug/server_r5f-1.xer5fr&)hj)hj'hjCh}r')(h]h]h]h]h]uhNhhh]r()h)r))}r*)(hj&)hj$)hj'hhh}r+)(h]h]h]h]h]uhKh]r,)hX"r5f-1/bin/debug/server_r5f-1.xer5fr-)r.)}r/)(hj&)hj))ubaubaubj@)r0)}r1)(hXhost/bin/debug/app\_host hj)hj'hjCh}r2)(h]h]h]h]h]uhNhhh]r3)h)r4)}r5)(hXhost/bin/debug/app\_hosthj0)hj'hhh}r6)(h]h]h]h]h]uhKh]r7)hXhost/bin/debug/app_hostr8)r9)}r:)(hXhost/bin/debug/app\_hosthj4)ubaubaubeubh)r;)}r<)(hX{The remoteproc driver is hard-coded to look for specific files when loading the R5F cores. Here are the files it looks for:r=)hj'hj'hhh}r>)(h]h]h]h]h]uhKhhh]r?)hX{The remoteproc driver is hard-coded to look for specific files when loading the R5F cores. Here are the files it looks for:r@)rA)}rB)(hj=)hj;)ubaubj)rC)}rD)(hUhj'hj'hj!h}rE)(j#X-h]h]h]h]h]uhKhhh]rF)j@)rG)}rH)(hX"/lib/firmware/am65x-mcu-r5f0_0-fw hjC)hj'hjCh}rI)(h]h]h]h]h]uhNhhh]rJ)h)rK)}rL)(hX!/lib/firmware/am65x-mcu-r5f0_0-fwrM)hjG)hj'hhh}rN)(h]h]h]h]h]uhKh]rO)hX!/lib/firmware/am65x-mcu-r5f0_0-fwrP)rQ)}rR)(hjM)hjK)ubaubaubaubh)rS)}rT)(hX{These are generally a soft link to the intended executable. So for example, let's update the r5f0 executable on the target:rU)hj'hj'hhh}rV)(h]h]h]h]h]uhKhhh]rW)hX{These are generally a soft link to the intended executable. So for example, let's update the r5f0 executable on the target:rX)rY)}rZ)(hjU)hjS)ubaubj)r[)}r\)(hXroot@am65xx-evm:~# cd /lib/firmware/ root@am65xx-evm:/lib/firmware# ln -sf /home/root/ipc-starter/ex02_messageq/r5f-0/bin/debug/server_r5f-0.xer5f am65x-mcu-r5f0_0-fwhj'hj'hjh}r])(hhh]h]h]h]h]uhM hhh]r^)hXroot@am65xx-evm:~# cd /lib/firmware/ root@am65xx-evm:/lib/firmware# ln -sf /home/root/ipc-starter/ex02_messageq/r5f-0/bin/debug/server_r5f-0.xer5f am65x-mcu-r5f0_0-fwr_)r`)}ra)(hUhj[)ubaubh)rb)}rc)(hXHTo reload R5F0 with this new executable, we perform the following steps:rd)hj'hj'hhh}re)(h]h]h]h]h]uhKhhh]rf)hXHTo reload R5F0 with this new executable, we perform the following steps:rg)rh)}ri)(hjd)hjb)ubaubh)rj)}rk)(hXMFirst identify the remotproc node associated with R5F0. This can be done by::rl)hj'hj'hhh}rm)(h]h]h]h]h]uhKhhh]rn)hXLFirst identify the remotproc node associated with R5F0. This can be done by:ro)rp)}rq)(hXLFirst identify the remotproc node associated with R5F0. This can be done by:hjj)ubaubj)rr)}rs)(hXJroot@am65xx-evm:/lib/firmware# grep -Isr r5f /sys/kernel/debug/remoteproc/hj'hj'hjh}rt)(hhh]h]h]h]h]uhM hhh]ru)hXJroot@am65xx-evm:/lib/firmware# grep -Isr r5f /sys/kernel/debug/remoteproc/rv)rw)}rx)(hUhjr)ubaubh)ry)}rz)(hXThis will display for example::r{)hj'hj'hhh}r|)(h]h]h]h]h]uhKhhh]r})hXThis will display for example:r~)r)}r)(hXThis will display for example:hjy)ubaubj)r)}r)(hX/sys/kernel/debug/remoteproc/remoteproc8/resource_table: Name trace:r5f0 /sys/kernel/debug/remoteproc/remoteproc8/name:41000000.r5fhj'hj'hjh}r)(hhh]h]h]h]h]uhM hhh]r)hX/sys/kernel/debug/remoteproc/remoteproc8/resource_table: Name trace:r5f0 /sys/kernel/debug/remoteproc/remoteproc8/name:41000000.r5fr)r)}r)(hUhj)ubaubh)r)}r)(hXnthen remoteproc8 is the node for the r5f core. ( Note the remoteprocx can change to for example remoteproc4)::r)hj'hj'hhh}r)(h]h]h]h]h]uhKhhh]r)hXmthen remoteproc8 is the node for the r5f core. ( Note the remoteprocx can change to for example remoteproc4):r)r)}r)(hXmthen remoteproc8 is the node for the r5f core. ( Note the remoteprocx can change to for example remoteproc4):hj)ubaubj)r)}r)(hXroot@am65xx-evm:~# echo stop > /sys/class/remoteproc/remoteproc4/state [ 6663.636529] remoteproc remoteproc4: stopped remote processor 41000000.r5f root@am65xx-evm:~# echo start > /sys/class/remoteproc/remoteproc4/state [ 6767.681165] remoteproc remoteproc4: powering up 41000000.r5f [ 6767.803683] remoteproc remoteproc4: Booting fw image am65x-mcu-r5f0_0-fw, size 3590160 [ 6767.812558] platform 41000000.r5f: booting R5F core using boot addr = 0x0 [ 6767.821345] virtio_rpmsg_bus virtio0: rpmsg host is online [ 6767.827147] remoteproc remoteproc4: registered virtio0 (type 7) [ 6767.834776] remoteproc remoteproc4: remote processor 41000000.r5f is now up root@am65xx-evm:~# [ 6767.848838] virtio_rpmsg_bus virtio0: creating channel rpmsg-proto addr 0x3dhj'hj'hjh}r)(hhh]h]h]h]h]uhM hhh]r)hXroot@am65xx-evm:~# echo stop > /sys/class/remoteproc/remoteproc4/state [ 6663.636529] remoteproc remoteproc4: stopped remote processor 41000000.r5f root@am65xx-evm:~# echo start > /sys/class/remoteproc/remoteproc4/state [ 6767.681165] remoteproc remoteproc4: powering up 41000000.r5f [ 6767.803683] remoteproc remoteproc4: Booting fw image am65x-mcu-r5f0_0-fw, size 3590160 [ 6767.812558] platform 41000000.r5f: booting R5F core using boot addr = 0x0 [ 6767.821345] virtio_rpmsg_bus virtio0: rpmsg host is online [ 6767.827147] remoteproc remoteproc4: registered virtio0 (type 7) [ 6767.834776] remoteproc remoteproc4: remote processor 41000000.r5f is now up root@am65xx-evm:~# [ 6767.848838] virtio_rpmsg_bus virtio0: creating channel rpmsg-proto addr 0x3dr)r)}r)(hUhj)ubaubh)r)}r)(hXMore info related to loading firmware to the various cores can be found `here `__.hj'hj'hhh}r)(h]h]h]h]h]uhKhhh]r)(hXHMore info related to loading firmware to the various cores can be found r)r)}r)(hXHMore info related to loading firmware to the various cores can be found hj)ubj))r)}r)(hXW`here `__h}r)(UnameXherej-XLFoundational_Components_Multimedia_IVAHD.html#firmware-loading-and-unloadingh]h]h]h]h]uhj)h]r)hXherer)r)}r)(hUhj)ubahj2ubhX.r)}r)(hX.hj)ubeubh)r)}r)(hX,Finally, we can run the example on R5 core::r)hj'hj'hhh}r)(h]h]h]h]h]uhKhhh]r)hX+Finally, we can run the example on R5 core:r)r)}r)(hX+Finally, we can run the example on R5 core:hj)ubaubj)r)}r)(hXroot@am65xx-evm:~# ./app_host R5F-0 --> main: --> Main_main: --> App_create: App_create: Host is ready <-- App_create: --> App_exec: App_exec: sending message 1 App_exec: sending message 2 App_exec: sending message 3 App_exec: message received, sending message 4 App_exec: message received, sending message 5 App_exec: message received, sending message 6 App_exec: message received, sending message 7 App_exec: message received, sending message 8 App_exec: message received, sending message 9 App_exec: message received, sending message 10 App_exec: message received, sending message 11 App_exec: message received, sending message 12 App_exec: message received, sending message 13 App_exec: message received, sending message 14 App_exec: message received, sending message 15 App_exec: message received App_exec: message received App_exec: message received <-- App_exec: 0 --> App_delete: <-- App_delete: <-- Main_main: <-- main: root@am65xx-evm:~#hj'hj'hjh}r)(hhh]h]h]h]h]uhM hhh]r)hXroot@am65xx-evm:~# ./app_host R5F-0 --> main: --> Main_main: --> App_create: App_create: Host is ready <-- App_create: --> App_exec: App_exec: sending message 1 App_exec: sending message 2 App_exec: sending message 3 App_exec: message received, sending message 4 App_exec: message received, sending message 5 App_exec: message received, sending message 6 App_exec: message received, sending message 7 App_exec: message received, sending message 8 App_exec: message received, sending message 9 App_exec: message received, sending message 10 App_exec: message received, sending message 11 App_exec: message received, sending message 12 App_exec: message received, sending message 13 App_exec: message received, sending message 14 App_exec: message received, sending message 15 App_exec: message received App_exec: message received App_exec: message received <-- App_exec: 0 --> App_delete: <-- App_delete: <-- Main_main: <-- main: root@am65xx-evm:~#r)r)}r)(hUhj)ubaubh)r)}r)(hXUnderstanding the Memory Mapr)hj'hj'hhh}r)(h]r)U'ipc-am65xx-understanding-the-memory-mapr)ah]h]h]h]r)htauhNhhh]r)hXUnderstanding the Memory Mapr)r)}r)(hj)hj)ubaubh)r)}r)(hXOverall Linux Memory Mapr)hj'hj'hhh}r)(h]r)U#ipc-am65xx-overall-linux-memory-mapr)ah]h]h]h]r)hsauhNhhh]r)hXOverall Linux Memory Mapr)r)}r)(hj)hj)ubaubj)r)}r)(hX=root@am65xx-evm:~# cat /proc/iomem [snip...] 80000000-9affffff : System RAM 80080000-80b2ffff : Kernel code 80bb0000-80d9ffff : Kernel data 9c800000-9e7fffff : System RAM a0000000-ffffffff : System RAM 400000000-4ffffffff : /soc0/fss@47000000/ospi@47040000 880000000-8ffffffff : System RAMhj'hj'hjh}r)(hhh]h]h]h]h]uhM hhh]r)hX=root@am65xx-evm:~# cat /proc/iomem [snip...] 80000000-9affffff : System RAM 80080000-80b2ffff : Kernel code 80bb0000-80d9ffff : Kernel data 9c800000-9e7fffff : System RAM a0000000-ffffffff : System RAM 400000000-4ffffffff : /soc0/fss@47000000/ospi@47040000 880000000-8ffffffff : System RAMr)r)}r)(hUhj)ubaubh)r)}r)(hUhj'hj'hjh}r)(h]h]h]h]h]uhKhhh]r)j)r)}r)(hUjKhj)hj'hhh}r)(h]h]h]h]h]uhKhhh]ubaubh)r)}r)(hXDMA memory Carveoutsr)hj'hj'hhh}r)(h]r)Udma-memory-carveoutsr)ah]h]h]h]r)hMauhNhhh]r)hXDMA memory Carveoutsr)r)}r)(hj)hj)ubaubj)r)}r)(hXroot@am65xx-evm:~# dmesg | grep "Reserved memory" [ 0.000000] Reserved memory: created DMA memory pool at 0x000000009b000000, size 16 MiB [ 0.000000] Reserved memory: created DMA memory pool at 0x000000009c000000, size 8 MiBhj'hj'hjh}r)(hhh]h]h]h]h]uhM hhh]r)hXroot@am65xx-evm:~# dmesg | grep "Reserved memory" [ 0.000000] Reserved memory: created DMA memory pool at 0x000000009b000000, size 16 MiB [ 0.000000] Reserved memory: created DMA memory pool at 0x000000009c000000, size 8 MiBr)r)}r)(hUhj)ubaubh)r)}r)(hXPFrom the output above, we can derive the location and size of each DMA carveout:r)hj'hj'hhh}r)(h]h]h]h]h]uhMhhh]r)hXPFrom the output above, we can derive the location and size of each DMA carveout:r)r)}r)(hj)hj)ubaubjB)r)}r)(hUhj'hj'hjEh}r)(h]h]h]h]h]uhNhhh]r)jH)r)}r)(hUh}r)(h]h]h]h]h]UcolsKuhj)h]r)(jM)r)}r)(hUh}r)(h]h]h]h]h]UcolwidthKuhj)h]hjQubjM)r)}r*(hUh}r*(h]h]h]h]h]UcolwidthKuhj)h]hjQubjM)r*}r*(hUh}r*(h]h]h]h]h]UcolwidthK uhj)h]hjQubjX)r*}r*(hUh}r*(h]h]h]h]h]uhj)h]r*j])r *}r *(hUh}r *(h]h]h]h]h]uhj*h]r *(jb)r *}r*(hUh}r*(h]h]h]h]h]uhj *h]r*h)r*}r*(hXMemory Sectionr*hj *hj'hhh}r*(h]h]h]h]h]uhMh]r*hXMemory Sectionr*r*}r*(hj*hj*ubaubahjoubjb)r*}r*(hUh}r*(h]h]h]h]h]uhj *h]r*h)r*}r*(hXPhysical Addressr*hj*hj'hhh}r *(h]h]h]h]h]uhMh]r!*hXPhysical Addressr"*r#*}r$*(hj*hj*ubaubahjoubjb)r%*}r&*(hUh}r'*(h]h]h]h]h]uhj *h]r(*h)r)*}r**(hXSizer+*hj%*hj'hhh}r,*(h]h]h]h]h]uhMh]r-*hXSizer.*r/*}r0*(hj+*hj)*ubaubahjoubehjubahjubj)r1*}r2*(hUh}r3*(h]h]h]h]h]uhj)h]r4*(j])r5*}r6*(hUh}r7*(h]h]h]h]h]uhj1*h]r8*(jb)r9*}r:*(hUh}r;*(h]h]h]h]h]uhj5*h]r<*h)r=*}r>*(hX R5F-0 Poolr?*hj9*hj'hhh}r@*(h]h]h]h]h]uhMh]rA*hX R5F-0 PoolrB*rC*}rD*(hj?*hj=*ubaubahjoubjb)rE*}rF*(hUh}rG*(h]h]h]h]h]uhj5*h]rH*h)rI*}rJ*(hX 0x9c000000rK*hjE*hj'hhh}rL*(h]h]h]h]h]uhMh]rM*hX 0x9c000000rN*rO*}rP*(hjK*hjI*ubaubahjoubjb)rQ*}rR*(hUh}rS*(h]h]h]h]h]uhj5*h]rT*h)rU*}rV*(hX8 MBrW*hjQ*hj'hhh}rX*(h]h]h]h]h]uhMh]rY*hX8 MBrZ*r[*}r\*(hjW*hjU*ubaubahjoubehjubj])r]*}r^*(hUh}r_*(h]h]h]h]h]uhj1*h]r`*(jb)ra*}rb*(hUh}rc*(h]h]h]h]h]uhj]*h]rd*h)re*}rf*(hX R5F-1 Poolrg*hja*hj'hhh}rh*(h]h]h]h]h]uhMh]ri*hX R5F-1 Poolrj*rk*}rl*(hjg*hje*ubaubahjoubjb)rm*}rn*(hUh}ro*(h]h]h]h]h]uhj]*h]rp*h)rq*}rr*(hX 0x9b000000rs*hjm*hj'hhh}rt*(h]h]h]h]h]uhMh]ru*hX 0x9b000000rv*rw*}rx*(hjs*hjq*ubaubahjoubjb)ry*}rz*(hUh}r{*(h]h]h]h]h]uhj]*h]r|*h)r}*}r~*(hX16 MBr*hjy*hj'hhh}r*(h]h]h]h]h]uhMh]r*hX16 MBr*r*}r*(hj*hj}*ubaubahjoubehjubehjWubehjXubaubh)r*}r*(hXFor details on how to adjust the sizes and locations of the R5F Pool carveouts, please see the corresponding section for changing the R5F memory map.r*hj'hj'hhh}r*(h]h]h]h]h]uhM hhh]r*hXFor details on how to adjust the sizes and locations of the R5F Pool carveouts, please see the corresponding section for changing the R5F memory map.r*r*}r*(hj*hj*ubaubh)r*}r*(hXChanging the R5F Memory Mapr*hj'hj'hhh}r*(h]r*Uchanging-the-r5f-memory-mapr*ah]h]h]h]r*hwauhNhhh]r*hXChanging the R5F Memory Mapr*r*}r*(hj*hj*ubaubh)r*}r*(hXSlave Physical Addressesr*hj'hj'hhh}r*(h]r*Uslave-physical-addressesr*ah]h]h]h]r*h; #size-cells = <2>; ranges; r5f1_memory_region: r5f1-memory@9b000000 { compatible = "shared-dma-pool"; reg = <0 0x9b000000 0 0x1000000>; no-map; }; r5f0_memory_region: r5f0-memory@9c000000 { compatible = "shared-dma-pool"; reg = <0 0x9c000000 0 0x800000>; no-map; }; secure_ddr: secure_ddr@9e800000 { reg = <0 0x9e800000 0 0x01800000>; /* for OP-TEE */ alignment = <0x1000>; no-map; }; };hj'hj'hjh}r*(hhh]h]h]h]h]uhM: hhh]r*hXreserved-memory { #address-cells = <2>; #size-cells = <2>; ranges; r5f1_memory_region: r5f1-memory@9b000000 { compatible = "shared-dma-pool"; reg = <0 0x9b000000 0 0x1000000>; no-map; }; r5f0_memory_region: r5f0-memory@9c000000 { compatible = "shared-dma-pool"; reg = <0 0x9c000000 0 0x800000>; no-map; }; secure_ddr: secure_ddr@9e800000 { reg = <0 0x9e800000 0 0x01800000>; /* for OP-TEE */ alignment = <0x1000>; no-map; }; };r*r*}r*(hUhj*ubaubh)r*}r*(hXeYou are able to change both the size and location. **Be careful not to overlap any other carveouts!**hj'hj'hhh}r*(h]h]h]h]h]uhM7hhh]r*(hX3You are able to change both the size and location. r*r*}r*(hX3You are able to change both the size and location. hj*ubj)r*}r*(hX2**Be careful not to overlap any other carveouts!**h}r*(h]h]h]h]h]uhj*h]r*hX.Be careful not to overlap any other carveouts!r*r*}r*(hUhj*ubahjubeubh)r*}r*(hXAdditionally, when you change the carveout location, there is a corresponding change that must be made to the resource table. For starters, if you're making a memory change you will need a **custom** resource table. The resource table is a large structure that is the "bridge" between physical memory and virtual memory. There is detailed information available in the article `IPC Resource customTable `__.hj'hj'hhh}r*(h]h]h]h]h]uhM:hhh]r*(hXAdditionally, when you change the carveout location, there is a corresponding change that must be made to the resource table. For starters, if you're making a memory change you will need a r*r*}r*(hXAdditionally, when you change the carveout location, there is a corresponding change that must be made to the resource table. For starters, if you're making a memory change you will need a hj*ubj)r*}r*(hX **custom**h}r*(h]h]h]h]h]uhj*h]r*hXcustomr*r*}r*(hUhj*ubahjubhX resource table. The resource table is a large structure that is the "bridge" between physical memory and virtual memory. There is detailed information available in the article r*r*}r*(hX resource table. The resource table is a large structure that is the "bridge" between physical memory and virtual memory. There is detailed information available in the article hj*ubj))r*}r*(hX`IPC Resource customTable `__h}r*(UnameXIPC Resource customTablej-Xzhttp://software-dl.ti.com/processor-sdk-rtos/esd/docs/latest/rtos/index_Foundational_Components.html#resource-custom-tableh]h]h]h]h]uhj*h]r*hXIPC Resource customTabler*r*}r*(hUhj*ubahj2ubhX.r*}r*(hX.hj*ubeubh)r*}r*(hXOnce you've created your custom resource table, you must update the address of PHYS\_MEM\_IPC\_VRING to be the same base address as your corresponding CMA.hj'hj'hhh}r*(h]h]h]h]h]uhMChhh]r*hXOnce you've created your custom resource table, you must update the address of PHYS_MEM_IPC_VRING to be the same base address as your corresponding CMA.r*r*}r*(hXOnce you've created your custom resource table, you must update the address of PHYS\_MEM\_IPC\_VRING to be the same base address as your corresponding CMA.hj*ubaubj)r*}r*(hXX#define R5F_MEM_TEXT 0x9C200000 #define R5F_MEM_DATA 0x9C300000 #define R5F_MEM_IPC_DATA 0x9C100000 #define R5F_MEM_IPC_VRING 0x9C000000 #define R5F_MEM_RPMSG_VRING0 0x9C000000 #define R5F_MEM_RPMSG_VRING1 0x9C010000 #define R5F_MEM_VRING_BUFS0 0x9C040000 #define R5F_MEM_VRING_BUFS1 0x9C080000hj'hj'hjh}r*(jtjuXchhh]h]h]jv}h]h]uhMGhhh]r*hXX#define R5F_MEM_TEXT 0x9C200000 #define R5F_MEM_DATA 0x9C300000 #define R5F_MEM_IPC_DATA 0x9C100000 #define R5F_MEM_IPC_VRING 0x9C000000 #define R5F_MEM_RPMSG_VRING0 0x9C000000 #define R5F_MEM_RPMSG_VRING1 0x9C010000 #define R5F_MEM_VRING_BUFS0 0x9C040000 #define R5F_MEM_VRING_BUFS1 0x9C080000r*r*}r*(hUhj*ubaubj)r+}r+(hXsThe PHYS\_MEM\_IPC\_VRING definition from the resource table must match the address of the associated CMA carveout!hj'hj'hjh}r+(h]h]h]h]h]uhNhhh]r+h)r+}r+(hXsThe PHYS\_MEM\_IPC\_VRING definition from the resource table must match the address of the associated CMA carveout!hj+hj'hhh}r+(h]h]h]h]h]uhMUh]r+hXpThe PHYS_MEM_IPC_VRING definition from the resource table must match the address of the associated CMA carveout!r+r +}r +(hXsThe PHYS\_MEM\_IPC\_VRING definition from the resource table must match the address of the associated CMA carveout!hj+ubaubaubh)r +}r +(hXR5 Virtual Addressesr +hj'hj'hhh}r+(h]r+Ur5-virtual-addressesr+ah]h]h]h]r+h4auhNhhh]r+hXR5 Virtual Addressesr+r+}r+(hj +hj +ubaubh)r+}r+(hX{These addresses are the ones seen by the MCU subsystem, i.e. these will be the addresses in your linker command files, etc.r+hj'hj'hhh}r+(h]h]h]h]h]uhM[hhh]r+hX{These addresses are the ones seen by the MCU subsystem, i.e. these will be the addresses in your linker command files, etc.r+r+}r+(hj+hj+ubaubh)r+}r+(hXYou must ensure that the sizes of your sections are consistent with the corresponding definitions in the resource table. You should create your own resource table in order to modify the memory map. This is describe in the page `IPC Resource customTable `__. You can look at an existing resource table inside IPC:hj'hj'hhh}r +(h]h]h]h]h]uhM^hhh]r!+(hXYou must ensure that the sizes of your sections are consistent with the corresponding definitions in the resource table. You should create your own resource table in order to modify the memory map. This is describe in the page r"+r#+}r$+(hXYou must ensure that the sizes of your sections are consistent with the corresponding definitions in the resource table. You should create your own resource table in order to modify the memory map. This is describe in the page hj+ubj))r%+}r&+(hX`IPC Resource customTable `__h}r'+(UnameXIPC Resource customTablej-Xzhttp://software-dl.ti.com/processor-sdk-rtos/esd/docs/latest/rtos/index_Foundational_Components.html#resource-custom-tableh]h]h]h]h]uhj+h]r(+hXIPC Resource customTabler)+r*+}r++(hUhj%+ubahj2ubhX8. You can look at an existing resource table inside IPC:r,+r-+}r.+(hX8. You can look at an existing resource table inside IPC:hj+ubeubh)r/+}r0+(hX8ipc/packages/ti/ipc/remoteproc/rsc\_table\_am65xx\_r5f.hr1+hj'hj'hhh}r2+(h]h]h]h]h]uhMfhhh]r3+hX5ipc/packages/ti/ipc/remoteproc/rsc_table_am65xx_r5f.hr4+r5+}r6+(hX8ipc/packages/ti/ipc/remoteproc/rsc\_table\_am65xx\_r5f.hhj/+ubaubj)r7+}r8+(hXo{ TYPE_CARVEOUT, R5F_MEM_IPC_DATA, 0, R5F_MEM_IPC_DATA_SIZE, 0, 0, "R5F_MEM_IPC_DATA", }, { TYPE_CARVEOUT, R5F_MEM_TEXT, 0, R5F_MEM_TEXT_SIZE, 0, 0, "R5F_MEM_TEXT", }, { TYPE_CARVEOUT, R5F_MEM_DATA, 0, R5F_MEM_DATA_SIZE, 0, 0, "R5F_MEM_DATA", }, { TYPE_TRACE, TRACEBUFADDR, TRACEBUFSIZE, 0, "trace:r5f0", },hj'hj'hjh}r9+(hhh]h]h]h]r:+(j Xceh]uhMhhh]r;+(j )r<+}r=+(hX{h}r>+(h]h]r?+U punctuationr@+ah]h]h]uhj7+h]rA+hX{rB+}rC+(hUhj<+ubahj ubhX rD+rE+}rF+(hX hj7+ubj )rG+}rH+(hX TYPE_CARVEOUTh}rI+(h]h]rJ+UnamerK+ah]h]h]uhj7+h]rL+hX TYPE_CARVEOUTrM+rN+}rO+(hUhjG+ubahj ubj )rP+}rQ+(hX,h}rR+(h]h]rS+U punctuationrT+ah]h]h]uhj7+h]rU+hX,rV+}rW+(hUhjP+ubahj ubhX rX+rY+}rZ+(hX hj7+ubj )r[+}r\+(hXR5F_MEM_IPC_DATAh}r]+(h]h]r^+Unamer_+ah]h]h]uhj7+h]r`+hXR5F_MEM_IPC_DATAra+rb+}rc+(hUhj[+ubahj ubj )rd+}re+(hX,h}rf+(h]h]rg+U punctuationrh+ah]h]h]uhj7+h]ri+hX,rj+}rk+(hUhjd+ubahj ubhX rl+}rm+(hX hj7+ubj )rn+}ro+(hX0h}rp+(h]h]rq+(Uliteralrr+Unumberrs+Uintegerrt+eh]h]h]uhj7+h]ru+hX0rv+}rw+(hUhjn+ubahj ubj )rx+}ry+(hX,h}rz+(h]h]r{+U punctuationr|+ah]h]h]uhj7+h]r}+hX,r~+}r+(hUhjx+ubahj ubhX r+r+}r+(hX hj7+ubj )r+}r+(hXR5F_MEM_IPC_DATA_SIZEh}r+(h]h]r+Unamer+ah]h]h]uhj7+h]r+hXR5F_MEM_IPC_DATA_SIZEr+r+}r+(hUhj+ubahj ubj )r+}r+(hX,h}r+(h]h]r+U punctuationr+ah]h]h]uhj7+h]r+hX,r+}r+(hUhj+ubahj ubhX r+}r+(hX hj7+ubj )r+}r+(hX0h}r+(h]h]r+(Uliteralr+Unumberr+Uintegerr+eh]h]h]uhj7+h]r+hX0r+}r+(hUhj+ubahj ubj )r+}r+(hX,h}r+(h]h]r+U punctuationr+ah]h]h]uhj7+h]r+hX,r+}r+(hUhj+ubahj ubhX r+}r+(hX hj7+ubj )r+}r+(hX0h}r+(h]h]r+(Uliteralr+Unumberr+Uintegerr+eh]h]h]uhj7+h]r+hX0r+}r+(hUhj+ubahj ubj )r+}r+(hX,h}r+(h]h]r+U punctuationr+ah]h]h]uhj7+h]r+hX,r+}r+(hUhj+ubahj ubhX r+}r+(hX hj7+ubj )r+}r+(hX"R5F_MEM_IPC_DATA"h}r+(h]h]r+(Uliteralr+Ustringr+eh]h]h]uhj7+h]r+hX"R5F_MEM_IPC_DATA"r+r+}r+(hUhj+ubahj ubj )r+}r+(hX,h}r+(h]h]r+U punctuationr+ah]h]h]uhj7+h]r+hX,r+}r+(hUhj+ubahj ubhX r+r+}r+(hX hj7+ubj )r+}r+(hX},h}r+(h]h]r+U punctuationr+ah]h]h]uhj7+h]r+hX},r+r+}r+(hUhj+ubahj ubhX r+r+}r+(hX hj7+ubj )r+}r+(hX{h}r+(h]h]r+U punctuationr+ah]h]h]uhj7+h]r+hX{r+}r+(hUhj+ubahj ubhX r+r+}r+(hX hj7+ubj )r+}r+(hX TYPE_CARVEOUTh}r+(h]h]r+Unamer+ah]h]h]uhj7+h]r+hX TYPE_CARVEOUTr+r+}r+(hUhj+ubahj ubj )r+}r+(hX,h}r+(h]h]r+U punctuationr+ah]h]h]uhj7+h]r+hX,r+}r+(hUhj+ubahj ubhX r+r+}r+(hX hj7+ubj )r+}r+(hX R5F_MEM_TEXTh}r,(h]h]r,Unamer,ah]h]h]uhj7+h]r,hX R5F_MEM_TEXTr,r,}r,(hUhj+ubahj ubj )r,}r,(hX,h}r ,(h]h]r ,U punctuationr ,ah]h]h]uhj7+h]r ,hX,r ,}r,(hUhj,ubahj ubhX r,}r,(hX hj7+ubj )r,}r,(hX0h}r,(h]h]r,(Uliteralr,Unumberr,Uintegerr,eh]h]h]uhj7+h]r,hX0r,}r,(hUhj,ubahj ubj )r,}r,(hX,h}r,(h]h]r,U punctuationr,ah]h]h]uhj7+h]r ,hX,r!,}r",(hUhj,ubahj ubhX r#,r$,}r%,(hX hj7+ubj )r&,}r',(hXR5F_MEM_TEXT_SIZEh}r(,(h]h]r),Unamer*,ah]h]h]uhj7+h]r+,hXR5F_MEM_TEXT_SIZEr,,r-,}r.,(hUhj&,ubahj ubj )r/,}r0,(hX,h}r1,(h]h]r2,U punctuationr3,ah]h]h]uhj7+h]r4,hX,r5,}r6,(hUhj/,ubahj ubhX r7,}r8,(hX hj7+ubj )r9,}r:,(hX0h}r;,(h]h]r<,(Uliteralr=,Unumberr>,Uintegerr?,eh]h]h]uhj7+h]r@,hX0rA,}rB,(hUhj9,ubahj ubj )rC,}rD,(hX,h}rE,(h]h]rF,U punctuationrG,ah]h]h]uhj7+h]rH,hX,rI,}rJ,(hUhjC,ubahj ubhX rK,}rL,(hX hj7+ubj )rM,}rN,(hX0h}rO,(h]h]rP,(UliteralrQ,UnumberrR,UintegerrS,eh]h]h]uhj7+h]rT,hX0rU,}rV,(hUhjM,ubahj ubj )rW,}rX,(hX,h}rY,(h]h]rZ,U punctuationr[,ah]h]h]uhj7+h]r\,hX,r],}r^,(hUhjW,ubahj ubhX r_,}r`,(hX hj7+ubj )ra,}rb,(hX"R5F_MEM_TEXT"h}rc,(h]h]rd,(Uliteralre,Ustringrf,eh]h]h]uhj7+h]rg,hX"R5F_MEM_TEXT"rh,ri,}rj,(hUhja,ubahj ubj )rk,}rl,(hX,h}rm,(h]h]rn,U punctuationro,ah]h]h]uhj7+h]rp,hX,rq,}rr,(hUhjk,ubahj ubhX rs,rt,}ru,(hX hj7+ubj )rv,}rw,(hX},h}rx,(h]h]ry,U punctuationrz,ah]h]h]uhj7+h]r{,hX},r|,r},}r~,(hUhjv,ubahj ubhX r,r,}r,(hX hj7+ubj )r,}r,(hX{h}r,(h]h]r,U punctuationr,ah]h]h]uhj7+h]r,hX{r,}r,(hUhj,ubahj ubhX r,r,}r,(hX hj7+ubj )r,}r,(hX TYPE_CARVEOUTh}r,(h]h]r,Unamer,ah]h]h]uhj7+h]r,hX TYPE_CARVEOUTr,r,}r,(hUhj,ubahj ubj )r,}r,(hX,h}r,(h]h]r,U punctuationr,ah]h]h]uhj7+h]r,hX,r,}r,(hUhj,ubahj ubhX r,r,}r,(hX hj7+ubj )r,}r,(hX R5F_MEM_DATAh}r,(h]h]r,Unamer,ah]h]h]uhj7+h]r,hX R5F_MEM_DATAr,r,}r,(hUhj,ubahj ubj )r,}r,(hX,h}r,(h]h]r,U punctuationr,ah]h]h]uhj7+h]r,hX,r,}r,(hUhj,ubahj ubhX r,}r,(hX hj7+ubj )r,}r,(hX0h}r,(h]h]r,(Uliteralr,Unumberr,Uintegerr,eh]h]h]uhj7+h]r,hX0r,}r,(hUhj,ubahj ubj )r,}r,(hX,h}r,(h]h]r,U punctuationr,ah]h]h]uhj7+h]r,hX,r,}r,(hUhj,ubahj ubhX r,r,}r,(hX hj7+ubj )r,}r,(hXR5F_MEM_DATA_SIZEh}r,(h]h]r,Unamer,ah]h]h]uhj7+h]r,hXR5F_MEM_DATA_SIZEr,r,}r,(hUhj,ubahj ubj )r,}r,(hX,h}r,(h]h]r,U punctuationr,ah]h]h]uhj7+h]r,hX,r,}r,(hUhj,ubahj ubhX r,}r,(hX hj7+ubj )r,}r,(hX0h}r,(h]h]r,(Uliteralr,Unumberr,Uintegerr,eh]h]h]uhj7+h]r,hX0r,}r,(hUhj,ubahj ubj )r,}r,(hX,h}r,(h]h]r,U punctuationr,ah]h]h]uhj7+h]r,hX,r,}r,(hUhj,ubahj ubhX r,}r,(hX hj7+ubj )r,}r,(hX0h}r,(h]h]r,(Uliteralr,Unumberr,Uintegerr,eh]h]h]uhj7+h]r,hX0r,}r,(hUhj,ubahj ubj )r,}r,(hX,h}r,(h]h]r,U punctuationr,ah]h]h]uhj7+h]r,hX,r-}r-(hUhj,ubahj ubhX r-}r-(hX hj7+ubj )r-}r-(hX"R5F_MEM_DATA"h}r-(h]h]r-(Uliteralr-Ustringr -eh]h]h]uhj7+h]r -hX"R5F_MEM_DATA"r -r -}r -(hUhj-ubahj ubj )r-}r-(hX,h}r-(h]h]r-U punctuationr-ah]h]h]uhj7+h]r-hX,r-}r-(hUhj-ubahj ubhX r-r-}r-(hX hj7+ubj )r-}r-(hX},h}r-(h]h]r-U punctuationr-ah]h]h]uhj7+h]r-hX},r-r -}r!-(hUhj-ubahj ubhX r"-r#-}r$-(hX hj7+ubj )r%-}r&-(hX{h}r'-(h]h]r(-U punctuationr)-ah]h]h]uhj7+h]r*-hX{r+-}r,-(hUhj%-ubahj ubhX r--r.-}r/-(hX hj7+ubj )r0-}r1-(hX TYPE_TRACEh}r2-(h]h]r3-Unamer4-ah]h]h]uhj7+h]r5-hX TYPE_TRACEr6-r7-}r8-(hUhj0-ubahj ubj )r9-}r:-(hX,h}r;-(h]h]r<-U punctuationr=-ah]h]h]uhj7+h]r>-hX,r?-}r@-(hUhj9-ubahj ubhX rA-}rB-(hX hj7+ubj )rC-}rD-(hX TRACEBUFADDRh}rE-(h]h]rF-UnamerG-ah]h]h]uhj7+h]rH-hX TRACEBUFADDRrI-rJ-}rK-(hUhjC-ubahj ubj )rL-}rM-(hX,h}rN-(h]h]rO-U punctuationrP-ah]h]h]uhj7+h]rQ-hX,rR-}rS-(hUhjL-ubahj ubhX rT-}rU-(hX hj7+ubj )rV-}rW-(hX TRACEBUFSIZEh}rX-(h]h]rY-UnamerZ-ah]h]h]uhj7+h]r[-hX TRACEBUFSIZEr\-r]-}r^-(hUhjV-ubahj ubj )r_-}r`-(hX,h}ra-(h]h]rb-U punctuationrc-ah]h]h]uhj7+h]rd-hX,re-}rf-(hUhj_-ubahj ubhX rg-}rh-(hX hj7+ubj )ri-}rj-(hX0h}rk-(h]h]rl-(Uliteralrm-Unumberrn-Uintegerro-eh]h]h]uhj7+h]rp-hX0rq-}rr-(hUhji-ubahj ubj )rs-}rt-(hX,h}ru-(h]h]rv-U punctuationrw-ah]h]h]uhj7+h]rx-hX,ry-}rz-(hUhjs-ubahj ubhX r{-}r|-(hX hj7+ubj )r}-}r~-(hX "trace:r5f0"h}r-(h]h]r-(Uliteralr-Ustringr-eh]h]h]uhj7+h]r-hX "trace:r5f0"r-r-}r-(hUhj}-ubahj ubj )r-}r-(hX,h}r-(h]h]r-U punctuationr-ah]h]h]uhj7+h]r-hX,r-}r-(hUhj-ubahj ubhX r-r-}r-(hX hj7+ubj )r-}r-(hX},h}r-(h]h]r-U punctuationr-ah]h]h]uhj7+h]r-hX},r-r-}r-(hUhj-ubahj ubeubh)r-}r-(hXJLet's have a look at some of these to understand them better. For example:r-hj'hj'hhh}r-(h]h]h]h]h]uhMhhh]r-hXJLet's have a look at some of these to understand them better. For example:r-r-}r-(hj-hj-ubaubj)r-}r-(hXY{ TYPE_CARVEOUT, DSP_MEM_TEXT, 0, DSP_MEM_TEXT_SIZE, 0, 0, "DSP_MEM_TEXT", },hj'hj'hjh}r-(jtjuXchhh]h]h]jv}h]h]uhMhhh]r-hXY{ TYPE_CARVEOUT, DSP_MEM_TEXT, 0, DSP_MEM_TEXT_SIZE, 0, 0, "DSP_MEM_TEXT", },r-r-}r-(hUhj-ubaubh)r-}r-(hXKey points to note are:r-hj'hj'hhh}r-(h]h]h]h]h]uhMhhh]r-hXKey points to note are:r-r-}r-(hj-hj-ubaubj6)r-}r-(hUhj'hj'hj9h}r-(j;U.h]h]h]j<Uh]h]j=j>uhMhhh]r-(j@)r-}r-(hXwThe "TYPE\_CARVEOUT" indicates that the physical memory backing this entry will come from the associated reserved pool.hj-hj'hjCh}r-(h]h]h]h]h]uhNhhh]r-h)r-}r-(hXwThe "TYPE\_CARVEOUT" indicates that the physical memory backing this entry will come from the associated reserved pool.hj-hj'hhh}r-(h]h]h]h]h]uhMh]r-hXvThe "TYPE_CARVEOUT" indicates that the physical memory backing this entry will come from the associated reserved pool.r-r-}r-(hXwThe "TYPE\_CARVEOUT" indicates that the physical memory backing this entry will come from the associated reserved pool.hj-ubaubaubj@)r-}r-(hXDSP\_MEM\_TEXT is a #define earlier in the code providing the address for the code section. It is 0x9C200000 by default. **This must correspond to a section from your DSP linker command file, i.e. EXT\_CODE (or whatever name you choose to give it) must be linked to the same address.**hj-hj'hjCh}r-(h]h]h]h]h]uhNhhh]r-h)r-}r-(hXDSP\_MEM\_TEXT is a #define earlier in the code providing the address for the code section. It is 0x9C200000 by default. **This must correspond to a section from your DSP linker command file, i.e. EXT\_CODE (or whatever name you choose to give it) must be linked to the same address.**hj-hj'hhh}r-(h]h]h]h]h]uhMh]r-(hXwDSP_MEM_TEXT is a #define earlier in the code providing the address for the code section. It is 0x9C200000 by default. r-r-}r-(hXyDSP\_MEM\_TEXT is a #define earlier in the code providing the address for the code section. It is 0x9C200000 by default. hj-ubj)r-}r-(hX**This must correspond to a section from your DSP linker command file, i.e. EXT\_CODE (or whatever name you choose to give it) must be linked to the same address.**h}r-(h]h]h]h]h]uhj-h]r-hXThis must correspond to a section from your DSP linker command file, i.e. EXT_CODE (or whatever name you choose to give it) must be linked to the same address.r-r-}r-(hUhj-ubahjubeubaubj@)r-}r-(hXDSP\_MEM\_TEXT\_SIZE is the size of the text section. **The actual amount of linked code in the corresponding section of your executable must be less than or equal to this size.** hj-hj'hjCh}r-(h]h]h]h]h]uhNhhh]r-h)r-}r-(hXDSP\_MEM\_TEXT\_SIZE is the size of the text section. **The actual amount of linked code in the corresponding section of your executable must be less than or equal to this size.**hj-hj'hhh}r-(h]h]h]h]h]uhMh]r-(hX3DSP_MEM_TEXT_SIZE is the size of the text section. r-r-}r-(hX6DSP\_MEM\_TEXT\_SIZE is the size of the text section. hj-ubj)r-}r-(hX}**The actual amount of linked code in the corresponding section of your executable must be less than or equal to this size.**h}r-(h]h]h]h]h]uhj-h]r-hXyThe actual amount of linked code in the corresponding section of your executable must be less than or equal to this size.r-r-}r-(hUhj-ubahjubeubaubeubh)r-}r-(hXLet's take another:r-hj'hj'hhh}r-(h]h]h]h]h]uhMhhh]r-hXLet's take another:r-r-}r-(hj-hj-ubaubj)r-}r-(hXA{ TYPE_TRACE, TRACEBUFADDR, TRACEBUFSIZE, 0, "trace:r5f0", },hj'hj'hjh}r-(jtjuXchhh]h]h]jv}h]h]uhMhhh]r-hXA{ TYPE_TRACE, TRACEBUFADDR, TRACEBUFSIZE, 0, "trace:r5f0", },r-r-}r-(hUhj-ubaubh)r-}r-(hUhj'hj'hjh}r-(h]h]h]h]h]uhMhhh]r-j)r-}r-(hUjKhj-hj'hhh}r-(h]h]h]h]h]uhKhhh]ubaubh)r-}r-(hXKey points are:r-hj'hj'hhh}r-(h]h]h]h]h]uhMhhh]r-hXKey points are:r.r.}r.(hj-hj-ubaubj6)r.}r.(hUhj'hj'hj9h}r.(j;U.h]h]h]j<Uh]h]j=j>uhMhhh]r.(j@)r.}r.(hX3The "TYPE\_TRACE" indicates this is for trace info.r .hj.hj'hjCh}r .(h]h]h]h]h]uhNhhh]r .h)r .}r .(hj .hj.hj'hhh}r.(h]h]h]h]h]uhMh]r.hX2The "TYPE_TRACE" indicates this is for trace info.r.r.}r.(hX3The "TYPE\_TRACE" indicates this is for trace info.hj .ubaubaubj@)r.}r.(hXThe TRACEBUFADDR is defined earlier in the file as &ti\_trace\_SysMin\_Module\_State\_0\_outbuf\_\_A. That corresponds to the symbol used in TI-RTOS for the trace buffer.hj.hj'hjCh}r.(h]h]h]h]h]uhNhhh]r.h)r.}r.(hXThe TRACEBUFADDR is defined earlier in the file as &ti\_trace\_SysMin\_Module\_State\_0\_outbuf\_\_A. That corresponds to the symbol used in TI-RTOS for the trace buffer.hj.hj'hhh}r.(h]h]h]h]h]uhMh]r.hXThe TRACEBUFADDR is defined earlier in the file as &ti_trace_SysMin_Module_State_0_outbuf__A. That corresponds to the symbol used in TI-RTOS for the trace buffer.r.r.}r.(hXThe TRACEBUFADDR is defined earlier in the file as &ti\_trace\_SysMin\_Module\_State\_0\_outbuf\_\_A. That corresponds to the symbol used in TI-RTOS for the trace buffer.hj.ubaubaubj@)r.}r.(hXThe TRACEBUFSIZE is the size of the Trace section The corresponding size in the cfg file should be the same (or less). It looks like this: ``SysMin.bufSize = 0x8000;`` hj.hXVinternal padding after source/linux/Foundational_Components/IPC/IPC_for_AM65xx.rst.incr .hjCh}r!.(h]h]h]h]h]uhNhhh]r".h)r#.}r$.(hXThe TRACEBUFSIZE is the size of the Trace section The corresponding size in the cfg file should be the same (or less). It looks like this: ``SysMin.bufSize = 0x8000;``hj.hj'hhh}r%.(h]h]h]h]h]uhMh]r&.(hXThe TRACEBUFSIZE is the size of the Trace section The corresponding size in the cfg file should be the same (or less). It looks like this: r'.r(.}r).(hXThe TRACEBUFSIZE is the size of the Trace section The corresponding size in the cfg file should be the same (or less). It looks like this: hj#.ubj )r*.}r+.(hX``SysMin.bufSize = 0x8000;``h}r,.(h]h]h]h]h]uhj#.h]r-.hXSysMin.bufSize = 0x8000;r..r/.}r0.(hUhj*.ubahj ubeubaubeubeubh)r1.}r2.(hUhhhhhhh}r3.(h]h]h]h]r4.U ipc-for-k2xr5.ah]r6.hauhKhhh]r7.(h)r8.}r9.(hX IPC for K2xr:.hj1.hhhhh}r;.(h]h]h]h]h]uhKhhh]r<.hX IPC for K2xr=.r>.}r?.(hj:.hj8.ubaubh)r@.}rA.(hUhKhj1.hhX<source/linux/Foundational_Components/IPC/IPC_for_K2x.rst.incrB.rC.}rD.bhhh}rE.(h]rF.X introductionrG.ah]h]h]rH.Uid2rI.ah]uhKhhh]rJ.(h)rK.}rL.(hX IntroductionrM.hj@.hjC.hhh}rN.(h]h]h]h]h]uhKhhh]rO.hX IntroductionrP.rQ.}rR.(hjM.hjK.ubaubh)rS.}rT.(hX.This article is geared toward 66AK2x users that are running Linux on the Cortex A15. The goal is to help users understand how to gain access to the DSP (c66x) subsystem of the 66AK2x. While the examples used in this guide are specific to K2G, the information provided here applies to all K2x platforms.rU.hj@.hjC.hhh}rV.(h]h]h]h]h]uhKhhh]rW.hX.This article is geared toward 66AK2x users that are running Linux on the Cortex A15. The goal is to help users understand how to gain access to the DSP (c66x) subsystem of the 66AK2x. While the examples used in this guide are specific to K2G, the information provided here applies to all K2x platforms.rX.rY.}rZ.(hjU.hjS.ubaubeubh)r[.}r\.(hUhj1.hjC.hhh}r].(h]h]h]h]r^.U$software-dependencies-to-get-startedr_.ah]r`.hqauhKhhh]ra.(h)rb.}rc.(hX$Software Dependencies to Get Startedrd.hj[.hjC.hhh}re.(h]h]h]h]h]uhKhhh]rf.hX$Software Dependencies to Get Startedrg.rh.}ri.(hjd.hjb.ubaubh)rj.}rk.(hX Prerequisitesrl.hj[.hjC.hhh}rm.(h]h]h]h]h]uhK hhh]rn.hX Prerequisitesro.rp.}rq.(hjl.hjj.ubaubj)rr.}rs.(hUhj[.hjC.hj!h}rt.(j#X-h]h]h]h]h]uhK hhh]ru.(j@)rv.}rw.(hXm`Processor SDK Linux for K2G `__hjr.hjC.hjCh}rx.(h]h]h]h]h]uhNhhh]ry.h)rz.}r{.(hXm`Processor SDK Linux for K2G `__r|.hjv.hjC.hhh}r}.(h]h]h]h]h]uhK h]r~.j))r.}r.(hj|.h}r.(UnameXProcessor SDK Linux for K2Gj-XKhttp://software-dl.ti.com/processor-sdk-linux/esd/K2G/latest/index_FDS.htmlh]h]h]h]h]uhjz.h]r.hXProcessor SDK Linux for K2Gr.r.}r.(hUhj.ubahj2ubaubaubj@)r.}r.(hXk`Processor SDK RTOS for K2G `__hjr.hjC.hjCh}r.(h]h]h]h]h]uhNhhh]r.h)r.}r.(hXk`Processor SDK RTOS for K2G `__r.hj.hjC.hhh}r.(h]h]h]h]h]uhK h]r.j))r.}r.(hj.h}r.(UnameXProcessor SDK RTOS for K2Gj-XJhttp://software-dl.ti.com/processor-sdk-rtos/esd/K2G/latest/index_FDS.htmlh]h]h]h]h]uhj.h]r.hXProcessor SDK RTOS for K2Gr.r.}r.(hUhj.ubahj2ubaubaubj@)r.}r.(hX`Code Composer Studio `__ (choose version as specified on Proc SDK download page) hjr.hjC.hjCh}r.(h]h]h]h]h]uhNhhh]r.h)r.}r.(hX`Code Composer Studio `__ (choose version as specified on Proc SDK download page)hj.hjC.hhh}r.(h]h]h]h]h]uhKh]r.(j))r.}r.(hXO`Code Composer Studio `__h}r.(UnameXCode Composer Studioj-X4http://processors.wiki.ti.com/index.php/Download_CCSh]h]h]h]h]uhj.h]r.hXCode Composer Studior.r.}r.(hUhj.ubahj2ubhX8 (choose version as specified on Proc SDK download page)r.r.}r.(hX8 (choose version as specified on Proc SDK download page)hj.ubeubaubeubj)r.}r.(hX[Please be sure that you have the same version number for both Processor SDK RTOS and Linux.hj[.hjC.hjh}r.(h]h]h]h]h]uhNhhh]r.h)r.}r.(hX[Please be sure that you have the same version number for both Processor SDK RTOS and Linux.r.hj.hjC.hhh}r.(h]h]h]h]h]uhKh]r.hX[Please be sure that you have the same version number for both Processor SDK RTOS and Linux.r.r.}r.(hj.hj.ubaubaubh)r.}r.(hXdFor reference within the context of this page, the Linux SDK is installed at the following location:r.hj[.hjC.hhh}r.(h]h]h]h]h]uhKhhh]r.hXdFor reference within the context of this page, the Linux SDK is installed at the following location:r.r.}r.(hj.hj.ubaubj)r.}r.(hX6/mnt/data/user/ti-processor-sdk-linux-k2g-evm-xx.xx.xx.xx ├── bin ├── board-support ├── docs ├── example-applications ├── filesystem ├── linux-devkit ├── linux-devkit.sh ├── Makefile ├── Rules.make └── setup.shhj[.hjC.hjh}r.(hhh]h]h]h]h]uhM hhh]r.hX6/mnt/data/user/ti-processor-sdk-linux-k2g-evm-xx.xx.xx.xx ├── bin ├── board-support ├── docs ├── example-applications ├── filesystem ├── linux-devkit ├── linux-devkit.sh ├── Makefile ├── Rules.make └── setup.shr.r.}r.(hUhj.ubaubh)r.}r.(hX4The RTOS SDK is installed at the following location:r.hj[.hjC.hhh}r.(h]h]h]h]h]uhK)hhh]r.hX4The RTOS SDK is installed at the following location:r.r.}r.(hj.hj.ubaubj)r.}r.(hX/mnt/data/user/my_custom_install_sdk_rtos_k2g_xx_xx.xx ├── bios_6_xx_xx_xx ├── cg_xml ├── ctoolslib_x_x_x_x ├── dsplib_c66x_x_x_x_x ├── edma3_lld_x_xx_x_xxx ├── framework_components_x_xx_xx_xx ├── gcc-arm-none-eabi-6-2017-q1-update ├── imglib_c66x_x_x_x_x ├── ipc_3_xx_xx_xx ├── mathlib_c66x_x_x_x_x ├── multiprocmgr_x_x_x_x ├── ndk_3_xx_xx_xx ├── openmp_dsp_k2g_2_xx_xx_xx ├── pdk_k2g_x_x_xx ├── processor_sdk_rtos_k2g_x_xx_xx_xx ├── uia_2_xx_xx_xx ├── xdais_7_xx_xx_xx ├── xdctools_3_xx_xx_xxhj[.hjC.hjh}r.(hhh]h]h]h]h]uhM hhh]r.hX/mnt/data/user/my_custom_install_sdk_rtos_k2g_xx_xx.xx ├── bios_6_xx_xx_xx ├── cg_xml ├── ctoolslib_x_x_x_x ├── dsplib_c66x_x_x_x_x ├── edma3_lld_x_xx_x_xxx ├── framework_components_x_xx_xx_xx ├── gcc-arm-none-eabi-6-2017-q1-update ├── imglib_c66x_x_x_x_x ├── ipc_3_xx_xx_xx ├── mathlib_c66x_x_x_x_x ├── multiprocmgr_x_x_x_x ├── ndk_3_xx_xx_xx ├── openmp_dsp_k2g_2_xx_xx_xx ├── pdk_k2g_x_x_xx ├── processor_sdk_rtos_k2g_x_xx_xx_xx ├── uia_2_xx_xx_xx ├── xdais_7_xx_xx_xx ├── xdctools_3_xx_xx_xxr.r.}r.(hUhj.ubaubh)r.}r.(hUhj[.hjC.hjh}r.(h]h]h]h]h]uhKBhhh]r.j)r.}r.(hUjKhj.hjC.hhh}r.(h]h]h]h]h]uhKhhh]ubaubeubh)r.}r.(hUhj1.hjC.hhh}r.(h]h]h]h]r.Umultiple-processor-managerr.ah]r.hauhKEhhh]r.(h)r.}r.(hXMultiple Processor Managerr.hj.hjC.hhh}r.(h]h]h]h]h]uhKEhhh]r.hXMultiple Processor Managerr.r.}r.(hj.hj.ubaubh)r.}r.(hXThe Multiple Processor Manager (MPM) module is used to load and run DSP images from the ARM. The following section provides some more detail on the MPM.r.hj.hjC.hhh}r.(h]h]h]h]h]uhKGhhh]r.hXThe Multiple Processor Manager (MPM) module is used to load and run DSP images from the ARM. The following section provides some more detail on the MPM.r.r.}r.(hj.hj.ubaubj)r.}r.(hUhj.hjC.hj!h}r.(j#X-h]h]h]h]h]uhKJhhh]r.(j@)r.}r.(hXThe MPM has the two following major components: - MPM server (mpmsrv): It runs as a daemon and runs automatically in the default filesystem supplied in Processor SDK. It parses the MPM configuration file from /etc/mpm/mpm_config.json, and then waits on a UNIX domain socket. The MPM server runs and maintains a state machine for each slave core. - MPM command line/client utility (mpmcl): It is installed in the filesystem and provides command line access to the server. hj.hNhjCh}r.(h]h]h]h]h]uhNhhh]r.(h)r.}r.(hX/The MPM has the two following major components:r.hj.hjC.hhh}r.(h]h]h]h]h]uhKJh]r.hX/The MPM has the two following major components:r.r.}r.(hj.hj.ubaubj)r/}r/(hUh}r/(j#X-h]h]h]h]h]uhj.h]r/(j@)r/}r/(hX'MPM server (mpmsrv): It runs as a daemon and runs automatically in the default filesystem supplied in Processor SDK. It parses the MPM configuration file from /etc/mpm/mpm_config.json, and then waits on a UNIX domain socket. The MPM server runs and maintains a state machine for each slave core.r/h}r/(h]h]h]h]h]uhj/h]r/h)r /}r /(hj/hj/hjC.hhh}r /(h]h]h]h]h]uhKLh]r /hX'MPM server (mpmsrv): It runs as a daemon and runs automatically in the default filesystem supplied in Processor SDK. It parses the MPM configuration file from /etc/mpm/mpm_config.json, and then waits on a UNIX domain socket. The MPM server runs and maintains a state machine for each slave core.r /r/}r/(hj/hj /ubaubahjCubj@)r/}r/(hX{MPM command line/client utility (mpmcl): It is installed in the filesystem and provides command line access to the server. h}r/(h]h]h]h]h]uhj/h]r/h)r/}r/(hXzMPM command line/client utility (mpmcl): It is installed in the filesystem and provides command line access to the server.r/hj/hjC.hhh}r/(h]h]h]h]h]uhKMh]r/hXzMPM command line/client utility (mpmcl): It is installed in the filesystem and provides command line access to the server.r/r/}r/(hj/hj/ubaubahjCubehj!ubeubj@)r/}r/(hXThe following are the different methods that can be used by MPM to load and run slave images: - Using mpmcl utility. - From the config file, to load at bootup. - Writing an application to use mpmclient header file and library. hj.hNhjCh}r/(h]h]h]h]h]uhNhhh]r/(h)r /}r!/(hX]The following are the different methods that can be used by MPM to load and run slave images:r"/hj/hjC.hhh}r#/(h]h]h]h]h]uhKOh]r$/hX]The following are the different methods that can be used by MPM to load and run slave images:r%/r&/}r'/(hj"/hj /ubaubj)r(/}r)/(hUh}r*/(j#X-h]h]h]h]h]uhj/h]r+/(j@)r,/}r-/(hXUsing mpmcl utility.r./h}r//(h]h]h]h]h]uhj(/h]r0/h)r1/}r2/(hj./hj,/hjC.hhh}r3/(h]h]h]h]h]uhKQh]r4/hXUsing mpmcl utility.r5/r6/}r7/(hj./hj1/ubaubahjCubj@)r8/}r9/(hX(From the config file, to load at bootup.r:/h}r;/(h]h]h]h]h]uhj(/h]r/(hj:/hj8/hjC.hhh}r?/(h]h]h]h]h]uhKRh]r@/hX(From the config file, to load at bootup.rA/rB/}rC/(hj:/hj=/ubaubahjCubj@)rD/}rE/(hXAWriting an application to use mpmclient header file and library. h}rF/(h]h]h]h]h]uhj(/h]rG/h)rH/}rI/(hX@Writing an application to use mpmclient header file and library.rJ/hjD/hjC.hhh}rK/(h]h]h]h]h]uhKSh]rL/hX@Writing an application to use mpmclient header file and library.rM/rN/}rO/(hjJ/hjH/ubaubahjCubehj!ubeubj@)rP/}rQ/(hXThe location of the mpm server/daemon logs is based on the "outputif" configuration in the JSON config file. By default, this is /var/log/syslog. hj.hjC.hjCh}rR/(h]h]h]h]h]uhNhhh]rS/h)rT/}rU/(hXThe location of the mpm server/daemon logs is based on the "outputif" configuration in the JSON config file. By default, this is /var/log/syslog.rV/hjP/hjC.hhh}rW/(h]h]h]h]h]uhKUh]rX/hXThe location of the mpm server/daemon logs is based on the "outputif" configuration in the JSON config file. By default, this is /var/log/syslog.rY/rZ/}r[/(hjV/hjT/ubaubaubj@)r\/}r]/(hXwThe load command writes the slave image segments to memory using UIO interface. The run command runs the slave images. hj.hjC.hjCh}r^/(h]h]h]h]h]uhNhhh]r_/h)r`/}ra/(hXvThe load command writes the slave image segments to memory using UIO interface. The run command runs the slave images.rb/hj\/hjC.hhh}rc/(h]h]h]h]h]uhKWh]rd/hXvThe load command writes the slave image segments to memory using UIO interface. The run command runs the slave images.re/rf/}rg/(hjb/hj`/ubaubaubj@)rh/}ri/(hXtAll events from the state transition diagram are available as options of mpmcl command, except for the crash event. hj.hjC.hjCh}rj/(h]h]h]h]h]uhNhhh]rk/h)rl/}rm/(hXsAll events from the state transition diagram are available as options of mpmcl command, except for the crash event.rn/hjh/hjC.hhh}ro/(h]h]h]h]h]uhKYh]rp/hXsAll events from the state transition diagram are available as options of mpmcl command, except for the crash event.rq/rr/}rs/(hjn/hjl/ubaubaubj@)rt/}ru/(hX-The reset state powers down the slave nodes. hj.hjC.hjCh}rv/(h]h]h]h]h]uhNhhh]rw/h)rx/}ry/(hX,The reset state powers down the slave nodes.rz/hjt/hjC.hhh}r{/(h]h]h]h]h]uhK[h]r|/hX,The reset state powers down the slave nodes.r}/r~/}r/(hjz/hjx/ubaubaubeubh)r/}r/(hX-**Software Flow Diagram Slave States in MPM**r/hj.hjC.hhh}r/(h]h]h]h]h]uhK]hhh]r/j)r/}r/(hj/h}r/(h]h]h]h]h]uhj/h]r/hX)Software Flow Diagram Slave States in MPMr/r/}r/(hUhj/ubahjubaubjr)r/}r/(hX'.. Image:: ../images/MPM_Structure.png hj.hjC.hjyh}r/(UuriX!linux/../images/MPM_Structure.pngr/h]h]h]h]jw}r/U*j/sh]uhK`hhh]ubh)r/}r/(hUhj.hjC.hhh}r/(h]h]h]h]r/U,methods-to-load-and-run-elf-images-using-mpmr/ah]r/hauhKbhhh]r/(h)r/}r/(hX,Methods to load and run ELF images using MPMr/hj/hjC.hhh}r/(h]h]h]h]h]uhKbhhh]r/hX,Methods to load and run ELF images using MPMr/r/}r/(hj/hj/ubaubh)r/}r/(hX2**Using mpmcl utility to manage slave processors**r/hj/hjC.hhh}r/(h]h]h]h]h]uhKdhhh]r/j)r/}r/(hj/h}r/(h]h]h]h]h]uhj/h]r/hX.Using mpmcl utility to manage slave processorsr/r/}r/(hUhj/ubahjubaubh)r/}r/(hXbUse mpmcl --help for details on the supported commands. The following is the output of mpmcl help:r/hj/hjC.hhh}r/(h]h]h]h]h]uhKfhhh]r/hXbUse mpmcl --help for details on the supported commands. The following is the output of mpmcl help:r/r/}r/(hj/hj/ubaubj)r/}r/(hXUsage: mpmcl [slave name] [options] Multiproc manager CLI to manage slave processors Commands for the slave processor Supported commands: ping, load, run, reset, status, coredump, transport load_withpreload, run_withpreload [slave name] Name of the slave processor as specified in MPM config file [options] In case of load, the option field need to have image file namehj/hjC.hjh}r/(hhh]h]h]h]h]uhM7 hhh]r/hXUsage: mpmcl [slave name] [options] Multiproc manager CLI to manage slave processors Commands for the slave processor Supported commands: ping, load, run, reset, status, coredump, transport load_withpreload, run_withpreload [slave name] Name of the slave processor as specified in MPM config file [options] In case of load, the option field need to have image file namer/r/}r/(hUhj/ubaubh)r/}r/(hXNThe following is a sample set of mpmcl commands for managing slave processors:r/hj/hjC.hhh}r/(h]h]h]h]h]uhKshhh]r/hXNThe following is a sample set of mpmcl commands for managing slave processors:r/r/}r/(hj/hj/ubaubjB)r/}r/(hUhj/hjC.hjEh}r/(h]h]h]h]h]uhNhhh]r/jH)r/}r/(hUh}r/(h]h]h]h]h]UcolsKuhj/h]r/(jM)r/}r/(hUh}r/(h]h]h]h]h]UcolwidthK=uhj/h]hjQubjM)r/}r/(hUh}r/(h]h]h]h]h]UcolwidthK0uhj/h]hjQubjX)r/}r/(hUh}r/(h]h]h]h]h]uhj/h]r/j])r/}r/(hUh}r/(h]h]h]h]h]uhj/h]r/(jb)r/}r/(hUh}r/(h]h]h]h]h]uhj/h]r/h)r/}r/(hXCommandr/hj/hjC.hhh}r/(h]h]h]h]h]uhKwh]r/hXCommandr/r/}r/(hj/hj/ubaubahjoubjb)r/}r/(hUh}r/(h]h]h]h]h]uhj/h]r/h)r/}r/(hX Descriptionr/hj/hjC.hhh}r/(h]h]h]h]h]uhKwh]r/hX Descriptionr/r/}r/(hj/hj/ubaubahjoubehjubahjubj)r/}r/(hUh}r/(h]h]h]h]h]uhj/h]r/(j])r/}r/(hUh}r/(h]h]h]h]h]uhj/h]r/(jb)r/}r/(hUh}r/(h]h]h]h]h]uhj/h]r/h)r/}r/(hX mpmcl pingr/hj/hjC.hhh}r0(h]h]h]h]h]uhKyh]r0hX mpmcl pingr0r0}r0(hj/hj/ubaubahjoubjb)r0}r0(hUh}r0(h]h]h]h]h]uhj/h]r0h)r 0}r 0(hXPing daemon if it is aliver 0hj0hjC.hhh}r 0(h]h]h]h]h]uhKyh]r 0hXPing daemon if it is aliver0r0}r0(hj 0hj 0ubaubahjoubehjubj])r0}r0(hUh}r0(h]h]h]h]h]uhj/h]r0(jb)r0}r0(hUh}r0(h]h]h]h]h]uhj0h]r0h)r0}r0(hXmpmcl status dsp0r0hj0hjC.hhh}r0(h]h]h]h]h]uhK{h]r0hXmpmcl status dsp0r0r0}r 0(hj0hj0ubaubahjoubjb)r!0}r"0(hUh}r#0(h]h]h]h]h]uhj0h]r$0h)r%0}r&0(hXCheck status of dsp core 0r'0hj!0hjC.hhh}r(0(h]h]h]h]h]uhK{h]r)0hXCheck status of dsp core 0r*0r+0}r,0(hj'0hj%0ubaubahjoubehjubj])r-0}r.0(hUh}r/0(h]h]h]h]h]uhj/h]r00(jb)r10}r20(hUh}r30(h]h]h]h]h]uhj-0h]r40h)r50}r60(hXmpmcl load dsp0 dsp-core0.outr70hj10hjC.hhh}r80(h]h]h]h]h]uhK}h]r90hXmpmcl load dsp0 dsp-core0.outr:0r;0}r<0(hj70hj50ubaubahjoubjb)r=0}r>0(hUh}r?0(h]h]h]h]h]uhj-0h]r@0h)rA0}rB0(hXLoad dsp core 0 with an imagerC0hj=0hjC.hhh}rD0(h]h]h]h]h]uhK}h]rE0hXLoad dsp core 0 with an imagerF0rG0}rH0(hjC0hjA0ubaubahjoubehjubj])rI0}rJ0(hUh}rK0(h]h]h]h]h]uhj/h]rL0(jb)rM0}rN0(hUh}rO0(h]h]h]h]h]uhjI0h]rP0h)rQ0}rR0(hXmpmcl run dsp0rS0hjM0hjC.hhh}rT0(h]h]h]h]h]uhKh]rU0hXmpmcl run dsp0rV0rW0}rX0(hjS0hjQ0ubaubahjoubjb)rY0}rZ0(hUh}r[0(h]h]h]h]h]uhjI0h]r\0h)r]0}r^0(hXRun dsp core 0r_0hjY0hjC.hhh}r`0(h]h]h]h]h]uhKh]ra0hXRun dsp core 0rb0rc0}rd0(hj_0hj]0ubaubahjoubehjubj])re0}rf0(hUh}rg0(h]h]h]h]h]uhj/h]rh0(jb)ri0}rj0(hUh}rk0(h]h]h]h]h]uhje0h]rl0h)rm0}rn0(hXmpmcl reset dsp0ro0hji0hjC.hhh}rp0(h]h]h]h]h]uhKh]rq0hXmpmcl reset dsp0rr0rs0}rt0(hjo0hjm0ubaubahjoubjb)ru0}rv0(hUh}rw0(h]h]h]h]h]uhje0h]rx0h)ry0}rz0(hXReset dsp core 0r{0hju0hjC.hhh}r|0(h]h]h]h]h]uhKh]r}0hXReset dsp core 0r~0r0}r0(hj{0hjy0ubaubahjoubehjubj])r0}r0(hUh}r0(h]h]h]h]h]uhj/h]r0(jb)r0}r0(hUh}r0(h]h]h]h]h]uhj0h]r0h)r0}r0(hX;mpmcl load_withpreload dsp0 preload_image.out dsp-core0.outr0hj0hjC.hhh}r0(h]h]h]h]h]uhKh]r0hX;mpmcl load_withpreload dsp0 preload_image.out dsp-core0.outr0r0}r0(hj0hj0ubaubahjoubjb)r0}r0(hUh}r0(h]h]h]h]h]uhj0h]r0h)r0}r0(hX*Load dsp core 0 image with a preload imager0hj0hjC.hhh}r0(h]h]h]h]h]uhKh]r0hX*Load dsp core 0 image with a preload imager0r0}r0(hj0hj0ubaubahjoubehjubj])r0}r0(hUh}r0(h]h]h]h]h]uhj/h]r0(jb)r0}r0(hUh}r0(h]h]h]h]h]uhj0h]r0h)r0}r0(hXmpmcl run_withpreload dsp0r0hj0hjC.hhh}r0(h]h]h]h]h]uhKh]r0hXmpmcl run_withpreload dsp0r0r0}r0(hj0hj0ubaubahjoubjb)r0}r0(hUh}r0(h]h]h]h]h]uhj0h]r0h)r0}r0(hXRun dsp core 0 with preloadr0hj0hjC.hhh}r0(h]h]h]h]h]uhKh]r0hXRun dsp core 0 with preloadr0r0}r0(hj0hj0ubaubahjoubehjubehjWubehjXubaubj)r0}r0(hXIn the case of an error, the mpm server takes the slave to error state. You need to run the reset command to change back to idle state so that the slave can be loaded and run again.r0hj/hjC.hjh}r0(h]h]h]h]h]uhNhhh]r0h)r0}r0(hj0hj0hjC.hhh}r0(h]h]h]h]h]uhKh]r0hXIn the case of an error, the mpm server takes the slave to error state. You need to run the reset command to change back to idle state so that the slave can be loaded and run again.r0r0}r0(hj0hj0ubaubaubj)r0}r0(hXThe idle status of the slave core means the slave core is not loaded as far as MPM is concerned. It does NOT mean the slave core is running idle instructions.r0hj/hjC.hjh}r0(h]h]h]h]h]uhNhhh]r0h)r0}r0(hj0hj0hjC.hhh}r0(h]h]h]h]h]uhKh]r0hXThe idle status of the slave core means the slave core is not loaded as far as MPM is concerned. It does NOT mean the slave core is running idle instructions.r0r0}r0(hj0hj0ubaubaubh)r0}r0(hUhj/hjC.hjh}r0(h]h]h]h]h]uhKhhh]r0j)r0}r0(hUjKhj0hjC.hhh}r0(h]h]h]h]h]uhKhhh]ubaubh)r0}r0(hX.**Loading and running slave images at bootup**r0hj/hjC.hhh}r0(h]h]h]h]h]uhKhhh]r0j)r0}r0(hj0h}r0(h]h]h]h]h]uhj0h]r0hX*Loading and running slave images at bootupr0r0}r0(hUhj0ubahjubaubh)r0}r0(hXThe config file can load a command script to load and run slave cores at bootup. The path of the script is to be added in "cmdfile": "/etc/mpm/slave_cmds.txt" in the config file. The following is a sample command to load and run DSP images:r0hj/hjC.hhh}r0(h]h]h]h]h]uhKhhh]r0hXThe config file can load a command script to load and run slave cores at bootup. The path of the script is to be added in "cmdfile": "/etc/mpm/slave_cmds.txt" in the config file. The following is a sample command to load and run DSP images:r0r0}r0(hj0hj0ubaubj)r0}r0(hXEdsp0 load ./dsp-core0.out dsp1 load ./dsp-core0.out dsp0 run dsp1 runhj/hjC.hjh}r0(hhh]h]h]h]h]uhMb hhh]r0hXEdsp0 load ./dsp-core0.out dsp1 load ./dsp-core0.out dsp0 run dsp1 runr0r0}r0(hUhj0ubaubh)r0}r0(hX6**Managing slave processors from application program**r0hj/hjC.hhh}r0(h]h]h]h]h]uhKhhh]r0j)r0}r0(hj0h}r0(h]h]h]h]h]uhj0h]r0hX2Managing slave processors from application programr0r0}r0(hUhj0ubahjubaubh)r0}r1(hXAn application can include mpmclient.h from the MPM package and link to libmpmclient.a to load/run/reset slave cores. The mpmcl essentially is a wrapper around this library to provide command line access for the functions from mpmclient.h.r1hj/hjC.hhh}r1(h]h]h]h]h]uhKhhh]r1hXAn application can include mpmclient.h from the MPM package and link to libmpmclient.a to load/run/reset slave cores. The mpmcl essentially is a wrapper around this library to provide command line access for the functions from mpmclient.h.r1r1}r1(hj1hj0ubaubh)r1}r1(hX**DSP Image Requirements**r 1hj/hjC.hhh}r 1(h]h]h]h]h]uhKhhh]r 1j)r 1}r 1(hj 1h}r1(h]h]h]h]h]uhj1h]r1hXDSP Image Requirementsr1r1}r1(hUhj 1ubahjubaubh)r1}r1(hXKFor MPM to properly load and manage a DSP image, the following is required:r1hj/hjC.hhh}r1(h]h]h]h]h]uhKhhh]r1hXKFor MPM to properly load and manage a DSP image, the following is required:r1r1}r1(hj1hj1ubaubj)r1}r1(hUhj/hjC.hj!h}r1(j#X-h]h]h]h]h]uhKhhh]r1(j@)r1}r 1(hX'The DSP image should be in ELF format. hj1hjC.hjCh}r!1(h]h]h]h]h]uhNhhh]r"1h)r#1}r$1(hX&The DSP image should be in ELF format.r%1hj1hjC.hhh}r&1(h]h]h]h]h]uhKh]r'1hX&The DSP image should be in ELF format.r(1r)1}r*1(hj%1hj#1ubaubaubj@)r+1}r,1(hXThe MPM ELF loader loads those segments to DSP memory, whose PT_LOAD field is set. In order to skip loading of a particular section, set the type to NOLOAD in the command/cfg file. hj1hjC.hjCh}r-1(h]h]h]h]h]uhNhhh]r.1h)r/1}r01(hXThe MPM ELF loader loads those segments to DSP memory, whose PT_LOAD field is set. In order to skip loading of a particular section, set the type to NOLOAD in the command/cfg file.r11hj+1hjC.hhh}r21(h]h]h]h]h]uhKh]r31hXThe MPM ELF loader loads those segments to DSP memory, whose PT_LOAD field is set. In order to skip loading of a particular section, set the type to NOLOAD in the command/cfg file.r41r51}r61(hj11hj/1ubaubaubeubj)r71}r81(hXg/* Section not to be loaded by remoteproc loader */ Program.sectMap[".noload_section"].type = "NOLOAD";hj/hjC.hjh}r91(hhh]h]h]h]r:1(j Xceh]uhKhhh]r;1(j )r<1}r=1(hX3/* Section not to be loaded by remoteproc loader */h}r>1(h]h]r?1(Ucommentr@1U multilinerA1eh]h]h]uhj71h]rB1hX3/* Section not to be loaded by remoteproc loader */rC1rD1}rE1(hUhj<1ubahj ubhX rF1}rG1(hX hj71ubj )rH1}rI1(hXProgramh}rJ1(h]h]rK1UnamerL1ah]h]h]uhj71h]rM1hXProgramrN1rO1}rP1(hUhjH1ubahj ubj )rQ1}rR1(hX.h}rS1(h]h]rT1U punctuationrU1ah]h]h]uhj71h]rV1hX.rW1}rX1(hUhjQ1ubahj ubj )rY1}rZ1(hXsectMaph}r[1(h]h]r\1Unamer]1ah]h]h]uhj71h]r^1hXsectMapr_1r`1}ra1(hUhjY1ubahj ubj )rb1}rc1(hX[h}rd1(h]h]re1U punctuationrf1ah]h]h]uhj71h]rg1hX[rh1}ri1(hUhjb1ubahj ubj )rj1}rk1(hX".noload_section"h}rl1(h]h]rm1(Uliteralrn1Ustringro1eh]h]h]uhj71h]rp1hX".noload_section"rq1rr1}rs1(hUhjj1ubahj ubj )rt1}ru1(hX].h}rv1(h]h]rw1U punctuationrx1ah]h]h]uhj71h]ry1hX].rz1r{1}r|1(hUhjt1ubahj ubj )r}1}r~1(hXtypeh}r1(h]h]r1Unamer1ah]h]h]uhj71h]r1hXtyper1r1}r1(hUhj}1ubahj ubhX r1}r1(hX hj71ubj )r1}r1(hX=h}r1(h]h]r1Uoperatorr1ah]h]h]uhj71h]r1hX=r1}r1(hUhj1ubahj ubhX r1}r1(hX hj71ubj )r1}r1(hX"NOLOAD"h}r1(h]h]r1(Uliteralr1Ustringr1eh]h]h]uhj71h]r1hX"NOLOAD"r1r1}r1(hUhj1ubahj ubj )r1}r1(hX;h}r1(h]h]r1U punctuationr1ah]h]h]uhj71h]r1hX;r1}r1(hUhj1ubahj ubeubj)r1}r1(hUhj/hjC.hj!h}r1(j#X-h]h]h]h]h]uhKhhh]r1j@)r1}r1(hXCThe default allowed memory ranges for DSP segments are as follows: hj1hjC.hjCh}r1(h]h]h]h]h]uhNhhh]r1h)r1}r1(hXBThe default allowed memory ranges for DSP segments are as follows:r1hj1hjC.hhh}r1(h]h]h]h]h]uhKh]r1hXBThe default allowed memory ranges for DSP segments are as follows:r1r1}r1(hj1hj1ubaubaubaubjB)r1}r1(hUhj/hjC.hjEh}r1(h]h]h]h]h]uhNhhh]r1jH)r1}r1(hUh}r1(h]h]h]h]h]UcolsKuhj1h]r1(jM)r1}r1(hUh}r1(h]h]h]h]h]UcolwidthKuhj1h]hjQubjM)r1}r1(hUh}r1(h]h]h]h]h]UcolwidthKuhj1h]hjQubjM)r1}r1(hUh}r1(h]h]h]h]h]UcolwidthK uhj1h]hjQubjX)r1}r1(hUh}r1(h]h]h]h]h]uhj1h]r1j])r1}r1(hUh}r1(h]h]h]h]h]uhj1h]r1(jb)r1}r1(hUh}r1(h]h]h]h]h]uhj1h]hjoubjb)r1}r1(hUh}r1(h]h]h]h]h]uhj1h]r1h)r1}r1(hX Start Addressr1hj1hjC.hhh}r1(h]h]h]h]h]uhKh]r1hX Start Addressr1r1}r1(hj1hj1ubaubahjoubjb)r1}r1(hUh}r1(h]h]h]h]h]uhj1h]r1h)r1}r1(hXLengthr1hj1hjC.hhh}r1(h]h]h]h]h]uhKh]r1hXLengthr1r1}r1(hj1hj1ubaubahjoubehjubahjubj)r1}r1(hUh}r1(h]h]h]h]h]uhj1h]r1(j])r1}r1(hUh}r1(h]h]h]h]h]uhj1h]r1(jb)r1}r1(hUh}r1(h]h]h]h]h]uhj1h]r1h)r1}r1(hXL2 Localr1hj1hjC.hhh}r1(h]h]h]h]h]uhKh]r1hXL2 Localr1r1}r1(hj1hj1ubaubahjoubjb)r1}r1(hUh}r1(h]h]h]h]h]uhj1h]r1h)r2}r2(hX 0x00800000r2hj1hjC.hhh}r2(h]h]h]h]h]uhKh]r2hX 0x00800000r2r2}r2(hj2hj2ubaubahjoubjb)r2}r 2(hUh}r 2(h]h]h]h]h]uhj1h]r 2h)r 2}r 2(hX1MBr2hj2hjC.hhh}r2(h]h]h]h]h]uhKh]r2hX1MBr2r2}r2(hj2hj 2ubaubahjoubehjubj])r2}r2(hUh}r2(h]h]h]h]h]uhj1h]r2(jb)r2}r2(hUh}r2(h]h]h]h]h]uhj2h]r2h)r2}r2(hX L2 Globalr2hj2hjC.hhh}r2(h]h]h]h]h]uhKh]r 2hX L2 Globalr!2r"2}r#2(hj2hj2ubaubahjoubjb)r$2}r%2(hUh}r&2(h]h]h]h]h]uhj2h]r'2h)r(2}r)2(hX0x[1-4]0800000r*2hj$2hjC.hhh}r+2(h]h]h]h]h]uhKh]r,2hX0x[1-4]0800000r-2r.2}r/2(hj*2hj(2ubaubahjoubjb)r02}r12(hUh}r22(h]h]h]h]h]uhj2h]r32h)r42}r52(hX1MBr62hj02hjC.hhh}r72(h]h]h]h]h]uhKh]r82hX1MBr92r:2}r;2(hj62hj42ubaubahjoubehjubj])r<2}r=2(hUh}r>2(h]h]h]h]h]uhj1h]r?2(jb)r@2}rA2(hUh}rB2(h]h]h]h]h]uhj<2h]rC2h)rD2}rE2(hXMSMCrF2hj@2hjC.hhh}rG2(h]h]h]h]h]uhKh]rH2hXMSMCrI2rJ2}rK2(hjF2hjD2ubaubahjoubjb)rL2}rM2(hUh}rN2(h]h]h]h]h]uhj<2h]rO2h)rP2}rQ2(hX 0x0C000000rR2hjL2hjC.hhh}rS2(h]h]h]h]h]uhKh]rT2hX 0x0C000000rU2rV2}rW2(hjR2hjP2ubaubahjoubjb)rX2}rY2(hUh}rZ2(h]h]h]h]h]uhj<2h]r[2h)r\2}r]2(hX6MBr^2hjX2hjC.hhh}r_2(h]h]h]h]h]uhKh]r`2hX6MBra2rb2}rc2(hj^2hj\2ubaubahjoubehjubj])rd2}re2(hUh}rf2(h]h]h]h]h]uhj1h]rg2(jb)rh2}ri2(hUh}rj2(h]h]h]h]h]uhjd2h]rk2h)rl2}rm2(hXDDR3rn2hjh2hjC.hhh}ro2(h]h]h]h]h]uhKh]rp2hXDDR3rq2rr2}rs2(hjn2hjl2ubaubahjoubjb)rt2}ru2(hUh}rv2(h]h]h]h]h]uhjd2h]rw2h)rx2}ry2(hX 0xA0000000rz2hjt2hjC.hhh}r{2(h]h]h]h]h]uhKh]r|2hX 0xA0000000r}2r~2}r2(hjz2hjx2ubaubahjoubjb)r2}r2(hUh}r2(h]h]h]h]h]uhjd2h]r2h)r2}r2(hX512MBr2hj2hjC.hhh}r2(h]h]h]h]h]uhKh]r2hX512MBr2r2}r2(hj2hj2ubaubahjoubehjubehjWubehjXubaubh)r2}r2(hXZThe segment mapping can be changed using the mpm_config.json and Linux kernel device tree.r2hj/hjC.hhh}r2(h]h]h]h]h]uhKhhh]r2hXZThe segment mapping can be changed using the mpm_config.json and Linux kernel device tree.r2r2}r2(hj2hj2ubaubh)r2}r2(hUhj/hjC.hjh}r2(h]h]h]h]h]uhKhhh]r2j)r2}r2(hUjKhj2hjC.hhh}r2(h]h]h]h]h]uhKhhh]ubaubeubeubh)r2}r2(hUhj1.hjC.hhh}r2(h]h]h]h]r2U'getting-started-with-ipc-linux-examplesr2ah]r2hPauhKhhh]r2(h)r2}r2(hX'Getting Started with IPC Linux Examplesr2hj2hjC.hhh}r2(h]h]h]h]h]uhKhhh]r2hX'Getting Started with IPC Linux Examplesr2r2}r2(hj2hj2ubaubh)r2}r2(hXThe figure below illustrates how remoteproc/rpmsg driver from ARM Linux kernel communicates with IPC driver on slave processor (e.g. DSP) running RTOS.r2hj2hjC.hhh}r2(h]h]h]h]h]uhKhhh]r2hXThe figure below illustrates how remoteproc/rpmsg driver from ARM Linux kernel communicates with IPC driver on slave processor (e.g. DSP) running RTOS.r2r2}r2(hj2hj2ubaubjr)r2}r2(hX2.. Image:: ../images/LinuxIPC_with_RTOS_Slave.png hj2hjC.hjyh}r2(UuriX,linux/../images/LinuxIPC_with_RTOS_Slave.pngr2h]h]h]h]jw}r2U*j2sh]uhKhhh]ubh)r2}r2(hXIn order to setup IPC on slave cores, we provide some pre-built examples in IPC package that can be run from ARM Linux. The subsequent sections describe how to build and run this examples and use that as a starting point for this effort.r2hj2hjC.hhh}r2(h]h]h]h]h]uhKhhh]r2hXIn order to setup IPC on slave cores, we provide some pre-built examples in IPC package that can be run from ARM Linux. The subsequent sections describe how to build and run this examples and use that as a starting point for this effort.r2r2}r2(hj2hj2ubaubh)r2}r2(hUhj2hjC.hjh}r2(h]h]h]h]h]uhKhhh]r2j)r2}r2(hUjKhj2hjC.hhh}r2(h]h]h]h]h]uhKhhh]ubaubh)r2}r2(hUhj2hjC.hhh}r2(h]h]h]h]r2U!building-the-bundled-ipc-examplesr2ah]r2hzauhKhhh]r2(h)r2}r2(hX!Building the Bundled IPC Examplesr2hj2hjC.hhh}r2(h]h]h]h]h]uhKhhh]r2hX!Building the Bundled IPC Examplesr2r2}r2(hj2hj2ubaubh)r2}r2(hXThe instructions to build IPC examples found under ipc_3_xx_xx_xx/examples/66AK2G_linux_elf have been provided in the `Processor SDK IPC Quick Start Guide `__.hj2hjC.hhh}r2(h]h]h]h]h]uhKhhh]r2(hXvThe instructions to build IPC examples found under ipc_3_xx_xx_xx/examples/66AK2G_linux_elf have been provided in the r2r2}r2(hXvThe instructions to build IPC examples found under ipc_3_xx_xx_xx/examples/66AK2G_linux_elf have been provided in the hj2ubj))r2}r2(hXc`Processor SDK IPC Quick Start Guide `__h}r2(UnameX#Processor SDK IPC Quick Start Guidej-X9Foundational_Components_IPC.html#build-ipc-linux-examplesh]h]h]h]h]uhj2h]r2hX#Processor SDK IPC Quick Start Guider2r2}r2(hUhj2ubahj2ubhX.r2}r2(hX.hj2ubeubh)r2}r2(hXLet's focus on one example in particular, ex02\_messageq, which is located at **/ipc\_3\_xx\_xx\_xx/examples/66AK2G\_linux\_elf/ex02\_messageq**.r2hj2hjC.hhh}r2(h]h]h]h]h]uhKhhh]r2(hXMLet's focus on one example in particular, ex02_messageq, which is located at r2r2}r2(hXNLet's focus on one example in particular, ex02\_messageq, which is located at hj2ubj)r2}r2(hXX**/ipc\_3\_xx\_xx\_xx/examples/66AK2G\_linux\_elf/ex02\_messageq**h}r2(h]h]h]h]h]uhj2h]r2hXM/ipc_3_xx_xx_xx/examples/66AK2G_linux_elf/ex02_messageqr2r2}r2(hUhj2ubahjubhX.r2}r2(hX.hj2ubeubh)r2}r2(hXDHere are the key files that you should see after a successful build:r2hj2hjC.hhh}r2(h]h]h]h]h]uhKhhh]r2hXDHere are the key files that you should see after a successful build:r2r2}r2(hj2hj2ubaubj)r2}r2(hXN├── core0 │ └── bin │ ├── debug │ │ └── server_core0.xe66 │ └── release │ └── server_core0.xe66 ├── host │ └── bin │ ├── debug │ │ └── app_host │ └── release │ │ └── app_hosthj2hjC.hjh}r3(hhh]h]h]h]h]uhM hhh]r3hXN├── core0 │ └── bin │ ├── debug │ │ └── server_core0.xe66 │ └── release │ └── server_core0.xe66 ├── host │ └── bin │ ├── debug │ │ └── app_host │ └── release │ │ └── app_hostr3r3}r3(hUhj2ubaubh)r3}r3(hUhj2hjC.hjh}r3(h]h]h]h]h]uhKhhh]r3j)r 3}r 3(hUjKhj3hjC.hhh}r 3(h]h]h]h]h]uhKhhh]ubaubeubh)r 3}r 3(hUhKhj2hjC.hhh}r3(h]h]h]h]r3U running-the-bundled-ipc-examplesr3ah]r3hNauhKhhh]r3(h)r3}r3(hX Running the Bundled IPC Examplesr3hj 3hjC.hhh}r3(h]h]h]h]h]uhKhhh]r3hX Running the Bundled IPC Examplesr3r3}r3(hj3hj3ubaubh)r3}r3(hX**NOTE 1**: Before running the IPC examples, any other application already running and using the DSP cores, need to be stopped and disabled. In addition, the EVM need to be rebooted so that the cache configuration of the previous firmware downloaded does not affect the execution of the example. In the Linux Filesystem distributed part of the Processor SDK, OpenCL examples are configured to run by default. So use the following procedure to shutdown the openCL under section before running the IPC example: `Disable OpenCL Application`_.hj 3hjC.hhh}r3(h]h]h]h]h]uhKhhh]r3(j)r3}r 3(hX **NOTE 1**h}r!3(h]h]h]h]h]uhj3h]r"3hXNOTE 1r#3r$3}r%3(hUhj3ubahjubhX: Before running the IPC examples, any other application already running and using the DSP cores, need to be stopped and disabled. In addition, the EVM need to be rebooted so that the cache configuration of the previous firmware downloaded does not affect the execution of the example. In the Linux Filesystem distributed part of the Processor SDK, OpenCL examples are configured to run by default. So use the following procedure to shutdown the openCL under section before running the IPC example: r&3r'3}r(3(hX: Before running the IPC examples, any other application already running and using the DSP cores, need to be stopped and disabled. In addition, the EVM need to be rebooted so that the cache configuration of the previous firmware downloaded does not affect the execution of the example. In the Linux Filesystem distributed part of the Processor SDK, OpenCL examples are configured to run by default. So use the following procedure to shutdown the openCL under section before running the IPC example: hj3ubj))r)3}r*3(hX`Disable OpenCL Application`_Uresolvedr+3Khj3hj2h}r,3(UnameXDisable OpenCL Applicationh]h]h]h]h]Urefidr-3Udisable-opencl-applicationr.3uh]r/3hXDisable OpenCL Applicationr03r13}r23(hUhj)3ubaubhX.r33}r43(hX.hj3ubeubh)r53}r63(hX**NOTE 2**: If the application really needs to dynamically download different DSP images, especially with different cache configuration, then a dummy image which resets the cache configuration in the DSP, need to be downloaded and run before downloading the actual example images.r73hj 3hjC.hhh}r83(h]h]h]h]h]uhKhhh]r93(j)r:3}r;3(hX **NOTE 2**h}r<3(h]h]h]h]h]uhj53h]r=3hXNOTE 2r>3r?3}r@3(hUhj:3ubahjubhX: If the application really needs to dynamically download different DSP images, especially with different cache configuration, then a dummy image which resets the cache configuration in the DSP, need to be downloaded and run before downloading the actual example images.rA3rB3}rC3(hX: If the application really needs to dynamically download different DSP images, especially with different cache configuration, then a dummy image which resets the cache configuration in the DSP, need to be downloaded and run before downloading the actual example images.hj53ubeubh)rD3}rE3(hXYou will need to copy the ex02\_messageq executable binaries onto the target (through SD card, NFS export, SCP, etc.). You can copy the entire ex02\_messageq directory, though we're primarily interested in these executable binaries:hj 3hjC.hhh}rF3(h]h]h]h]h]uhKhhh]rG3hXYou will need to copy the ex02_messageq executable binaries onto the target (through SD card, NFS export, SCP, etc.). You can copy the entire ex02_messageq directory, though we're primarily interested in these executable binaries:rH3rI3}rJ3(hXYou will need to copy the ex02\_messageq executable binaries onto the target (through SD card, NFS export, SCP, etc.). You can copy the entire ex02\_messageq directory, though we're primarily interested in these executable binaries:hjD3ubaubj)rK3}rL3(hUhj 3hjC.hj!h}rM3(j#X-h]h]h]h]h]uhKhhh]rN3(j@)rO3}rP3(hX"Core0/bin/debug/ server_core0.xe66rQ3hjK3hjC.hjCh}rR3(h]h]h]h]h]uhNhhh]rS3h)rT3}rU3(hjQ3hjO3hjC.hhh}rV3(h]h]h]h]h]uhKh]rW3hX"Core0/bin/debug/ server_core0.xe66rX3rY3}rZ3(hjQ3hjT3ubaubaubj@)r[3}r\3(hXhost/bin/debug/app_host hjK3hjC.hjCh}r]3(h]h]h]h]h]uhNhhh]r^3h)r_3}r`3(hXhost/bin/debug/app_hostra3hj[3hjC.hhh}rb3(h]h]h]h]h]uhKh]rc3hXhost/bin/debug/app_hostrd3re3}rf3(hja3hj_3ubaubaubeubh)rg3}rh3(hXlThe Multi-Processor Manager (MPM) Command Line utilities are used to download and start the DSP executables.ri3hj 3hjC.hhh}rj3(h]h]h]h]h]uhKhhh]rk3hXlThe Multi-Processor Manager (MPM) Command Line utilities are used to download and start the DSP executables.rl3rm3}rn3(hji3hjg3ubaubh)ro3}rp3(hX)Let’s load the example and run the DSP:rq3hj 3hjC.hhh}rr3(h]h]h]h]h]uhKhhh]rs3hX)Let’s load the example and run the DSP:rt3ru3}rv3(hjq3hjo3ubaubj)rw3}rx3(hXroot@k2g-evm:~# mpmcl reset dsp0 root@k2g-evm:~# mpmcl status dsp0 root@k2g-evm:~# mpmcl load dsp0 server_core0.xe66 root@k2g-evm:~# mpmcl run dsp0hj 3hjC.hjh}ry3(hhh]h]h]h]h]uhM hhh]rz3hXroot@k2g-evm:~# mpmcl reset dsp0 root@k2g-evm:~# mpmcl status dsp0 root@k2g-evm:~# mpmcl load dsp0 server_core0.xe66 root@k2g-evm:~# mpmcl run dsp0r{3r|3}r}3(hUhjw3ubaubh)r~3}r3(hX$You should see the following output:r3hj 3hjC.hhh}r3(h]h]h]h]h]uhMhhh]r3hX$You should see the following output:r3r3}r3(hj3hj~3ubaubj)r3}r3(hX[ 919.637071] remoteproc remoteproc0: powering up 10800000.dsp [ 919.650495] remoteproc remoteproc0: Booting unspecified pre-loaded fw image [ 919.683836] virtio_rpmsg_bus virtio0: rpmsg host is online [ 919.689355] virtio_rpmsg_bus virtio0: creating channel rpmsg-proto addr 0x3d [ 919.712755] remoteproc remoteproc0: registered virtio0 (type 7) [ 919.718671] remoteproc remoteproc0: remote processor 10800000.dsp is now uphj 3hjC.hjh}r3(hhh]h]h]h]h]uhM hhh]r3hX[ 919.637071] remoteproc remoteproc0: powering up 10800000.dsp [ 919.650495] remoteproc remoteproc0: Booting unspecified pre-loaded fw image [ 919.683836] virtio_rpmsg_bus virtio0: rpmsg host is online [ 919.689355] virtio_rpmsg_bus virtio0: creating channel rpmsg-proto addr 0x3d [ 919.712755] remoteproc remoteproc0: registered virtio0 (type 7) [ 919.718671] remoteproc remoteproc0: remote processor 10800000.dsp is now upr3r3}r3(hUhj3ubaubh)r3}r3(hX Now, we can run the IPC example:r3hj 3hjC.hhh}r3(h]h]h]h]h]uhMhhh]r3hX Now, we can run the IPC example:r3r3}r3(hj3hj3ubaubj)r3}r3(hX root@k2g-evm:~# ./app_host CORE0hj 3hjC.hjh}r3(hhh]h]h]h]h]uhM hhh]r3hX root@k2g-evm:~# ./app_host CORE0r3r3}r3(hUhj3ubaubh)r3}r3(hX%The following is the expected output:r3hj 3hjC.hhh}r3(h]h]h]h]h]uhMhhh]r3hX%The following is the expected output:r3r3}r3(hj3hj3ubaubj)r3}r3(hX|--> main: --> Main_main: --> App_create: App_create: Host is ready <-- App_create: --> App_exec: App_exec: sending message 1 App_exec: sending message 2 App_exec: sending message 3 App_exec: message received, sending message 4 App_exec: message received, sending message 5 App_exec: message received, sending message 6 App_exec: message received, sending message 7 App_exec: message received, sending message 8 App_exec: message received, sending message 9 App_exec: message received, sending message 10 App_exec: message received, sending message 11 App_exec: message received, sending message 12 App_exec: message received, sending message 13 App_exec: message received, sending message 14 App_exec: message received, sending message 15 App_exec: message received App_exec: message received App_exec: message received <-- App_exec: 0 --> App_delete: <-- App_delete: <-- Main_main: <-- main:hj 3hjC.hjh}r3(hhh]h]h]h]h]uhM hhh]r3hX|--> main: --> Main_main: --> App_create: App_create: Host is ready <-- App_create: --> App_exec: App_exec: sending message 1 App_exec: sending message 2 App_exec: sending message 3 App_exec: message received, sending message 4 App_exec: message received, sending message 5 App_exec: message received, sending message 6 App_exec: message received, sending message 7 App_exec: message received, sending message 8 App_exec: message received, sending message 9 App_exec: message received, sending message 10 App_exec: message received, sending message 11 App_exec: message received, sending message 12 App_exec: message received, sending message 13 App_exec: message received, sending message 14 App_exec: message received, sending message 15 App_exec: message received App_exec: message received App_exec: message received <-- App_exec: 0 --> App_delete: <-- App_delete: <-- Main_main: <-- main:r3r3}r3(hUhj3ubaubh)r3}r3(hUhj 3hjC.hjh}r3(h]h]h]h]h]uhM:hhh]r3j)r3}r3(hUjKhj3hjC.hhh}r3(h]h]h]h]h]uhKhhh]ubaubeubeubh)r3}r3(hUhj1.hjC.hhh}r3(h]h]h]h]r3Uunderstanding-the-memory-mapr3ah]r3hauhM=hhh]r3(h)r3}r3(hXUnderstanding the Memory Mapr3hj3hjC.hhh}r3(h]h]h]h]h]uhM=hhh]r3hXUnderstanding the Memory Mapr3r3}r3(hj3hj3ubaubh)r3}r3(hUhj3hjC.hhh}r3(h]h]h]h]r3Uid3r3ah]r3h auhM@hhh]r3(h)r3}r3(hXOverall Linux Memory Mapr3hj3hjC.hhh}r3(h]h]h]h]h]uhM@hhh]r3hXOverall Linux Memory Mapr3r3}r3(hj3hj3ubaubj)r3}r3(hXroot@k2g-evm:~# cat /proc/iomem [snip...] 80000000-8fffffff : System RAM (boot alias) 92800000-97ffffff : System RAM (boot alias) 9d000000-ffffffff : System RAM (boot alias) 800000000-80fffffff : System RAM 800008000-800dfffff : Kernel code 801000000-80109433b : Kernel data 812800000-817ffffff : System RAM 818000000-81cffffff : CMEM 81d000000-87fffffff : System RAMhj3hjC.hjh}r3(hhh]h]h]h]h]uhMhhh]r3hXroot@k2g-evm:~# cat /proc/iomem [snip...] 80000000-8fffffff : System RAM (boot alias) 92800000-97ffffff : System RAM (boot alias) 9d000000-ffffffff : System RAM (boot alias) 800000000-80fffffff : System RAM 800008000-800dfffff : Kernel code 801000000-80109433b : Kernel data 812800000-817ffffff : System RAM 818000000-81cffffff : CMEM 81d000000-87fffffff : System RAMr3r3}r3(hUhj3ubaubh)r3}r3(hX**CMA Carveouts**r3hj3hjC.hhh}r3(h]h]h]h]h]uhMPhhh]r3j)r3}r3(hj3h}r3(h]h]h]h]h]uhj3h]r3hX CMA Carveoutsr3r3}r3(hUhj3ubahjubaubh)r3}r3(hX#To view the allocation at run-time:r3hj3hjC.hhh}r3(h]h]h]h]h]uhMRhhh]r3hX#To view the allocation at run-time:r3r3}r3(hj3hj3ubaubj)r3}r3(hXroot@k2g-evm:~# dmesg | grep "Reserved memory" [ 0.000000] Reserved memory: created CMA memory pool at 0x000000081f800000, size 8 MiBhj3hjC.hjh}r3(hhh]h]h]h]h]uhM#hhh]r3hXroot@k2g-evm:~# dmesg | grep "Reserved memory" [ 0.000000] Reserved memory: created CMA memory pool at 0x000000081f800000, size 8 MiBr3r3}r3(hUhj3ubaubh)r3}r3(hX?The CMA block is defined in the following file for the K2G EVM:r3hj3hjC.hhh}r3(h]h]h]h]h]uhMYhhh]r3hX?The CMA block is defined in the following file for the K2G EVM:r3r3}r3(hj3hj3ubaubh)r3}r3(hX,linux/arch/arm/boot/dts/keystone-k2g-evm.dtsr3hj3hjC.hhh}r3(h]h]h]h]h]uhM[hhh]r3hX,linux/arch/arm/boot/dts/keystone-k2g-evm.dtsr3r4}r4(hj3hj3ubaubh)r4}r4(hX**CMEM**r4hj3hjC.hhh}r4(h]h]h]h]h]uhM]hhh]r4j)r4}r4(hj4h}r 4(h]h]h]h]h]uhj4h]r 4hXCMEMr 4r 4}r 4(hUhj4ubahjubaubh)r4}r4(hX#To view the allocation at run-time:r4hj3hjC.hhh}r4(h]h]h]h]h]uhM_hhh]r4hX#To view the allocation at run-time:r4r4}r4(hj4hj4ubaubj)r4}r4(hXroot@k2g-evm:~# cat /proc/cmem Block 0: Pool 0: 1 bufs size 0x5000000 (0x5000000 requested) Pool 0 busy bufs: Pool 0 free bufs: id 0: phys addr 0x818000000hj3hjC.hjh}r4(hhh]h]h]h]h]uhM0hhh]r4hXroot@k2g-evm:~# cat /proc/cmem Block 0: Pool 0: 1 bufs size 0x5000000 (0x5000000 requested) Pool 0 busy bufs: Pool 0 free bufs: id 0: phys addr 0x818000000r4r4}r4(hUhj4ubaubh)r4}r4(hXThis shows that we have defined a CMEM block at physical address 0x818000000 with total size 0x5000000. This block contains a buffer pool consisting of 1 buffer. Each buffer in the pool (only one in this case) is defined to have a size of 0x5000000.r4hj3hjC.hhh}r 4(h]h]h]h]h]uhMihhh]r!4hXThis shows that we have defined a CMEM block at physical address 0x818000000 with total size 0x5000000. This block contains a buffer pool consisting of 1 buffer. Each buffer in the pool (only one in this case) is defined to have a size of 0x5000000.r"4r#4}r$4(hj4hj4ubaubh)r%4}r&4(hX@The CMEM block is defined in the following file for the K2G EVM:r'4hj3hjC.hhh}r(4(h]h]h]h]h]uhMkhhh]r)4hX@The CMEM block is defined in the following file for the K2G EVM:r*4r+4}r,4(hj'4hj%4ubaubh)r-4}r.4(hX)linux/arch/arm/boot/dts/k2g-evm-cmem.dtsir/4hj3hjC.hhh}r04(h]h]h]h]h]uhMmhhh]r14hX)linux/arch/arm/boot/dts/k2g-evm-cmem.dtsir24r34}r44(hj/4hj-4ubaubh)r54}r64(hUhj3hjC.hjh}r74(h]h]h]h]h]uhMohhh]r84j)r94}r:4(hUjKhj54hjC.hhh}r;4(h]h]h]h]h]uhKhhh]ubaubeubeubh)r<4}r=4(hUhj1.hjC.hhh}r>4(h]h]h]h]r?4Uid4r@4ah]rA4h3auhMrhhh]rB4(h)rC4}rD4(hXChanging the DSP Memory MaprE4hj<4hjC.hhh}rF4(h]h]h]h]h]uhMrhhh]rG4hXChanging the DSP Memory MaprH4rI4}rJ4(hjE4hjC4ubaubh)rK4}rL4(hUhj<4hjC.hhh}rM4(h]h]h]h]rN4Ulinux-device-treerO4ah]rP4h"auhMuhhh]rQ4(h)rR4}rS4(hXLinux Device TreerT4hjK4hjC.hhh}rU4(h]h]h]h]h]uhMuhhh]rV4hXLinux Device TreerW4rX4}rY4(hjT4hjR4ubaubh)rZ4}r[4(hXThe carveouts for the DSP are defined in the Linux dts file. For the K2G EVM, these definitions are located in linux/arch/arm/boot/dts/keystone-k2g-evm.dtsr\4hjK4hjC.hhh}r]4(h]h]h]h]h]uhMwhhh]r^4hXThe carveouts for the DSP are defined in the Linux dts file. For the K2G EVM, these definitions are located in linux/arch/arm/boot/dts/keystone-k2g-evm.dtsr_4r`4}ra4(hj\4hjZ4ubaubj)rb4}rc4(hXRreserved-memory { #address-cells = <2>; #size-cells = <2>; ranges; dsp_common_mpm_memory: dsp-common-mpm-memory@81d000000 { compatible = "ti,keystone-dsp-mem-pool"; reg = <0x00000008 0x1d000000 0x00000000 0x2800000>; no-map; status = "okay"; }; dsp_common_memory: dsp-common-memory@81f800000 { compatible = "shared-dma-pool"; reg = <0x00000008 0x1f800000 0x00000000 0x800000>; reusable; status = "okay"; }; };hjK4hjC.hjh}rd4(hhh]h]h]h]h]uhMHhhh]re4hXRreserved-memory { #address-cells = <2>; #size-cells = <2>; ranges; dsp_common_mpm_memory: dsp-common-mpm-memory@81d000000 { compatible = "ti,keystone-dsp-mem-pool"; reg = <0x00000008 0x1d000000 0x00000000 0x2800000>; no-map; status = "okay"; }; dsp_common_memory: dsp-common-memory@81f800000 { compatible = "shared-dma-pool"; reg = <0x00000008 0x1f800000 0x00000000 0x800000>; reusable; status = "okay"; }; };rf4rg4}rh4(hUhjb4ubaubh)ri4}rj4(hX The memory region "dsp_common_mpm_memory" starts at address 0x9d000000 and has a size of 0x2800000 bytes. This region is where the DSP code/data needs to reside. If they are not in this region, you will see the error "load failed (error: -104)" when trying to load.rk4hjK4hjC.hhh}rl4(h]h]h]h]h]uhMhhh]rm4hX The memory region "dsp_common_mpm_memory" starts at address 0x9d000000 and has a size of 0x2800000 bytes. This region is where the DSP code/data needs to reside. If they are not in this region, you will see the error "load failed (error: -104)" when trying to load.rn4ro4}rp4(hjk4hji4ubaubh)rq4}rr4(hXThe memory region "dsp_common_memory” starts at address 0x9f800000 and has a size of 0x800000. This is a CMA pool, as indicated by the line “compatible = "shared-dma-pool";”, and is reserved for Virtque region and Rpmsg vring buffers.rs4hjK4hjC.hhh}rt4(h]h]h]h]h]uhMhhh]ru4hXThe memory region "dsp_common_memory” starts at address 0x9f800000 and has a size of 0x800000. This is a CMA pool, as indicated by the line “compatible = "shared-dma-pool";”, and is reserved for Virtque region and Rpmsg vring buffers.rv4rw4}rx4(hjs4hjq4ubaubh)ry4}rz4(hXAs of Processor SDK 5.2, the Virtque and vring buffers are allocated by the remoteproc driver from this region and communicated to the slave by update to the resource table.r{4hjK4hjC.hhh}r|4(h]h]h]h]h]uhMhhh]r}4hXAs of Processor SDK 5.2, the Virtque and vring buffers are allocated by the remoteproc driver from this region and communicated to the slave by update to the resource table.r~4r4}r4(hj{4hjy4ubaubeubh)r4}r4(hUhj<4hjC.hhh}r4(h]h]h]h]r4Uresource-tabler4ah]r4hauhMhhh]r4(h)r4}r4(hXResource Tabler4hj4hjC.hhh}r4(h]h]h]h]h]uhMhhh]r4hXResource Tabler4r4}r4(hj4hj4ubaubh)r4}r4(hXnThe default resource table for K2G is located at ipc_3_xx_xx_xx/packages/ti/ipc/remoteproc/rsc_table_tci6638.hr4hj4hjC.hhh}r4(h]h]h]h]h]uhMhhh]r4hXnThe default resource table for K2G is located at ipc_3_xx_xx_xx/packages/ti/ipc/remoteproc/rsc_table_tci6638.hr4r4}r4(hj4hj4ubaubh)r4}r4(hX\The resource table contains the definitions of the CMA carveout for the Rpmsg vring buffers.r4hj4hjC.hhh}r4(h]h]h]h]h]uhMhhh]r4hX\The resource table contains the definitions of the CMA carveout for the Rpmsg vring buffers.r4r4}r4(hj4hj4ubaubeubh)r4}r4(hUhj<4hjC.hhh}r4(h]h]h]h]r4Umpm-config-filer4ah]r4hauhMhhh]r4(h)r4}r4(hXMPM Config Filer4hj4hjC.hhh}r4(h]h]h]h]h]uhMhhh]r4hXMPM Config Filer4r4}r4(hj4hj4ubaubh)r4}r4(hXThe MPM configuration file is a JSON format configuration file and is located in the default root file system release as part of Processor SDK Linux. It is labeled “mpm_config.json” and is located in /etc/mpm.r4hj4hjC.hhh}r4(h]h]h]h]h]uhMhhh]r4hXThe MPM configuration file is a JSON format configuration file and is located in the default root file system release as part of Processor SDK Linux. It is labeled “mpm_config.json” and is located in /etc/mpm.r4r4}r4(hj4hj4ubaubh)r4}r4(hXDThe following are some details regarding the MPM configuration file:r4hj4hjC.hhh}r4(h]h]h]h]h]uhMhhh]r4hXDThe following are some details regarding the MPM configuration file:r4r4}r4(hj4hj4ubaubj)r4}r4(hUhj4hjC.hj!h}r4(j#X-h]h]h]h]h]uhMhhh]r4(j@)r4}r4(hX{The MPM parser ignores any JSON elements which it does not recognize. This can be used to put comments in the config file. hj4hjC.hjCh}r4(h]h]h]h]h]uhNhhh]r4h)r4}r4(hXzThe MPM parser ignores any JSON elements which it does not recognize. This can be used to put comments in the config file.r4hj4hjC.hhh}r4(h]h]h]h]h]uhMh]r4hXzThe MPM parser ignores any JSON elements which it does not recognize. This can be used to put comments in the config file.r4r4}r4(hj4hj4ubaubaubj@)r4}r4(hXcThe tag cmdfile (which is commented as _cmdfile by default) loads and runs MPM commands at bootup. hj4hjC.hjCh}r4(h]h]h]h]h]uhNhhh]r4h)r4}r4(hXbThe tag cmdfile (which is commented as _cmdfile by default) loads and runs MPM commands at bootup.r4hj4hjC.hhh}r4(h]h]h]h]h]uhMh]r4hXbThe tag cmdfile (which is commented as _cmdfile by default) loads and runs MPM commands at bootup.r4r4}r4(hj4hj4ubaubaubj@)r4}r4(hX_The tag outputif can be syslog, stderr or filename if it does not match any predefined string. hj4hjC.hjCh}r4(h]h]h]h]h]uhNhhh]r4h)r4}r4(hX^The tag outputif can be syslog, stderr or filename if it does not match any predefined string.r4hj4hjC.hhh}r4(h]h]h]h]h]uhMh]r4hX^The tag outputif can be syslog, stderr or filename if it does not match any predefined string.r4r4}r4(hj4hj4ubaubaubj@)r4}r4(hXBy default, the config file allows loading of DSP images to L2, MSMC and DDR. It can be changed to add more restrictions on loading, or to load to L1 sections. hj4hjC.hjCh}r4(h]h]h]h]h]uhNhhh]r4h)r4}r4(hXBy default, the config file allows loading of DSP images to L2, MSMC and DDR. It can be changed to add more restrictions on loading, or to load to L1 sections.r4hj4hjC.hhh}r4(h]h]h]h]h]uhMh]r4hXBy default, the config file allows loading of DSP images to L2, MSMC and DDR. It can be changed to add more restrictions on loading, or to load to L1 sections.r4r4}r4(hj4hj4ubaubaubj@)r4}r4(hXrIn current form, MPM does not do MPAX mapping for local to global addresses and the default MPAX mapping is used. hj4hjC.hjCh}r4(h]h]h]h]h]uhNhhh]r4h)r4}r4(hXqIn current form, MPM does not do MPAX mapping for local to global addresses and the default MPAX mapping is used.r4hj4hjC.hhh}r4(h]h]h]h]h]uhMh]r4hXqIn current form, MPM does not do MPAX mapping for local to global addresses and the default MPAX mapping is used.r4r4}r4(hj4hj4ubaubaubj@)r4}r5(hXBy default, the MPM configuration file configures the MSMC region with start address at 0x0c000000 and size of 0x600000 bytes, and the DDR region with start address of 0xa0000000 and size of 0x10000000 bytes, as seen in the snippet below. hj4hjC.hjCh}r5(h]h]h]h]h]uhNhhh]r5h)r5}r5(hXBy default, the MPM configuration file configures the MSMC region with start address at 0x0c000000 and size of 0x600000 bytes, and the DDR region with start address of 0xa0000000 and size of 0x10000000 bytes, as seen in the snippet below.r5hj4hjC.hhh}r5(h]h]h]h]h]uhMh]r5hXBy default, the MPM configuration file configures the MSMC region with start address at 0x0c000000 and size of 0x600000 bytes, and the DDR region with start address of 0xa0000000 and size of 0x10000000 bytes, as seen in the snippet below.r5r 5}r 5(hj5hj5ubaubaubeubj)r 5}r 5(hX{ "name": "local-msmc", "globaladdr": "0x0c000000", "length": "0x600000", "devicename": "/dev/dspmem" }, { "name": "local-ddr", "globaladdr": "0xa0000000", "length": "0x10000000", "devicename": "/dev/dspmem" },hj4hjC.hjh}r 5(jtjuX javascripthhh]h]h]jv}h]h]uhMhhh]r5hX{ "name": "local-msmc", "globaladdr": "0x0c000000", "length": "0x600000", "devicename": "/dev/dspmem" }, { "name": "local-ddr", "globaladdr": "0xa0000000", "length": "0x10000000", "devicename": "/dev/dspmem" },r5r5}r5(hUhj 5ubaubeubh)r5}r5(hUhj<4hjC.hhh}r5(h]h]h]h]r5U config-bldr5ah]r5hauhMhhh]r5(h)r5}r5(hX Config.bldr5hj5hjC.hhh}r5(h]h]h]h]h]uhMhhh]r5hX Config.bldr5r5}r 5(hj5hj5ubaubh)r!5}r"5(hX&The config.bld file is used by the IPC examples to configure the external memory map at the application level. It is located in /ipc_3_x_x_x/examples/66AK2G_linux_elf/ex02_messageq/shared/. A linker command file can be used as well, in place of a config.bld file, to place sections into memory.r#5hj5hjC.hhh}r$5(h]h]h]h]h]uhMhhh]r%5hX&The config.bld file is used by the IPC examples to configure the external memory map at the application level. It is located in /ipc_3_x_x_x/examples/66AK2G_linux_elf/ex02_messageq/shared/. A linker command file can be used as well, in place of a config.bld file, to place sections into memory.r&5r'5}r(5(hj#5hj!5ubaubh)r)5}r*5(hXBy default, the ex02_messageq runs from MSMC memory so the config.bld file is not used. In the next section, we will show how to modify the config.bld to place the DSP code in DDR.r+5hj5hjC.hhh}r,5(h]h]h]h]h]uhMhhh]r-5hXBy default, the ex02_messageq runs from MSMC memory so the config.bld file is not used. In the next section, we will show how to modify the config.bld to place the DSP code in DDR.r.5r/5}r05(hj+5hj)5ubaubeubeubh)r15}r25(hUhj1.hjC.hhh}r35(h]h]h]h]r45U/modifying-ex02-messageq-example-to-run-from-ddrr55ah]r65h1auhMhhh]r75(h)r85}r95(hX/Modifying ex02_messageQ example to run from DDRr:5hj15hjC.hhh}r;5(h]h]h]h]h]uhMhhh]r<5hX/Modifying ex02_messageQ example to run from DDRr=5r>5}r?5(hj:5hj85ubaubh)r@5}rA5(hXAs an example, the following section shows how to modify the IPC memory map to run the ex02_messageq example from DDR instead of MSMC.rB5hj15hjC.hhh}rC5(h]h]h]h]h]uhMhhh]rD5hXAs an example, the following section shows how to modify the IPC memory map to run the ex02_messageq example from DDR instead of MSMC.rE5rF5}rG5(hjB5hj@5ubaubh)rH5}rI5(hX**Changes to Config.bld**rJ5hj15hjC.hhh}rK5(h]h]h]h]h]uhMhhh]rL5j)rM5}rN5(hjJ5h}rO5(h]h]h]h]h]uhjH5h]rP5hXChanges to Config.bldrQ5rR5}rS5(hUhjM5ubahjubaubh)rT5}rU5(hX}We want to place the DSP application in DDR instead of MSMC, so we need to make the following changes to the config.bld file.rV5hj15hjC.hhh}rW5(h]h]h]h]h]uhMhhh]rX5hX}We want to place the DSP application in DDR instead of MSMC, so we need to make the following changes to the config.bld file.rY5rZ5}r[5(hjV5hjT5ubaubh)r\5}r]5(hXRemove the following lines:r^5hj15hjC.hhh}r_5(h]h]h]h]h]uhMhhh]r`5hXRemove the following lines:ra5rb5}rc5(hj^5hj\5ubaubj)rd5}re5(hX^ Build.platformTable["ti.platforms.evmTCI66AK2G02:core0"] = { externalMemoryMap: [ ] };hj15hjC.hjh}rf5(jtjuX javascripthhh]h]h]jv}h]h]uhMhhh]rg5hX^ Build.platformTable["ti.platforms.evmTCI66AK2G02:core0"] = { externalMemoryMap: [ ] };rh5ri5}rj5(hUhjd5ubaubh)rk5}rl5(hXand add the following:rm5hj15hjC.hhh}rn5(h]h]h]h]h]uhMhhh]ro5hXand add the following:rp5rq5}rr5(hjm5hjk5ubaubj)rs5}rt5(hXvar evmTCI66AK2G02_ExtMemMapDsp = { EXT_DDR: { name: "EXT_DDR", base: 0x9d000000, len: 0x00100000, space: "code/data", access: "RWX" }, }; Build.platformTable["ti.platforms.evmTCI66AK2G02:core0"] = { externalMemoryMap: [ [ "EXT_DDR", evmTCI66AK2G02_ExtMemMapDsp.EXT_DDR ], ], codeMemory: "EXT_DDR", dataMemory: "EXT_DDR", stackMemory: "EXT_DDR", };hj15hjC.hjh}ru5(jtjuX javascripthhh]h]h]jv}h]h]uhMhhh]rv5hXvar evmTCI66AK2G02_ExtMemMapDsp = { EXT_DDR: { name: "EXT_DDR", base: 0x9d000000, len: 0x00100000, space: "code/data", access: "RWX" }, }; Build.platformTable["ti.platforms.evmTCI66AK2G02:core0"] = { externalMemoryMap: [ [ "EXT_DDR", evmTCI66AK2G02_ExtMemMapDsp.EXT_DDR ], ], codeMemory: "EXT_DDR", dataMemory: "EXT_DDR", stackMemory: "EXT_DDR", };rw5rx5}ry5(hUhjs5ubaubh)rz5}r{5(hXThis will place the DSP code, data, and stack memory at address 0x9d000000. We have chosen address 0x9d000000 because that is what is defined in the Linux device tree by default. Refer to the “dsp_common_mpm_memory” block in the previous section “Linux Device Tree.” Note, the length specified here is 0x00100000; this must be less than the size of the dsp_common_mpm_memory pool.r|5hj15hjC.hhh}r}5(h]h]h]h]h]uhMhhh]r~5hXThis will place the DSP code, data, and stack memory at address 0x9d000000. We have chosen address 0x9d000000 because that is what is defined in the Linux device tree by default. Refer to the “dsp_common_mpm_memory” block in the previous section “Linux Device Tree.” Note, the length specified here is 0x00100000; this must be less than the size of the dsp_common_mpm_memory pool.r5r5}r5(hj|5hjz5ubaubh)r5}r5(hX"**Changes to the MPM Config File**r5hj15hjC.hhh}r5(h]h]h]h]h]uhMhhh]r5j)r5}r5(hj5h}r5(h]h]h]h]h]uhj5h]r5hXChanges to the MPM Config Filer5r5}r5(hUhj5ubahjubaubh)r5}r5(hX!By default, mpm_config.json defines the DDR region to start at 0xa0000000 with a length of 0x10000000. We need to change this to include the region where our application resides so we will change it to span from 0x90000000 to 0xc0000000. This can be increased as needed by the application.r5hj15hjC.hhh}r5(h]h]h]h]h]uhMhhh]r5hX!By default, mpm_config.json defines the DDR region to start at 0xa0000000 with a length of 0x10000000. We need to change this to include the region where our application resides so we will change it to span from 0x90000000 to 0xc0000000. This can be increased as needed by the application.r5r5}r5(hj5hj5ubaubh)r5}r5(hX,To do this, change the following block from:r5hj15hjC.hhh}r5(h]h]h]h]h]uhMhhh]r5hX,To do this, change the following block from:r5r5}r5(hj5hj5ubaubj)r5}r5(hX{ "name": "local-ddr", "globaladdr": "0xa0000000", "length": "0x10000000", "devicename": "/dev/dsp0" },hj15hjC.hjh}r5(jtjuX javascripthhh]h]h]jv}h]h]uhMhhh]r5hX{ "name": "local-ddr", "globaladdr": "0xa0000000", "length": "0x10000000", "devicename": "/dev/dsp0" },r5r5}r5(hUhj5ubaubh)r5}r5(hXTo:r5hj15hjC.hhh}r5(h]h]h]h]h]uhMhhh]r5hXTo:r5r5}r5(hj5hj5ubaubj)r5}r5(hX{ "name": "local-ddr", "globaladdr": "0x90000000", "length": "0x30000000", "devicename": "/dev/dsp0" },hj15hjC.hjh}r5(jtjuX javascripthhh]h]h]jv}h]h]uhMhhh]r5hX{ "name": "local-ddr", "globaladdr": "0x90000000", "length": "0x30000000", "devicename": "/dev/dsp0" },r5r5}r5(hUhj5ubaubh)r5}r5(hX**Changes to Core0.cfg**r5hj15hjC.hhh}r5(h]h]h]h]h]uhM hhh]r5j)r5}r5(hj5h}r5(h]h]h]h]h]uhj5h]r5hXChanges to Core0.cfgr5r5}r5(hUhj5ubahjubaubh)r5}r5(hXRemove the following lines:r5hj15hjC.hhh}r5(h]h]h]h]h]uhMhhh]r5hXRemove the following lines:r5r5}r5(hj5hj5ubaubj)r5}r5(hXProgram.sectMap[".text:_c_int00"] = new Program.SectionSpec(); Program.sectMap[".text:_c_int00"].loadSegment = "L2SRAM"; Program.sectMap[".text:_c_int00"].loadAlign = 0x400;hj15hjC.hjh}r5(jtjuX javascripthhh]h]h]jv}h]h]uhMhhh]r5hXProgram.sectMap[".text:_c_int00"] = new Program.SectionSpec(); Program.sectMap[".text:_c_int00"].loadSegment = "L2SRAM"; Program.sectMap[".text:_c_int00"].loadAlign = 0x400;r5r5}r5(hUhj5ubaubh)r5}r5(hXiThese lines above place the .text section into L2SRAM. We want it to be in DDR so it needs to be removed.r5hj15hjC.hhh}r5(h]h]h]h]h]uhMhhh]r5hXiThese lines above place the .text section into L2SRAM. We want it to be in DDR so it needs to be removed.r5r5}r5(hj5hj5ubaubh)r5}r5(hXRemove the following lines:r5hj15hjC.hhh}r5(h]h]h]h]h]uhMhhh]r5hXRemove the following lines:r5r5}r5(hj5hj5ubaubj)r5}r5(hXovar Resource = xdc.useModule('ti.ipc.remoteproc.Resource'); Resource.loadSegment = Program.platform.dataMemory;hj15hjC.hjh}r5(hhh]h]h]h]h]uhMhhh]r5hXovar Resource = xdc.useModule('ti.ipc.remoteproc.Resource'); Resource.loadSegment = Program.platform.dataMemory;r5r5}r5(hUhj5ubaubh)r5}r5(hXeThese lines place the resource table into the dataMemory section, which in our case is in DDR memory.r5hj15hjC.hhh}r5(h]h]h]h]h]uhM hhh]r5hXeThese lines place the resource table into the dataMemory section, which in our case is in DDR memory.r5r5}r5(hj5hj5ubaubh)r5}r5(hXThe Remoteproc driver requires the trace buffers and resource table to be placed into L2SRAM. If they are not, you will see the following error when loading:r5hj15hjC.hhh}r5(h]h]h]h]h]uhM"hhh]r5hXThe Remoteproc driver requires the trace buffers and resource table to be placed into L2SRAM. If they are not, you will see the following error when loading:r5r5}r5(hj5hj5ubaubj)r5}r5(hXgkeystone-rproc 10800000.dsp: error in ioctl call: cmd 0x40044902 (2), ret -22 load failed (error: -107)hj15hjC.hjh}r5(hhh]h]h]h]h]uhMhhh]r5hXgkeystone-rproc 10800000.dsp: error in ioctl call: cmd 0x40044902 (2), ret -22 load failed (error: -107)r5r5}r5(hUhj5ubaubh)r5}r5(hXdSo we will need to add the following lines to place the trace buffer and resource table into L2SRAM:r5hj15hjC.hhh}r6(h]h]h]h]h]uhM*hhh]r6hXdSo we will need to add the following lines to place the trace buffer and resource table into L2SRAM:r6r6}r6(hj5hj5ubaubj)r6}r6(hX;Program.sectMap[".far"] = new Program.SectionSpec(); Program.sectMap[".far"].loadSegment = "L2SRAM"; Program.sectMap[".resource_table"] = new Program.SectionSpec(); Program.sectMap[".resource_table"].loadSegment = "L2SRAM"; var Resource = xdc.useModule('ti.ipc.remoteproc.Resource'); Resource.loadSegment = "L2SRAM"hj15hjC.hjh}r6(hhh]h]h]h]h]uhMhhh]r6hX;Program.sectMap[".far"] = new Program.SectionSpec(); Program.sectMap[".far"].loadSegment = "L2SRAM"; Program.sectMap[".resource_table"] = new Program.SectionSpec(); Program.sectMap[".resource_table"].loadSegment = "L2SRAM"; var Resource = xdc.useModule('ti.ipc.remoteproc.Resource'); Resource.loadSegment = "L2SRAM"r 6r 6}r 6(hUhj6ubaubh)r 6}r 6(hX<Now follow the steps in `Running the Bundled IPC Examples`_.r6hj15hjC.hhh}r6(h]h]h]h]h]uhM7hhh]r6(hXNow follow the steps in r6r6}r6(hXNow follow the steps in hj 6ubj))r6}r6(hX#`Running the Bundled IPC Examples`_j+3Khj 6hj2h}r6(UnameX Running the Bundled IPC Examplesh]h]h]h]h]j-3j3uh]r6hX Running the Bundled IPC Examplesr6r6}r6(hUhj6ubaubhX.r6}r6(hX.hj 6ubeubeubh)r6}r6(hUhj1.hjC.hhh}r6(h]h]h]h]r 6U-loading-dsp-images-from-ccs-without-using-mpmr!6ah]r"6hdauhM;hhh]r#6(h)r$6}r%6(hX/Loading DSP images from CCS (without using MPM)r&6hj6hjC.hhh}r'6(h]h]h]h]h]uhM;hhh]r(6hX/Loading DSP images from CCS (without using MPM)r)6r*6}r+6(hj&6hj$6ubaubh)r,6}r-6(hXBy default, the DSP cores are powered down by u-boot at the time of EVM boot. After kernel is running, MPM can be used to load and run DSP images from Linux command-line/utility.r.6hj6hjC.hhh}r/6(h]h]h]h]h]uhM=hhh]r06hXBy default, the DSP cores are powered down by u-boot at the time of EVM boot. After kernel is running, MPM can be used to load and run DSP images from Linux command-line/utility.r16r26}r36(hj.6hj,6ubaubh)r46}r56(hXzRather than using MPM, if you want to use CCS to load and run DSP images, then set the following setting in u-boot prompt:r66hj6hjC.hhh}r76(h]h]h]h]h]uhM?hhh]r86hXzRather than using MPM, if you want to use CCS to load and run DSP images, then set the following setting in u-boot prompt:r96r:6}r;6(hj66hj46ubaubj)r<6}r=6(hX$setenv debug_options 1 saveenv resethj6hjC.hjh}r>6(hhh]h]h]h]h]uhMhhh]r?6hX$setenv debug_options 1 saveenv resetr@6rA6}rB6(hUhj<6ubaubh)rC6}rD6(hXThis will not power down DSPs at startup and CCS/JTAG can connect to the DSP for loading and debugging. This option is useful if you want to boot Linux on ARM and then use JTAG to manually load and run the DSPs. Otherwise you may see "held in reset" errors in CCS.rE6hj6hjC.hhh}rF6(h]h]h]h]h]uhMGhhh]rG6hXThis will not power down DSPs at startup and CCS/JTAG can connect to the DSP for loading and debugging. This option is useful if you want to boot Linux on ARM and then use JTAG to manually load and run the DSPs. Otherwise you may see "held in reset" errors in CCS.rH6rI6}rJ6(hjE6hjC6ubaubj)rK6}rL6(hXpThe above step is not needed if you want to load DSP cores using MPM and subsequently use CCS to connect to DSP.rM6hj6hjC.hjh}rN6(h]h]h]h]h]uhNhhh]rO6h)rP6}rQ6(hjM6hjK6hjC.hhh}rR6(h]h]h]h]h]uhMIh]rS6hXpThe above step is not needed if you want to load DSP cores using MPM and subsequently use CCS to connect to DSP.rT6rU6}rV6(hjM6hjP6ubaubaubeubh)rW6}rX6(hUhj1.hjC.hhh}rY6(h]h]h]h]rZ6U mpm-debuggingr[6ah]r\6hEauhMLhhh]r]6(h)r^6}r_6(hX MPM Debuggingr`6hjW6hjC.hhh}ra6(h]h]h]h]h]uhMLhhh]rb6hX MPM Debuggingrc6rd6}re6(hj`6hj^6ubaubh)rf6}rg6(hX2The following are some pointers for MPM debugging.rh6hjW6hjC.hhh}ri6(h]h]h]h]h]uhMNhhh]rj6hX2The following are some pointers for MPM debugging.rk6rl6}rm6(hjh6hjf6ubaubh)rn6}ro6(hX**MPM Error Codes**rp6hjW6hjC.hhh}rq6(h]h]h]h]h]uhMPhhh]rr6j)rs6}rt6(hjp6h}ru6(h]h]h]h]h]uhjn6h]rv6hXMPM Error Codesrw6rx6}ry6(hUhjs6ubahjubaubj)rz6}r{6(hUhjW6hjC.hj!h}r|6(j#X-h]h]h]h]h]uhMRhhh]r}6(j@)r~6}r6(hXWIf MPM server crashed/exited/not running in the system, mpmcl ping will return failure hjz6hjC.hjCh}r6(h]h]h]h]h]uhNhhh]r6h)r6}r6(hXVIf MPM server crashed/exited/not running in the system, mpmcl ping will return failurer6hj~6hjC.hhh}r6(h]h]h]h]h]uhMRh]r6hXVIf MPM server crashed/exited/not running in the system, mpmcl ping will return failurer6r6}r6(hj6hj6ubaubaubj@)r6}r6(hXoIf there is any load/run/reset failure MPM client provides error codes. The major error codes are given below. hjz6hjC.hjCh}r6(h]h]h]h]h]uhNhhh]r6h)r6}r6(hXnIf there is any load/run/reset failure MPM client provides error codes. The major error codes are given below.r6hj6hjC.hhh}r6(h]h]h]h]h]uhMTh]r6hXnIf there is any load/run/reset failure MPM client provides error codes. The major error codes are given below.r6r6}r6(hj6hj6ubaubaubeubjB)r6}r6(hUhjW6hjC.hjEh}r6(h]h]h]h]h]uhNhhh]r6jH)r6}r6(hUh}r6(h]h]h]h]h]UcolsKuhj6h]r6(jM)r6}r6(hUh}r6(h]h]h]h]h]UcolwidthK uhj6h]hjQubjM)r6}r6(hUh}r6(h]h]h]h]h]UcolwidthK$uhj6h]hjQubjX)r6}r6(hUh}r6(h]h]h]h]h]uhj6h]r6j])r6}r6(hUh}r6(h]h]h]h]h]uhj6h]r6(jb)r6}r6(hUh}r6(h]h]h]h]h]uhj6h]r6h)r6}r6(hX error coder6hj6hjC.hhh}r6(h]h]h]h]h]uhMWh]r6hX error coder6r6}r6(hj6hj6ubaubahjoubjb)r6}r6(hUh}r6(h]h]h]h]h]uhj6h]r6h)r6}r6(hX error typer6hj6hjC.hhh}r6(h]h]h]h]h]uhMWh]r6hX error typer6r6}r6(hj6hj6ubaubahjoubehjubahjubj)r6}r6(hUh}r6(h]h]h]h]h]uhj6h]r6(j])r6}r6(hUh}r6(h]h]h]h]h]uhj6h]r6(jb)r6}r6(hUh}r6(h]h]h]h]h]uhj6h]r6h)r6}r6(hX-100r6hj6hjC.hhh}r6(h]h]h]h]h]uhMYh]r6hX-100r6r6}r6(hj6hj6ubaubahjoubjb)r6}r6(hUh}r6(h]h]h]h]h]uhj6h]r6h)r6}r6(hXerror_ssm_unexpected_eventr6hj6hjC.hhh}r6(h]h]h]h]h]uhMYh]r6hXerror_ssm_unexpected_eventr6r6}r6(hj6hj6ubaubahjoubehjubj])r6}r6(hUh}r6(h]h]h]h]h]uhj6h]r6(jb)r6}r6(hUh}r6(h]h]h]h]h]uhj6h]r6h)r6}r6(hX-101r6hj6hjC.hhh}r6(h]h]h]h]h]uhM[h]r6hX-101r6r6}r6(hj6hj6ubaubahjoubjb)r6}r6(hUh}r6(h]h]h]h]h]uhj6h]r6h)r6}r6(hXerror_ssm_invalid_eventr6hj6hjC.hhh}r6(h]h]h]h]h]uhM[h]r6hXerror_ssm_invalid_eventr6r6}r6(hj6hj6ubaubahjoubehjubj])r7}r7(hUh}r7(h]h]h]h]h]uhj6h]r7(jb)r7}r7(hUh}r7(h]h]h]h]h]uhj7h]r7h)r7}r 7(hX-102r 7hj7hjC.hhh}r 7(h]h]h]h]h]uhM]h]r 7hX-102r 7r7}r7(hj 7hj7ubaubahjoubjb)r7}r7(hUh}r7(h]h]h]h]h]uhj7h]r7h)r7}r7(hXerror_invalid_name_lengthr7hj7hjC.hhh}r7(h]h]h]h]h]uhM]h]r7hXerror_invalid_name_lengthr7r7}r7(hj7hj7ubaubahjoubehjubj])r7}r7(hUh}r7(h]h]h]h]h]uhj6h]r7(jb)r 7}r!7(hUh}r"7(h]h]h]h]h]uhj7h]r#7h)r$7}r%7(hX-103r&7hj 7hjC.hhh}r'7(h]h]h]h]h]uhM_h]r(7hX-103r)7r*7}r+7(hj&7hj$7ubaubahjoubjb)r,7}r-7(hUh}r.7(h]h]h]h]h]uhj7h]r/7h)r07}r17(hXerror_file_openr27hj,7hjC.hhh}r37(h]h]h]h]h]uhM_h]r47hXerror_file_openr57r67}r77(hj27hj07ubaubahjoubehjubj])r87}r97(hUh}r:7(h]h]h]h]h]uhj6h]r;7(jb)r<7}r=7(hUh}r>7(h]h]h]h]h]uhj87h]r?7h)r@7}rA7(hX-104rB7hj<7hjC.hhh}rC7(h]h]h]h]h]uhMah]rD7hX-104rE7rF7}rG7(hjB7hj@7ubaubahjoubjb)rH7}rI7(hUh}rJ7(h]h]h]h]h]uhj87h]rK7h)rL7}rM7(hXerror_image_loadrN7hjH7hjC.hhh}rO7(h]h]h]h]h]uhMah]rP7hXerror_image_loadrQ7rR7}rS7(hjN7hjL7ubaubahjoubehjubj])rT7}rU7(hUh}rV7(h]h]h]h]h]uhj6h]rW7(jb)rX7}rY7(hUh}rZ7(h]h]h]h]h]uhjT7h]r[7h)r\7}r]7(hX-105r^7hjX7hjC.hhh}r_7(h]h]h]h]h]uhMch]r`7hX-105ra7rb7}rc7(hj^7hj\7ubaubahjoubjb)rd7}re7(hUh}rf7(h]h]h]h]h]uhjT7h]rg7h)rh7}ri7(hX error_uiorj7hjd7hjC.hhh}rk7(h]h]h]h]h]uhMch]rl7hX error_uiorm7rn7}ro7(hjj7hjh7ubaubahjoubehjubj])rp7}rq7(hUh}rr7(h]h]h]h]h]uhj6h]rs7(jb)rt7}ru7(hUh}rv7(h]h]h]h]h]uhjp7h]rw7h)rx7}ry7(hX-106rz7hjt7hjC.hhh}r{7(h]h]h]h]h]uhMeh]r|7hX-106r}7r~7}r7(hjz7hjx7ubaubahjoubjb)r7}r7(hUh}r7(h]h]h]h]h]uhjp7h]r7h)r7}r7(hX!error_image_invalid_entry_addressr7hj7hjC.hhh}r7(h]h]h]h]h]uhMeh]r7hX!error_image_invalid_entry_addressr7r7}r7(hj7hj7ubaubahjoubehjubj])r7}r7(hUh}r7(h]h]h]h]h]uhj6h]r7(jb)r7}r7(hUh}r7(h]h]h]h]h]uhj7h]r7h)r7}r7(hX-107r7hj7hjC.hhh}r7(h]h]h]h]h]uhMgh]r7hX-107r7r7}r7(hj7hj7ubaubahjoubjb)r7}r7(hUh}r7(h]h]h]h]h]uhj7h]r7h)r7}r7(hXerror_resource_table_settingr7hj7hjC.hhh}r7(h]h]h]h]h]uhMgh]r7hXerror_resource_table_settingr7r7}r7(hj7hj7ubaubahjoubehjubj])r7}r7(hUh}r7(h]h]h]h]h]uhj6h]r7(jb)r7}r7(hUh}r7(h]h]h]h]h]uhj7h]r7h)r7}r7(hX-108r7hj7hjC.hhh}r7(h]h]h]h]h]uhMih]r7hX-108r7r7}r7(hj7hj7ubaubahjoubjb)r7}r7(hUh}r7(h]h]h]h]h]uhj7h]r7h)r7}r7(hXerror_error_no_entry_pointr7hj7hjC.hhh}r7(h]h]h]h]h]uhMih]r7hXerror_error_no_entry_pointr7r7}r7(hj7hj7ubaubahjoubehjubj])r7}r7(hUh}r7(h]h]h]h]h]uhj6h]r7(jb)r7}r7(hUh}r7(h]h]h]h]h]uhj7h]r7h)r7}r7(hX-109r7hj7hjC.hhh}r7(h]h]h]h]h]uhMkh]r7hX-109r7r7}r7(hj7hj7ubaubahjoubjb)r7}r7(hUh}r7(h]h]h]h]h]uhj7h]r7h)r7}r7(hXerror_invalid_commandr7hj7hjC.hhh}r7(h]h]h]h]h]uhMkh]r7hXerror_invalid_commandr7r7}r7(hj7hj7ubaubahjoubehjubehjWubehjXubaubj)r7}r7(hUhjW6hjC.hj!h}r7(j#X-h]h]h]h]h]uhMnhhh]r7j@)r7}r7(hXnThe MPM daemon logs goes to /var/log/syslog by default. This file can provide more information on the errors. hj7hjC.hjCh}r7(h]h]h]h]h]uhNhhh]r7h)r7}r7(hXmThe MPM daemon logs goes to /var/log/syslog by default. This file can provide more information on the errors.r7hj7hjC.hhh}r7(h]h]h]h]h]uhMnh]r7hXmThe MPM daemon logs goes to /var/log/syslog by default. This file can provide more information on the errors.r7r7}r7(hj7hj7ubaubaubaubh)r7}r7(hX'**DSP trace/print messages from Linux**r7hjW6hjC.hhh}r7(h]h]h]h]h]uhMphhh]r7j)r7}r7(hj7h}r7(h]h]h]h]h]uhj7h]r7hX#DSP trace/print messages from Linuxr7r7}r7(hUhj7ubahjubaubh)r7}r7(hXBThe DSP log messages can be read from following debugfs locations:r7hjW6hjC.hhh}r7(h]h]h]h]h]uhMrhhh]r8hXBThe DSP log messages can be read from following debugfs locations:r8r8}r8(hj7hj7ubaubj)r8}r8(hXIDSP log entry for core #: /sys/kernel/debug/remoteproc/remoteproc#/trace0hjW6hjC.hjh}r8(hhh]h]h]h]h]uhMChhh]r8hXIDSP log entry for core #: /sys/kernel/debug/remoteproc/remoteproc#/trace0r8r 8}r 8(hUhj8ubaubh)r 8}r 8(hX'Where # is the core id starting from 0.r 8hjW6hjC.hhh}r8(h]h]h]h]h]uhMxhhh]r8hX'Where # is the core id starting from 0.r8r8}r8(hj 8hj 8ubaubj)r8}r8(hXyroot@keystone-evm:~# cat /sys/kernel/debug/remoteproc/remoteproc0/trace0 Main started on core 1 .... root@keystone-evm:~#hjW6hjC.hjh}r8(hhh]h]h]h]h]uhMIhhh]r8hXyroot@keystone-evm:~# cat /sys/kernel/debug/remoteproc/remoteproc0/trace0 Main started on core 1 .... root@keystone-evm:~#r8r8}r8(hUhj8ubaubh)r8}r8(hUhjW6hjC.hhh}r8(h]h]h]h]r8Udetecting-crash-event-in-mpmr8ah]r8heauhMhhh]r 8(h)r!8}r"8(hXDetecting crash event in MPMr#8hj8hjC.hhh}r$8(h]h]h]h]h]uhMhhh]r%8hXDetecting crash event in MPMr&8r'8}r(8(hj#8hj!8ubaubh)r)8}r*8(hXIn the case of a DSP exception, the MPM calls the script provided in JSON config file. The Processor SDK Linux filesystem has a sample script /etc/mpm/crash_callback.sh that sends message to syslog indicating which core crashed. This script can be customized to suit notification needs.r+8hj8hjC.hhh}r,8(h]h]h]h]h]uhMhhh]r-8hXIn the case of a DSP exception, the MPM calls the script provided in JSON config file. The Processor SDK Linux filesystem has a sample script /etc/mpm/crash_callback.sh that sends message to syslog indicating which core crashed. This script can be customized to suit notification needs.r.8r/8}r08(hj+8hj)8ubaubh)r18}r28(hX**Generating DSP coredump**r38hj8hjC.hhh}r48(h]h]h]h]h]uhMhhh]r58j)r68}r78(hj38h}r88(h]h]h]h]h]uhj18h]r98hXGenerating DSP coredumpr:8r;8}r<8(hUhj68ubahjubaubh)r=8}r>8(hX/The DSP exceptions can be any of the following:r?8hj8hjC.hhh}r@8(h]h]h]h]h]uhMhhh]rA8hX/The DSP exceptions can be any of the following:rB8rC8}rD8(hj?8hj=8ubaubj)rE8}rF8(hUhj8hjC.hj!h}rG8(j#X-h]h]h]h]h]uhMhhh]rH8(j@)rI8}rJ8(hXSoftware-generated exceptionsrK8hjE8hjC.hjCh}rL8(h]h]h]h]h]uhNhhh]rM8h)rN8}rO8(hjK8hjI8hjC.hhh}rP8(h]h]h]h]h]uhMh]rQ8hXSoftware-generated exceptionsrR8rS8}rT8(hjK8hjN8ubaubaubj@)rU8}rV8(hXInternal/external exceptionsrW8hjE8hjC.hjCh}rX8(h]h]h]h]h]uhNhhh]rY8h)rZ8}r[8(hjW8hjU8hjC.hhh}r\8(h]h]h]h]h]uhMh]r]8hXInternal/external exceptionsr^8r_8}r`8(hjW8hjZ8ubaubaubj@)ra8}rb8(hXWatchdog timer expiration hjE8hjC.hjCh}rc8(h]h]h]h]h]uhNhhh]rd8h)re8}rf8(hXWatchdog timer expirationrg8hja8hjC.hhh}rh8(h]h]h]h]h]uhMh]ri8hXWatchdog timer expirationrj8rk8}rl8(hjg8hje8ubaubaubeubh)rm8}rn8(hX+The MPM creates an ELF formatted core dump.ro8hj8hjC.hhh}rp8(h]h]h]h]h]uhMhhh]rq8hX+The MPM creates an ELF formatted core dump.rr8rs8}rt8(hjo8hjm8ubaubj)ru8}rv8(hX5root@keystone-evm:~# mpmcl coredump dsp0 coredump.outhj8hjC.hjh}rw8(hhh]h]h]h]h]uhM_hhh]rx8hX5root@keystone-evm:~# mpmcl coredump dsp0 coredump.outry8rz8}r{8(hUhju8ubaubh)r|8}r}8(hXZThe above command will generate a coredump file with name coredump.out for the DSP core 0.r~8hj8hjC.hhh}r8(h]h]h]h]h]uhMhhh]r8hXZThe above command will generate a coredump file with name coredump.out for the DSP core 0.r8r8}r8(hj~8hj|8ubaubj)r8}r8(hXThe coredump can be captured from a running system that is not crashed, in this case the register information won't be available in the coredump.r8hj8hjC.hjh}r8(h]h]h]h]h]uhNhhh]r8h)r8}r8(hj8hj8hjC.hhh}r8(h]h]h]h]h]uhMh]r8hXThe coredump can be captured from a running system that is not crashed, in this case the register information won't be available in the coredump.r8r8}r8(hj8hj8ubaubaubeubeubh)r8}r8(hUhKhj1.hjC.hhh}r8(h]h]h]h]r8j.3ah]r8hcauhMhhh]r8(h)r8}r8(hXDisable OpenCL Applicationr8hj8hjC.hhh}r8(h]h]h]h]h]uhMhhh]r8hXDisable OpenCL Applicationr8r8}r8(hj8hj8ubaubh)r8}r8(hXThe OpenCL application needs to be disabled since it interferes with the caching properties of the memory region used by our modified example. If it is not disabled, the application will hang at App_create(). It can be disabled by issuing the following command:r8hj8hjC.hhh}r8(h]h]h]h]h]uhMhhh]r8hXThe OpenCL application needs to be disabled since it interferes with the caching properties of the memory region used by our modified example. If it is not disabled, the application will hang at App_create(). It can be disabled by issuing the following command:r8r8}r8(hj8hj8ubaubj)r8}r8(hX7root@k2g-evm:~# systemctl disable ti-mct-daemon.servicehj8hjC.hjh}r8(hhh]h]h]h]h]uhMmhhh]r8hX7root@k2g-evm:~# systemctl disable ti-mct-daemon.servicer8r8}r8(hUhj8ubaubh)r8}r8(hUhj8hjC.hjh}r8(h]h]h]h]h]uhMhhh]r8j)r8}r8(hUjKhj8hjC.hhh}r8(h]h]h]h]h]uhKhhh]ubaubh)r8}r8(hXAAfter power-cycling the EVM, we can now load and run the example.r8hj8hjC.hhh}r8(h]h]h]h]h]uhMhhh]r8hXAAfter power-cycling the EVM, we can now load and run the example.r8r8}r8(hj8hj8ubaubeubh)r8}r8(hUhj1.hjC.hhh}r8(h]h]h]h]r8Ufrequently-asked-questionsr8ah]r8hauhMhhh]r8(h)r8}r8(hXFrequently Asked Questionsr8hj8hjC.hhh}r8(h]h]h]h]h]uhMhhh]r8hXFrequently Asked Questionsr8r8}r8(hj8hj8ubaubh)r8}r8(hX"Q: How to maintain cache coherencyr8hj8hjC.hhh}r8(h]h]h]h]h]uhMhhh]r8hX"Q: How to maintain cache coherencyr8r8}r8(hj8hj8ubaubh)r8}r8(hXA: In the first 2GB of DDR, region 00 8000 0000 - 00 FFFF FFFF (alias of 08 0000 0000 - 08 7FFF FFFF), no IO coherency is supported. Cache coherency will need to be maintained by software. The cache coherence API descriptions for the A15 can be found in the `TI-RTOS Cache Module cdocs. `__r8hj8hjC.hhh}r8(h]h]h]h]h]uhMhhh]r8(hXA: In the first 2GB of DDR, region 00 8000 0000 - 00 FFFF FFFF (alias of 08 0000 0000 - 08 7FFF FFFF), no IO coherency is supported. Cache coherency will need to be maintained by software. The cache coherence API descriptions for the A15 can be found in the r8r8}r8(hXA: In the first 2GB of DDR, region 00 8000 0000 - 00 FFFF FFFF (alias of 08 0000 0000 - 08 7FFF FFFF), no IO coherency is supported. Cache coherency will need to be maintained by software. The cache coherence API descriptions for the A15 can be found in the hj8ubj))r8}r8(hX`TI-RTOS Cache Module cdocs. `__h}r8(UnameXTI-RTOS Cache Module cdocs.j-Xhttp://software-dl.ti.com/dsps/dsps_public_sw/sdo_sb/targetcontent/sysbios/6_52_00_12/exports/bios_6_52_00_12/docs/cdoc/ti/sysbios/family/arm/a15/Cache.html#xdoc-desch]h]h]h]h]uhj8h]r8hXTI-RTOS Cache Module cdocs.r8r8}r8(hUhj8ubahj2ubeubh)r8}r8(hX*Q: MPM does not load and run the DSP imager8hj8hjC.hhh}r8(h]h]h]h]h]uhMhhh]r8hX*Q: MPM does not load and run the DSP imager8r8}r8(hj8hj8ubaubh)r8}r8(hXCA: There can be several scenarios, the following are a few of them:r8hj8hjC.hhh}r8(h]h]h]h]h]uhMhhh]r8hXCA: There can be several scenarios, the following are a few of them:r8r8}r8(hj8hj8ubaubj)r8}r8(hUhj8hjC.hj!h}r8(j#X-h]h]h]h]h]uhMhhh]r8(j@)r8}r8(hXThe MPM server may not be running. The command mpmcl ping will timeout in this case. The mpm server is expected to be running in the background to service the requests from mpm client. The log file /var/log/mpmsrv.log can provide more information. hj8hjC.hjCh}r8(h]h]h]h]h]uhNhhh]r8h)r8}r8(hXThe MPM server may not be running. The command mpmcl ping will timeout in this case. The mpm server is expected to be running in the background to service the requests from mpm client. The log file /var/log/mpmsrv.log can provide more information.r8hj8hjC.hhh}r8(h]h]h]h]h]uhMh]r8hXThe MPM server may not be running. The command mpmcl ping will timeout in this case. The mpm server is expected to be running in the background to service the requests from mpm client. The log file /var/log/mpmsrv.log can provide more information.r8r9}r9(hj8hj8ubaubaubj@)r9}r9(hXAn issue can be the devices relevant to MPM /dev/dsp0, ... , /dev/dsp7, /dev/dspmem are not created. You need to check if these devices are present. If they are not present then check if the kernel and device tree have right patches for these devices. hj8hjC.hjCh}r9(h]h]h]h]h]uhNhhh]r9h)r9}r9(hXAn issue can be the devices relevant to MPM /dev/dsp0, ... , /dev/dsp7, /dev/dspmem are not created. You need to check if these devices are present. If they are not present then check if the kernel and device tree have right patches for these devices.r9hj9hjC.hhh}r 9(h]h]h]h]h]uhMh]r 9hXAn issue can be the devices relevant to MPM /dev/dsp0, ... , /dev/dsp7, /dev/dspmem are not created. You need to check if these devices are present. If they are not present then check if the kernel and device tree have right patches for these devices.r 9r 9}r 9(hj9hj9ubaubaubj@)r9}r9(hXCThe log can print error codes provided in MPM error codes section. hj8hjC.hjCh}r9(h]h]h]h]h]uhNhhh]r9h)r9}r9(hXBThe log can print error codes provided in MPM error codes section.r9hj9hjC.hhh}r9(h]h]h]h]h]uhMh]r9hXBThe log can print error codes provided in MPM error codes section.r9r9}r9(hj9hj9ubaubaubj@)r9}r9(hX*Another way to debug loading issues is, to run mpm server in non-daemon mode from one shell using command mpmsrv -n, before this you need to kill the server if it is running. (The command to kill is mpmsrv -k or you can choose to kill the process). Then from other shell run the client operations. hj8hjC.hjCh}r9(h]h]h]h]h]uhNhhh]r9h)r9}r9(hX)Another way to debug loading issues is, to run mpm server in non-daemon mode from one shell using command mpmsrv -n, before this you need to kill the server if it is running. (The command to kill is mpmsrv -k or you can choose to kill the process). Then from other shell run the client operations.r 9hj9hjC.hhh}r!9(h]h]h]h]h]uhMh]r"9hX)Another way to debug loading issues is, to run mpm server in non-daemon mode from one shell using command mpmsrv -n, before this you need to kill the server if it is running. (The command to kill is mpmsrv -k or you can choose to kill the process). Then from other shell run the client operations.r#9r$9}r%9(hj 9hj9ubaubaubeubh)r&9}r'9(hX!Q: MPM fails to load the segmentsr(9hj8hjC.hhh}r)9(h]h]h]h]h]uhMhhh]r*9hX!Q: MPM fails to load the segmentsr+9r,9}r-9(hj(9hj&9ubaubh)r.9}r/9(hX,A: The MPM fundamentally copies segments from DSP image to memory using a custom UIO mmap interface. Each local or remote node (DSPs) is allocated some amount of resources using the config file. The segments in the config file needs to be subset of memory resources present in kernel dts file. The system integrator can choose to add or change memory configurations as needed by application. In order to change the default behavior user need to change in JSON config file and kernel device tree. In JSON configuration file, the segments section need to be updated. You need to make sure it does not overlap the scratch memory section. You might have to move the scratch section if the allocated DDR size is increased. And, in the kernel device tree the mem sections of dsp0, .. , dsp7, dspmem need to be updated.r09hj8hjC.hhh}r19(h]h]h]h]h]uhMhhh]r29hX,A: The MPM fundamentally copies segments from DSP image to memory using a custom UIO mmap interface. Each local or remote node (DSPs) is allocated some amount of resources using the config file. The segments in the config file needs to be subset of memory resources present in kernel dts file. The system integrator can choose to add or change memory configurations as needed by application. In order to change the default behavior user need to change in JSON config file and kernel device tree. In JSON configuration file, the segments section need to be updated. You need to make sure it does not overlap the scratch memory section. You might have to move the scratch section if the allocated DDR size is increased. And, in the kernel device tree the mem sections of dsp0, .. , dsp7, dspmem need to be updated.r39r49}r59(hj09hj.9ubaubj)r69}r79(hUhj8hjC.hj!h}r89(j#X-h]h]h]h]h]uhMhhh]r99(j@)r:9}r;9(hX:Sometimes few segments used by DSP may not accessible by ARM at the time of loading. These segment can cause load failure. So it is useful to understand the memory layout of your own application and if there are any such sections, you can skip loading those segments to memory using NOLOAD method described above. hj69hjC.hjCh}r<9(h]h]h]h]h]uhNhhh]r=9h)r>9}r?9(hX9Sometimes few segments used by DSP may not accessible by ARM at the time of loading. These segment can cause load failure. So it is useful to understand the memory layout of your own application and if there are any such sections, you can skip loading those segments to memory using NOLOAD method described above.r@9hj:9hjC.hhh}rA9(h]h]h]h]h]uhMh]rB9hX9Sometimes few segments used by DSP may not accessible by ARM at the time of loading. These segment can cause load failure. So it is useful to understand the memory layout of your own application and if there are any such sections, you can skip loading those segments to memory using NOLOAD method described above.rC9rD9}rE9(hj@9hj>9ubaubaubj@)rF9}rG9(hX`The MPM does not have MPAX support yet. So the MPAX support needs to be handled by application. hj69hjC.hjCh}rH9(h]h]h]h]h]uhNhhh]rI9h)rJ9}rK9(hX_The MPM does not have MPAX support yet. So the MPAX support needs to be handled by application.rL9hjF9hjC.hhh}rM9(h]h]h]h]h]uhMh]rN9hX_The MPM does not have MPAX support yet. So the MPAX support needs to be handled by application.rO9rP9}rQ9(hjL9hjJ9ubaubaubj@)rR9}rS9(hX5If the linker adds a hole in the resource table section right before the actual resource_table due to the alignment restriction, then MPM as of now won't be able to skip the hole and might get stuck. In this case if you hex-dump resource table (method given below) size will be quite large (normally for a non-IPC case it is around 0xac). The workaround is to align the .resource_table section to 0x1000 using linker command file or some other method so that linker does not add any hole in the resource_table section. In future, MPM will take care of this offset. hj69hjC.hjCh}rT9(h]h]h]h]h]uhNhhh]rU9h)rV9}rW9(hX4If the linker adds a hole in the resource table section right before the actual resource_table due to the alignment restriction, then MPM as of now won't be able to skip the hole and might get stuck. In this case if you hex-dump resource table (method given below) size will be quite large (normally for a non-IPC case it is around 0xac). The workaround is to align the .resource_table section to 0x1000 using linker command file or some other method so that linker does not add any hole in the resource_table section. In future, MPM will take care of this offset.rX9hjR9hjC.hhh}rY9(h]h]h]h]h]uhMh]rZ9hX4If the linker adds a hole in the resource table section right before the actual resource_table due to the alignment restriction, then MPM as of now won't be able to skip the hole and might get stuck. In this case if you hex-dump resource table (method given below) size will be quite large (normally for a non-IPC case it is around 0xac). The workaround is to align the .resource_table section to 0x1000 using linker command file or some other method so that linker does not add any hole in the resource_table section. In future, MPM will take care of this offset.r[9r\9}r]9(hjX9hjV9ubaubaubeubh)r^9}r_9(hXQ: MPM fails to run the imager`9hj8hjC.hhh}ra9(h]h]h]h]h]uhMhhh]rb9hXQ: MPM fails to run the imagerc9rd9}re9(hj`9hj^9ubaubh)rf9}rg9(hX,A: MPM takes DSP out of reset to run the image. So, the fails to run normally attributed to DSP is crashing before main or some other issue in the image. But, to debug such issue, after mpmcl run, use CCS to connect to the target and then do load symbols of the images. Then the DSP can be debugged using CCS. Another way to debug the run issue, is to aff a infinite while loop in the reset function so that the DSP stops at the very beginning. Then load and run the DSP using MPM and connect thru CCS, do load symbols and come out of while loop and debug.rh9hj8hjC.hhh}ri9(h]h]h]h]h]uhMhhh]rj9hX,A: MPM takes DSP out of reset to run the image. So, the fails to run normally attributed to DSP is crashing before main or some other issue in the image. But, to debug such issue, after mpmcl run, use CCS to connect to the target and then do load symbols of the images. Then the DSP can be debugged using CCS. Another way to debug the run issue, is to aff a infinite while loop in the reset function so that the DSP stops at the very beginning. Then load and run the DSP using MPM and connect thru CCS, do load symbols and come out of while loop and debug.rk9rl9}rm9(hjh9hjf9ubaubh)rn9}ro9(hX&Q: I don't see DSP prints from debugfsrp9hj8hjC.hhh}rq9(h]h]h]h]h]uhMhhh]rr9hX&Q: I don't see DSP prints from debugfsrs9rt9}ru9(hjp9hjn9ubaubh)rv9}rw9(hXA: Make sure you followed the procedure described above to include the resource table in the image. Care should be taken for the resource table not being compiled out by linker. To check if the resource table present in the image using command readelf --hex-dump=.resource_table . It should have some non-zero data. Another point is, if you are loading same image in multiple cores and if the resource table and trace buffer segments overlap with each other in memory, then there can be undesirable effect.rx9hj8hjC.hhh}ry9(h]h]h]h]h]uhMhhh]rz9hXA: Make sure you followed the procedure described above to include the resource table in the image. Care should be taken for the resource table not being compiled out by linker. To check if the resource table present in the image using command readelf --hex-dump=.resource_table . It should have some non-zero data. Another point is, if you are loading same image in multiple cores and if the resource table and trace buffer segments overlap with each other in memory, then there can be undesirable effect.r{9r|9}r}9(hjx9hjv9ubaubh)r~9}r9(hXSQ: I see the DSP state in /sys/kernel/debug/remoteproc/remoteproc0/state as crashedr9hj8hjC.hhh}r9(h]h]h]h]h]uhMhhh]r9hXSQ: I see the DSP state in /sys/kernel/debug/remoteproc/remoteproc0/state as crashedr9r9}r9(hj9hj~9ubaubh)r9}r9(hXA: The file /sys/kernel/debug/remoteproc/remoteproc#/state does not indicate state of DSP when MPM is used for loading. The state of the DSP can be seen using MPM client. See the description of the command in Methods to load and run ELF images using MPM sections.r9hj8hjC.hhh}r9(h]h]h]h]h]uhMhhh]r9hXA: The file /sys/kernel/debug/remoteproc/remoteproc#/state does not indicate state of DSP when MPM is used for loading. The state of the DSP can be seen using MPM client. See the description of the command in Methods to load and run ELF images using MPM sections.r9r9}r9(hj9hj9ubaubeubeubh)r9}r9(hUhhhhhhh}r9(h]h]h]h]r9U&multiple-ways-of-arm-dsp-communicationr9ah]r9h auhKhhh]r9(h)r9}r9(hX&Multiple Ways of ARM-DSP Communicationr9hj9hhhhh}r9(h]h]h]h]h]uhKhhh]r9hX&Multiple Ways of ARM-DSP Communicationr9r9}r9(hj9hj9ubaubh)r9}r9(hXWhttp://processors.wiki.ti.com/index.php/Processor-sdk-MultiWay-of-ARM-DSP-Communicationhj9hhXWsource/linux/Foundational_Components/IPC/Multiple_Ways_of_ARM-DSP_Communication.rst.incr9r9}r9bhhh}r9(hhh]h]h]h]h]uhKhhh]r9hXWhttp://processors.wiki.ti.com/index.php/Processor-sdk-MultiWay-of-ARM-DSP-Communicationr9r9}r9(hUhj9ubaubh)r9}r9(hX5This document describes the ways of communication on TI multicore devices. The individual cores in an applicatioin can assume the roles of Host/Device or Master/Slave. This discussion here assumes the Host/Master is ARM® cluster running SMP/Linux and the Device/Slave is the C6xx DSP cluster running TI-RTOS.r9hj9hj9hhh}r9(h]h]h]h]h]uhKhhh]r9hX5This document describes the ways of communication on TI multicore devices. The individual cores in an applicatioin can assume the roles of Host/Device or Master/Slave. This discussion here assumes the Host/Master is ARM® cluster running SMP/Linux and the Device/Slave is the C6xx DSP cluster running TI-RTOS.r9r9}r9(hj9hj9ubaubh)r9}r9(hXOpenCLr9hj9hj9hhh}r9(h]r9Uopenclr9ah]h]h]h]r9hauhNhhh]r9hXOpenCLr9r9}r9(hj9hj9ubaubh)r9}r9(hXOpenCL is a framework for writing programs that execute across heterogeneous systems, and for expressing programs where parallel computation is dispatched across heterogeneous devices. It is an open, royalty-free standard managed by Khronos consortium. On a heterogeneous SoC, OpenCL views one of the programmable cores as a host and the other cores as devices. The application running on the host (i.e. the host program) manages execution of code (kernels) on the device and is also responsible for making data available to the device. A device consists of one or more compute units. On the ARM and DSP SoCs, each C66x DSP is a compute unit. The OpenCL runtime consists of two components: (1) An API for the host program to create and submit kernels for execution and (2) A cross-platform language for expressing kernels – OpenCL C – which is based on C99 C with some additions and restrictions OpenCL supports both data parallel and task parallel programming paradigms. Data parallel execution parallelizes the execution across compute units on a device. Task parallel execution enables asynchronous dispatch of tasks to each compute unit. For more info, please refer to `OpenCL User’s Guide `__hj9hj9hhh}r9(h]h]h]h]h]uhKhhh]r9(hXOpenCL is a framework for writing programs that execute across heterogeneous systems, and for expressing programs where parallel computation is dispatched across heterogeneous devices. It is an open, royalty-free standard managed by Khronos consortium. On a heterogeneous SoC, OpenCL views one of the programmable cores as a host and the other cores as devices. The application running on the host (i.e. the host program) manages execution of code (kernels) on the device and is also responsible for making data available to the device. A device consists of one or more compute units. On the ARM and DSP SoCs, each C66x DSP is a compute unit. The OpenCL runtime consists of two components: (1) An API for the host program to create and submit kernels for execution and (2) A cross-platform language for expressing kernels – OpenCL C – which is based on C99 C with some additions and restrictions OpenCL supports both data parallel and task parallel programming paradigms. Data parallel execution parallelizes the execution across compute units on a device. Task parallel execution enables asynchronous dispatch of tasks to each compute unit. For more info, please refer to r9r9}r9(hXOpenCL is a framework for writing programs that execute across heterogeneous systems, and for expressing programs where parallel computation is dispatched across heterogeneous devices. It is an open, royalty-free standard managed by Khronos consortium. On a heterogeneous SoC, OpenCL views one of the programmable cores as a host and the other cores as devices. The application running on the host (i.e. the host program) manages execution of code (kernels) on the device and is also responsible for making data available to the device. A device consists of one or more compute units. On the ARM and DSP SoCs, each C66x DSP is a compute unit. The OpenCL runtime consists of two components: (1) An API for the host program to create and submit kernels for execution and (2) A cross-platform language for expressing kernels – OpenCL C – which is based on C99 C with some additions and restrictions OpenCL supports both data parallel and task parallel programming paradigms. Data parallel execution parallelizes the execution across compute units on a device. Task parallel execution enables asynchronous dispatch of tasks to each compute unit. For more info, please refer to hj9ubj))r9}r9(hXK`OpenCL User’s Guide `__h}r9(UnameXOpenCL User’s Guidej-X/http://downloads.ti.com/mctools/esd/docs/openclh]h]h]h]h]uhj9h]r9hXOpenCL User’s Guider9r9}r9(hUhj9ubahj2ubeubh)r9}r9(hX Use Casesr9hj9hj9hhh}r9(h]r9U use-casesr9ah]h]h]h]r9h2auhNhhh]r9hX Use Casesr9r9}r9(hj9hj9ubaubj)r9}r9(hUhj9hj9hj!h}r9(j#X-h]h]h]h]h]uhKhhh]r9j@)r9}r9(hX?Offload computation from ARM running Linux or RTOS to the DSPs hj9hj9hjCh}r9(h]h]h]h]h]uhNhhh]r9h)r9}r9(hX>Offload computation from ARM running Linux or RTOS to the DSPsr9hj9hj9hhh}r9(h]h]h]h]h]uhKh]r9hX>Offload computation from ARM running Linux or RTOS to the DSPsr9r9}r9(hj9hj9ubaubaubaubh)r9}r9(hXExamplesr9hj9hj9hhh}r9(h]r9Uexamplesr9ah]h]h]h]r9hFauhNhhh]r9hXExamplesr9r9}r9(hj9hj9ubaubh)r9}r9(hXgPlease see `OpenCL examples `__hj9hj9hhh}r9(h]h]h]h]h]uhK#hhh]r9(hX Please see r9r9}r9(hX Please see hj9ubj))r9}r9(hX\`OpenCL examples `__h}r9(UnameXOpenCL examplesj-XFhttp://downloads.ti.com/mctools/esd/docs/opencl/examples/overview.htmlh]h]h]h]h]uhj9h]r9hXOpenCL examplesr9r9}r9(hUhj9ubahj2ubeubh)r9}r9(hXBenefitsr9hj9hj9hhh}r9(h]r:Ubenefitsr:ah]h]h]h]r:h:auhNhhh]r:hXBenefitsr:r:}r:(hj9hj9ubaubj)r:}r:(hUhj9hj9hj!h}r :(j#X-h]h]h]h]h]uhK)hhh]r :(j@)r :}r :(hXEasy porting between devicesr :hj:hj9hjCh}r:(h]h]h]h]h]uhNhhh]r:h)r:}r:(hj :hj :hj9hhh}r:(h]h]h]h]h]uhK)h]r:hXEasy porting between devicesr:r:}r:(hj :hj:ubaubaubj@)r:}r:(hX)No need to understand memory architecturer:hj:hj9hjCh}r:(h]h]h]h]h]uhNhhh]r:h)r:}r:(hj:hj:hj9hhh}r:(h]h]h]h]h]uhK*h]r:hX)No need to understand memory architecturer :r!:}r":(hj:hj:ubaubaubj@)r#:}r$:(hX#No need to worry about MPAX and MMUr%:hj:hj9hjCh}r&:(h]h]h]h]h]uhNhhh]r':h)r(:}r):(hj%:hj#:hj9hhh}r*:(h]h]h]h]h]uhK+h]r+:hX#No need to worry about MPAX and MMUr,:r-:}r.:(hj%:hj(:ubaubaubj@)r/:}r0:(hX No need to worry about coherencyr1:hj:hj9hjCh}r2:(h]h]h]h]h]uhNhhh]r3:h)r4:}r5:(hj1:hj/:hj9hhh}r6:(h]h]h]h]h]uhK,h]r7:hX No need to worry about coherencyr8:r9:}r::(hj1:hj4:ubaubaubj@)r;:}r<:(hX6No need to build/configure/use IPC between ARM and DSPr=:hj:hj9hjCh}r>:(h]h]h]h]h]uhNhhh]r?:h)r@:}rA:(hj=:hj;:hj9hhh}rB:(h]h]h]h]h]uhK-h]rC:hX6No need to build/configure/use IPC between ARM and DSPrD:rE:}rF:(hj=:hj@:ubaubaubj@)rG:}rH:(hXCNo need to be an expert in DSP code, architecture, or optimization hj:hj9hjCh}rI:(h]h]h]h]h]uhNhhh]rJ:h)rK:}rL:(hXBNo need to be an expert in DSP code, architecture, or optimizationrM:hjG:hj9hhh}rN:(h]h]h]h]h]uhK.h]rO:hXBNo need to be an expert in DSP code, architecture, or optimizationrP:rQ:}rR:(hjM:hjK:ubaubaubeubh)rS:}rT:(hX DrawbacksrU:hj9hj9hhh}rV:(h]rW:U drawbacksrX:ah]h]h]h]rY:h_auhNhhh]rZ:hX Drawbacksr[:r\:}r]:(hjU:hjS:ubaubj)r^:}r_:(hUhj9hj9hj!h}r`:(j#X-h]h]h]h]h]uhK3hhh]ra:j@)rb:}rc:(hXMDon't have control on system memory layout, etc. to handle optimize DSP code hj^:hj9hjCh}rd:(h]h]h]h]h]uhNhhh]re:h)rf:}rg:(hXLDon't have control on system memory layout, etc. to handle optimize DSP coderh:hjb:hj9hhh}ri:(h]h]h]h]h]uhK3h]rj:hXLDon't have control on system memory layout, etc. to handle optimize DSP coderk:rl:}rm:(hjh:hjf:ubaubaubaubh)rn:}ro:(hUhj9hj9hjh}rp:(h]h]h]h]h]uhK6hhh]rq:j)rr:}rs:(hUjKhjn:hj9hhh}rt:(h]h]h]h]h]uhKhhh]ubaubh)ru:}rv:(hXDCE (Distributed Codec Engine)rw:hj9hj9hhh}rx:(h]ry:Udce-distributed-codec-enginerz:ah]h]h]h]r{:hTauhNhhh]r|:hXDCE (Distributed Codec Engine)r}:r~:}r:(hjw:hju:ubaubh)r:}r:(hXDCE Framework provides an easy way for users to write applications on devices, such as AM57xx, having hardware accelerators for image and video. It eanbles and provides remote access to hardware acceleration for audio and video encoding and decoding on the slave cores. The ARM user space GStreamer based multimedia application uses GStreamer library to load and interface with TI GStreamer plugin which handles all the details specific to use of the hardware accelerator. The plugin interfaces libdce module that provides the ARM user space API. Libdce uses RPMSG framework on the ARM which communicates to the counterpart on the slave core. On the slave core, it uses Codec engine and Frame Component for the video/image codec processing on IVA.r:hj9hj9hhh}r:(h]h]h]h]h]uhK;hhh]r:hXDCE Framework provides an easy way for users to write applications on devices, such as AM57xx, having hardware accelerators for image and video. It eanbles and provides remote access to hardware acceleration for audio and video encoding and decoding on the slave cores. The ARM user space GStreamer based multimedia application uses GStreamer library to load and interface with TI GStreamer plugin which handles all the details specific to use of the hardware accelerator. The plugin interfaces libdce module that provides the ARM user space API. Libdce uses RPMSG framework on the ARM which communicates to the counterpart on the slave core. On the slave core, it uses Codec engine and Frame Component for the video/image codec processing on IVA.r:r:}r:(hj:hj:ubaubcdocutils.nodes raw r:)r:}r:(hX
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r:r:}r:(hUhj:ubaubh)r:}r:(hXk**Overview of the Multimedia Software Stack using DCE** AM57xx as an example has the following acceleratorshj9hj9hhh}r:(h]h]h]h]h]uhKYhhh]r:(j)r:}r:(hX7**Overview of the Multimedia Software Stack using DCE**h}r:(h]h]h]h]h]uhj:h]r:hX3Overview of the Multimedia Software Stack using DCEr:r:}r:(hUhj:ubahjubhX4 AM57xx as an example has the following acceleratorsr:r:}r:(hX4 AM57xx as an example has the following acceleratorshj:ubeubj)r:}r:(hUhj9hj9hj!h}r:(j#X-h]h]h]h]h]uhK\hhh]r:(j@)r:}r:(hX!Image and Video Accelerator (IVA)r:hj:hj9hjCh}r:(h]h]h]h]h]uhNhhh]r:h)r:}r:(hj:hj:hj9hhh}r:(h]h]h]h]h]uhK\h]r:hX!Image and Video Accelerator (IVA)r:r:}r:(hj:hj:ubaubaubj@)r:}r:(hXVideo Processing Engine (VPE)r:hj:hj9hjCh}r:(h]h]h]h]h]uhNhhh]r:h)r:}r:(hj:hj:hj9hhh}r:(h]h]h]h]h]uhK]h]r:hXVideo Processing Engine (VPE)r:r:}r:(hj:hj:ubaubaubj@)r:}r:(hXPC66x DSP cores for offloading certain image/video and/or voice/audio processing hj:hj9hjCh}r:(h]h]h]h]h]uhNhhh]r:h)r:}r:(hXOC66x DSP cores for offloading certain image/video and/or voice/audio processingr:hj:hj9hhh}r:(h]h]h]h]h]uhK^h]r:hXOC66x DSP cores for offloading certain image/video and/or voice/audio processingr:r:}r:(hj:hj:ubaubaubeubh)r:}r:(hXUsers can leverate open source elements that provide functionality such as AVI stream demuxing, and audio codec, etc. These along with the ARM based GStreamer plugins in TI's Processor Linux SDK provide the abstracts for the accelerator offload.r:hj9hj9hhh}r:(h]h]h]h]h]uhKahhh]r:hXUsers can leverate open source elements that provide functionality such as AVI stream demuxing, and audio codec, etc. These along with the ARM based GStreamer plugins in TI's Processor Linux SDK provide the abstracts for the accelerator offload.r:r:}r:(hj:hj:ubaubh)r:}r:(hXAIn AM57xx, the hardware accelerators are capable of the followingr:hj9hj9hhh}r:(h]h]h]h]h]uhKfhhh]r:hXAIn AM57xx, the hardware accelerators are capable of the followingr:r:}r:(hj:hj:ubaubj)r:}r:(hUhj9hj9hj!h}r:(j#X-h]h]h]h]h]uhKhhhh]r:(j@)r:}r:(hXIVA for multimedia enconding and decoding - Video Decode: H264, MPEG4, MPEG2, and VC1 - video Encode: H264, and MPEG4 - Image Decode: MJPEG hj:hNhjCh}r:(h]h]h]h]h]uhNhhh]r:(h)r:}r:(hX)IVA for multimedia enconding and decodingr:hj:hj9hhh}r:(h]h]h]h]h]uhKhh]r:hX)IVA for multimedia enconding and decodingr:r:}r;(hj:hj:ubaubj)r;}r;(hUh}r;(j#X-h]h]h]h]h]uhj:h]r;(j@)r;}r;(hX)Video Decode: H264, MPEG4, MPEG2, and VC1r;h}r;(h]h]h]h]h]uhj;h]r ;h)r ;}r ;(hj;hj;hj9hhh}r ;(h]h]h]h]h]uhKjh]r ;hX)Video Decode: H264, MPEG4, MPEG2, and VC1r;r;}r;(hj;hj ;ubaubahjCubj@)r;}r;(hXvideo Encode: H264, and MPEG4r;h}r;(h]h]h]h]h]uhj;h]r;h)r;}r;(hj;hj;hj9hhh}r;(h]h]h]h]h]uhKkh]r;hXvideo Encode: H264, and MPEG4r;r;}r;(hj;hj;ubaubahjCubj@)r;}r;(hXImage Decode: MJPEG h}r;(h]h]h]h]h]uhj;h]r ;h)r!;}r";(hXImage Decode: MJPEGr#;hj;hj9hhh}r$;(h]h]h]h]h]uhKlh]r%;hXImage Decode: MJPEGr&;r';}r(;(hj#;hj!;ubaubahjCubehj!ubeubj@)r);}r*;(hXVGE for video operations such as scaling, color space conversion, and deinterlacing of the following formats: - Supported Input formats: NV12, YUYV, UYVY - Supported Output formats: NV12, YUYV, UYVY, RGB24, ARGB24, and ABGR24 hj:hNhjCh}r+;(h]h]h]h]h]uhNhhh]r,;(h)r-;}r.;(hXmVGE for video operations such as scaling, color space conversion, and deinterlacing of the following formats:r/;hj);hj9hhh}r0;(h]h]h]h]h]uhKnh]r1;hXmVGE for video operations such as scaling, color space conversion, and deinterlacing of the following formats:r2;r3;}r4;(hj/;hj-;ubaubj)r5;}r6;(hUh}r7;(j#X-h]h]h]h]h]uhj);h]r8;(j@)r9;}r:;(hX)Supported Input formats: NV12, YUYV, UYVYr;;h}r<;(h]h]h]h]h]uhj5;h]r=;h)r>;}r?;(hj;;hj9;hj9hhh}r@;(h]h]h]h]h]uhKqh]rA;hX)Supported Input formats: NV12, YUYV, UYVYrB;rC;}rD;(hj;;hj>;ubaubahjCubj@)rE;}rF;(hXFSupported Output formats: NV12, YUYV, UYVY, RGB24, ARGB24, and ABGR24 h}rG;(h]h]h]h]h]uhj5;h]rH;h)rI;}rJ;(hXESupported Output formats: NV12, YUYV, UYVY, RGB24, ARGB24, and ABGR24rK;hjE;hj9hhh}rL;(h]h]h]h]h]uhKrh]rM;hXESupported Output formats: NV12, YUYV, UYVY, RGB24, ARGB24, and ABGR24rN;rO;}rP;(hjK;hjI;ubaubahjCubehj!ubeubj@)rQ;}rR;(hXDSP for offloading signal processing - Sample Image Processing Kernels integrated in the DSP gstreamer plugin: Median2x2, Median3x3, Sobel3x3, Conv5x5, Canny hj:hNhjCh}rS;(h]h]h]h]h]uhNhhh]rT;(h)rU;}rV;(hX$DSP for offloading signal processingrW;hjQ;hj9hhh}rX;(h]h]h]h]h]uhKuh]rY;hX$DSP for offloading signal processingrZ;r[;}r\;(hjW;hjU;ubaubj)r];}r^;(hUh}r_;(j#X-h]h]h]h]h]uhjQ;h]r`;j@)ra;}rb;(hXwSample Image Processing Kernels integrated in the DSP gstreamer plugin: Median2x2, Median3x3, Sobel3x3, Conv5x5, Canny h}rc;(h]h]h]h]h]uhj];h]rd;h)re;}rf;(hXvSample Image Processing Kernels integrated in the DSP gstreamer plugin: Median2x2, Median3x3, Sobel3x3, Conv5x5, Cannyrg;hja;hj9hhh}rh;(h]h]h]h]h]uhKwh]ri;hXvSample Image Processing Kernels integrated in the DSP gstreamer plugin: Median2x2, Median3x3, Sobel3x3, Conv5x5, Cannyrj;rk;}rl;(hjg;hje;ubaubahjCubahj!ubeubeubh)rm;}rn;(hXFor more info, please refer to the `DCE Developer’s Guide `__hj9hj9hhh}ro;(h]h]h]h]h]uhKzhhh]rp;(hX#For more info, please refer to the rq;rr;}rs;(hX#For more info, please refer to the hjm;ubj))rt;}ru;(hXl`DCE Developer’s Guide `__h}rv;(UnameXDCE Developer’s Guidej-XNhttp://processors.wiki.ti.com/index.php/DRA7xx_GLSDK_Software_Developers_Guideh]h]h]h]h]uhjm;h]rw;hXDCE Developer’s Guiderx;ry;}rz;(hUhjt;ubahj2ubeubh)r{;}r|;(hX Use Casesr};hj9hj9hhh}r~;(h]r;U use-cases-1r;ah]h]h]h]r;hiauhNhhh]r;hX Use Casesr;r;}r;(hj};hj{;ubaubj)r;}r;(hUhj9hj9hj!h}r;(j#X-h]h]h]h]h]uhKhhh]r;j@)r;}r;(hXCaudio/video or proprietary codecs processing offload to slave core hj;hj9hjCh}r;(h]h]h]h]h]uhNhhh]r;h)r;}r;(hXBaudio/video or proprietary codecs processing offload to slave corer;hj;hj9hhh}r;(h]h]h]h]h]uhKh]r;hXBaudio/video or proprietary codecs processing offload to slave corer;r;}r;(hj;hj;ubaubaubaubh)r;}r;(hXExamplesr;hj9hj9hhh}r;(h]r;U examples-1r;ah]h]h]h]r;h auhNhhh]r;hXExamplesr;r;}r;(hj;hj;ubaubj)r;}r;(hUhj9hj9hj!h}r;(j#X-h]h]h]h]h]uhKhhh]r;j@)r;}r;(hXPlease see `sample application `__ hj;hj9hjCh}r;(h]h]h]h]h]uhNhhh]r;h)r;}r;(hXPlease see `sample application `__hj;hj9hhh}r;(h]h]h]h]h]uhKh]r;(hX Please see r;r;}r;(hX Please see hj;ubj))r;}r;(hX`sample application `__h}r;(UnameXsample applicationj-Xnhttp://processors.wiki.ti.com/index.php/DRA7xx_GLSDK_Software_Developers_Guide#Running_DSP_sample_applicationsh]h]h]h]h]uhj;h]r;hXsample applicationr;r;}r;(hUhj;ubahj2ubeubaubaubh)r;}r;(hXBenefitsr;hj9hj9hhh}r;(h]r;U benefits-1r;ah]h]h]h]r;hlauhNhhh]r;hXBenefitsr;r;}r;(hj;hj;ubaubj)r;}r;(hUhj9hj9hj!h}r;(j#X-h]h]h]h]h]uhKhhh]r;(j@)r;}r;(hX'Accelerated multimedia codec processingr;hj;hj9hjCh}r;(h]h]h]h]h]uhNhhh]r;h)r;}r;(hj;hj;hj9hhh}r;(h]h]h]h]h]uhKh]r;hX'Accelerated multimedia codec processingr;r;}r;(hj;hj;ubaubaubj@)r;}r;(hXmSimplifies the development of multimedia application when interfacing with Gstreamer and TI Gstreamer plugin hj;hj9hjCh}r;(h]h]h]h]h]uhNhhh]r;h)r;}r;(hXlSimplifies the development of multimedia application when interfacing with Gstreamer and TI Gstreamer pluginr;hj;hj9hhh}r;(h]h]h]h]h]uhKh]r;hXlSimplifies the development of multimedia application when interfacing with Gstreamer and TI Gstreamer pluginr;r;}r;(hj;hj;ubaubaubeubh)r;}r;(hX Drawbacksr;hj9hj9hhh}r;(h]r;U drawbacks-1r;ah]h]h]h]r;h(auhNhhh]r;hX Drawbacksr;r;}r;(hj;hj;ubaubj)r;}r;(hUhj9hj9hj!h}r;(j#X-h]h]h]h]h]uhKhhh]r;(j@)r;}r;(hX$Not suitable for non-codec algorithmr;hj;hj9hjCh}r;(h]h]h]h]h]uhNhhh]r;h)r;}r;(hj;hj;hj9hhh}r;(h]h]h]h]h]uhKh]r;hX$Not suitable for non-codec algorithmr;r;}r;(hj;hj;ubaubaubj@)r;}r;(hX$Need work to add new codec algorithmr;hj;hj9hjCh}r;(h]h]h]h]h]uhNhhh]r;h)r;}r;(hj;hj;hj9hhh}r<(h]h]h]h]h]uhKh]r<hX$Need work to add new codec algorithmr<r<}r<(hj;hj;ubaubaubj@)r<}r<(hX"Need knowledge of DSP programming hj;hj9hjCh}r<(h]h]h]h]h]uhNhhh]r<h)r <}r <(hX!Need knowledge of DSP programmingr <hj<hj9hhh}r <(h]h]h]h]h]uhKh]r <hX!Need knowledge of DSP programmingr<r<}r<(hj <hj <ubaubaubeubh)r<}r<(hUhj9hj9hjh}r<(h]h]h]h]h]uhKhhh]r<j)r<}r<(hUjKhj<hj9hhh}r<(h]h]h]h]h]uhKhhh]ubaubh)r<}r<(hX Big Data IPCr<hj9hj9hhh}r<(h]r<U big-data-ipcr<ah]h]h]h]r<hauhNhhh]r<hX Big Data IPCr <r!<}r"<(hj<hj<ubaubh)r#<}r$<(hXdBig Data is a special use case of TI IPC implementation for High Performance Computing applications and other Data intensive applications which often require passing of big data buffers between the multi-core processors in an SoC. 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The Big Data IPC provides a high level abstraction to take care of address translation and Cache sync on the big data buffersr(<r)<}r*<(hj%<hj#<ubaubh)r+<}r,<(hX Use Casesr-<hj9hj9hhh}r.<(h]r/<U use-cases-2r0<ah]h]h]h]r1<hkauhNhhh]r2<hX Use Casesr3<r4<}r5<(hj-<hj+<ubaubj)r6<}r7<(hUhj9hj9hj!h}r8<(j#X-h]h]h]h]h]uhKhhh]r9<j@)r:<}r;<(hXJMessage/Data exchange for size greater than 512 bytes between ARM and DSP hj6<hj9hjCh}r<<(h]h]h]h]h]uhNhhh]r=<h)r><}r?<(hXIMessage/Data exchange for size greater than 512 bytes between ARM and DSPr@<hj:<hj9hhh}rA<(h]h]h]h]h]uhKh]rB<hXIMessage/Data exchange for size greater than 512 bytes between ARM and DSPrC<rD<}rE<(hj@<hj><ubaubaubaubh)rF<}rG<(hXExamplesrH<hj9hj9hhh}rI<(h]rJ<U examples-2rK<ah]h]h]h]rL<h auhNhhh]rM<hXExamplesrN<rO<}rP<(hjH<hjF<ubaubj)rQ<}rR<(hUhj9hj9hj!h}rS<(j#X-h]h]h]h]h]uhKhhh]rT<j@)rU<}rV<(hXPlease see `Big Data IPC example `__ hjQ<hj9hjCh}rW<(h]h]h]h]h]uhNhhh]rX<h)rY<}rZ<(hXPlease see `Big Data IPC example `__hjU<hj9hhh}r[<(h]h]h]h]h]uhKh]r\<(hX Please see r]<r^<}r_<(hX Please see hjY<ubj))r`<}ra<(hX`Big Data IPC example `__h}rb<(UnameXBig Data IPC examplej-Xphttp://software-dl.ti.com/processor-sdk-rtos/esd/docs/latest/rtos/index_examples_demos.html#big-data-ipc-exampleh]h]h]h]h]uhjY<h]rc<hXBig Data IPC examplerd<re<}rf<(hUhj`<ubahj2ubeubaubaubh)rg<}rh<(hXBenefitsri<hj9hj9hhh}rj<(h]rk<U benefits-2rl<ah]h]h]h]rm<hnauhNhhh]rn<hXBenefitsro<rp<}rq<(hji<hjg<ubaubj)rr<}rs<(hUhj9hj9hj!h}rt<(j#X-h]h]h]h]h]uhKhhh]ru<j@)rv<}rw<(hX0Capable of handling data greater than 512 bytes hjr<hj9hjCh}rx<(h]h]h]h]h]uhNhhh]ry<h)rz<}r{<(hX/Capable of handling data greater than 512 bytesr|<hjv<hj9hhh}r}<(h]h]h]h]h]uhKh]r~<hX/Capable of handling data greater than 512 bytesr<r<}r<(hj|<hjz<ubaubaubaubh)r<}r<(hX Drawbacksr<hj9hj9hhh}r<(h]r<U drawbacks-2r<ah]h]h]h]r<h&auhNhhh]r<hX Drawbacksr<r<}r<(hj<hj<ubaubj)r<}r<(hUhj9hj9hj!h}r<(j#X-h]h]h]h]h]uhKhhh]r<(j@)r<}r<(hX)Need knowledge of DSP memory architecturer<hj<hj9hjCh}r<(h]h]h]h]h]uhNhhh]r<h)r<}r<(hj<hj<hj9hhh}r<(h]h]h]h]h]uhKh]r<hX)Need knowledge of DSP memory architecturer<r<}r<(hj<hj<ubaubaubj@)r<}r<(hX3Need knowledge of DSP configuration and programmingr<hj<hj9hjCh}r<(h]h]h]h]h]uhNhhh]r<h)r<}r<(hj<hj<hj9hhh}r<(h]h]h]h]h]uhKh]r<hX3Need knowledge of DSP configuration and programmingr<r<}r<(hj<hj<ubaubaubj@)r<}r<(hXTI proprietary API hj<hj9hjCh}r<(h]h]h]h]h]uhNhhh]r<h)r<}r<(hXTI proprietary APIr<hj<hj9hhh}r<(h]h]h]h]h]uhKh]r<hXTI proprietary APIr<r<}r<(hj<hj<ubaubaubeubh)r<}r<(hUhj9hj9hjh}r<(h]h]h]h]h]uhKhhh]r<j)r<}r<(hUjKhj<hj9hhh}r<(h]h]h]h]h]uhKhhh]ubaubh)r<}r<(hXIPCr<hj9hj9hhh}r<(h]r<Uid5r<ah]h]h]h]r<hauhNhhh]r<hXIPCr<r<}r<(hj<hj<ubaubh)r<}r<(hXBInter-Processor Communication (IPC) is a set of modules designed to faciliate inter-process communication. The communication includes message passing, streams, and linked lists. The modules provides services and functions which can be used for communication between ARM and DSP processors in a multi-processor environment.r<hj9hj9hhh}r<(h]h]h]h]h]uhKhhh]r<hXBInter-Processor Communication (IPC) is a set of modules designed to faciliate inter-process communication. The communication includes message passing, streams, and linked lists. The modules provides services and functions which can be used for communication between ARM and DSP processors in a multi-processor environment.r<r<}r<(hj<hj<ubaubj)r<}r<(hUhj9hj9hj!h}r<(j#X-h]h]h]h]h]uhKhhh]r<(j@)r<}r<(hXZIPC Module initialized the various subsystems of IPC and synchronizes multiple processors.hj<hj9hjCh}r<(h]h]h]h]h]uhNhhh]r<h)r<}r<(hXZIPC Module initialized the various subsystems of IPC and synchronizes multiple processors.r<hj<hj9hhh}r<(h]h]h]h]h]uhKh]r<hXZIPC Module initialized the various subsystems of IPC and synchronizes multiple processors.r<r<}r<(hj<hj<ubaubaubj@)r<}r<(hXZMessageQ Module supports the structured sending and receiving of variable length messages.hj<hj9hjCh}r<(h]h]h]h]h]uhNhhh]r<h)r<}r<(hXZMessageQ Module supports the structured sending and receiving of variable length messages.r<hj<hj9hhh}r<(h]h]h]h]h]uhKh]r<hXZMessageQ Module supports the structured sending and receiving of variable length messages.r<r<}r<(hj<hj<ubaubaubj@)r<}r<(hXListMP Module is a linked-list based module designed to provide a mean of communication between different processors. It uses shared memory to provide a way for multiple processors to share, pass or store data buffers, messages, or state information.hj<hj9hjCh}r<(h]h]h]h]h]uhNhhh]r<h)r<}r<(hXListMP Module is a linked-list based module designed to provide a mean of communication between different processors. It uses shared memory to provide a way for multiple processors to share, pass or store data buffers, messages, or state information.r<hj<hj9hhh}r<(h]h]h]h]h]uhKh]r<hXListMP Module is a linked-list based module designed to provide a mean of communication between different processors. It uses shared memory to provide a way for multiple processors to share, pass or store data buffers, messages, or state information.r<r<}r<(hj<hj<ubaubaubj@)r<}r<(hXHeapMP Module provides 3 types of memory management, fixed-size buffers, multiple different fixed-size buffers, and variable-size buffers.hj<hj9hjCh}r<(h]h]h]h]h]uhNhhh]r<h)r<}r<(hXHeapMP Module provides 3 types of memory management, fixed-size buffers, multiple different fixed-size buffers, and variable-size buffers.r<hj<hj9hhh}r<(h]h]h]h]h]uhKh]r<hXHeapMP Module provides 3 types of memory management, fixed-size buffers, multiple different fixed-size buffers, and variable-size buffers.r=r=}r=(hj<hj<ubaubaubj@)r=}r=(hXUGateMP Module enforces both local and remote context protection through its instance.hj<hj9hjCh}r=(h]h]h]h]h]uhNhhh]r=h)r=}r=(hXUGateMP Module enforces both local and remote context protection through its instance.r =hj=hj9hhh}r =(h]h]h]h]h]uhKh]r =hXUGateMP Module enforces both local and remote context protection through its instance.r =r =}r=(hj =hj=ubaubaubj@)r=}r=(hXfNOtify Module manages the multiplexing/demultiplexing of software interrupts over hardware interrupts.hj<hj9hjCh}r=(h]h]h]h]h]uhNhhh]r=h)r=}r=(hXfNOtify Module manages the multiplexing/demultiplexing of software interrupts over hardware interrupts.r=hj=hj9hhh}r=(h]h]h]h]h]uhKh]r=hXfNOtify Module manages the multiplexing/demultiplexing of software interrupts over hardware interrupts.r=r=}r=(hj=hj=ubaubaubj@)r=}r=(hXSharedRegion Module is designed to be used in a multi-processor environment where there are memory regions that are shared and accessed across different processors.hj<hj9hjCh}r=(h]h]h]h]h]uhNhhh]r=h)r=}r =(hXSharedRegion Module is designed to be used in a multi-processor environment where there are memory regions that are shared and accessed across different processors.r!=hj=hj9hhh}r"=(h]h]h]h]h]uhKh]r#=hXSharedRegion Module is designed to be used in a multi-processor environment where there are memory regions that are shared and accessed across different processors.r$=r%=}r&=(hj!=hj=ubaubaubj@)r'=}r(=(hXHList Module provides support for creating doubly-linked lists of objectshj<hj9hjCh}r)=(h]h]h]h]h]uhNhhh]r*=h)r+=}r,=(hXHList Module provides support for creating doubly-linked lists of objectsr-=hj'=hj9hhh}r.=(h]h]h]h]h]uhKh]r/=hXHList Module provides support for creating doubly-linked lists of objectsr0=r1=}r2=(hj-=hj+=ubaubaubj@)r3=}r4=(hXfMultiProc Module centralizes processor ID management into one module in a multi-processor environment.hj<hj9hjCh}r5=(h]h]h]h]h]uhNhhh]r6=h)r7=}r8=(hXfMultiProc Module centralizes processor ID management into one module in a multi-processor environment.r9=hj3=hj9hhh}r:=(h]h]h]h]h]uhKh]r;=hXfMultiProc Module centralizes processor ID management into one module in a multi-processor environment.r<=r==}r>=(hj9=hj7=ubaubaubj@)r?=}r@=(hXNameServer Module manages local name/value pairs which enables an application and other modules to sotre and retrieve values based on a name. hj<hj9hjCh}rA=(h]h]h]h]h]uhNhhh]rB=h)rC=}rD=(hXNameServer Module manages local name/value pairs which enables an application and other modules to sotre and retrieve values based on a name.rE=hj?=hj9hhh}rF=(h]h]h]h]h]uhKh]rG=hXNameServer Module manages local name/value pairs which enables an application and other modules to sotre and retrieve values based on a name.rH=rI=}rJ=(hjE=hjC=ubaubaubeubh)rK=}rL=(hUhj9hj9hjh}rM=(h]h]h]h]h]uhKhhh]rN=j)rO=}rP=(hXFor more info, please refer to `IPC User's Guide `__jKhjK=hj9hhh}rQ=(h]h]h]h]h]uhKhhh]rR=(hXFor more info, please refer to rS=rT=}rU=(hXFor more info, please refer to hjO=ubj))rV=}rW=(hX`IPC User's Guide `__h}rX=(UnameXIPC User's Guidej-Xhhttp://software-dl.ti.com/processor-sdk-rtos/esd/docs/latest/rtos/index_Foundational_Components.html#ipch]h]h]h]h]uhjO=h]rY=hXIPC User's GuiderZ=r[=}r\=(hUhjV=ubahj2ubeubaubh)r]=}r^=(hUhj9hj9hjh}r_=(h]h]h]h]h]uhKhhh]r`=j)ra=}rb=(hUjKhj]=hj9hhh}rc=(h]h]h]h]h]uhKhhh]ubaubh)rd=}re=(hX User Casesrf=hj9hj9hhh}rg=(h]rh=U user-casesri=ah]h]h]h]rj=hSauhNhhh]rk=hX User Casesrl=rm=}rn=(hjf=hjd=ubaubj)ro=}rp=(hUhj9hj9hj!h}rq=(j#X-h]h]h]h]h]uhKhhh]rr=j@)rs=}rt=(hX*Message/Data exchange between ARM and DSP hjo=hj9hjCh}ru=(h]h]h]h]h]uhNhhh]rv=h)rw=}rx=(hX)Message/Data exchange between ARM and DSPry=hjs=hj9hhh}rz=(h]h]h]h]h]uhKh]r{=hX)Message/Data exchange between ARM and DSPr|=r}=}r~=(hjy=hjw=ubaubaubaubh)r=}r=(hXExamplesr=hj9hj9hhh}r=(h]r=U examples-3r=ah]h]h]h]r=h auhNhhh]r=hXExamplesr=r=}r=(hj=hj=ubaubj)r=}r=(hUhj9hj9hj!h}r=(j#X-h]h]h]h]h]uhKhhh]r=j@)r=}r=(hXXPlease see `IPC Examples `__ hj=hj9hjCh}r=(h]h]h]h]h]uhNhhh]r=h)r=}r=(hXWPlease see `IPC Examples `__hj=hj9hhh}r=(h]h]h]h]h]uhKh]r=(hX Please see r=r=}r=(hX Please see hj=ubj))r=}r=(hXL`IPC Examples `__h}r=(UnameX IPC Examplesj-X9Foundational_Components_IPC.html#build-ipc-linux-examplesh]h]h]h]h]uhj=h]r=hX IPC Examplesr=r=}r=(hUhj=ubahj2ubeubaubaubh)r=}r=(hXBenefitsr=hj9hj9hhh}r=(h]r=U benefits-3r=ah]h]h]h]r=hmauhNhhh]r=hXBenefitsr=r=}r=(hj=hj=ubaubj)r=}r=(hUhj9hj9hj!h}r=(j#X-h]h]h]h]h]uhKhhh]r=(j@)r=}r=(hX8suitable for those who are familiar with DSP programmingr=hj=hj9hjCh}r=(h]h]h]h]h]uhNhhh]r=h)r=}r=(hj=hj=hj9hhh}r=(h]h]h]h]h]uhKh]r=hX8suitable for those who are familiar with DSP programmingr=r=}r=(hj=hj=ubaubaubj@)r=}r=(hXDSP code optimization hj=hj9hjCh}r=(h]h]h]h]h]uhNhhh]r=h)r=}r=(hXDSP code optimizationr=hj=hj9hhh}r=(h]h]h]h]h]uhKh]r=hXDSP code optimizationr=r=}r=(hj=hj=ubaubaubeubh)r=}r=(hX Drawbacksr=hj9hj9hhh}r=(h]r=U drawbacks-3r=ah]h]h]h]r=h'auhNhhh]r=hX Drawbacksr=r=}r=(hj=hj=ubaubj)r=}r=(hUhj9hj9hj!h}r=(j#X-h]h]h]h]h]uhKhhh]r=(j@)r=}r=(hX)Need knowledge of DSP memory architecturer=hj=hj9hjCh}r=(h]h]h]h]h]uhNhhh]r=h)r=}r=(hj=hj=hj9hhh}r=(h]h]h]h]h]uhKh]r=hX)Need knowledge of DSP memory architecturer=r=}r=(hj=hj=ubaubaubj@)r=}r=(hX3Need knowledge of DSP configuration and programmingr=hj=hj9hjCh}r=(h]h]h]h]h]uhNhhh]r=h)r=}r=(hj=hj=hj9hhh}r=(h]h]h]h]h]uhKh]r=hX3Need knowledge of DSP configuration and programmingr=r=}r=(hj=hj=ubaubaubj@)r=}r=(hX$message size is limited to 512 bytesr=hj=hj9hjCh}r=(h]h]h]h]h]uhNhhh]r=h)r=}r=(hj=hj=hj9hhh}r=(h]h]h]h]h]uhKh]r=hX$message size is limited to 512 bytesr=r=}r=(hj=hj=ubaubaubj@)r=}r=(hXTI proprietary API hj=hj9hjCh}r=(h]h]h]h]h]uhNhhh]r=h)r=}r=(hXTI proprietary APIr>hj=hj9hhh}r>(h]h]h]h]h]uhKh]r>hXTI proprietary APIr>r>}r>(hj>hj=ubaubaubeubh)r>}r>(hUhj9hj9hjh}r>(h]h]h]h]h]uhKhhh]r >j)r >}r >(hUjKhj>hj9hhh}r >(h]h]h]h]h]uhKhhh]ubaubh)r >}r>(hX Pros and Consr>hj9hj9hhh}r>(h]r>U pros-and-consr>ah]h]h]h]r>h%auhNhhh]r>hX Pros and Consr>r>}r>(hj>hj >ubaubjB)r>}r>(hUhj9hj9hjEh}r>(h]h]h]h]h]uhNhhh]r>jH)r>}r>(hUh}r>(h]h]h]h]h]UcolsKuhj>h]r>(jM)r >}r!>(hUh}r">(h]h]h]h]h]UcolwidthK uhj>h]hjQubjM)r#>}r$>(hUh}r%>(h]h]h]h]h]UcolwidthK:uhj>h]hjQubjM)r&>}r'>(hUh}r(>(h]h]h]h]h]UcolwidthKSuhj>h]hjQubjX)r)>}r*>(hUh}r+>(h]h]h]h]h]uhj>h]r,>j])r->}r.>(hUh}r/>(h]h]h]h]h]uhj)>h]r0>(jb)r1>}r2>(hUh}r3>(h]h]h]h]h]uhj->h]hjoubjb)r4>}r5>(hUh}r6>(h]h]h]h]h]uhj->h]r7>h)r8>}r9>(hXProsr:>hj4>hj9hhh}r;>(h]h]h]h]h]uhMh]r<>hXProsr=>r>>}r?>(hj:>hj8>ubaubahjoubjb)r@>}rA>(hUh}rB>(h]h]h]h]h]uhj->h]rC>h)rD>}rE>(hXConsrF>hj@>hj9hhh}rG>(h]h]h]h]h]uhMh]rH>hXConsrI>rJ>}rK>(hjF>hjD>ubaubahjoubehjubahjubj)rL>}rM>(hUh}rN>(h]h]h]h]h]uhj>h]rO>(j])rP>}rQ>(hUh}rR>(h]h]h]h]h]uhjL>h]rS>(jb)rT>}rU>(hUh}rV>(h]h]h]h]h]uhjP>h]rW>h)rX>}rY>(hXOpenCLrZ>hjT>hj9hhh}r[>(h]h]h]h]h]uhMh]r\>hXOpenCLr]>r^>}r_>(hjZ>hjX>ubaubahjoubjb)r`>}ra>(hUh}rb>(h]h]h]h]h]uhjP>h]rc>h)rd>}re>(hX4Easy porting No DSP programming Standard OpenCL APIsrf>hj`>hj9hhh}rg>(h]h]h]h]h]uhMh]rh>hX4Easy porting No DSP programming Standard OpenCL APIsri>rj>}rk>(hjf>hjd>ubaubahjoubjb)rl>}rm>(hUh}rn>(h]h]h]h]h]uhjP>h]ro>h)rp>}rq>(hXQCustomer don’t have control over memory layout etc. to handle optimize DSP coderr>hjl>hj9hhh}rs>(h]h]h]h]h]uhMh]rt>hXQCustomer don’t have control over memory layout etc. to handle optimize DSP coderu>rv>}rw>(hjr>hjp>ubaubahjoubehjubj])rx>}ry>(hUh}rz>(h]h]h]h]h]uhjL>h]r{>(jb)r|>}r}>(hUh}r~>(h]h]h]h]h]uhjx>h]r>h)r>}r>(hXDCEr>hj|>hj9hhh}r>(h]h]h]h]h]uhM h]r>hXDCEr>r>}r>(hj>hj>ubaubahjoubjb)r>}r>(hUh}r>(h]h]h]h]h]uhjx>h]r>h)r>}r>(hX\Accelerated multimedia codec handling Simplifies development when interfacing with GStreamerr>hj>hj9hhh}r>(h]h]h]h]h]uhM h]r>hX\Accelerated multimedia codec handling Simplifies development when interfacing with GStreamerr>r>}r>(hj>hj>ubaubahjoubjb)r>}r>(hUh}r>(h]h]h]h]h]uhjx>h]r>h)r>}r>(hX}Not meant for non-codec algorithms Need work to add new codec algorithms Codec like APIs Require knowledge of DSP programmingr>hj>hj9hhh}r>(h]h]h]h]h]uhM h]r>hX}Not meant for non-codec algorithms Need work to add new codec algorithms Codec like APIs Require knowledge of DSP programmingr>r>}r>(hj>hj>ubaubahjoubehjubj])r>}r>(hUh}r>(h]h]h]h]h]uhjL>h]r>(jb)r>}r>(hUh}r>(h]h]h]h]h]uhj>h]r>h)r>}r>(hXBig Datar>hj>hj9hhh}r>(h]h]h]h]h]uhMh]r>hXBig Datar>r>}r>(hj>hj>ubaubahjoubjb)r>}r>(hUh}r>(h]h]h]h]h]uhj>h]r>h)r>}r>(hXFull control of DSP configuration Capable of DSP code optimization Not limited to the 512 byte buffer size Same API supported on multiple TI platformsr>hj>hj9hhh}r>(h]h]h]h]h]uhMh]r>hXFull control of DSP configuration Capable of DSP code optimization Not limited to the 512 byte buffer size Same API supported on multiple TI platformsr>r>}r>(hj>hj>ubaubahjoubjb)r>}r>(hUh}r>(h]h]h]h]h]uhj>h]r>h)r>}r>(hXbNeed to know memory architecture Need to know DSP configuration and programming TI proprietary APIr>hj>hj9hhh}r>(h]h]h]h]h]uhMh]r>hXbNeed to know memory architecture Need to know DSP configuration and programming TI proprietary APIr>r>}r>(hj>hj>ubaubahjoubehjubj])r>}r>(hUh}r>(h]h]h]h]h]uhjL>h]r>(jb)r>}r>(hUh}r>(h]h]h]h]h]uhj>h]r>h)r>}r>(hXIPCr>hj>hj9hhh}r>(h]h]h]h]h]uhMh]r>hXIPCr>r>}r>(hj>hj>ubaubahjoubjb)r>}r>(hUh}r>(h]h]h]h]h]uhj>h]r>h)r>}r>(hXnFull control of DSP configuration Capable of DSP code optimization Same API supported on multiple TI platformsr>hj>hj9hhh}r>(h]h]h]h]h]uhMh]r>hXnFull control of DSP configuration Capable of DSP code optimization Same API supported on multiple TI platformsr>r>}r>(hj>hj>ubaubahjoubjb)r>}r>(hUh}r>(h]h]h]h]h]uhj>h]r>h)r>}r>(hXNeed to know memory architecture Need to know DSP configuration and programming Limited to small messages (less than 512 bytes) TI proprietary APIr>hj>hj9hhh}r>(h]h]h]h]h]uhMh]r>hXNeed to know memory architecture Need to know DSP configuration and programming Limited to small messages (less than 512 bytes) TI proprietary APIr>r>}r>(hj>hj>ubaubahjoubehjubehjWubehjXubaubh)r>}r>(hUhj9hj9hjh}r>(h]h]h]h]h]uhMhhh]r>j)r>}r>(hUjKhj>hj9hhh}r>(h]h]h]h]h]uhKhhh]ubaubh)r>}r>(hXDecision Makingr>hj9hj9hhh}r>(h]r>Udecision-makingr>ah]h]h]h]r>hpauhNhhh]r>hXDecision Makingr>r?}r?(hj>hj>ubaubh)r?}r?(hXThe following simple flow chart is provided as a reference when making decision on which methods to use for ARM/DSP communication. Hardware capability also need to be considered in the decision making process, such as if Image and Video Accelerator exists when using DCE.r?hj9hj9hhh}r?(h]h]h]h]h]uhMhhh]r?hXThe following simple flow chart is provided as a reference when making decision on which methods to use for ARM/DSP communication. Hardware capability also need to be considered in the decision making process, such as if Image and Video Accelerator exists when using DCE.r?r?}r ?(hj?hj?ubaubjr)r ?}r ?(hX1.. Image:: ../images/ARM-DSP_DecisionMaking.jpg hj9hXninternal padding after source/linux/Foundational_Components/IPC/Multiple_Ways_of_ARM-DSP_Communication.rst.incr ?hjyh}r ?(UuriX*linux/../images/ARM-DSP_DecisionMaking.jpgr?h]h]h]h]jw}r?U*j?sh]uhM&hhh]ubeubh)r?}r?(hUhhhhhhh}r?(h]h]h]h]r?U ipc-testsr?ah]r?hbauhK"hhh]r?(h)r?}r?(hX IPC Testsr?hj?hhhhh}r?(h]h]h]h]h]uhK"hhh]r?hX IPC Testsr?r?}r?(hj?hj?ubaubh)r?}r ?(hX=http://processors.wiki.ti.com/index.php/IPC_Users_Guide/Testshj?hhX:source/linux/Foundational_Components/IPC/IPC_Tests.rst.incr!?r"?}r#?bhhh}r$?(hhh]h]h]h]h]uhKhhh]r%?hX=http://processors.wiki.ti.com/index.php/IPC_Users_Guide/Testsr&?r'?}r(?(hUhj?ubaubh)r)?}r*?(hXDThe IPC product contains unit tests under the following directories.r+?hj?hj"?hhh}r,?(h]h]h]h]h]uhKhhh]r-?hXDThe IPC product contains unit tests under the following directories.r.?r/?}r0?(hj+?hj)?ubaubj)r1?}r2?(hUhj?hj"?hj!h}r3?(j#X-h]h]h]h]h]uhKhhh]r4?(j@)r5?}r6?(hXlinux/src/testsr7?hj1?hj"?hjCh}r8?(h]h]h]h]h]uhNhhh]r9?h)r:?}r;?(hj7?hj5?hj"?hhh}r?r??}r@?(hj7?hj:?ubaubaubj@)rA?}rB?(hX qnx/src/testsrC?hj1?hj"?hjCh}rD?(h]h]h]h]h]uhNhhh]rE?h)rF?}rG?(hjC?hjA?hj"?hhh}rH?(h]h]h]h]h]uhK h]rI?hX qnx/src/testsrJ?rK?}rL?(hjC?hjF?ubaubaubj@)rM?}rN?(hXpackages/ti/ipc/tests hj1?hj"?hjCh}rO?(h]h]h]h]h]uhNhhh]rP?h)rQ?}rR?(hXpackages/ti/ipc/testsrS?hjM?hj"?hhh}rT?(h]h]h]h]h]uhK h]rU?hXpackages/ti/ipc/testsrV?rW?}rX?(hjS?hjQ?ubaubaubeubh)rY?}rZ?(hX]These are meant to be used as unit tests and documentation of the tests are currently sparse.r[?hj?hj"?hhh}r\?(h]h]h]h]h]uhK hhh]r]?hX]These are meant to be used as unit tests and documentation of the tests are currently sparse.r^?r_?}r`?(hj[?hjY?ubaubh)ra?}rb?(hXThese tests under linux/src/tests have a Linux host application binary and the binaries for the respective slave cores used in the test are located under packages/ti/ipc/tests.rc?hj?hj"?hhh}rd?(h]h]h]h]h]uhKhhh]re?hXThese tests under linux/src/tests have a Linux host application binary and the binaries for the respective slave cores used in the test are located under packages/ti/ipc/tests.rf?rg?}rh?(hjc?hja?ubaubh)ri?}rj?(hX**NOTE**: Loading of the slave cores in general is achieved by using remoteproc or MPM control procedures, which are specific to the platform and are out of scope for this page.hj?hj"?hhh}rk?(h]h]h]h]h]uhKhhh]rl?(j)rm?}rn?(hX**NOTE**h}ro?(h]h]h]h]h]uhji?h]rp?hXNOTErq?rr?}rs?(hUhjm?ubahjubhX: Loading of the slave cores in general is achieved by using remoteproc or MPM control procedures, which are specific to the platform and are out of scope for this page.rt?ru?}rv?(hX: Loading of the slave cores in general is achieved by using remoteproc or MPM control procedures, which are specific to the platform and are out of scope for this page.hji?ubeubh)rw?}rx?(hX_MessageQApp: Sends single messages to slave cores and gets messages sent back from slave cores.ry?hj?hj"?hhh}rz?(h]h]h]h]h]uhKhhh]r{?hX_MessageQApp: Sends single messages to slave cores and gets messages sent back from slave cores.r|?r}?}r~?(hjy?hjw?ubaubh)r?}r?(hXlMsgq100: Specific unit test to test MessageQ_get when messages are available from more than one remote core.r?hj?hj"?hhh}r?(h]h]h]h]h]uhK hhh]r?hXlMsgq100: Specific unit test to test MessageQ_get when messages are available from more than one remote core.r?r?}r?(hj?hj?ubaubh)r?}r?(hXOMessageQBench: Send and get back single messages and measures round trip delay.r?hj?hj"?hhh}r?(h]h]h]h]h]uhK#hhh]r?hXOMessageQBench: Send and get back single messages and measures round trip delay.r?r?}r?(hj?hj?ubaubh)r?}r?(hXThese unit test binaries can be built with the following commands ( See `IPC Linux Install Guide `_ for more details on setting up variables)hj?hj"?hhh}r?(h]h]h]h]h]uhK&hhh]r?(hXHThese unit test binaries can be built with the following commands ( See r?r?}r?(hXHThese unit test binaries can be built with the following commands ( See hj?ubj))r?}r?(hXS`IPC Linux Install Guide `_h}r?(UnameXIPC Linux Install Guidej-X6index_Foundational_Components.html#linux-install-guider?h]h]h]h]h]uhj?h]r?hXIPC Linux Install Guider?r?}r?(hUhj?ubahj2ubcdocutils.nodes target r?)r?}r?(hX9 hKhj?hUtargetr?h}r?(Urefurij?h]r?Uipc-linux-install-guider?ah]h]h]h]r?hLauh]ubhX* for more details on setting up variables)r?r?}r?(hX* for more details on setting up variables)hj?ubeubj)r?}r?(hX.make -f ipc-linux.mak config make make installhj?hj"?hjh}r?(hhh]h]h]h]h]uhMhhh]r?hX.make -f ipc-linux.mak config make make installr?r?}r?(hUhj?ubaubh)r?}r?(hX=NOTE: The Host linux binaries are located at the DESTDIR/bin.r?hj?hj"?hhh}r?(h]h]h]h]h]uhK0hhh]r?hX=NOTE: The Host linux binaries are located at the DESTDIR/bin.r?r?}r?(hj?hj?ubaubh)r?}r?(hUhj?hj"?hjh}r?(h]h]h]h]h]uhK2hhh]r?(j)r?}r?(hUjKhj?hj"?hhh}r?(h]h]h]h]h]uhKhhh]ubj)r?}r?(hXNAll these tests use the messageq_single.\* binaries loaded on the slave cores.jKhj?hj"?hhh}r?(h]h]h]h]h]uhK4hhh]r?hXMAll these tests use the messageq_single.* binaries loaded on the slave cores.r?r?}r?(hXNAll these tests use the messageq_single.\* binaries loaded on the slave cores.hj?ubaubeubh)r?}r?(hX For example:r?hj?hj"?hhh}r?(h]h]h]h]h]uhK6hhh]r?hX For example:r?r?}r?(hj?hj?ubaubh)r?}r?(hX&For the ipu1 core on AM57x/DRA7xx use:r?hj?hj"?hhh}r?(h]h]h]h]h]uhK8hhh]r?hX&For the ipu1 core on AM57x/DRA7xx use:r?r?}r?(hj?hj?ubaubj)r?}r?(hXL./packages/ti/ipc/tests/bin/ti_platforms_evmDRA7XX_ipu1/messageq_single.xem4hj?hj"?hjh}r?(hhh]h]h]h]h]uhM hhh]r?hXL./packages/ti/ipc/tests/bin/ti_platforms_evmDRA7XX_ipu1/messageq_single.xem4r?r?}r?(hUhj?ubaubh)r?}r?(hX"For all the DSP cores on K2HK use:r?hj?hj"?hhh}r?(h]h]h]h]h]uhK>hhh]r?hX"For all the DSP cores on K2HK use:r?r?}r?(hj?hj?ubaubj)r?}r?(hXQ./packages/ti/ipc/tests/bin/ti_platforms_evmTCI6638K2K_core0/messageq_single.xe66hj?hj"?hjh}r?(hhh]h]h]h]h]uhMhhh]r?hXQ./packages/ti/ipc/tests/bin/ti_platforms_evmTCI6638K2K_core0/messageq_single.xe66r?r?}r?(hUhj?ubaubh)r?}r?(hXaThe following procedures assume that all the relevant slave cores are already loaded and running.r?hj?hj"?hhh}r?(h]h]h]h]h]uhKGhhh]r?hXaThe following procedures assume that all the relevant slave cores are already loaded and running.r?r?}r?(hj?hj?ubaubh)r?}r?(hX MessageQAppr?hj?hj"?hhh}r?(h]h]h]h]h]uhKJhhh]r?hX MessageQAppr?r?}r?(hj?hj?ubaubh)r?}r?(hXSyntax:r?hj?hj"?hhh}r?(h]h]h]h]h]uhKLhhh]r@hXSyntax:r@r@}r@(hj?hj?ubaubj)r@}r@(hX+MessageQApp hj?hj"?hjh}r@(hhh]h]h]h]h]uhMhhh]r@hX+MessageQApp r@r @}r @(hUhj@ubaubh)r @}r @(hX(e.g)r @hj?hj"?hhh}r@(h]h]h]h]h]uhKRhhh]r@hX(e.g)r@r@}r@(hj @hj @ubaubj)r@}r@(hXMessageQApp 100 1hj?hj"?hjh}r@(hhh]h]h]h]h]uhM%hhh]r@hXMessageQApp 100 1r@r@}r@(hUhj@ubaubh)r@}r@(hXMsgqr@hj?hj"?hhh}r@(h]h]h]h]h]uhKXhhh]r@hXMsgqr@r @}r!@(hj@hj@ubaubj)r"@}r#@(hX#Msgq100 [-l|h] procId1 procId2 ....hj?hj"?hjh}r$@(hhh]h]h]h]h]uhM+hhh]r%@hX#Msgq100 [-l|h] procId1 procId2 ....r&@r'@}r(@(hUhj"@ubaubh)r)@}r*@(hX(e.g)r+@hj?hj"?hhh}r,@(h]h]h]h]h]uhK^hhh]r-@hX(e.g)r.@r/@}r0@(hj+@hj)@ubaubj)r1@}r2@(hXPrints list of available remote processors Msgq100 -l Run test with remote processor with id 1 Msgq100 1 Run test with remote processors with id 1 and 2 Msgq100 1 2hj?hj"?hjh}r3@(hhh]h]h]h]h]uhM1hhh]r4@hXPrints list of available remote processors Msgq100 -l Run test with remote processor with id 1 Msgq100 1 Run test with remote processors with id 1 and 2 Msgq100 1 2r5@r6@}r7@(hUhj1@ubaubh)r8@}r9@(hX MessageQBenchr:@hj?hj"?hhh}r;@(h]h]h]h]h]uhKihhh]r<@hX MessageQBenchr=@r>@}r?@(hj:@hj8@ubaubh)r@@}rA@(hXSyntax:rB@hj?hj"?hhh}rC@(h]h]h]h]h]uhKkhhh]rD@hXSyntax:rE@rF@}rG@(hjB@hj@@ubaubj)rH@}rI@(hX-MessageQBench hj?hj"?hjh}rJ@(hhh]h]h]h]h]uhM>hhh]rK@hX-MessageQBench rL@rM@}rN@(hUhjH@ubaubh)rO@}rP@(hX(e.g)rQ@hj?hj"?hhh}rR@(h]h]h]h]h]uhKqhhh]rS@hX(e.g)rT@rU@}rV@(hjQ@hjO@ubaubj)rW@}rX@(hXMessageQBench 100 1hj?hj"?hjh}rY@(hhh]h]h]h]h]uhMDhhh]rZ@hXMessageQBench 100 1r[@r\@}r]@(hUhjW@ubaubh)r^@}r_@(hUhj?hj"?hjh}r`@(h]h]h]h]h]uhKwhhh]ra@j)rb@}rc@(hUjKhj^@hj"?hhh}rd@(h]h]h]h]h]uhKhhh]ubaubh)re@}rf@(hXU./linux/src/tests/usr/bin/ping_rpmsg: Sends ping messages and receives back messages.rg@hj?hj"?hhh}rh@(h]h]h]h]h]uhK|hhh]ri@hXU./linux/src/tests/usr/bin/ping_rpmsg: Sends ping messages and receives back messages.rj@rk@}rl@(hjg@hje@ubaubh)rm@}rn@(hXDThis test uses **ping_rpmsg**.\* binaries loaded on the slave cores.ro@hj?hj"?hhh}rp@(h]h]h]h]h]uhKhhh]rq@(hXThis test uses rr@rs@}rt@(hXThis test uses hjm@ubj)ru@}rv@(hX**ping_rpmsg**h}rw@(h]h]h]h]h]uhjm@h]rx@hX ping_rpmsgry@rz@}r{@(hUhju@ubahjubhX&.* binaries loaded on the slave cores.r|@r}@}r~@(hX'.\* binaries loaded on the slave cores.hjm@ubeubh)r@}r@(hX2For example for the ipu1 core on AM57x/DRA7xx use:r@hj?hj"?hhh}r@(h]h]h]h]h]uhKhhh]r@hX2For example for the ipu1 core on AM57x/DRA7xx use:r@r@}r@(hj@hj@ubaubj)r@}r@(hXG./packages/ti/ipc/tests/bin/ti_platforms_evmDRA7XX_ipu1/ping_rpmsg.xem4hj?hj"?hjh}r@(hhh]h]h]h]h]uhMThhh]r@hXG./packages/ti/ipc/tests/bin/ti_platforms_evmDRA7XX_ipu1/ping_rpmsg.xem4r@r@}r@(hUhj@ubaubh)r@}r@(hX.On the linux console run the following commandr@hj?hj"?hhh}r@(h]h]h]h]h]uhKhhh]r@hX.On the linux console run the following commandr@r@}r@(hj@hj@ubaubh)r@}r@(hXsyntax:r@hj?hj"?hhh}r@(h]h]h]h]h]uhKhhh]r@hXsyntax:r@r@}r@(hj@hj@ubaubj)r@}r@(hXping_rpmsg [num_iterations]hj?hj"?hjh}r@(hhh]h]h]h]h]uhM_hhh]r@hXping_rpmsg [num_iterations]r@r@}r@(hUhj@ubaubh)r@}r@(hX(e.g)r@hj?hj"?hhh}r@(h]h]h]h]h]uhKhhh]r@hX(e.g)r@r@}r@(hj@hj@ubaubj)r@}r@(hXping_rpmsg ping_rpmsg 100hj?hj"?hjh}r@(hhh]h]h]h]h]uhMehhh]r@hXping_rpmsg ping_rpmsg 100r@r@}r@(hUhj@ubaubh)r@}r@(hUhj?hj"?hjh}r@(h]h]h]h]h]uhKhhh]r@j)r@}r@(hUjKhj@hj"?hhh}r@(h]h]h]h]h]uhKhhh]ubaubh)r@}r@(hX6./linux/src/tests/.libs/NameServerApp: NameServer testr@hj?hj"?hhh}r@(h]h]h]h]h]uhKhhh]r@hX6./linux/src/tests/.libs/NameServerApp: NameServer testr@r@}r@(hj@hj@ubaubh)r@}r@(hXCThis test uses NameServerApp.\* binaries loaded on the slave cores.r@hj?hj"?hhh}r@(h]h]h]h]h]uhKhhh]r@hXBThis test uses NameServerApp.* binaries loaded on the slave cores.r@r@}r@(hXCThis test uses NameServerApp.\* binaries loaded on the slave cores.hj@ubaubh)r@}r@(hX2For example for the ipu1 core on AM57x/DRA7xx use:r@hj?hj"?hhh}r@(h]h]h]h]h]uhKhhh]r@hX2For example for the ipu1 core on AM57x/DRA7xx use:r@r@}r@(hj@hj@ubaubj)r@}r@(hXJ./packages/ti/ipc/tests/bin/ti_platforms_evmDRA7XX_ipu1/NameServerApp.xem4hj?hj"?hjh}r@(hhh]h]h]h]h]uhMuhhh]r@hXJ./packages/ti/ipc/tests/bin/ti_platforms_evmDRA7XX_ipu1/NameServerApp.xem4r@r@}r@(hUhj@ubaubh)r@}r@(hX?With the slave processors loaded execute the following command.r@hj?hj"?hhh}r@(h]h]h]h]h]uhKhhh]r@hX?With the slave processors loaded execute the following command.r@r@}r@(hj@hj@ubaubj)r@}r@(hX NameServerApphj?hj"?hjh}r@(hhh]h]h]h]h]uhM~hhh]r@hX NameServerAppr@r@}r@(hUhj@ubaubh)r@}r@(hUhj?hj"?hjh}r@(h]h]h]h]h]uhKhhh]r@j)r@}r@(hUjKhj@hj"?hhh}r@(h]h]h]h]h]uhKhhh]ubaubh)r@}r@(hXO./linux/src/tests/.libs/MessageQMulti: Sends and receives with multiple threadsr@hj?hj"?hhh}r@(h]h]h]h]h]uhKhhh]r@hXO./linux/src/tests/.libs/MessageQMulti: Sends and receives with multiple threadsr@r@}r@(hj@hj@ubaubh)r@}r@(hXBThis test uses messageq_multi.\* images loaded on the slave cores.r@hj?hj"?hhh}r@(h]h]h]h]h]uhKhhh]r@hXAThis test uses messageq_multi.* images loaded on the slave cores.r@r@}r@(hXBThis test uses messageq_multi.\* images loaded on the slave cores.hj@ubaubh)rA}rA(hX2For example for the ipu1 core on AM57x/DRA7xx use:rAhj?hj"?hhh}rA(h]h]h]h]h]uhKhhh]rAhX2For example for the ipu1 core on AM57x/DRA7xx use:rArA}rA(hjAhjAubaubj)rA}r A(hXK./packages/ti/ipc/tests/bin/ti_platforms_evmDRA7XX_ipu1/messageq_multi.xem4hj?hj"?hjh}r A(hhh]h]h]h]h]uhMhhh]r AhXK./packages/ti/ipc/tests/bin/ti_platforms_evmDRA7XX_ipu1/messageq_multi.xem4r Ar A}rA(hUhjAubaubh)rA}rA(hX`With the slave cores loaded and running. Use the following command to run the Linux application.rAhj?hj"?hhh}rA(h]h]h]h]h]uhKhhh]rAhX`With the slave cores loaded and running. Use the following command to run the Linux application.rArA}rA(hjAhjAubaubh)rA}rA(hX(e.g)rAhj?hj"?hhh}rA(h]h]h]h]h]uhKhhh]rAhX(e.g)rArA}rA(hjAhjAubaubj)rA}r A(hX MessageQMultihj?hj"?hjh}r!A(hhh]h]h]h]h]uhMhhh]r"AhX MessageQMultir#Ar$A}r%A(hUhjAubaubh)r&A}r'A(hUhj?hj"?hjh}r(A(h]h]h]h]h]uhKhhh]r)Aj)r*A}r+A(hUjKhj&Ahj"?hhh}r,A(h]h]h]h]h]uhKhhh]ubaubh)r-A}r.A(hXy./linux/src/tests/.libs/MessageQMultiMulti: Sends and receives multiple messages with multiple threads to multiple cores.r/Ahj?hj"?hhh}r0A(h]h]h]h]h]uhKhhh]r1AhXy./linux/src/tests/.libs/MessageQMultiMulti: Sends and receives multiple messages with multiple threads to multiple cores.r2Ar3A}r4A(hj/Ahj-Aubaubh)r5A}r6A(hXNNOTE: This test needs all the slave cores in the SOC to be loaded and running.r7Ahj?hj"?hhh}r8A(h]h]h]h]h]uhKhhh]r9AhXNNOTE: This test needs all the slave cores in the SOC to be loaded and running.r:Ar;A}rA(hXFThis uses **messageq_multimulti.\*** images loaded on the slave cores.r?Ahj?hj"?hhh}r@A(h]h]h]h]h]uhKhhh]rAA(hX This uses rBArCA}rDA(hX This uses hj=Aubj)rEA}rFA(hX**messageq_multimulti.\***h}rGA(h]h]h]h]h]uhj=Ah]rHAhXmessageq_multimulti.*rIArJA}rKA(hUhjEAubahjubhX" images loaded on the slave cores.rLArMA}rNA(hX" images loaded on the slave cores.hj=Aubeubh)rOA}rPA(hX2For example for the ipu1 core on AM57x/DRA7xx use:rQAhj?hj"?hhh}rRA(h]h]h]h]h]uhKhhh]rSAhX2For example for the ipu1 core on AM57x/DRA7xx use:rTArUA}rVA(hjQAhjOAubaubj)rWA}rXA(hXP./packages/ti/ipc/tests/bin/ti_platforms_evmDRA7XX_ipu1/messageq_multimulti.xem4hj?hj"?hjh}rYA(hhh]h]h]h]h]uhMhhh]rZAhXP./packages/ti/ipc/tests/bin/ti_platforms_evmDRA7XX_ipu1/messageq_multimulti.xem4r[Ar\A}r]A(hUhjWAubaubh)r^A}r_A(hXdWith all the slave cores loaded and running. Use the following command to run the Linux application.r`Ahj?hj"?hhh}raA(h]h]h]h]h]uhKhhh]rbAhXdWith all the slave cores loaded and running. Use the following command to run the Linux application.rcArdA}reA(hj`Ahj^Aubaubh)rfA}rgA(hX(e.g)rhAhj?hj"?hhh}riA(h]h]h]h]h]uhKhhh]rjAhX(e.g)rkArlA}rmA(hjhAhjfAubaubj)rnA}roA(hXMessageQMultiMultihj?hj"?hjh}rpA(hhh]h]h]h]h]uhMhhh]rqAhXMessageQMultiMultirrArsA}rtA(hUhjnAubaubh)ruA}rvA(hUhj?hj"?hjh}rwA(h]h]h]h]h]uhKhhh]rxAj)ryA}rzA(hUjKhjuAhj"?hhh}r{A(h]h]h]h]h]uhKhhh]ubaubh)r|A}r}A(hX2./linux/src/tests/.libs/fault: Test fault handlingr~Ahj?hj"?hhh}rA(h]h]h]h]h]uhKhhh]rAhX2./linux/src/tests/.libs/fault: Test fault handlingrArA}rA(hj~Ahj|Aubaubh)rA}rA(hXNNOTE: This test needs all the slave cores in the SOC to be loaded and running.rAhj?hj"?hhh}rA(h]h]h]h]h]uhKhhh]rAhXNNOTE: This test needs all the slave cores in the SOC to be loaded and running.rArA}rA(hjAhjAubaubh)rA}rA(hX4This uses fault.\* images loaded on the slave cores.rAhj?hj"?hhh}rA(h]h]h]h]h]uhKhhh]rAhX3This uses fault.* images loaded on the slave cores.rArA}rA(hX4This uses fault.\* images loaded on the slave cores.hjAubaubh)rA}rA(hX2For example for the ipu1 core on AM57x/DRA7xx use:rAhj?hj"?hhh}rA(h]h]h]h]h]uhKhhh]rAhX2For example for the ipu1 core on AM57x/DRA7xx use:rArA}rA(hjAhjAubaubj)rA}rA(hXB./packages/ti/ipc/tests/bin/ti_platforms_evmDRA7XX_ipu1/fault.xem4hj?hj"?hjh}rA(hhh]h]h]h]h]uhMhhh]rAhXB./packages/ti/ipc/tests/bin/ti_platforms_evmDRA7XX_ipu1/fault.xem4rArA}rA(hUhjAubaubh)rA}rA(hXdWith all the slave cores loaded and running. Use the following command to run the Linux application.rAhj?hj"?hhh}rA(h]h]h]h]h]uhMhhh]rAhXdWith all the slave cores loaded and running. Use the following command to run the Linux application.rArA}rA(hjAhjAubaubh)rA}rA(hX(e.g)rAhj?hj"?hhh}rA(h]h]h]h]h]uhMhhh]rAhX(e.g)rArA}rA(hjAhjAubaubj)rA}rA(hXfaulthj?hj"?hjh}rA(hhh]h]h]h]h]uhMhhh]rAhXfaultrArA}rA(hUhjAubaubh)rA}rA(hUhj?hj"?hjh}rA(h]h]h]h]h]uhM hhh]rAj)rA}rA(hUjKhjAhj"?hhh}rA(h]h]h]h]h]uhKhhh]ubaubh)rA}rA(hXThese tests under qnx/src/tests have a Qnx host application binary and the binaries for the respective slave cores used in the test are located under packages/ti/ipc/tests.rAhj?hj"?hhh}rA(h]h]h]h]h]uhMhhh]rAhXThese tests under qnx/src/tests have a Qnx host application binary and the binaries for the respective slave cores used in the test are located under packages/ti/ipc/tests.rArA}rA(hjAhjAubaubj)rA}rA(hXJLoading of the slave cores in general is achieved by using the ipc binary.hj?hj"?hjh}rA(h]h]h]h]h]uhNhhh]rAh)rA}rA(hXJLoading of the slave cores in general is achieved by using the ipc binary.rAhjAhj"?hhh}rA(h]h]h]h]h]uhMh]rAhXJLoading of the slave cores in general is achieved by using the ipc binary.rArA}rA(hjAhjAubaubaubh)rA}rA(hX_MessageQApp: Sends single messages to slave cores and gets messages sent back from slave cores.rAhj?hj"?hhh}rA(h]h]h]h]h]uhMhhh]rAhX_MessageQApp: Sends single messages to slave cores and gets messages sent back from slave cores.rArA}rA(hjAhjAubaubh)rA}rA(hXOMessageQBench: Send and get back single messages and measures round trip delay.rAhj?hj"?hhh}rA(h]h]h]h]h]uhMhhh]rAhXOMessageQBench: Send and get back single messages and measures round trip delay.rArA}rA(hjAhjAubaubh)rA}rA(hXThese unit test binaries can be built with the following commands ( See `IPC QNX Install Guide `_ for more details on setting up variables)hj?hj"?hhh}rA(h]h]h]h]h]uhM hhh]rA(hXHThese unit test binaries can be built with the following commands ( See rArA}rA(hXHThese unit test binaries can be built with the following commands ( See hjAubj))rA}rA(hXO`IPC QNX Install Guide `_h}rA(UnameXIPC QNX Install Guidej-X4index_Foundational_Components.html#qnx-install-guiderAh]h]h]h]h]uhjAh]rAhXIPC QNX Install GuiderArA}rA(hUhjAubahj2ubj?)rA}rA(hX7 hKhjAhj?h}rA(UrefurijAh]rAUipc-qnx-install-guiderAah]h]h]h]rAhHauh]ubhX* for more details on setting up variables)rArA}rA(hX* for more details on setting up variables)hjAubeubj)rA}rA(hX3make -f ipc-qnx.mak all make -f ipc-qnx.mak installhj?hj"?hjh}rA(hhh]h]h]h]h]uhMhhh]rBhX3make -f ipc-qnx.mak all make -f ipc-qnx.mak installrBrB}rB(hUhjAubaubj)rB}rB(hUhj?hj"?hjh}rB(h]h]h]h]h]uhNhhh]rBj")rB}r B(hXOAll these tests use the messageq_single.\* binaries loaded on the slave cores. hjBhj"?hj%h}r B(h]h]h]h]h]uhM*h]r B(j()r B}r B(hXAAll these tests use the messageq_single.\* binaries loaded on therBhjBhj"?hj,h}rB(h]h]h]h]h]uhM*h]rBhX@All these tests use the messageq_single.* binaries loaded on therBrB}rB(hXAAll these tests use the messageq_single.\* binaries loaded on thehj Bubaubj9)rB}rB(hUh}rB(h]h]h]h]h]uhjBh]rBh)rB}rB(hX slave cores.rBhjBhj"?hhh}rB(h]h]h]h]h]uhM*h]rBhX slave cores.rBrB}rB(hjBhjBubaubahjEubeubaubh)r B}r!B(hX For example:r"Bhj?hj"?hhh}r#B(h]h]h]h]h]uhM,hhh]r$BhX For example:r%Br&B}r'B(hj"Bhj Bubaubh)r(B}r)B(hX For the ipu1 core on DRA7xx use:r*Bhj?hj"?hhh}r+B(h]h]h]h]h]uhM.hhh]r,BhX For the ipu1 core on DRA7xx use:r-Br.B}r/B(hj*Bhj(Bubaubj)r0B}r1B(hXL./packages/ti/ipc/tests/bin/ti_platforms_evmDRA7XX_ipu1/messageq_single.xem4hj?hj"?hjh}r2B(hhh]h]h]h]h]uhMhhh]r3BhXL./packages/ti/ipc/tests/bin/ti_platforms_evmDRA7XX_ipu1/messageq_single.xem4r4Br5B}r6B(hUhj0Bubaubh)r7B}r8B(hXXFollow the instructions in the Install Guide for how to load images to the remote cores.r9Bhj?hj"?hhh}r:B(h]h]h]h]h]uhM4hhh]r;BhXXFollow the instructions in the Install Guide for how to load images to the remote cores.rB(hj9Bhj7Bubaubh)r?B}r@B(hXaThe following procedures assume that all the relevant slave cores are already loaded and running.rABhj?hj"?hhh}rBB(h]h]h]h]h]uhM:hhh]rCBhXaThe following procedures assume that all the relevant slave cores are already loaded and running.rDBrEB}rFB(hjABhj?Bubaubh)rGB}rHB(hX MessageQApprIBhj?hj"?hhh}rJB(h]h]h]h]h]uhM=hhh]rKBhX MessageQApprLBrMB}rNB(hjIBhjGBubaubh)rOB}rPB(hXSyntax:rQBhj?hj"?hhh}rRB(h]h]h]h]h]uhM?hhh]rSBhXSyntax:rTBrUB}rVB(hjQBhjOBubaubj)rWB}rXB(hX+MessageQApp hj?hj"?hjh}rYB(hhh]h]h]h]h]uhMhhh]rZBhX+MessageQApp r[Br\B}r]B(hUhjWBubaubh)r^B}r_B(hX(e.g)r`Bhj?hj"?hhh}raB(h]h]h]h]h]uhMEhhh]rbBhX(e.g)rcBrdB}reB(hj`Bhj^Bubaubj)rfB}rgB(hXMessageQApp 100 1hj?hj"?hjh}rhB(hhh]h]h]h]h]uhMhhh]riBhXMessageQApp 100 1rjBrkB}rlB(hUhjfBubaubh)rmB}rnB(hX MessageQBenchroBhj?hj"?hhh}rpB(h]h]h]h]h]uhMKhhh]rqBhX MessageQBenchrrBrsB}rtB(hjoBhjmBubaubh)ruB}rvB(hXSyntax:rwBhj?hj"?hhh}rxB(h]h]h]h]h]uhMMhhh]ryBhXSyntax:rzBr{B}r|B(hjwBhjuBubaubj)r}B}r~B(hX-MessageQBench hj?hj"?hjh}rB(hhh]h]h]h]h]uhM hhh]rBhX-MessageQBench rBrB}rB(hUhj}Bubaubh)rB}rB(hX(e.g)rBhj?hj"?hhh}rB(h]h]h]h]h]uhMShhh]rBhX(e.g)rBrB}rB(hjBhjBubaubj)rB}rB(hXMessageQBench 100 1hj?hj"?hjh}rB(hhh]h]h]h]h]uhM&hhh]rBhXMessageQBench 100 1rBrB}rB(hUhjBubaubh)rB}rB(hX../qnx/src/tests/NameServerApp: NameServer testrBhj?hj"?hhh}rB(h]h]h]h]h]uhM\hhh]rBhX../qnx/src/tests/NameServerApp: NameServer testrBrB}rB(hjBhjBubaubh)rB}rB(hXCThis test uses NameServerApp.\* binaries loaded on the slave cores.rBhj?hj"?hhh}rB(h]h]h]h]h]uhM^hhh]rBhXBThis test uses NameServerApp.* binaries loaded on the slave cores.rBrB}rB(hXCThis test uses NameServerApp.\* binaries loaded on the slave cores.hjBubaubh)rB}rB(hX,For example for the ipu1 core on DRA7xx use:rBhj?hj"?hhh}rB(h]h]h]h]h]uhM`hhh]rBhX,For example for the ipu1 core on DRA7xx use:rBrB}rB(hjBhjBubaubj)rB}rB(hXJ./packages/ti/ipc/tests/bin/ti_platforms_evmDRA7XX_ipu1/NameServerApp.xem4hj?hj"?hjh}rB(hhh]h]h]h]h]uhM3hhh]rBhXJ./packages/ti/ipc/tests/bin/ti_platforms_evmDRA7XX_ipu1/NameServerApp.xem4rBrB}rB(hUhjBubaubh)rB}rB(hX?With the slave processors loaded execute the following command.rBhj?hj"?hhh}rB(h]h]h]h]h]uhMihhh]rBhX?With the slave processors loaded execute the following command.rBrB}rB(hjBhjBubaubj)rB}rB(hX NameServerApphj?hj"?hjh}rB(hhh]h]h]h]h]uhM<hhh]rBhX NameServerApprBrB}rB(hUhjBubaubh)rB}rB(hUhj?hj"?hjh}rB(h]h]h]h]h]uhMohhh]rBj)rB}rB(hUjKhjBhj"?hhh}rB(h]h]h]h]h]uhKhhh]ubaubh)rB}rB(hXG./qnx/src/tests/MessageQMulti: Sends and receives with multiple threadsrBhj?hj"?hhh}rB(h]h]h]h]h]uhMthhh]rBhXG./qnx/src/tests/MessageQMulti: Sends and receives with multiple threadsrBrB}rB(hjBhjBubaubh)rB}rB(hXBThis test uses messageq_multi.\* images loaded on the slave cores.rBhj?hj"?hhh}rB(h]h]h]h]h]uhMvhhh]rBhXAThis test uses messageq_multi.* images loaded on the slave cores.rBrB}rB(hXBThis test uses messageq_multi.\* images loaded on the slave cores.hjBubaubh)rB}rB(hX,For example for the ipu1 core on DRA7xx use:rBhj?hj"?hhh}rB(h]h]h]h]h]uhMxhhh]rBhX,For example for the ipu1 core on DRA7xx use:rBrB}rB(hjBhjBubaubj)rB}rB(hXK./packages/ti/ipc/tests/bin/ti_platforms_evmDRA7XX_ipu1/messageq_multi.xem4hj?hj"?hjh}rB(hhh]h]h]h]h]uhMKhhh]rBhXK./packages/ti/ipc/tests/bin/ti_platforms_evmDRA7XX_ipu1/messageq_multi.xem4rBrB}rB(hUhjBubaubh)rB}rB(hX^With the slave cores loaded and running. Use the following command to run the Qnx application.rBhj?hj"?hhh}rB(h]h]h]h]h]uhMhhh]rBhX^With the slave cores loaded and running. Use the following command to run the Qnx application.rBrB}rB(hjBhjBubaubh)rB}rB(hXSyntax:rBhj?hj"?hhh}rB(h]h]h]h]h]uhMhhh]rBhXSyntax:rBrB}rB(hjBhjBubaubj)rB}rB(hXUsage: MessageQMulti Defaults: number of threads: 10 number of loops: 1000 number of processes: 1 Note: If number of processes is set, number of threads is forced to 1hj?hj"?hjh}rB(hhh]h]h]h]h]uhMWhhh]rBhXUsage: MessageQMulti Defaults: number of threads: 10 number of loops: 1000 number of processes: 1 Note: If number of processes is set, number of threads is forced to 1rBrB}rB(hUhjBubaubh)rB}rB(hX(e.g)rChj?hj"?hhh}rC(h]h]h]h]h]uhMhhh]rChX(e.g)rCrC}rC(hjChjBubaubj)rC}rC(hXMessageQMulti 10 10hj?hj"?hjh}rC(hhh]h]h]h]h]uhMahhh]r ChXMessageQMulti 10 10r Cr C}r C(hUhjCubaubh)r C}rC(hX*./qnx/src/tests/Fault: Test fault handlingrChj?hj"?hhh}rC(h]h]h]h]h]uhMhhh]rChX*./qnx/src/tests/Fault: Test fault handlingrCrC}rC(hjChj Cubaubh)rC}rC(hX4This uses fault.\* images loaded on the slave cores.rChj?hj"?hhh}rC(h]h]h]h]h]uhMhhh]rChX3This uses fault.* images loaded on the slave cores.rCrC}rC(hX4This uses fault.\* images loaded on the slave cores.hjCubaubh)rC}rC(hX,For example for the ipu1 core on DRA7xx use:rChj?hj"?hhh}r C(h]h]h]h]h]uhMhhh]r!ChX,For example for the ipu1 core on DRA7xx use:r"Cr#C}r$C(hjChjCubaubj)r%C}r&C(hXB./packages/ti/ipc/tests/bin/ti_platforms_evmDRA7XX_ipu1/fault.xem4hj?hj"?hjh}r'C(hhh]h]h]h]h]uhMnhhh]r(ChXB./packages/ti/ipc/tests/bin/ti_platforms_evmDRA7XX_ipu1/fault.xem4r)Cr*C}r+C(hUhj%Cubaubh)r,C}r-C(hXbWith all the slave cores loaded and running. Use the following command to run the Qnx application.r.Chj?hj"?hhh}r/C(h]h]h]h]h]uhMhhh]r0ChXbWith all the slave cores loaded and running. Use the following command to run the Qnx application.r1Cr2C}r3C(hj.Chj,Cubaubh)r4C}r5C(hXSyntax:r6Chj?hj"?hhh}r7C(h]h]h]h]h]uhMhhh]r8ChXSyntax:r9Cr:C}r;C(hj6Chj4Cubaubj)r> Where is: 0: No fault 1: MMU read fault 2: MMU write fault 3: MMU program fault 4: Exception 5: Watchdoghj?hj"?hjh}r>C(hhh]h]h]h]h]uhMzhhh]r?ChXFault <-f > Where is: 0: No fault 1: MMU read fault 2: MMU write fault 3: MMU program fault 4: Exception 5: Watchdogr@CrAC}rBC(hUhj_vayu.\* images loaded on the slave cores.rChj?hj"?hhh}rC(h]h]h]h]h]uhMhhh]rChXFThis uses the test_omx__vayu.* images loaded on the slave cores.rCrC}rC(hXGThis uses the test_omx__vayu.\* images loaded on the slave cores.hjCubaubh)rC}rC(hX,For example for the dsp1 core on DRA7xx use:rChj?hj"?hhh}rC(h]h]h]h]h]uhMhhh]rChX,For example for the dsp1 core on DRA7xx use:rCrC}rC(hjChjCubaubj)rC}rC(hXO./packages/ti/ipc/tests/bin/ti_platforms_evmDRA7XX_dsp1/test_omx_ipu1_vayu.xem4hj?hj"?hjh}rC(hhh]h]h]h]h]uhMhhh]rChXO./packages/ti/ipc/tests/bin/ti_platforms_evmDRA7XX_dsp1/test_omx_ipu1_vayu.xem4rCrC}rC(hUhjCubaubh)rC}rC(hX^With the slave cores loaded and running. Use the following command to run the Qnx application.rChj?hj"?hhh}rC(h]h]h]h]h]uhMhhh]rChX^With the slave cores loaded and running. Use the following command to run the Qnx application.rCrC}rC(hjChjCubaubh)rC}rC(hXSyntax:rChj?hj"?hhh}rC(h]h]h]h]h]uhMhhh]rChXSyntax:rCrC}rC(hjChjCubaubj)rC}rC(hXmmrpc_test hj?hj"?hjh}rC(hhh]h]h]h]h]uhMhhh]rChXmmrpc_test rCrC}rC(hUhjCubaubh)rC}rC(hX(e.g.)rChj?hj"?hhh}rC(h]h]h]h]h]uhMhhh]rChX(e.g.)rCrC}rC(hjChjCubaubj)rC}rC(hX mmrpc_test 1hj?hXQinternal padding after source/linux/Foundational_Components/IPC/IPC_Tests.rst.incrChjh}rC(hhh]h]h]h]h]uhMhhh]rChX mmrpc_test 1rCrC}rC(hUhjCubaubeubh)rC}rC(hUhhhhhhh}rC(h]h]h]h]rCU ipc-daemonrCah]rChxauhK&hhh]rC(h)rC}rC(hX IPC DaemonrChjChhhhh}rC(h]h]h]h]h]uhK&hhh]rChX IPC DaemonrCrC}rC(hjChjCubaubh)rC}rC(hX2http://processors.wiki.ti.com/index.php/IPC_DaemonhjChhX;source/linux/Foundational_Components/IPC/IPC_Daemon.rst.incrCrC}rCbhhh}rC(hhh]h]h]h]h]uhKhhh]rChX2http://processors.wiki.ti.com/index.php/IPC_DaemonrCrC}rC(hUhjCubaubh)rC}rC(hXThis topic is an overview of the daemon used by IPC on Linux. The IPC daemon maintains any processor-wide state that's not specific to any process or thread on the HLOS. For example, it contains the `MultiProc `__ configuration (small database of what cores are in the system and their unique IDs), the HLOS's `NameServer `__ database, among other misc.hjChjChhh}rC(h]h]h]h]h]uhKhhh]rC(hXThis topic is an overview of the daemon used by IPC on Linux. The IPC daemon maintains any processor-wide state that's not specific to any process or thread on the HLOS. For example, it contains the rCrC}rC(hXThis topic is an overview of the daemon used by IPC on Linux. The IPC daemon maintains any processor-wide state that's not specific to any process or thread on the HLOS. For example, it contains the hjCubj))rC}rC(hXC`MultiProc `__h}rC(UnameX MultiProcj-X3index_Foundational_Components.html#multiproc-moduleh]h]h]h]h]uhjCh]rChX MultiProcrCrC}rC(hUhjCubahj2ubhXa configuration (small database of what cores are in the system and their unique IDs), the HLOS's rCrC}rC(hXa configuration (small database of what cores are in the system and their unique IDs), the HLOS's hjCubj))rC}rC(hXE`NameServer `__h}rC(UnameX NameServerj-X4index_Foundational_Components.html#nameserver-moduleh]h]h]h]h]uhjCh]rChX NameServerrCrC}rC(hUhjCubahj2ubhX database, among other misc.rCrD}rD(hX database, among other misc.hjCubeubh)rD}rD(hX)The IPC daemon was forked from the `Link Arbiter Daemon `__, used in DSP Link systems - and while the daemon still contains 'lad' in it's name, LAD isn't really an applicable acronym for anything. (But creative suggestions are welcome!)hjChjChhh}rD(h]h]h]h]h]uhKhhh]rD(hX#The IPC daemon was forked from the rDrD}rD(hX#The IPC daemon was forked from the hjDubj))r D}r D(hXU`Link Arbiter Daemon `__h}r D(UnameXLink Arbiter Daemonj-X;http://processors.wiki.ti.com/index.php/Link_Arbiter_Daemonh]h]h]h]h]uhjDh]r DhXLink Arbiter Daemonr DrD}rD(hUhj Dubahj2ubhX, used in DSP Link systems - and while the daemon still contains 'lad' in it's name, LAD isn't really an applicable acronym for anything. (But creative suggestions are welcome!)rDrD}rD(hX, used in DSP Link systems - and while the daemon still contains 'lad' in it's name, LAD isn't really an applicable acronym for anything. (But creative suggestions are welcome!)hjDubeubh)rD}rD(hXGThe IPC Daemon is a separate process from other IPC-using applications.rDhjChjChhh}rD(h]h]h]h]h]uhKhhh]rDhXGThe IPC Daemon is a separate process from other IPC-using applications.rDrD}rD(hjDhjDubaubh)rD}rD(hXThe IPC Daemon must be started **after** the slaves have been loaded, but before any application using IPC is run. Applications connect to the IPC Daemon during the call to Ipc_start() and disconnect during the call to Ipc_stop().hjChjChhh}rD(h]h]h]h]h]uhKhhh]rD(hXThe IPC Daemon must be started rDr D}r!D(hXThe IPC Daemon must be started hjDubj)r"D}r#D(hX **after**h}r$D(h]h]h]h]h]uhjDh]r%DhXafterr&Dr'D}r(D(hUhj"DubahjubhX the slaves have been loaded, but before any application using IPC is run. Applications connect to the IPC Daemon during the call to Ipc_start() and disconnect during the call to Ipc_stop().r)Dr*D}r+D(hX the slaves have been loaded, but before any application using IPC is run. Applications connect to the IPC Daemon during the call to Ipc_start() and disconnect during the call to Ipc_stop().hjDubeubh)r,D}r-D(hXAt startup, the daemon creates a FIFO (named pipe) for listening for connection requests from other user-mode clients. When a connection request comes in, the daemon opens a dedicated FIFO for sending responses to the client.r.DhjChjChhh}r/D(h]h]h]h]h]uhKhhh]r0DhXAt startup, the daemon creates a FIFO (named pipe) for listening for connection requests from other user-mode clients. When a connection request comes in, the daemon opens a dedicated FIFO for sending responses to the client.r1Dr2D}r3D(hj.Dhj,Dubaubh)r4D}r5D(hX{At run-time, LAD processes command in FIFO order, and these commands run to completion before the next command is accepted.r6DhjChjChhh}r7D(h]h]h]h]h]uhK$hhh]r8DhX{At run-time, LAD processes command in FIFO order, and these commands run to completion before the next command is accepted.r9Dr:D}r;D(hj6Dhj4Dubaubh)rDhjChjChhh}r?D(h]h]h]h]h]uhK-hhh]r@DhX^The IPC daemon needs to be explicitly started before any client applications call Ipc_start().rADrBD}rCD(hj>Dhj`__rDhjDhjeDhhh}rD(h]h]h]h]h]uhKh]rDj))rD}rD(hjDh}rD(UnameX&Multiple Ways of ARM/DSP Communicationj-XGFoundational_Components_IPC.html#multiple-ways-of-arm-dsp-communicationh]h]h]h]h]uhjDh]rDhX&Multiple Ways of ARM/DSP CommunicationrDrD}rD(hUhjDubahj2ubaubahjoubjb)rD}rD(hUh}rD(h]h]h]h]h]uhjDh]rDh)rD}rD(hX8Provides brief overview of each method and pros and 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inconsistent:h}rG(h]h]h]h]h]uhjGh]rGhXTitle level inconsistent:rGrG}rG(hUhjGubahhubj)rG}rG(hXping_rpmsg """""""""""""h}rG(hhh]h]h]h]h]uhjGh]rGhXping_rpmsg """""""""""""rGrG}rG(hUhjGubahjubeubh)rG}rG(hUhj?hj"?hjFh}rG(h]UlevelKh]h]Usourcej"?h]h]UlineKUtypejoGuhKhhh]rG(h)rG}rG(hXTitle level inconsistent:h}rG(h]h]h]h]h]uhjGh]rGhXTitle level inconsistent:rGrG}rG(hUhjGubahhubj)rG}rG(hX!Run ping_rpmsg ''''''''''''''''''h}rG(hhh]h]h]h]h]uhjGh]rGhX!Run ping_rpmsg ''''''''''''''''''rGrG}rG(hUhjGubahjubeubh)rG}rG(hUhj?hj"?hjFh}rG(h]UlevelKh]h]Usourcej"?h]h]UlineKUtypejoGuhKhhh]rG(h)rG}rG(hXTitle level inconsistent:h}rG(h]h]h]h]h]uhjGh]rGhXTitle level inconsistent:rGrG}rG(hUhjGubahhubj)rG}rG(hXNameServerApp """"""""""""""""h}rG(hhh]h]h]h]h]uhjGh]rGhXNameServerApp """"""""""""""""rGrG}rG(hUhjGubahjubeubh)rG}rG(hUhj?hj"?hjFh}rG(h]UlevelKh]h]Usourcej"?h]h]UlineKUtypejoGuhKhhh]rG(h)rG}rG(hXTitle level inconsistent:h}rG(h]h]h]h]h]uhjGh]rGhXTitle level inconsistent:rGrG}rG(hUhjGubahhubj)rG}rG(hX%Run NameServerApp '''''''''''''''''''h}rG(hhh]h]h]h]h]uhjGh]rGhX%Run NameServerApp '''''''''''''''''''rGrG}rG(hUhjGubahjubeubh)rG}rG(hUhj?hj"?hjFh}rG(h]UlevelKh]h]Usourcej"?h]h]UlineKUtypejoGuhKhhh]rH(h)rH}rH(hXTitle level inconsistent:h}rH(h]h]h]h]h]uhjGh]rHhXTitle level inconsistent:rHrH}rH(hUhjHubahhubj)rH}r H(hXMessageQMulti """"""""""""""""h}r H(hhh]h]h]h]h]uhjGh]r HhXMessageQMulti """"""""""""""""r Hr H}rH(hUhjHubahjubeubh)rH}rH(hUhj?hj"?hjFh}rH(h]UlevelKh]h]Usourcej"?h]h]UlineKUtypejoGuhKhhh]rH(h)rH}rH(hXTitle level inconsistent:h}rH(h]h]h]h]h]uhjHh]rHhXTitle level inconsistent:rHrH}rH(hUhjHubahhubj)rH}rH(hX,Running MessageQMulti ''''''''''''''''''''''h}rH(hhh]h]h]h]h]uhjHh]rHhX,Running MessageQMulti ''''''''''''''''''''''rHrH}r H(hUhjHubahjubeubh)r!H}r"H(hUhj?hj"?hjFh}r#H(h]UlevelKh]h]Usourcej"?h]h]UlineKUtypejoGuhKhhh]r$H(h)r%H}r&H(hXTitle level inconsistent:h}r'H(h]h]h]h]h]uhj!Hh]r(HhXTitle level inconsistent:r)Hr*H}r+H(hUhj%Hubahhubj)r,H}r-H(hX&MessageQMultiMulti """""""""""""""""""h}r.H(hhh]h]h]h]h]uhj!Hh]r/HhX&MessageQMultiMulti """""""""""""""""""r0Hr1H}r2H(hUhj,Hubahjubeubh)r3H}r4H(hUhj?hj"?hjFh}r5H(h]UlevelKh]h]Usourcej"?h]h]UlineKUtypejoGuhKhhh]r6H(h)r7H}r8H(hXTitle level inconsistent:h}r9H(h]h]h]h]h]uhj3Hh]r:HhXTitle level inconsistent:r;HrH}r?H(hX7Running MessageQMultiMulti ''''''''''''''''''''''''''''h}r@H(hhh]h]h]h]h]uhj3Hh]rAHhX7Running MessageQMultiMulti ''''''''''''''''''''''''''''rBHrCH}rDH(hUhj>Hubahjubeubh)rEH}rFH(hUhj?hj"?hjFh}rGH(h]UlevelKh]h]Usourcej"?h]h]UlineKUtypejoGuhKhhh]rHH(h)rIH}rJH(hXTitle level inconsistent:h}rKH(h]h]h]h]h]uhjEHh]rLHhXTitle level inconsistent:rMHrNH}rOH(hUhjIHubahhubj)rPH}rQH(hX fault """""""h}rRH(hhh]h]h]h]h]uhjEHh]rSHhX fault """""""rTHrUH}rVH(hUhjPHubahjubeubh)rWH}rXH(hUhj?hj"?hjFh}rYH(h]UlevelKh]h]Usourcej"?h]h]UlineKUtypejoGuhKhhh]rZH(h)r[H}r\H(hXTitle level inconsistent:h}r]H(h]h]h]h]h]uhjWHh]r^HhXTitle level inconsistent:r_Hr`H}raH(hUhj[Hubahhubj)rbH}rcH(hXRunning fault ''''''''''''''h}rdH(hhh]h]h]h]h]uhjWHh]reHhXRunning fault ''''''''''''''rfHrgH}rhH(hUhjbHubahjubeubh)riH}rjH(hUhj?hj"?hjFh}rkH(h]UlevelKh]h]Usourcej"?h]h]UlineM UtypejoGuhM hhh]rlH(h)rmH}rnH(hXTitle level inconsistent:h}roH(h]h]h]h]h]uhjiHh]rpHhXTitle level inconsistent:rqHrrH}rsH(hUhjmHubahhubj)rtH}ruH(hX#Qnx Unit tests ^^^^^^^^^^^^^^^^^^^^h}rvH(hhh]h]h]h]h]uhjiHh]rwHhX#Qnx Unit tests ^^^^^^^^^^^^^^^^^^^^rxHryH}rzH(hUhjtHubahjubeubh)r{H}r|H(hUhj?hj"?hjFh}r}H(h]UlevelKh]h]Usourcej"?h]h]UlineMUtypejoGuhMhhh]r~H(h)rH}rH(hXTitle level inconsistent:h}rH(h]h]h]h]h]uhj{Hh]rHhXTitle level inconsistent:rHrH}rH(hUhjHubahhubj)rH}rH(hX:Single thread MessageQ tests """""""""""""""""""""""""""""h}rH(hhh]h]h]h]h]uhj{Hh]rHhX:Single thread MessageQ tests """""""""""""""""""""""""""""rHrH}rH(hUhjHubahjubeubh)rH}rH(hUhj?hj"?hjFh}rH(h]UlevelKh]h]Usourcej"?h]h]UlineM7UtypejoGuhM8hhh]rH(h)rH}rH(hXTitle level inconsistent:h}rH(h]h]h]h]h]uhjHh]rHhXTitle level inconsistent:rHrH}rH(hUhjHubahhubj)rH}rH(hX:Running single Message tests '''''''''''''''''''''''''''''h}rH(hhh]h]h]h]h]uhjHh]rHhX:Running single Message tests '''''''''''''''''''''''''''''rHrH}rH(hUhjHubahjubeubh)rH}rH(hUhj?hj"?hjFh}rH(h]UlevelKh]h]Usourcej"?h]h]UlineMYUtypejoGuhMZhhh]rH(h)rH}rH(hXTitle level inconsistent:h}rH(h]h]h]h]h]uhjHh]rHhXTitle level inconsistent:rHrH}rH(hUhjHubahhubj)rH}rH(hXNameServerApp """"""""""""""""h}rH(hhh]h]h]h]h]uhjHh]rHhXNameServerApp """"""""""""""""rHrH}rH(hUhjHubahjubeubh)rH}rH(hUhj?hj"?hjFh}rH(h]UlevelKh]h]Usourcej"?h]h]UlineMfUtypejoGuhMghhh]rH(h)rH}rH(hXTitle level inconsistent:h}rH(h]h]h]h]h]uhjHh]rHhXTitle level inconsistent:rHrH}rH(hUhjHubahhubj)rH}rH(hX$Run NameServerApp ''''''''''''''''''h}rH(hhh]h]h]h]h]uhjHh]rHhX$Run NameServerApp ''''''''''''''''''rHrH}rH(hUhjHubahjubeubh)rH}rH(hUhj?hj"?hjFh}rH(h]UlevelKh]h]Usourcej"?h]h]UlineMqUtypejoGuhMrhhh]rH(h)rH}rH(hXTitle level inconsistent:h}rH(h]h]h]h]h]uhjHh]rHhXTitle level inconsistent:rHrH}rH(hUhjHubahhubj)rH}rH(hXMessageQMulti """"""""""""""""h}rH(hhh]h]h]h]h]uhjHh]rHhXMessageQMulti """"""""""""""""rHrH}rH(hUhjHubahjubeubh)rH}rH(hUhj?hj"?hjFh}rH(h]UlevelKh]h]Usourcej"?h]h]UlineM~UtypejoGuhMhhh]rH(h)rH}rH(hXTitle level inconsistent:h}rH(h]h]h]h]h]uhjHh]rHhXTitle level inconsistent:rHrH}rH(hUhjHubahhubj)rH}rH(hX.Running MessageQMulti ''''''''''''''''''''''''h}rH(hhh]h]h]h]h]uhjHh]rHhX.Running MessageQMulti ''''''''''''''''''''''''rHrH}rH(hUhjHubahjubeubh)rH}rH(hUhj?hj"?hjFh}rH(h]UlevelKh]h]Usourcej"?h]h]UlineMUtypejoGuhMhhh]rH(h)rH}rH(hXTitle level inconsistent:h}rH(h]h]h]h]h]uhjHh]rHhXTitle level inconsistent:rHrH}rH(hUhjHubahhubj)rH}rH(hX Fault """""""h}rH(hhh]h]h]h]h]uhjHh]rHhX Fault """""""rHrH}rH(hUhjHubahjubeubh)rH}rH(hUhj?hj"?hjFh}rH(h]UlevelKh]h]Usourcej"?h]h]UlineMUtypejoGuhMhhh]rH(h)rH}rH(hXTitle level inconsistent:h}rH(h]h]h]h]h]uhjHh]rIhXTitle level inconsistent:rIrI}rI(hUhjHubahhubj)rI}rI(hXRunning fault ''''''''''''''''h}rI(hhh]h]h]h]h]uhjHh]rIhXRunning fault ''''''''''''''''rIr I}r I(hUhjIubahjubeubh)r I}r I(hUhj?hj"?hjFh}r I(h]UlevelKh]h]Usourcej"?h]h]UlineMUtypejoGuhMhhh]rI(h)rI}rI(hXTitle level inconsistent:h}rI(h]h]h]h]h]uhj Ih]rIhXTitle level inconsistent:rIrI}rI(hUhjIubahhubj)rI}rI(hXGateMPApp """"""""""h}rI(hhh]h]h]h]h]uhj Ih]rIhXGateMPApp """"""""""rIrI}rI(hUhjIubahjubeubh)rI}rI(hUhj?hj"?hjFh}rI(h]UlevelKh]h]Usourcej"?h]h]UlineMUtypejoGuhMhhh]r I(h)r!I}r"I(hXTitle level inconsistent:h}r#I(h]h]h]h]h]uhjIh]r$IhXTitle level inconsistent:r%Ir&I}r'I(hUhj!Iubahhubj)r(I}r)I(hX%Running GateMPApp '''''''''''''''''''h}r*I(hhh]h]h]h]h]uhjIh]r+IhX%Running GateMPApp '''''''''''''''''''r,Ir-I}r.I(hUhj(Iubahjubeubh)r/I}r0I(hUhj?hj"?hjFh}r1I(h]UlevelKh]h]Usourcej"?h]h]UlineMUtypejoGuhMhhh]r2I(h)r3I}r4I(hXTitle level inconsistent:h}r5I(h]h]h]h]h]uhj/Ih]r6IhXTitle level inconsistent:r7Ir8I}r9I(hUhj3Iubahhubj)r:I}r;I(hXmmrpc_test """""""""""h}rIr?I}r@I(hUhj:Iubahjubeubh)rAI}rBI(hUhj?hj"?hjFh}rCI(h]UlevelKh]h]Usourcej"?h]h]UlineMUtypejoGuhMhhh]rDI(h)rEI}rFI(hXTitle level inconsistent:h}rGI(h]h]h]h]h]uhjAIh]rHIhXTitle level inconsistent:rIIrJI}rKI(hUhjEIubahhubj)rLI}rMI(hX'Running mmrpc_test """"""""""""""""""""h}rNI(hhh]h]h]h]h]uhjAIh]rOIhX'Running mmrpc_test """"""""""""""""""""rPIrQI}rRI(hUhjLIubahjubeubh)rSI}rTI(hUhjChjChjFh}rUI(h]UlevelKh]h]UsourcejCh]h]UlineKUtypejoGuhKhhh]rVI(h)rWI}rXI(hXTitle level inconsistent:h}rYI(h]h]h]h]h]uhjSIh]rZIhXTitle level inconsistent:r[Ir\I}r]I(hUhjWIubahhubj)r^I}r_I(hX,IPC Daemon (aka LAD) -----------------------h}r`I(hhh]h]h]h]h]uhjSIh]raIhX,IPC Daemon (aka LAD) -----------------------rbIrcI}rdI(hUhj^Iubahjubeubh)reI}rfI(hUhjChjChjFh}rgI(h]UlevelKh]h]UsourcejCh]h]UlineKUtypejoGuhKhhh]rhI(h)riI}rjI(hXTitle level inconsistent:h}rkI(h]h]h]h]h]uhjeIh]rlIhXTitle level inconsistent:rmIrnI}roI(hUhjiIubahhubj)rpI}rqI(hXApproach ^^^^^^^^^^h}rrI(hhh]h]h]h]h]uhjeIh]rsIhXApproach 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"""""""""""""""""""""""""""""""""""""""""""h}rI(hhh]h]h]h]h]uhjIh]rIhXVMaximum Number of Simultaneous Connections """""""""""""""""""""""""""""""""""""""""""rIrI}rI(hUhjIubahjubeubh)rI}rI(hUhjChjChjFh}rI(h]UlevelKh]h]UsourcejCh]h]UlineK7UtypejoGuhK8hhh]rI(h)rI}rI(hXTitle level inconsistent:h}rI(h]h]h]h]h]uhjIh]rIhXTitle level inconsistent:rIrI}rI(hUhjIubahhubj)rI}rI(hXFHard-coded MultiProc configuration """""""""""""""""""""""""""""""""""h}rI(hhh]h]h]h]h]uhjIh]rIhXFHard-coded MultiProc configuration """""""""""""""""""""""""""""""""""rIrI}rI(hUhjIubahjubeubeUcurrent_sourcerINU decorationrINUautofootnote_startrIKUnameidsrI}rI(hjhjhjh j9h j;h jK<h j=h j3hjhj4hjhj9hj5.hj5hj4hj'hj3hjoEhj/hj.hj %hj<hjhj-%hj-hj8h jDh!jh"jO4h#j"h$j.h%j>h&j<h'j=h(j;h)j(h*j h+j'h,jhh-jh.j`h/j h0jVh1j55h2j9h3j@4h4j+h5j(h6j(h7j9h8jw%h9j%$h:j:h;jh hj#h?j<h@hhAj hBjhCjhDj#hEj[6hFj9hGj#hHjAhIj$hJj#hKjhLj?hMj)hNj3hOj'hPj2hQjhRj%hSji=hTjz:hUj(hVjEhWj'hXhhYj8$hZjh[jh\jh]jh^jCh_jX:h`jhajhbj?hcj.3hdj!6hej8hfhhgj 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