cdocutils.nodes document q)q}q(U nametypesq}q(X gic-interrupt-inputs-reservationqXbuilding-jailhouse-from-sourcesqXgeneral-porting-notesqXkeystone3 jailhouse demoq NXjailhouse-performance-on-am5728q Xbare-metal-inmate-exampleq Xam572x-jailhouse-demoq Xrtos-bios-porting-notesq Xmemory-reservationqXbare-metal-exampleqXrunning-the-demo-on-am572x-evmqXlinux-kernel-modificationsqXhardware-modules-reservationqXkeystone3-jailhouse-demo-step3qXkeystone3-jailhouse-demo-step2qXkeystone3-jailhouse-demo-step1qXkeystone3-jailhouse-demo-step0qXkeystone3-jailhouse-demo-step4qX,building-and-running-the-ethercat-slave-demoqXrunning-bare-metal-ti-app.binqX&migration from jailhouse v0.8 to v0.10qXroot-cell-configurationqXrtos-pdk-inmatesqX running-pdk-led_test.bin-exampleqXrtos-bios-examplesqXjailhouse hypervisorqNXrunning-the-demo-on-am572x-idkq Xpre-built-componentsq!Xoverview-virtualizationq"Xjailhouse-internalsq#uUsubstitution_defsq$}q%(X__SDK_INSTALL_DIR__q&cdocutils.nodes substitution_definition q')q(}q)(U rawsourceq*XV.. |__SDK_INSTALL_DIR__| replace:: ti-processor-sdk-linux-[platformName]-evm-Uparentq+cdocutils.nodes section q,)q-}q.(h*Uh+hUsourceq/Xp/home/gtbldadm/nightlybuilds/processor-sdk-doc/source/linux/Foundational_Components/Virtualization/Jailhouse.rstq0Utagnameq1Usectionq2U attributesq3}q4(Udupnamesq5]Uclassesq6]Ubackrefsq7]Uidsq8]q9Ujailhouse-hypervisorq:aUnamesq;]qhUchildrenq?]q@(cdocutils.nodes title qA)qB}qC(h*XJailhouse HypervisorqDh+h-h/h0h1UtitleqEh3}qF(h5]h6]h7]h8]h;]uh=Kh>hh?]qGcdocutils.nodes Text qHXJailhouse HypervisorqIqJ}qK(h*hDh+hBubaubh')qL}qM(h*X4.. |__WINDOWS_SUPPORTED_LONG__| replace:: 7 (64-bit)h+h-h/cdocutils.nodes reprunicode qNX source/linux/replacevars.rst.incqOqP}qQbh1Usubstitution_definitionqRh3}qS(h5]h6]h7]h8]h;]qTX__WINDOWS_SUPPORTED_LONG__qUauh=Kh>hh?]qVhHX 7 (64-bit)qWqX}qY(h*X 7 (64-bit)h+hLubaubh(h')qZ}q[(h*Xe.. |__SDK_INSTALL_FILE__| replace:: ti-processor-sdk-linux-[platform]--Linux-x86-Install.binh+h-h/hPh1hRh3}q\(h5]h6]h7]h8]h;]q]X__SDK_INSTALL_FILE__q^auh=Kh>hh?]q_hHXAti-processor-sdk-linux-[platform]--Linux-x86-Install.binq`qa}qb(h*XAti-processor-sdk-linux-[platform]--Linux-x86-Install.binh+hZubaubh')qc}qd(h*X:.. |__PART_FAMILY_DEVICE_NAMES__| replace:: Sitara devicesh+h-h/hPh1hRh3}qe(h5]h6]h7]h8]h;]qfX__PART_FAMILY_DEVICE_NAMES__qgauh=Kh>hh?]qhhHXSitara devicesqiqj}qk(h*XSitara devicesh+hcubaubh')ql}qm(h*X3.. |__FEATURINGMATRIX__| replace:: featuring Matrixh+h-h/hPh1hRh3}qn(h5]h6]h7]h8]h;]qoX__FEATURINGMATRIX__qpauh=Kh>hh?]qqhHXfeaturing Matrixqrqs}qt(h*Xfeaturing Matrixh+hlubaubh')qu}qv(h*X+.. |__PRODUCT_LINE_NAME__| replace:: Sitarah+h-h/hPh1hRh3}qw(h5]h6]h7]h8]h;]qxX__PRODUCT_LINE_NAME__qyauh=Kh>hh?]qzhHXSitaraq{q|}q}(h*XSitarah+huubaubh')q~}q(h*X'.. |__SDK_SHORT_NAME__| replace:: PLSDKh+h-h/hPh1hRh3}q(h5]h6]h7]h8]h;]qX__SDK_SHORT_NAME__qauh=Kh>hh?]qhHXPLSDKqq}q(h*XPLSDKh+h~ubaubh')q}q(h*XJ.. |__RTOS_UBUNTU_VERSION_LONG__| replace:: 14.04 (64-bit), 16.04 (64-bit)h+h-h/hPh1hRh3}q(h5]h6]h7]h8]h;]qX__RTOS_UBUNTU_VERSION_LONG__qauh=Kh>hh?]qhHX14.04 (64-bit), 16.04 (64-bit)qq}q(h*X14.04 (64-bit), 16.04 (64-bit)h+hubaubh')q}q(h*X.. |__SDK_DOWNLOAD_URL__| replace:: `AM57xx-Linux-SDK-Download-page `__h+h-h/hPh1hRh3}q(h5]h6]h7]h8]h;]qX__SDK_DOWNLOAD_URL__qauh=K h>hh?]qcdocutils.nodes reference q)q}q(h*Xr`AM57xx-Linux-SDK-Download-page `__h3}q(UnameXAM57xx-Linux-SDK-Download-pageUrefuriqXMhttp://software-dl.ti.com/processor-sdk-linux/esd/AM57X/latest/index_FDS.htmlh8]h7]h5]h6]h;]uh+hh?]qhHXAM57xx-Linux-SDK-Download-pageqq}q(h*Uh+hubah1U referencequbaubh')q}q(h*X*.. |__PART_FAMILY_NAME__| replace:: Sitarah+h-h/hPh1hRh3}q(h5]h6]h7]h8]h;]qX__PART_FAMILY_NAME__qauh=K h>hh?]qhHXSitaraqq}q(h*XSitarah+hubaubh')q}q(h*X4.. |__SDK_FULL_NAME__| replace:: Processor SDK Linuxh+h-h/hPh1hRh3}q(h5]h6]h7]h8]h;]qX__SDK_FULL_NAME__qauh=K h>hh?]qhHXProcessor SDK Linuxqq}q(h*XProcessor SDK Linuxqh+hubaubh')q}q(h*X<.. |__LINUX_UBUNTU_VERSION_SHORT__| replace:: 16.04 or 18.04h+h-h/hPh1hRh3}q(h5]h6]h7]h8]h;]qX__LINUX_UBUNTU_VERSION_SHORT__qauh=K h>hh?]qhHX16.04 or 18.04qq}q(h*X16.04 or 18.04h+hubaubh')q}q(h*XL.. |__LINUX_UBUNTU_VERSION_LONG__| replace:: 16.04 (64-bit), 18.04 (64-bit) h+h-h/hPh1hRh3}q(h5]h6]h7]h8]h;]qX__LINUX_UBUNTU_VERSION_LONG__qauh=K h>hh?]qhHX16.04 (64-bit), 18.04 (64-bit)q…q}q(h*X16.04 (64-bit), 18.04 (64-bit)h+hubaubcdocutils.nodes rubric q)q}q(h*XOverviewqh+h-h/h0h1Urubricqh3}q(h8]qUoverview-virtualizationqah7]h5]h6]h;]qh"auh=Nh>hh?]qhHXOverviewqυq}q(h*hh+hubaubcdocutils.nodes paragraph q)q}q(h*XJailhouse is a static partitioning hypervisor that runs bare metal binaries. It cooperates closely with Linux. Jailhouse doesn't emulate resources that don't exist. It just splits existing hardware resources into isolated compartments called "cells" that are wholly dedicated to guest software programs called "inmates". One of these cells runs the Linux OS and is known as the "root cell". Other cells borrow CPUs and devices from the root cell as they are created.qh+h-h/h0h1U paragraphqh3}q(h5]h6]h7]h8]h;]uh=K h>hh?]qhHXJailhouse is a static partitioning hypervisor that runs bare metal binaries. It cooperates closely with Linux. Jailhouse doesn't emulate resources that don't exist. It just splits existing hardware resources into isolated compartments called "cells" that are wholly dedicated to guest software programs called "inmates". One of these cells runs the Linux OS and is known as the "root cell". Other cells borrow CPUs and devices from the root cell as they are created.qمq}q(h*hh+hubaubcdocutils.nodes image q)q}q(h*X).. Image:: ../../../images/Jailhouse.png h+h-h/h0h1Uimageqh3}q(UuriXJlinux/Foundational_Components/Virtualization/../../../images/Jailhouse.pngqh8]h7]h5]h6]U candidatesq}qU*hsh;]uh=Kh>hh?]ubh)q}q(h*XThe picture above shows the jailhouse on a system a) before the jailhouse is enabled; b) after the jailhouse is enabled; c) after a cell is created.qh+h-h/h0h1hh3}q(h5]h6]h7]h8]h;]uh=Kh>hh?]qhHXThe picture above shows the jailhouse on a system a) before the jailhouse is enabled; b) after the jailhouse is enabled; c) after a cell is created.q酁q}q(h*hh+hubaubh)q}q(h*XJailhouse consists of three parts: kernel module, hypervisor firmware and tools, which a user uses to enable the hypervisor, create a cell, load inmate binary, run and stop it. Jailhouse is an example of Asynchronous Multiprocessing (AMP) architecture. When we boot Linux on devices wih ARM CPU clusters, Linux uses all the cores. After we enable hypervisor it moves Linux to the root-cell. The root cell still uses all the CPU cores. When we create a new cell, hypervisor calls cpu\_down() for some of the CPU cores to offline them. The new cell will use these CPU cores and hardware resources dedicated for this cell in the cell configuration file.h+h-h/h0h1hh3}q(h5]h6]h7]h8]h;]uh=Kh>hh?]qhHXJailhouse consists of three parts: kernel module, hypervisor firmware and tools, which a user uses to enable the hypervisor, create a cell, load inmate binary, run and stop it. Jailhouse is an example of Asynchronous Multiprocessing (AMP) architecture. When we boot Linux on devices wih ARM CPU clusters, Linux uses all the cores. After we enable hypervisor it moves Linux to the root-cell. The root cell still uses all the CPU cores. When we create a new cell, hypervisor calls cpu_down() for some of the CPU cores to offline them. The new cell will use these CPU cores and hardware resources dedicated for this cell in the cell configuration file.qq}q(h*XJailhouse consists of three parts: kernel module, hypervisor firmware and tools, which a user uses to enable the hypervisor, create a cell, load inmate binary, run and stop it. Jailhouse is an example of Asynchronous Multiprocessing (AMP) architecture. When we boot Linux on devices wih ARM CPU clusters, Linux uses all the cores. After we enable hypervisor it moves Linux to the root-cell. The root cell still uses all the CPU cores. When we create a new cell, hypervisor calls cpu\_down() for some of the CPU cores to offline them. The new cell will use these CPU cores and hardware resources dedicated for this cell in the cell configuration file.h+hubaubh)q}q(h*X`Jailhouse is an open source project, which can be found on https://github.com/siemens/jailhouse.h+h-h/h0h1hh3}q(h5]h6]h7]h8]h;]uh=K"h>hh?]q(hHX;Jailhouse is an open source project, which can be found on qq}q(h*X;Jailhouse is an open source project, which can be found on h+hubh)q}q(h*X$https://github.com/siemens/jailhouseqh3}q(Urefurihh8]h7]h5]h6]h;]uh+hh?]qhHX$https://github.com/siemens/jailhouseqr}r(h*Uh+hubah1hubhHX.r}r(h*X.h+hubeubh,)r}r(h*Uh+h-h/h0h1h2h3}r(h5]h6]h7]h8]rUkeystone3-jailhouse-demorah;]r h auh=K&h>hh?]r (hA)r }r (h*XKeystone3 Jailhouse Demor h+jh/h0h1hEh3}r(h5]h6]h7]h8]h;]uh=K&h>hh?]rhHXKeystone3 Jailhouse Demorr}r(h*j h+j ubaubh)r}r(h*XThe goal of this demo is to partition the CPU cores and run a second instance of the Linux kernel with a ramfs root filesystem. The inmate kernel will use the secondary UART to provide a login shell to the user.rh+jh/h0h1hh3}r(h5]h6]h7]h8]h;]uh=K(h>hh?]rhHXThe goal of this demo is to partition the CPU cores and run a second instance of the Linux kernel with a ramfs root filesystem. The inmate kernel will use the secondary UART to provide a login shell to the user.rr}r(h*jh+jubaubcsphinx.ext.ifconfig ifconfig r)r}r(h*Uh+jh/h0h1Uifconfigrh3}r(Uexprr XCONFIG_sdk in ('PLSDK')h8]h7]h5]h6]h;]uh=K,h>hh?]r!(h)r"}r#(h*X*Step 0: Create SD card with default imagesr$h+jh/h0h1hh3}r%(h8]r&Ukeystone3-jailhouse-demo-step0r'ah7]h5]h6]h;]r(hauh=Nh>hh?]r)hHX*Step 0: Create SD card with default imagesr*r+}r,(h*j$h+j"ubaubh)r-}r.(h*XPlease follow the instructions for the `Create SD Card Script <../../Overview/Processor_SDK_Linux_create_SD_card_script.html#sd-card-using-default-images>`__ and when prompted to select the root filesystem image, select the default 'tisdk-rootfs-image' image.h+jh/h0h1hh3}r/(h5]h6]h7]h8]h;]uh=K1h>hh?]r0(hHX'Please follow the instructions for the r1r2}r3(h*X'Please follow the instructions for the h+j-ubh)r4}r5(h*Xv`Create SD Card Script <../../Overview/Processor_SDK_Linux_create_SD_card_script.html#sd-card-using-default-images>`__h3}r6(UnameXCreate SD Card ScripthXZ../../Overview/Processor_SDK_Linux_create_SD_card_script.html#sd-card-using-default-imagesh8]h7]h5]h6]h;]uh+j-h?]r7hHXCreate SD Card Scriptr8r9}r:(h*Uh+j4ubah1hubhHXf and when prompted to select the root filesystem image, select the default 'tisdk-rootfs-image' image.r;r<}r=(h*Xf and when prompted to select the root filesystem image, select the default 'tisdk-rootfs-image' image.h+j-ubeubeubh)r>}r?(h*XStep 1: Host Setupr@h+jh/h0h1hh3}rA(h8]rBUkeystone3-jailhouse-demo-step1rCah7]h5]h6]h;]rDhauh=Nh>hh?]rEhHXStep 1: Host SetuprFrG}rH(h*j@h+j>ubaubh)rI}rJ(h*XAs we will be running two instances of the Linux kernel, two terminals are required. Connect one terminal to the primary UART (e.g. /dev/ttyUSB0) and the other to the secondary UART (e.g. /dev/ttyUSB1).rKh+jh/h0h1hh3}rL(h5]h6]h7]h8]h;]uh=K8h>hh?]rMhHXAs we will be running two instances of the Linux kernel, two terminals are required. Connect one terminal to the primary UART (e.g. /dev/ttyUSB0) and the other to the secondary UART (e.g. /dev/ttyUSB1).rNrO}rP(h*jKh+jIubaubh)rQ}rR(h*XStep 2: Configure U-BootrSh+jh/h0h1hh3}rT(h8]rUUkeystone3-jailhouse-demo-step2rVah7]h5]h6]h;]rWhauh=Nh>hh?]rXhHXStep 2: Configure U-BootrYrZ}r[(h*jSh+jQubaubh)r\}r](h*X The default boot configuration does not reserve any resources for the Jailhouse hypervisor nor the inmates. However, the root filesystem contains a device tree overlay that will carve out these requirements. U-Boot must be configured to apply this device tree overlay.r^h+jh/h0h1hh3}r_(h5]h6]h7]h8]h;]uh=K?h>hh?]r`hHX The default boot configuration does not reserve any resources for the Jailhouse hypervisor nor the inmates. However, the root filesystem contains a device tree overlay that will carve out these requirements. U-Boot must be configured to apply this device tree overlay.rarb}rc(h*j^h+j\ubaubh)rd}re(h*XKFor this step, we will be using the terminal connected to the primary UART.rfh+jh/h0h1hh3}rg(h5]h6]h7]h8]h;]uh=KDh>hh?]rhhHXKFor this step, we will be using the terminal connected to the primary UART.rirj}rk(h*jfh+jdubaubj)rl}rm(h*Uh+jh/h0h1jh3}rn(j XCONFIG_sdk in ('PLSDK')h8]h7]h5]h6]h;]uh=KFh>hh?]ro(h)rp}rq(h*X;Power up the board and stop the boot process within U-Boot.rrh+jlh/h0h1hh3}rs(h5]h6]h7]h8]h;]uh=KHh>hh?]rthHX;Power up the board and stop the boot process within U-Boot.rurv}rw(h*jrh+jpubaubh)rx}ry(h*XWe will need to add the jailhouse device tree overlay to the list of overlays to apply. By default, U-Boot uses the "name_overlays" environment variable to provide the list of overlays. However, this variable is automatically set by U-Boot based on the board, and as such, anything saved to this variable will be overwritten upon the next boot. Therefore we will define a new variable "extra_overlays" and modify the "findfdt" function for it to take effect.rzh+jlh/h0h1hh3}r{(h5]h6]h7]h8]h;]uh=KJh>hh?]r|hHXWe will need to add the jailhouse device tree overlay to the list of overlays to apply. By default, U-Boot uses the "name_overlays" environment variable to provide the list of overlays. However, this variable is automatically set by U-Boot based on the board, and as such, anything saved to this variable will be overwritten upon the next boot. Therefore we will define a new variable "extra_overlays" and modify the "findfdt" function for it to take effect.r}r~}r(h*jzh+jxubaubh)r}r(h*XAIn U-Boot, type the following to enable use of this new variable.rh+jlh/h0h1hh3}r(h5]h6]h7]h8]h;]uh=KQh>hh?]rhHXAIn U-Boot, type the following to enable use of this new variable.rr}r(h*jh+jubaubcdocutils.nodes literal_block r)r}r(h*X=> printenv findfdt setenv name_fdt k3-am654-base-board.dtb;setenv fdtfile ${name_fdt};setenv overlay_files ${name_overlays} => setenv findfdt 'setenv name_fdt k3-am654-base-board.dtb;setenv fdtfile ${name_fdt};setenv overlay_files ${name_overlays} ${extra_overlays}' =>h+jlh/h0h1U literal_blockrh3}r(U xml:spacerUpreserverh8]h7]h5]h6]h;]uh=Kdh>hh?]rhHX=> printenv findfdt setenv name_fdt k3-am654-base-board.dtb;setenv fdtfile ${name_fdt};setenv overlay_files ${name_overlays} => setenv findfdt 'setenv name_fdt k3-am654-base-board.dtb;setenv fdtfile ${name_fdt};setenv overlay_files ${name_overlays} ${extra_overlays}' =>rr}r(h*Uh+jubaubh)r}r(h*XdNow add the jailhouse device tree overlay to the "extra_overlays" variable and save the environment.rh+jlh/h0h1hh3}r(h5]h6]h7]h8]h;]uh=K]h>hh?]rhHXdNow add the jailhouse device tree overlay to the "extra_overlays" variable and save the environment.rr}r(h*jh+jubaubj)r}r(h*XK=> setenv extra_overlays k3-am654-base-board-jailhouse.dtbo => saveenv =>h+jlh/h0h1jh3}r(jjh8]h7]h5]h6]h;]uh=Kqh>hh?]rhHXK=> setenv extra_overlays k3-am654-base-board-jailhouse.dtbo => saveenv =>rr}r(h*Uh+jubaubeubj)r}r(h*Uh+jh/h0h1jh3}r(j XCONFIG_sdk in ('PSDKLA')h8]h7]h5]h6]h;]uh=Kih>hh?]rh)r}r(h*XWe will need to add the jailhouse device tree overlay to the list of overlays to apply in u-boot.This is controlled by the environment variable "overlay_files". |__SDK_FULL_NAME__| comes with readymade uenv.txt where this variable is set to define the list of DTBO files for running the jailhouse demo. Refer to the section `How to Change dtb File `__ for more details on this.h+jh/h0h1hh3}r(h5]h6]h7]h8]h;]uh=Kkh>hh?]r(hHXWe will need to add the jailhouse device tree overlay to the list of overlays to apply in u-boot.This is controlled by the environment variable "overlay_files". rr}r(h*XWe will need to add the jailhouse device tree overlay to the list of overlays to apply in u-boot.This is controlled by the environment variable "overlay_files". h+jubhHXProcessor SDK Linuxrr}r(h*hh/Nh=Nh>hh+jubhHX comes with readymade uenv.txt where this variable is set to define the list of DTBO files for running the jailhouse demo. Refer to the section rr}r(h*X comes with readymade uenv.txt where this variable is set to define the list of DTBO files for running the jailhouse demo. Refer to the section h+jubh)r}r(h*XM`How to Change dtb File `__h3}r(UnameXHow to Change dtb FilehX0How_to_Guides/Target/How_to_Change_dtb_File.htmlh8]h7]h5]h6]h;]uh+jh?]rhHXHow to Change dtb Filerr}r(h*Uh+jubah1hubhHX for more details on this.rr}r(h*X for more details on this.h+jubeubaubh)r}r(h*XStep 3: Boot Linux and loginrh+jh/h0h1hh3}r(h8]rUkeystone3-jailhouse-demo-step3rah7]h5]h6]h;]rhauh=Nh>hh?]rhHXStep 3: Boot Linux and loginrr}r(h*jh+jubaubh)r}r(h*X,Now boot the kernel and log in to the shell:rh+jh/h0h1hh3}r(h5]h6]h7]h8]h;]uh=Kuh>hh?]rhHX,Now boot the kernel and log in to the shell:rr}r(h*jh+jubaubj)r}r(h*X=> boot ... _____ _____ _ _ | _ |___ ___ ___ ___ | _ |___ ___ |_|___ ___| |_ | | _| .'| . | . | | __| _| . | | | -_| _| _| |__|__|_| |__,|_ |___| |__| |_| |___|_| |___|___|_| |___| |___| Arago Project http://arago-project.org am65xx-evm ttyS2 Arago 2019.07 am65xx-evm ttyS2 am65xx-evm login: root root@am65xx-evm:~#h+jh/h0h1jh3}r(jjh8]h7]h5]h6]h;]uh=Kh>hh?]rhHX=> boot ... _____ _____ _ _ | _ |___ ___ ___ ___ | _ |___ ___ |_|___ ___| |_ | | _| .'| . | . | | __| _| . | | | -_| _| _| |__|__|_| |__,|_ |___| |__| |_| |___|_| |___|___|_| |___| |___| Arago Project http://arago-project.org am65xx-evm ttyS2 Arago 2019.07 am65xx-evm ttyS2 am65xx-evm login: root root@am65xx-evm:~#rr}r(h*Uh+jubaubh)r}r(h*X$Step 4: Run the Jailhouse linux-demorh+jh/h0h1hh3}r(h8]rUkeystone3-jailhouse-demo-step4rah7]h5]h6]h;]rhauh=Nh>hh?]rhHX$Step 4: Run the Jailhouse linux-demorr}r(h*jh+jubaubh)r}r(h*XThe jailhouse package contains a single script to run the Linux inmate demo. This script combines the typical jailhouse commands to simplify running the demo for the first time. This script performs the following steps.rh+jh/h0h1hh3}r(h5]h6]h7]h8]h;]uh=Kh>hh?]rhHXThe jailhouse package contains a single script to run the Linux inmate demo. This script combines the typical jailhouse commands to simplify running the demo for the first time. This script performs the following steps.rr}r(h*jh+jubaubcdocutils.nodes enumerated_list r)r}r(h*Uh+jh/h0h1Uenumerated_listrh3}r(UsuffixrU.h8]h7]h5]UprefixrUh6]h;]UenumtyperUarabicruh=Kh>hh?]r(cdocutils.nodes list_item r)r}r(h*X_Enables jailhouse by loading and running the hypervisor firmware and configuring the root cell.h+jh/h0h1U list_itemrh3}r(h5]h6]h7]h8]h;]uh=Nh>hh?]rh)r}r(h*X_Enables jailhouse by loading and running the hypervisor firmware and configuring the root cell.rh+jh/h0h1hh3}r(h5]h6]h7]h8]h;]uh=Kh?]rhHX_Enables jailhouse by loading and running the hypervisor firmware and configuring the root cell.rr}r(h*jh+jubaubaubj)r}r(h*X9Creates the inmate cell, providing it with its resources.rh+jh/h0h1jh3}r(h5]h6]h7]h8]h;]uh=Nh>hh?]rh)r}r(h*jh+jh/h0h1hh3}r (h5]h6]h7]h8]h;]uh=Kh?]r hHX9Creates the inmate cell, providing it with its resources.r r }r (h*jh+jubaubaubj)r}r(h*XLoads the inmate into memory.rh+jh/h0h1jh3}r(h5]h6]h7]h8]h;]uh=Nh>hh?]rh)r}r(h*jh+jh/h0h1hh3}r(h5]h6]h7]h8]h;]uh=Kh?]rhHXLoads the inmate into memory.rr}r(h*jh+jubaubaubj)r}r(h*XStarts the inmate. h+jh/h0h1jh3}r(h5]h6]h7]h8]h;]uh=Nh>hh?]rh)r}r(h*XStarts the inmate.r h+jh/h0h1hh3}r!(h5]h6]h7]h8]h;]uh=Kh?]r"hHXStarts the inmate.r#r$}r%(h*j h+jubaubaubeubh)r&}r'(h*X.To run the demo, run the linux-demo.sh script.r(h+jh/h0h1hh3}r)(h5]h6]h7]h8]h;]uh=Kh>hh?]r*hHX.To run the demo, run the linux-demo.sh script.r+r,}r-(h*j(h+j&ubaubj)r.}r/(h*Xroot@am65xx-evm:~# /usr/share/jailhouse/linux-demo.sh Initializing Jailhouse hypervisor v0.10 (152-g6dce20f) on CPU 2 Code location: 0x0000ffffc0200800 Page pool usage after early setup: mem 39/991, remap 0/131072 Initializing processors: CPU 2... OK CPU 3... OK CPU 1... OK CPU 0... OK Initializing unit: irqchip Initializing unit: PVU IOMMU Initializing unit: ARM SMMU v3 Initializing unit: PCI Adding virtual PCI device 00:00.0 to cell "k3-am654-idk" Initializing unit: regmap Page pool usage after late setup: mem 71/991, remap 144/131072 Activating hypervisor [ 63.162406] jailhouse: CONFIG_OF_OVERLAY disabled [ 63.167261] jailhouse: failed to add virtual host controller [ 63.172978] The Jailhouse is opening. [ 63.251354] CPU2: shutdown [ 63.254071] psci: CPU2 killed. [ 63.303312] CPU3: shutdown [ 63.306033] psci: CPU3 killed. Adding virtual PCI device 00:00.0 to cell "k3-am654-idk-linux-demo" Shared memory connection established: "k3-am654-idk-linux-demo" <--> "k3-am654-idk" Created cell "k3-am654-idk-linux-demo" Page pool usage after cell creation: mem 93/991, remap 144/131072 [ 63.355266] Created Jailhouse cell "k3-am654-idk-linux-demo" Cell "k3-am654-idk-linux-demo" can be loaded Started cell "k3-am654-idk-linux-demo" root@am65xx-evm:~#h+jh/h0h1jh3}r0(jjh8]h7]h5]h6]h;]uh=Kh>hh?]r1hHXroot@am65xx-evm:~# /usr/share/jailhouse/linux-demo.sh Initializing Jailhouse hypervisor v0.10 (152-g6dce20f) on CPU 2 Code location: 0x0000ffffc0200800 Page pool usage after early setup: mem 39/991, remap 0/131072 Initializing processors: CPU 2... OK CPU 3... OK CPU 1... OK CPU 0... OK Initializing unit: irqchip Initializing unit: PVU IOMMU Initializing unit: ARM SMMU v3 Initializing unit: PCI Adding virtual PCI device 00:00.0 to cell "k3-am654-idk" Initializing unit: regmap Page pool usage after late setup: mem 71/991, remap 144/131072 Activating hypervisor [ 63.162406] jailhouse: CONFIG_OF_OVERLAY disabled [ 63.167261] jailhouse: failed to add virtual host controller [ 63.172978] The Jailhouse is opening. [ 63.251354] CPU2: shutdown [ 63.254071] psci: CPU2 killed. [ 63.303312] CPU3: shutdown [ 63.306033] psci: CPU3 killed. Adding virtual PCI device 00:00.0 to cell "k3-am654-idk-linux-demo" Shared memory connection established: "k3-am654-idk-linux-demo" <--> "k3-am654-idk" Created cell "k3-am654-idk-linux-demo" Page pool usage after cell creation: mem 93/991, remap 144/131072 [ 63.355266] Created Jailhouse cell "k3-am654-idk-linux-demo" Cell "k3-am654-idk-linux-demo" can be loaded Started cell "k3-am654-idk-linux-demo" root@am65xx-evm:~#r2r3}r4(h*Uh+j.ubaubh)r5}r6(h*XNow, on the secondary terminal, verify that the inmate kernel has booted with ramfs. Also note that the /dev/ttySX number used for root cell and inmate may or may not match.r7h+jh/h0h1hh3}r8(h5]h6]h7]h8]h;]uh=Kh>hh?]r9hHXNow, on the secondary terminal, verify that the inmate kernel has booted with ramfs. Also note that the /dev/ttySX number used for root cell and inmate may or may not match.r:r;}r<(h*j7h+j5ubaubj)r=}r>(h*X _____ _____ _ _ | _ |___ ___ ___ ___ | _ |___ ___ |_|___ ___| |_ | | _| .'| . | . | | __| _| . | | | -_| _| _| |__|__|_| |__,|_ |___| |__| |_| |___|_| |___|___|_| |___| |___| Arago Project http://arago-project.org am65xx-evm /dev/ttyS1 Arago 2019.07 am65xx-evm /dev/ttyS1 am65xx-evm login: root root@am65xx-evm:~# mount rootfs on / type rootfs (rw,size=230400k,nr_inodes=3600) proc on /proc type proc (rw,relatime) sysfs on /sys type sysfs (rw,relatime) debugfs on /sys/kernel/debug type debugfs (rw,relatime) configfs on /sys/kernel/config type configfs (rw,relatime) devtmpfs on /dev type devtmpfs (rw,relatime,size=230400k,nr_inodes=3600,mode=755 ) tmpfs on /run type tmpfs (rw,nosuid,nodev,mode=755) tmpfs on /var/volatile type tmpfs (rw,relatime,size=51200k) devpts on /dev/pts type devpts (rw,relatime,gid=5,mode=620,ptmxmode=000)h+jh/h0h1jh3}r?(jjh8]h7]h5]h6]h;]uh=Kh>hh?]r@hHX _____ _____ _ _ | _ |___ ___ ___ ___ | _ |___ ___ |_|___ ___| |_ | | _| .'| . | . | | __| _| . | | | -_| _| _| |__|__|_| |__,|_ |___| |__| |_| |___|_| |___|___|_| |___| |___| Arago Project http://arago-project.org am65xx-evm /dev/ttyS1 Arago 2019.07 am65xx-evm /dev/ttyS1 am65xx-evm login: root root@am65xx-evm:~# mount rootfs on / type rootfs (rw,size=230400k,nr_inodes=3600) proc on /proc type proc (rw,relatime) sysfs on /sys type sysfs (rw,relatime) debugfs on /sys/kernel/debug type debugfs (rw,relatime) configfs on /sys/kernel/config type configfs (rw,relatime) devtmpfs on /dev type devtmpfs (rw,relatime,size=230400k,nr_inodes=3600,mode=755 ) tmpfs on /run type tmpfs (rw,nosuid,nodev,mode=755) tmpfs on /var/volatile type tmpfs (rw,relatime,size=51200k) devpts on /dev/pts type devpts (rw,relatime,gid=5,mode=620,ptmxmode=000)rArB}rC(h*Uh+j=ubaubj)rD}rE(h*Uh+jh/h0h1jh3}rF(j XCONFIG_sdk in ('PLSDK')h8]h7]h5]h6]h;]uh=Kh>hh?]rG(h)rH}rI(h*XAM572x Jailhouse DemorJh+jDh/h0h1hh3}rK(h8]rLUam572x-jailhouse-demorMah7]h5]h6]h;]rNh auh=Nh>hh?]rOhHXAM572x Jailhouse DemorPrQ}rR(h*jJh+jHubaubh)rS}rT(h*XProcessor Linux SDK delivers Jailhouse’s prebuilt binaries. You may try it immediately after installation. This section assumes that you have already installed PLSDK, and have Linux booted on the AM572X-EVM or AM572x-IDK.rUh+jDh/h0h1hh3}rV(h5]h6]h7]h8]h;]uh=Kh>hh?]rWhHXProcessor Linux SDK delivers Jailhouse’s prebuilt binaries. You may try it immediately after installation. This section assumes that you have already installed PLSDK, and have Linux booted on the AM572X-EVM or AM572x-IDK.rXrY}rZ(h*jUh+jSubaubh)r[}r\(h*X'**NOTE:** *to use Jailhouse hypervisor*h+jDh/h0h1hh3}r](h5]h6]h7]h8]h;]uh=Kh>hh?]r^(cdocutils.nodes strong r_)r`}ra(h*X **NOTE:**h3}rb(h5]h6]h7]h8]h;]uh+j[h?]rchHXNOTE:rdre}rf(h*Uh+j`ubah1UstrongrgubhHX rh}ri(h*X h+j[ubcdocutils.nodes emphasis rj)rk}rl(h*X*to use Jailhouse hypervisor*h3}rm(h5]h6]h7]h8]h;]uh+j[h?]rnhHXto use Jailhouse hypervisorrorp}rq(h*Uh+jkubah1Uemphasisrrubeubj)rs}rt(h*Uh+jDh/h0h1jh3}ru(jU)h8]h7]h5]jUh6]h;]jjuh=Kh>hh?]rvj)rw}rx(h*XFset u-boot environment variable optargs*: setenv optargs vmalloc=512M h+jsh/h0h1jh3}ry(h5]h6]h7]h8]h;]uh=Nh>hh?]rzh)r{}r|(h*XEset u-boot environment variable optargs*: setenv optargs vmalloc=512Mr}h+jwh/h0h1hh3}r~(h5]h6]h7]h8]h;]uh=Kh?]rhHXEset u-boot environment variable optargs*: setenv optargs vmalloc=512Mrr}r(h*j}h+j{ubaubaubaubh)r}r(h*Xg2) use \ **am572x-evm-jailhouse.dtb** for AM572x-EVM or \ **am572x-idk-jailhouse.dtb** for AM572x-IDKh+jDh/h0h1hh3}r(h5]h6]h7]h8]h;]uh=Kh>hh?]r(hHX2) use rr}r(h*X 2) use \ h+jubj_)r}r(h*X**am572x-evm-jailhouse.dtb**h3}r(h5]h6]h7]h8]h;]uh+jh?]rhHXam572x-evm-jailhouse.dtbrr}r(h*Uh+jubah1jgubhHX for AM572x-EVM or rr}r(h*X for AM572x-EVM or \ h+jubj_)r}r(h*X**am572x-idk-jailhouse.dtb**h3}r(h5]h6]h7]h8]h;]uh+jh?]rhHXam572x-idk-jailhouse.dtbrr}r(h*Uh+jubah1jgubhHX for AM572x-IDKrr}r(h*X for AM572x-IDKh+jubeubh)r}r(h*XPre-built componentsrh+jDh/h0h1hh3}r(h8]rUpre-built-componentsrah7]h5]h6]h;]rh!auh=Nh>hh?]rhHXPre-built componentsrr}r(h*jh+jubaubh)r}r(h*XAs it was mentioned in the previous section, Jailhouse consists of following components, which are prebuilt and copied to the target filesystem:rh+jDh/h0h1hh3}r(h5]h6]h7]h8]h;]uh=Kh>hh?]rhHXAs it was mentioned in the previous section, Jailhouse consists of following components, which are prebuilt and copied to the target filesystem:rr}r(h*jh+jubaubj)r}r(h*Uh+jDh/h0h1jh3}r(jU.h8]h7]h5]jUh6]h;]jjuh=Kh>hh?]r(j)r}r(h*XZjailhouse.ko kernel module located at /lib/modules/4.19.38-/extra/driver directory;h+jh/h0h1jh3}r(h5]h6]h7]h8]h;]uh=Nh>hh?]rh)r}r(h*XZjailhouse.ko kernel module located at /lib/modules/4.19.38-/extra/driver directory;rh+jh/h0h1hh3}r(h5]h6]h7]h8]h;]uh=Kh?]rhHXZjailhouse.ko kernel module located at /lib/modules/4.19.38-/extra/driver directory;rr}r(h*jh+jubaubaubj)r}r(h*XEjailhouse.bin - hypervisor itself located at /lib/firmware directory;rh+jh/h0h1jh3}r(h5]h6]h7]h8]h;]uh=Nh>hh?]rh)r}r(h*jh+jh/h0h1hh3}r(h5]h6]h7]h8]h;]uh=Kh?]rhHXEjailhouse.bin - hypervisor itself located at /lib/firmware directory;rr}r(h*jh+jubaubaubj)r}r(h*XbJailhouse management tools are located at /usr/local/libexec/jailhouse and /usr/sbin directories; h+jh/h0h1jh3}r(h5]h6]h7]h8]h;]uh=Nh>hh?]rh)r}r(h*XaJailhouse management tools are located at /usr/local/libexec/jailhouse and /usr/sbin directories;rh+jh/h0h1hh3}r(h5]h6]h7]h8]h;]uh=Kh?]rhHXaJailhouse management tools are located at /usr/local/libexec/jailhouse and /usr/sbin directories;rr}r(h*jh+jubaubaubeubh)r}r(h*XIn order to create the root-cell and an inmate cell we need to provide cell configuration files. Those configuration files and example binaries are located at /usr/share/jailhouse/examples directory:rh+jDh/h0h1hh3}r(h5]h6]h7]h8]h;]uh=Kh>hh?]rhHXIn order to create the root-cell and an inmate cell we need to provide cell configuration files. Those configuration files and example binaries are located at /usr/share/jailhouse/examples directory:rr}r(h*jh+jubaubj)r}r(h*Xroot@am57xx-evm:/usr/share/jailhouse/examples# ls -1 am572x-rtos-icss.cell am572x-rtos-pruss.cell am57xx-evm-ti-app.cell am57xx-evm.cell am57xx-pdk-leddiag.cell icss_emac.bin led_test.bin linux-loader.bin pruss.bin ti-app.binh+jDh/h0h1jh3}r(jjh8]h7]h5]h6]h;]uh=Mh>hh?]rhHXroot@am57xx-evm:/usr/share/jailhouse/examples# ls -1 am572x-rtos-icss.cell am572x-rtos-pruss.cell am57xx-evm-ti-app.cell am57xx-evm.cell am57xx-pdk-leddiag.cell icss_emac.bin led_test.bin linux-loader.bin pruss.bin ti-app.binrr}r(h*Uh+jubaubh)r}r(h*Xwhererh+jDh/h0h1hh3}r(h5]h6]h7]h8]h;]uh=M h>hh?]rhHXwhererr}r(h*jh+jubaubcdocutils.nodes bullet_list r)r}r(h*Uh+jDh/h0h1U bullet_listrh3}r(UbulletrX-h8]h7]h5]h6]h;]uh=Mh>hh?]r(j)r}r(h*X3**am57xx-evm.cell** - root cell configuration file;rh+jh/h0h1jh3}r(h5]h6]h7]h8]h;]uh=Nh>hh?]rh)r}r(h*jh+jh/h0h1hh3}r(h5]h6]h7]h8]h;]uh=Mh?]r(j_)r}r(h*X**am57xx-evm.cell**h3}r(h5]h6]h7]h8]h;]uh+jh?]rhHXam57xx-evm.cellrr}r(h*Uh+jubah1jgubhHX - root cell configuration file;rr}r (h*X - root cell configuration file;h+jubeubaubj)r }r (h*X]**ti-app.bin** and **am57xx-evm-ti-app.cell** - bare metal inmate and its cell configuration;h+jh/h0h1jh3}r (h5]h6]h7]h8]h;]uh=Nh>hh?]r h)r}r(h*X]**ti-app.bin** and **am57xx-evm-ti-app.cell** - bare metal inmate and its cell configuration;h+j h/h0h1hh3}r(h5]h6]h7]h8]h;]uh=Mh?]r(j_)r}r(h*X**ti-app.bin**h3}r(h5]h6]h7]h8]h;]uh+jh?]rhHX ti-app.binrr}r(h*Uh+jubah1jgubhHX and rr}r(h*X and h+jubj_)r}r(h*X**am57xx-evm-ti-app.cell**h3}r(h5]h6]h7]h8]h;]uh+jh?]rhHXam57xx-evm-ti-app.cellr r!}r"(h*Uh+jubah1jgubhHX0 - bare metal inmate and its cell configuration;r#r$}r%(h*X0 - bare metal inmate and its cell configuration;h+jubeubaubj)r&}r'(h*X**led\_test.bin** and **am57xx-pdk-leddiag.cell** - PDK led\_test inmate example and its cell configuration (led\_test.bin can be run on AM572x-EVM only);h+jh/h0h1jh3}r((h5]h6]h7]h8]h;]uh=Nh>hh?]r)h)r*}r+(h*X**led\_test.bin** and **am57xx-pdk-leddiag.cell** - PDK led\_test inmate example and its cell configuration (led\_test.bin can be run on AM572x-EVM only);h+j&h/h0h1hh3}r,(h5]h6]h7]h8]h;]uh=Mh?]r-(j_)r.}r/(h*X**led\_test.bin**h3}r0(h5]h6]h7]h8]h;]uh+j*h?]r1hHX led_test.binr2r3}r4(h*Uh+j.ubah1jgubhHX and r5r6}r7(h*X and h+j*ubj_)r8}r9(h*X**am57xx-pdk-leddiag.cell**h3}r:(h5]h6]h7]h8]h;]uh+j*h?]r;hHXam57xx-pdk-leddiag.cellr<r=}r>(h*Uh+j8ubah1jgubhHXg - PDK led_test inmate example and its cell configuration (led_test.bin can be run on AM572x-EVM only);r?r@}rA(h*Xi - PDK led\_test inmate example and its cell configuration (led\_test.bin can be run on AM572x-EVM only);h+j*ubeubaubj)rB}rC(h*X**pruss.bin** and **am572x-rtos-pruss.cell** - TI-RTOS PRUSS inmate examples and its cell configuration (pruss.bin can be run on AM572x-IDK only);h+jh/h0h1jh3}rD(h5]h6]h7]h8]h;]uh=Nh>hh?]rEh)rF}rG(h*X**pruss.bin** and **am572x-rtos-pruss.cell** - TI-RTOS PRUSS inmate examples and its cell configuration (pruss.bin can be run on AM572x-IDK only);h+jBh/h0h1hh3}rH(h5]h6]h7]h8]h;]uh=Mh?]rI(j_)rJ}rK(h*X **pruss.bin**h3}rL(h5]h6]h7]h8]h;]uh+jFh?]rMhHX pruss.binrNrO}rP(h*Uh+jJubah1jgubhHX and rQrR}rS(h*X and h+jFubj_)rT}rU(h*X**am572x-rtos-pruss.cell**h3}rV(h5]h6]h7]h8]h;]uh+jFh?]rWhHXam572x-rtos-pruss.cellrXrY}rZ(h*Uh+jTubah1jgubhHXf - TI-RTOS PRUSS inmate examples and its cell configuration (pruss.bin can be run on AM572x-IDK only);r[r\}r](h*Xf - TI-RTOS PRUSS inmate examples and its cell configuration (pruss.bin can be run on AM572x-IDK only);h+jFubeubaubj)r^}r_(h*X**icss\_emac.bin** and **am572x-rtos-icss.cell** - TI-RTOS ICSS-EMAC inmate example and its cell configuration (icss\_emac.bin can be run on AM572x-IDK only);h+jh/h0h1jh3}r`(h5]h6]h7]h8]h;]uh=Nh>hh?]rah)rb}rc(h*X**icss\_emac.bin** and **am572x-rtos-icss.cell** - TI-RTOS ICSS-EMAC inmate example and its cell configuration (icss\_emac.bin can be run on AM572x-IDK only);h+j^h/h0h1hh3}rd(h5]h6]h7]h8]h;]uh=Mh?]re(j_)rf}rg(h*X**icss\_emac.bin**h3}rh(h5]h6]h7]h8]h;]uh+jbh?]rihHX icss_emac.binrjrk}rl(h*Uh+jfubah1jgubhHX and rmrn}ro(h*X and h+jbubj_)rp}rq(h*X**am572x-rtos-icss.cell**h3}rr(h5]h6]h7]h8]h;]uh+jbh?]rshHXam572x-rtos-icss.cellrtru}rv(h*Uh+jpubah1jgubhHXm - TI-RTOS ICSS-EMAC inmate example and its cell configuration (icss_emac.bin can be run on AM572x-IDK only);rwrx}ry(h*Xn - TI-RTOS ICSS-EMAC inmate example and its cell configuration (icss\_emac.bin can be run on AM572x-IDK only);h+jbubeubaubj)rz}r{(h*X**linux-loader.bin** - loader required to run inmates, which start address is not 0x0. Not required at current and above versions of Jailhouse. Cell configuration can define starting address. h+jh/h0h1jh3}r|(h5]h6]h7]h8]h;]uh=Nh>hh?]r}h)r~}r(h*X**linux-loader.bin** - loader required to run inmates, which start address is not 0x0. Not required at current and above versions of Jailhouse. Cell configuration can define starting address.h+jzh/h0h1hh3}r(h5]h6]h7]h8]h;]uh=Mh?]r(j_)r}r(h*X**linux-loader.bin**h3}r(h5]h6]h7]h8]h;]uh+j~h?]rhHXlinux-loader.binrr}r(h*Uh+jubah1jgubhHX - loader required to run inmates, which start address is not 0x0. Not required at current and above versions of Jailhouse. Cell configuration can define starting address.rr}r(h*X - loader required to run inmates, which start address is not 0x0. Not required at current and above versions of Jailhouse. Cell configuration can define starting address.h+j~ubeubaubeubh)r}r(h*XRunning the Demo on AM572x-EVMrh+jDh/h0h1hh3}r(h8]rUrunning-the-demo-on-am572x-evmrah7]h5]h6]h;]rhauh=Nh>hh?]rhHXRunning the Demo on AM572x-EVMrr}r(h*jh+jubaubh)r}r(h*Xk**NOTE** Starting from this version of Jailhouse Inmate library stratup code enables MMU. The library initializes only GIC controller and debug UART memory. Memory for all other regions has to be initialized by inmate itself. At this release the ti-app is not updated. All RTOS examples don't use the inmate library and initilizes their MMU regions by themselves.h+jDh/h0h1hh3}r(h5]h6]h7]h8]h;]uh=M!h>hh?]r(j_)r}r(h*X**NOTE**h3}r(h5]h6]h7]h8]h;]uh+jh?]rhHXNOTErr}r(h*Uh+jubah1jgubhHXc Starting from this version of Jailhouse Inmate library stratup code enables MMU. The library initializes only GIC controller and debug UART memory. Memory for all other regions has to be initialized by inmate itself. At this release the ti-app is not updated. All RTOS examples don't use the inmate library and initilizes their MMU regions by themselves.rr}r(h*Xc Starting from this version of Jailhouse Inmate library stratup code enables MMU. The library initializes only GIC controller and debug UART memory. Memory for all other regions has to be initialized by inmate itself. At this release the ti-app is not updated. All RTOS examples don't use the inmate library and initilizes their MMU regions by themselves.h+jubeubh)r}r(h*XRunning bare-metal ti-app.binrh+jDh/h0h1hh3}r(h8]rUrunning-bare-metal-ti-app-binrah7]h5]h6]h;]rhauh=Nh>hh?]rhHXRunning bare-metal ti-app.binrr}r(h*jh+jubaubh)r}r(h*X#Here are the steps to run the demo:rh+jDh/h0h1hh3}r(h5]h6]h7]h8]h;]uh=M*h>hh?]rhHX#Here are the steps to run the demo:rr}r(h*jh+jubaubj)r}r(h*Uh+jDh/h0h1jh3}r(jX-h8]h7]h5]h6]h;]uh=M,h>hh?]r(j)r}r(h*XBoot the Linuxrh+jh/h0h1jh3}r(h5]h6]h7]h8]h;]uh=Nh>hh?]rh)r}r(h*jh+jh/h0h1hh3}r(h5]h6]h7]h8]h;]uh=M,h?]rhHXBoot the Linuxrr}r(h*jh+jubaubaubj)r}r(h*X"Insert jailhouse.ko kernel module h+jh/h0h1jh3}r(h5]h6]h7]h8]h;]uh=Nh>hh?]rh)r}r(h*X!Insert jailhouse.ko kernel modulerh+jh/h0h1hh3}r(h5]h6]h7]h8]h;]uh=M-h?]rhHX!Insert jailhouse.ko kernel modulerr}r(h*jh+jubaubaubeubj)r}r(h*X%root@am57xx-evm:~# modprobe jailhouseh+jDh/h0h1jh3}r(jjh8]h7]h5]h6]h;]uh=M@h>hh?]rhHX%root@am57xx-evm:~# modprobe jailhouserr}r(h*Uh+jubaubj)r}r(h*Uh+jDh/h0h1jh3}r(jX-h8]h7]h5]h6]h;]uh=M3h>hh?]rj)r}r(h*XIEnable the hypervisor using am57xx-evm.cell root-cell configuration file h+jh/h0h1jh3}r(h5]h6]h7]h8]h;]uh=Nh>hh?]rh)r}r(h*XHEnable the hypervisor using am57xx-evm.cell root-cell configuration filerh+jh/h0h1hh3}r(h5]h6]h7]h8]h;]uh=M3h?]rhHXHEnable the hypervisor using am57xx-evm.cell root-cell configuration filerr}r(h*jh+jubaubaubaubj)r}r(h*Xroot@am57xx-evm:~# jailhouse enable /usr/share/jailhouse/examples/am57xx-evm.cell Initializing Jailhouse hypervisor v0.6 on CPU 1 Code location: 0xf0000030 Page pool usage after early setup: mem 30/4073, remap 32/131072 Initializing processors: CPU 1... OK CPU 0... OK Page pool usage after late setup: mem 39/4073, remap 38/131072 Activating hypervisor [ 4155.880217] The Jailhouse is opening.h+jDh/h0h1jh3}r(jjh8]h7]h5]h6]h;]uh=MGh>hh?]rhHXroot@am57xx-evm:~# jailhouse enable /usr/share/jailhouse/examples/am57xx-evm.cell Initializing Jailhouse hypervisor v0.6 on CPU 1 Code location: 0xf0000030 Page pool usage after early setup: mem 30/4073, remap 32/131072 Initializing processors: CPU 1... OK CPU 0... OK Page pool usage after late setup: mem 39/4073, remap 38/131072 Activating hypervisor [ 4155.880217] The Jailhouse is opening.rr}r(h*Uh+jubaubj)r}r(h*Uh+jDh/h0h1jh3}r(jX-h8]h7]h5]h6]h;]uh=MCh>hh?]rj)r}r(h*XCreate a cell for the inmate h+jh/h0h1jh3}r(h5]h6]h7]h8]h;]uh=Nh>hh?]rh)r}r(h*XCreate a cell for the inmaterh+jh/h0h1hh3}r(h5]h6]h7]h8]h;]uh=MCh?]rhHXCreate a cell for the inmaterr}r(h*jh+jubaubaubaubj)r}r(h*XProot@am57xx-evm:~# jailhouse cell create /usr/share/jailhouse/examples/am57xx-evm-ti-app.cell [ 5270.449687] CPU1: shutdown [ 5270.453221] NOHZ: local_softirq_pending 20 Created cell "AM57XX-EVM-timer8-demo" Page pool usage after cell creation: mem 51/4073, remap 38/131072 [ 5270.487970] Created Jailhouse cell "AM57XX-EVM-timer8-demo"h+jDh/h0h1jh3}r(jjh8]h7]h5]h6]h;]uh=MVh>hh?]rhHXProot@am57xx-evm:~# jailhouse cell create /usr/share/jailhouse/examples/am57xx-evm-ti-app.cell [ 5270.449687] CPU1: shutdown [ 5270.453221] NOHZ: local_softirq_pending 20 Created cell "AM57XX-EVM-timer8-demo" Page pool usage after cell creation: mem 51/4073, remap 38/131072 [ 5270.487970] Created Jailhouse cell "AM57XX-EVM-timer8-demo"rr}r(h*Uh+jubaubj)r }r (h*Uh+jDh/h0h1jh3}r (jX-h8]h7]h5]h6]h;]uh=MNh>hh?]r j)r }r(h*X"Load the ti-app.bin inmate binary h+j h/h0h1jh3}r(h5]h6]h7]h8]h;]uh=Nh>hh?]rh)r}r(h*X!Load the ti-app.bin inmate binaryrh+j h/h0h1hh3}r(h5]h6]h7]h8]h;]uh=MNh?]rhHX!Load the ti-app.bin inmate binaryrr}r(h*jh+jubaubaubaubj)r}r(h*X}root@am57xx-evm:~# jailhouse cell load 1 /usr/share/jailhouse/examples/ti-app.bin Cell "AM57XX-EVM-timer8-demo" can be loadedh+jDh/h0h1jh3}r(jjh8]h7]h5]h6]h;]uh=Mah>hh?]rhHX}root@am57xx-evm:~# jailhouse cell load 1 /usr/share/jailhouse/examples/ti-app.bin Cell "AM57XX-EVM-timer8-demo" can be loadedrr}r(h*Uh+jubaubj)r }r!(h*Uh+jDh/h0h1jh3}r"(jX-h8]h7]h5]h6]h;]uh=MUh>hh?]r#j)r$}r%(h*XStart the binary h+j h/h0h1jh3}r&(h5]h6]h7]h8]h;]uh=Nh>hh?]r'h)r(}r)(h*XStart the binaryr*h+j$h/h0h1hh3}r+(h5]h6]h7]h8]h;]uh=MUh?]r,hHXStart the binaryr-r.}r/(h*j*h+j(ubaubaubaubj)r0}r1(h*Xroot@am57xx-evm:~# jailhouse cell start 1 Hey, I'm working !!!!!!!!!!! timer id 4fff2b01 timer value fffffc17; irq status 00000002; raw 00000002 min 00000017; avr 0000001b; max 000002c1 min 00000017; avr 0000001b; max 000000f3 min 00000017; avr 0000001b; max 000002c8 min 00000017; avr 0000001b; max 00000148 min 00000017; avr 0000001b; max 000002d4 min 00000017; avr 0000001b; max 00000158h+jDh/h0h1jh3}r2(jjh8]h7]h5]h6]h;]uh=Mhh>hh?]r3hHXroot@am57xx-evm:~# jailhouse cell start 1 Hey, I'm working !!!!!!!!!!! timer id 4fff2b01 timer value fffffc17; irq status 00000002; raw 00000002 min 00000017; avr 0000001b; max 000002c1 min 00000017; avr 0000001b; max 000000f3 min 00000017; avr 0000001b; max 000002c8 min 00000017; avr 0000001b; max 00000148 min 00000017; avr 0000001b; max 000002d4 min 00000017; avr 0000001b; max 00000158r4r5}r6(h*Uh+j0ubaubh)r7}r8(h*X**NOTE**: because all of the components: root-cell, hypervisor and demo inmate use the same UART, there is a conflict. Once the inmate started to use the UART, Linux stops getting any input from console. To workaround this and continue to control the hypervisor, you may telnet to the EVM and issue all commands from the telnet shell. Hypervisor still will use Linux console to print it sdebug messagesh+jDh/h0h1hh3}r9(h5]h6]h7]h8]h;]uh=Mdh>hh?]r:(j_)r;}r<(h*X**NOTE**h3}r=(h5]h6]h7]h8]h;]uh+j7h?]r>hHXNOTEr?r@}rA(h*Uh+j;ubah1jgubhHX: because all of the components: root-cell, hypervisor and demo inmate use the same UART, there is a conflict. Once the inmate started to use the UART, Linux stops getting any input from console. To workaround this and continue to control the hypervisor, you may telnet to the EVM and issue all commands from the telnet shell. Hypervisor still will use Linux console to print it sdebug messagesrBrC}rD(h*X: because all of the components: root-cell, hypervisor and demo inmate use the same UART, there is a conflict. Once the inmate started to use the UART, Linux stops getting any input from console. To workaround this and continue to control the hypervisor, you may telnet to the EVM and issue all commands from the telnet shell. Hypervisor still will use Linux console to print it sdebug messagesh+j7ubeubj)rE}rF(h*Uh+jDh/h0h1jh3}rG(jX-h8]h7]h5]h6]h;]uh=Mkh>hh?]rHj)rI}rJ(h*XStop the binary h+jEh/h0h1jh3}rK(h5]h6]h7]h8]h;]uh=Nh>hh?]rLh)rM}rN(h*XStop the binaryrOh+jIh/h0h1hh3}rP(h5]h6]h7]h8]h;]uh=Mkh?]rQhHXStop the binaryrRrS}rT(h*jOh+jMubaubaubaubj)rU}rV(h*X,root@am57xx-evm:~# jailhouse cell shutdown 1h+jDh/h0h1jh3}rW(jjh8]h7]h5]h6]h;]uh=M~h>hh?]rXhHX,root@am57xx-evm:~# jailhouse cell shutdown 1rYrZ}r[(h*Uh+jUubaubh)r\}r](h*Xc**NOTE**: You may restore Linux console by killing the "/bin/login --" process from telnet session.h+jDh/h0h1hh3}r^(h5]h6]h7]h8]h;]uh=Mqh>hh?]r_(j_)r`}ra(h*X**NOTE**h3}rb(h5]h6]h7]h8]h;]uh+j\h?]rchHXNOTErdre}rf(h*Uh+j`ubah1jgubhHX[: You may restore Linux console by killing the "/bin/login --" process from telnet session.rgrh}ri(h*X[: You may restore Linux console by killing the "/bin/login --" process from telnet session.h+j\ubeubj)rj}rk(h*Uh+jDh/h0h1jh3}rl(jX-h8]h7]h5]h6]h;]uh=Mth>hh?]rmj)rn}ro(h*X destroy cell h+jjh/h0h1jh3}rp(h5]h6]h7]h8]h;]uh=Nh>hh?]rqh)rr}rs(h*X destroy cellrth+jnh/h0h1hh3}ru(h5]h6]h7]h8]h;]uh=Mth?]rvhHX destroy cellrwrx}ry(h*jth+jrubaubaubaubj)rz}r{(h*Xroot@am57xx-evm:~# jailhouse cell destroy 1 Closing cell "AM57XX-EVM-timer8-demo" Page pool usage after cell destruction: mem 39/4073, remap 38/131072 [ 6201.111168] Destroyed Jailhouse cell "AM57XX-EVM-timer8-demo"h+jDh/h0h1jh3}r|(jjh8]h7]h5]h6]h;]uh=Mh>hh?]r}hHXroot@am57xx-evm:~# jailhouse cell destroy 1 Closing cell "AM57XX-EVM-timer8-demo" Page pool usage after cell destruction: mem 39/4073, remap 38/131072 [ 6201.111168] Destroyed Jailhouse cell "AM57XX-EVM-timer8-demo"r~r}r(h*Uh+jzubaubj)r}r(h*Uh+jDh/h0h1jh3}r(jX-h8]h7]h5]h6]h;]uh=M}h>hh?]rj)r}r(h*Xdisable hypervisor h+jh/h0h1jh3}r(h5]h6]h7]h8]h;]uh=Nh>hh?]rh)r}r(h*Xdisable hypervisorrh+jh/h0h1hh3}r(h5]h6]h7]h8]h;]uh=M}h?]rhHXdisable hypervisorrr}r(h*jh+jubaubaubaubj)r}r(h*Xroot@am57xx-evm:~# jailhouse disable Shutting down hypervisor Releasing CPU 0 Releasing CPU 1 [ 6248.149728] The Jailhouse was closed.h+jDh/h0h1jh3}r(jjh8]h7]h5]h6]h;]uh=Mh>hh?]rhHXroot@am57xx-evm:~# jailhouse disable Shutting down hypervisor Releasing CPU 0 Releasing CPU 1 [ 6248.149728] The Jailhouse was closed.rr}r(h*Uh+jubaubh)r}r(h*X **NOTES**:h+jDh/h0h1hh3}r(h5]h6]h7]h8]h;]uh=Mh>hh?]r(j_)r}r(h*X **NOTES**h3}r(h5]h6]h7]h8]h;]uh+jh?]rhHXNOTESrr}r(h*Uh+jubah1jgubhHX:r}r(h*X:h+jubeubh)r}r(h*XyYou may shutdown and start the same binary multiple times. Every time you start the binary, it starts from the beginning.rh+jDh/h0h1hh3}r(h5]h6]h7]h8]h;]uh=Mh>hh?]rhHXyYou may shutdown and start the same binary multiple times. Every time you start the binary, it starts from the beginning.rr}r(h*jh+jubaubh)r}r(h*XvIf you have different binaries which use the same cell resources, you may reuse the created cell to run them. You need just shutdown the cell, load another binary and start it. If you need to run different binaries that requires different resources, you need to shutdown the running cell, destroy it, create a new one with required resources, load a new binary and start it.rh+jDh/h0h1hh3}r(h5]h6]h7]h8]h;]uh=Mh>hh?]rhHXvIf you have different binaries which use the same cell resources, you may reuse the created cell to run them. You need just shutdown the cell, load another binary and start it. If you need to run different binaries that requires different resources, you need to shutdown the running cell, destroy it, create a new one with required resources, load a new binary and start it.rr}r(h*jh+jubaubh)r}r(h*X!Running PDK led\_test.bin exampleh+jDh/h0h1hh3}r(h8]rU running-pdk-led-test-bin-examplerah7]h5]h6]h;]rhauh=Nh>hh?]rhHX Running PDK led_test.bin examplerr}r(h*X!Running PDK led\_test.bin exampleh+jubaubh)r}r(h*X.After you enable hyprevisor, create a pdk cellrh+jDh/h0h1hh3}r(h5]h6]h7]h8]h;]uh=Mh>hh?]rhHX.After you enable hyprevisor, create a pdk cellrr}r(h*jh+jubaubj)r}r(h*X.root@am57xx-evm:~# jailhouse cell create /usr/share/jailhouse/examples/am57xx-pdk-leddiag.cell [ 312.419978] CPU1: shutdown Created cell "AM57XX-EVM-PDK-LED" Page pool usage after cell creation: mem 54/4075, remap 38/131072 [ 312.470723] Created Jailhouse cell "AM57XX-EVM-PDK-LED" root@am57xx-evm:~#h+jDh/h0h1jh3}r(jjh8]h7]h5]h6]h;]uh=Mh>hh?]rhHX.root@am57xx-evm:~# jailhouse cell create /usr/share/jailhouse/examples/am57xx-pdk-leddiag.cell [ 312.419978] CPU1: shutdown Created cell "AM57XX-EVM-PDK-LED" Page pool usage after cell creation: mem 54/4075, remap 38/131072 [ 312.470723] Created Jailhouse cell "AM57XX-EVM-PDK-LED" root@am57xx-evm:~#rr}r(h*Uh+jubaubh)r}r(h*Xload the led\_test.bin binaryh+jDh/h0h1hh3}r(h5]h6]h7]h8]h;]uh=Mh>hh?]rhHXload the led_test.bin binaryrr}r(h*Xload the led\_test.bin binaryh+jubaubj)r}r(h*X{root@am57xx-evm:~# jailhouse cell load 1 /usr/share/jailhouse/examples/led_test.bin Cell "AM57XX-EVM-PDK-LED" can be loadedh+jDh/h0h1jh3}r(jjh8]h7]h5]h6]h;]uh=Mh>hh?]rhHX{root@am57xx-evm:~# jailhouse cell load 1 /usr/share/jailhouse/examples/led_test.bin Cell "AM57XX-EVM-PDK-LED" can be loadedrr}r(h*Uh+jubaubh)r}r(h*X and start itrh+jDh/h0h1hh3}r(h5]h6]h7]h8]h;]uh=Mh>hh?]rhHX and start itrr}r(h*jh+jubaubj)r}r(h*Xroot@am57xx-evm:~# jailhouse cell start 1 Started cell "AM57XX-EVM-PDK-LED" root@am57xx-e ********************************************* * LED Test * ********************************************* Testing LED Blinking LEDs... Press 'y' to verify pass, 'r' to blink again, or any other character to indicate failure: r Blinking again Press 'y' to verify pass, 'r' to blink again, or any other character to indicate failure: y Received: y Test PASSED!h+jDh/h0h1jh3}r(jjh8]h7]h5]h6]h;]uh=Mh>hh?]rhHXroot@am57xx-evm:~# jailhouse cell start 1 Started cell "AM57XX-EVM-PDK-LED" root@am57xx-e ********************************************* * LED Test * ********************************************* Testing LED Blinking LEDs... Press 'y' to verify pass, 'r' to blink again, or any other character to indicate failure: r Blinking again Press 'y' to verify pass, 'r' to blink again, or any other character to indicate failure: y Received: y Test PASSED!rr}r(h*Uh+jubaubh)r}r(h*X8You may see blinking leds, press "r" to repeat the test.rh+jDh/h0h1hh3}r(h5]h6]h7]h8]h;]uh=Mh>hh?]rhHX8You may see blinking leds, press "r" to repeat the test.rr}r(h*jh+jubaubh)r}r(h*X**NOTE:** This example just demonstrates hypervisor's ability to run binaries that were built outside of jailhouse source tree. This and other RTOS examples were ported for this purpose. Look to RTOS SDK documentation for description of the examples functionality.h+jDh/h0h1hh3}r(h5]h6]h7]h8]h;]uh=Mh>hh?]r(j_)r}r(h*X **NOTE:**h3}r(h5]h6]h7]h8]h;]uh+jh?]rhHXNOTE:rr}r(h*Uh+jubah1jgubhHX This example just demonstrates hypervisor's ability to run binaries that were built outside of jailhouse source tree. This and other RTOS examples were ported for this purpose. Look to RTOS SDK documentation for description of the examples functionality.rr}r(h*X This example just demonstrates hypervisor's ability to run binaries that were built outside of jailhouse source tree. This and other RTOS examples were ported for this purpose. Look to RTOS SDK documentation for description of the examples functionality.h+jubeubh)r}r(h*XRunning the Demo on AM572x-IDKrh+jDh/h0h1hh3}r(h8]rUrunning-the-demo-on-am572x-idkrah7]h5]h6]h;]rh auh=Nh>hh?]rhHXRunning the Demo on AM572x-IDKr r }r (h*jh+jubaubh)r }r (h*X;Two TI-RTOS example applications were ported for Jailhouse hypervisor: pruss.bin and icss\_emac.bin. In contrast to led\_test.bin, which has its own startup code, linker script and was linked to start from address 0x0, the pruss.bin and icss\_emac.bin used the TI-RTOS building infrastructure as much as possible. **At the previous Processor SDK pruss.bin and icss\_emac.bin were linked to the default 0x80000000 address. Because the new Jailhouse version uses that address for debug URAT communication region, the RTOS application are linked to the 0x90000000 address**.h+jDh/h0h1hh3}r(h5]h6]h7]h8]h;]uh=Mh>hh?]r(hHX7Two TI-RTOS example applications were ported for Jailhouse hypervisor: pruss.bin and icss_emac.bin. In contrast to led_test.bin, which has its own startup code, linker script and was linked to start from address 0x0, the pruss.bin and icss_emac.bin used the TI-RTOS building infrastructure as much as possible. rr}r(h*X:Two TI-RTOS example applications were ported for Jailhouse hypervisor: pruss.bin and icss\_emac.bin. In contrast to led\_test.bin, which has its own startup code, linker script and was linked to start from address 0x0, the pruss.bin and icss\_emac.bin used the TI-RTOS building infrastructure as much as possible. h+j ubj_)r}r(h*X**At the previous Processor SDK pruss.bin and icss\_emac.bin were linked to the default 0x80000000 address. Because the new Jailhouse version uses that address for debug URAT communication region, the RTOS application are linked to the 0x90000000 address**h3}r(h5]h6]h7]h8]h;]uh+j h?]rhHXAt the previous Processor SDK pruss.bin and icss_emac.bin were linked to the default 0x80000000 address. Because the new Jailhouse version uses that address for debug URAT communication region, the RTOS application are linked to the 0x90000000 addressrr}r(h*Uh+jubah1jgubhHX.r}r(h*X.h+j ubeubh)r}r(h*XZTo run the pruss.bin application enable the hypervisor the same way as for other examples.rh+jDh/h0h1hh3}r(h5]h6]h7]h8]h;]uh=Mh>hh?]r hHXZTo run the pruss.bin application enable the hypervisor the same way as for other examples.r!r"}r#(h*jh+jubaubj)r$}r%(h*Xcd /usr/share/jailhouse/examples/ root@am57xx-evm:/usr/share/jailhouse/examples# modprobe jailhouse root@am57xx-evm:/usr/share/jailhouse/examples# jailhouse enable ./am57xx-evm.cell Initializing Jailhouse hypervisor on CPU 0 Code location: 0xf0000030 Page pool usage after early setup: mem 30/4075, remap 32/131072 Initializing processors: CPU 0... OK CPU 1... OK Page pool usage after late setup: mem 39/4075, remap 38/131072 Activating hypervisor [ 710.008555] The Jailhouse is opening.h+jDh/h0h1jh3}r&(jjh8]h7]h5]h6]h;]uh=Mh>hh?]r'hHXcd /usr/share/jailhouse/examples/ root@am57xx-evm:/usr/share/jailhouse/examples# modprobe jailhouse root@am57xx-evm:/usr/share/jailhouse/examples# jailhouse enable ./am57xx-evm.cell Initializing Jailhouse hypervisor on CPU 0 Code location: 0xf0000030 Page pool usage after early setup: mem 30/4075, remap 32/131072 Initializing processors: CPU 0... OK CPU 1... OK Page pool usage after late setup: mem 39/4075, remap 38/131072 Activating hypervisor [ 710.008555] The Jailhouse is opening.r(r)}r*(h*Uh+j$ubaubh)r+}r,(h*XCreate a cell for pruss.binr-h+jDh/h0h1hh3}r.(h5]h6]h7]h8]h;]uh=Mh>hh?]r/hHXCreate a cell for pruss.binr0r1}r2(h*j-h+j+ubaubj)r3}r4(h*XEroot@am57xx-evm:/usr/share/jailhouse/examples# jailhouse cell create ./am572x-rtos-pruss.cell [ 745.067783] CPU1: shutdown Created cell "AM572X-IDK-PRUSS" Page pool usage after cell creation: mem 54/4075, remap 38/131072 [ 745.107324] Created Jailhouse cell "AM572X-IDK-PRUSS" root@am57xx-evm:/usr/share/jailhouse/examples#h+jDh/h0h1jh3}r5(jjh8]h7]h5]h6]h;]uh=Mh>hh?]r6hHXEroot@am57xx-evm:/usr/share/jailhouse/examples# jailhouse cell create ./am572x-rtos-pruss.cell [ 745.067783] CPU1: shutdown Created cell "AM572X-IDK-PRUSS" Page pool usage after cell creation: mem 54/4075, remap 38/131072 [ 745.107324] Created Jailhouse cell "AM572X-IDK-PRUSS" root@am57xx-evm:/usr/share/jailhouse/examples#r7r8}r9(h*Uh+j3ubaubh)r:}r;(h*X:Use cell load command to load several required components:r<h+jDh/h0h1hh3}r=(h5]h6]h7]h8]h;]uh=Mh>hh?]r>hHX:Use cell load command to load several required components:r?r@}rA(h*j<h+j:ubaubj)rB}rC(h*Xroot@am57xx-evm:/usr/share/jailhouse/examples# jailhouse cell load 1 pruss.bin -a 0x90000000 Cell "AM572X-IDK-PRUSS" can be loadedh+jDh/h0h1jh3}rD(jjh8]h7]h5]h6]h;]uh=Mh>hh?]rEhHXroot@am57xx-evm:/usr/share/jailhouse/examples# jailhouse cell load 1 pruss.bin -a 0x90000000 Cell "AM572X-IDK-PRUSS" can be loadedrFrG}rH(h*Uh+jBubaubh)rI}rJ(h*XwhererKh+jDh/h0h1hh3}rL(h5]h6]h7]h8]h;]uh=Mh>hh?]rMhHXwhererNrO}rP(h*jKh+jIubaubj)rQ}rR(h*Uh+jDh/h0h1jh3}rS(jX-h8]h7]h5]h6]h;]uh=Mh>hh?]rTj)rU}rV(h*Xpruss.bin itself, loaded to the virtual address 0x90000000 - the address where this application is linked to; **The cell configuration MUST set the .cpu_reset_address = 0x90000000 at cell configuration** h+jQh/h0h1jh3}rW(h5]h6]h7]h8]h;]uh=Nh>hh?]rXh)rY}rZ(h*Xpruss.bin itself, loaded to the virtual address 0x90000000 - the address where this application is linked to; **The cell configuration MUST set the .cpu_reset_address = 0x90000000 at cell configuration**h+jUh/h0h1hh3}r[(h5]h6]h7]h8]h;]uh=Mh?]r\(hHXnpruss.bin itself, loaded to the virtual address 0x90000000 - the address where this application is linked to; r]r^}r_(h*Xnpruss.bin itself, loaded to the virtual address 0x90000000 - the address where this application is linked to; h+jYubj_)r`}ra(h*X]**The cell configuration MUST set the .cpu_reset_address = 0x90000000 at cell configuration**h3}rb(h5]h6]h7]h8]h;]uh+jYh?]rchHXYThe cell configuration MUST set the .cpu_reset_address = 0x90000000 at cell configurationrdre}rf(h*Uh+j`ubah1jgubeubaubaubh)rg}rh(h*X&After loading run the inmate as usual:rih+jDh/h0h1hh3}rj(h5]h6]h7]h8]h;]uh=Mh>hh?]rkhHX&After loading run the inmate as usual:rlrm}rn(h*jih+jgubaubj)ro}rp(h*Xroot@am57xx-evm:/usr/share/jailhouse/examples# jailhouse cell start 1 Started cell "AM572X-IDK-PRUSS" root@am57xx-evm:/usr/share/jailhouse/examples# passed verify constant tbl entry for instance 1: pruNum: 0 eventwait: waiting for the INTC event from PRU sending the INTC event to the PRU for instance: 1 , pru num: 0 eventwait: got the INTC event from PRU, count: 1 eventwait: waiting for the INTC event from PRU sending the INTC event to the PRU for instance: 1 , pru num: 0 eventwait: got the INTC event from PRU, count: 2 eventwait: waiting for the INTC event from PRU sending the INTC event to the PRU for instance: 1 , pru num: 0 eventwait: got the INTC event from PRU, count: 3 eventwait: waiting for the INTC event from PRU sending the INTC event to the PRU for instance: 1 , pru num: 0 eventwait: got the INTC event from PRU, count: 4 eventwait: waiting for the INTC event from PRU sending the INTC event to the PRU for instance: 1 , pru num: 0 eventwait: got the INTC event from PRU, count: 5 eventwait: waiting for the INTC event from PRU Testing for instance: 1, pru num: 0 is complete passed verify constant tbl entry for instance 1: pruNum: 1 sending the INTC event to the PRU for instance: 1 , pru num: 1 eventwait: got the INTC event from PRU, count: 1 eventwait: waiting for the INTC event from PRU sending the INTC event to the PRU for instance: 1 , pru num: 1 eventwait: got the INTC event from PRU, count: 2 eventwait: waiting for the INTC event from PRU sending the INTC event to the PRU for instance: 1 , pru num: 1 eventwait: got the INTC event from PRU, count: 3 eventwait: waiting for the INTC event from PRU sending the INTC event to the PRU for instance: 1 , pru num: 1 eventwait: got the INTC event from PRU, count: 4 eventwait: waiting for the INTC event from PRU sending the INTC event to the PRU for instance: 1 , pru num: 1 eventwait: got the INTC event from PRU, count: 5 Testing for instance: 1, pru num: 1 is complete passed verify constant tbl entry for instance 2: pruNum: 0 eventwait2: waiting for the INTC event from PRU sending the INTC event to the PRU for instance: 2 , pru num: 0 eventwait2: got the INTC event from PRU, count: 1 eventwait2: waiting for the INTC event from PRU sending the INTC event to the PRU for instance: 2 , pru num: 0 eventwait2: got the INTC event from PRU, count: 2 eventwait2: waiting for the INTC event from PRU sending the INTC event to the PRU for instance: 2 , pru num: 0 eventwait2: got the INTC event from PRU, count: 3 eventwait2: waiting for the INTC event from PRU sending the INTC event to the PRU for instance: 2 , pru num: 0 eventwait2: got the INTC event from PRU, count: 4 eventwait2: waiting for the INTC event from PRU sending the INTC event to the PRU for instance: 2 , pru num: 0 eventwait2: got the INTC event from PRU, count: 5 eventwait2: waiting for the INTC event from PRU Testing for instance: 2, pru num: 0 is complete passed verify constant tbl entry for instance 2: pruNum: 1 sending the INTC event to the PRU for instance: 2 , pru num: 1 eventwait2: got the INTC event from PRU, count: 1 eventwait2: waiting for the INTC event from PRU sending the INTC event to the PRU for instance: 2 , pru num: 1 eventwait2: got the INTC event from PRU, count: 2 eventwait2: waiting for the INTC event from PRU sending the INTC event to the PRU for instance: 2 , pru num: 1 eventwait2: got the INTC event from PRU, count: 3 eventwait2: waiting for the INTC event from PRU sending the INTC event to the PRU for instance: 2 , pru num: 1 eventwait2: got the INTC event from PRU, count: 4 eventwait2: waiting for the INTC event from PRU sending the INTC event to the PRU for instance: 2 , pru num: 1 eventwait2: got the INTC event from PRU, count: 5 Testing for instance: 2, pru num: 1 is complete All tests have passedh+jDh/h0h1jh3}rq(jjh8]h7]h5]h6]h;]uh=Mh>hh?]rrhHXroot@am57xx-evm:/usr/share/jailhouse/examples# jailhouse cell start 1 Started cell "AM572X-IDK-PRUSS" root@am57xx-evm:/usr/share/jailhouse/examples# passed verify constant tbl entry for instance 1: pruNum: 0 eventwait: waiting for the INTC event from PRU sending the INTC event to the PRU for instance: 1 , pru num: 0 eventwait: got the INTC event from PRU, count: 1 eventwait: waiting for the INTC event from PRU sending the INTC event to the PRU for instance: 1 , pru num: 0 eventwait: got the INTC event from PRU, count: 2 eventwait: waiting for the INTC event from PRU sending the INTC event to the PRU for instance: 1 , pru num: 0 eventwait: got the INTC event from PRU, count: 3 eventwait: waiting for the INTC event from PRU sending the INTC event to the PRU for instance: 1 , pru num: 0 eventwait: got the INTC event from PRU, count: 4 eventwait: waiting for the INTC event from PRU sending the INTC event to the PRU for instance: 1 , pru num: 0 eventwait: got the INTC event from PRU, count: 5 eventwait: waiting for the INTC event from PRU Testing for instance: 1, pru num: 0 is complete passed verify constant tbl entry for instance 1: pruNum: 1 sending the INTC event to the PRU for instance: 1 , pru num: 1 eventwait: got the INTC event from PRU, count: 1 eventwait: waiting for the INTC event from PRU sending the INTC event to the PRU for instance: 1 , pru num: 1 eventwait: got the INTC event from PRU, count: 2 eventwait: waiting for the INTC event from PRU sending the INTC event to the PRU for instance: 1 , pru num: 1 eventwait: got the INTC event from PRU, count: 3 eventwait: waiting for the INTC event from PRU sending the INTC event to the PRU for instance: 1 , pru num: 1 eventwait: got the INTC event from PRU, count: 4 eventwait: waiting for the INTC event from PRU sending the INTC event to the PRU for instance: 1 , pru num: 1 eventwait: got the INTC event from PRU, count: 5 Testing for instance: 1, pru num: 1 is complete passed verify constant tbl entry for instance 2: pruNum: 0 eventwait2: waiting for the INTC event from PRU sending the INTC event to the PRU for instance: 2 , pru num: 0 eventwait2: got the INTC event from PRU, count: 1 eventwait2: waiting for the INTC event from PRU sending the INTC event to the PRU for instance: 2 , pru num: 0 eventwait2: got the INTC event from PRU, count: 2 eventwait2: waiting for the INTC event from PRU sending the INTC event to the PRU for instance: 2 , pru num: 0 eventwait2: got the INTC event from PRU, count: 3 eventwait2: waiting for the INTC event from PRU sending the INTC event to the PRU for instance: 2 , pru num: 0 eventwait2: got the INTC event from PRU, count: 4 eventwait2: waiting for the INTC event from PRU sending the INTC event to the PRU for instance: 2 , pru num: 0 eventwait2: got the INTC event from PRU, count: 5 eventwait2: waiting for the INTC event from PRU Testing for instance: 2, pru num: 0 is complete passed verify constant tbl entry for instance 2: pruNum: 1 sending the INTC event to the PRU for instance: 2 , pru num: 1 eventwait2: got the INTC event from PRU, count: 1 eventwait2: waiting for the INTC event from PRU sending the INTC event to the PRU for instance: 2 , pru num: 1 eventwait2: got the INTC event from PRU, count: 2 eventwait2: waiting for the INTC event from PRU sending the INTC event to the PRU for instance: 2 , pru num: 1 eventwait2: got the INTC event from PRU, count: 3 eventwait2: waiting for the INTC event from PRU sending the INTC event to the PRU for instance: 2 , pru num: 1 eventwait2: got the INTC event from PRU, count: 4 eventwait2: waiting for the INTC event from PRU sending the INTC event to the PRU for instance: 2 , pru num: 1 eventwait2: got the INTC event from PRU, count: 5 Testing for instance: 2, pru num: 1 is complete All tests have passedrsrt}ru(h*Uh+joubaubh)rv}rw(h*XWYou may run the **icss\_emac.bin** in similar way using appropriate cell configuration.h+jDh/h0h1hh3}rx(h5]h6]h7]h8]h;]uh=MMh>hh?]ry(hHXYou may run the rzr{}r|(h*XYou may run the h+jvubj_)r}}r~(h*X**icss\_emac.bin**h3}r(h5]h6]h7]h8]h;]uh+jvh?]rhHX icss_emac.binrr}r(h*Uh+j}ubah1jgubhHX5 in similar way using appropriate cell configuration.rr}r(h*X5 in similar way using appropriate cell configuration.h+jvubeubh)r}r(h*XJailhouse Performance on AM5728rh+jDh/h0h1hh3}r(h8]rUjailhouse-performance-on-am5728rah7]h5]h6]h;]rh auh=Nh>hh?]rhHXJailhouse Performance on AM5728rr}r(h*jh+jubaubh)r}r(h*XTo verify the real-time performance of Jailhouse Sitara AM5728 was setup to run Linux on one of the ARM Cortex A15 cores, and a TI-RTOS inmate on the other A15 core. A test was run to measure interrupt latency. Poll mode driver based application performance of an inmate should be identical to a system without virtualizationion in a static partitioning system like Jailhouse. Anything interrupt based is required to share the interrupt controller (GIC) which will introduce some interference from Linux to the real-time application. The measurements shown below over a million interrupts clearly shows the interference, and captures the upper bound at 8.8us. For the first run of interrupt latency test an unloaded Linux running on core 0 is in the first column. In the second column Linux on core 0 is running STREAM. STREAM is an external memory access benchmark that fully utilizes the number of outstanding reads and writes to memory. It is scalable from individual processors to clusters supercomputers, here it is used at the processor level. It was chosen as representative of a worst case memory access behavior of a Linux based application on a Cortex A15, essentially with a memory access profile like an optimized memorytomemory copy. In AM5728 the two Cortex A15 cores share L2 cache and access to the rest of the SoC, which the STREAM benchmark running on core 0 stresses while core 1 access GIC registers to respond to the interrupt.rh+jDh/h0h1hh3}r(h5]h6]h7]h8]h;]uh=MSh>hh?]rhHXTo verify the real-time performance of Jailhouse Sitara AM5728 was setup to run Linux on one of the ARM Cortex A15 cores, and a TI-RTOS inmate on the other A15 core. A test was run to measure interrupt latency. Poll mode driver based application performance of an inmate should be identical to a system without virtualizationion in a static partitioning system like Jailhouse. Anything interrupt based is required to share the interrupt controller (GIC) which will introduce some interference from Linux to the real-time application. The measurements shown below over a million interrupts clearly shows the interference, and captures the upper bound at 8.8us. For the first run of interrupt latency test an unloaded Linux running on core 0 is in the first column. In the second column Linux on core 0 is running STREAM. STREAM is an external memory access benchmark that fully utilizes the number of outstanding reads and writes to memory. It is scalable from individual processors to clusters supercomputers, here it is used at the processor level. It was chosen as representative of a worst case memory access behavior of a Linux based application on a Cortex A15, essentially with a memory access profile like an optimized memorytomemory copy. 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The directory contains the following subdirectories:h+jDh/h0h1hh3}r(h5]h6]h7]h8]h;]uh=Mh>hh?]rhHXJailhouse sources are located at $TI_SDK_PATH/board-support/extra-drivers/jailhouse-0.7 directory. The directory contains the following subdirectories:rr}r(h*XJailhouse sources are located at $TI\_SDK\_PATH/board-support/extra-drivers/jailhouse-0.7 directory. The directory contains the following subdirectories:h+jubaubj)r}r(h*Uh+jDh/h0h1jh3}r(jX-h8]h7]h5]h6]h;]uh=Mh>hh?]r(j)r}r(h*X**Documentation**rh+jh/h0h1jh3}r(h5]h6]h7]h8]h;]uh=Nh>hh?]rh)r}r(h*jh+jh/h0h1hh3}r(h5]h6]h7]h8]h;]uh=Mh?]rj_)r}r(h*jh3}r(h5]h6]h7]h8]h;]uh+jh?]rhHX Documentationrr}r(h*Uh+jubah1jgubaubaubj)r}r(h*X**ci** - configuration files for different platforms. ***Copy the jailhouse-config-am57xx-evm.h file into hypervisor/include/jailhouse directory and rename it to config.h***h+jh/h0h1jh3}r(h5]h6]h7]h8]h;]uh=Nh>hh?]rh)r}r (h*X**ci** - configuration files for different platforms. ***Copy the jailhouse-config-am57xx-evm.h file into hypervisor/include/jailhouse directory and rename it to config.h***h+jh/h0h1hh3}r (h5]h6]h7]h8]h;]uh=Mh?]r (j_)r }r (h*X**ci**h3}r(h5]h6]h7]h8]h;]uh+jh?]rhHXcirr}r(h*Uh+j ubah1jgubhHX0 - configuration files for different platforms. rr}r(h*X0 - configuration files for different platforms. h+jubj_)r}r(h*Xw***Copy the jailhouse-config-am57xx-evm.h file into hypervisor/include/jailhouse directory and rename it to config.h***h3}r(h5]h6]h7]h8]h;]uh+jh?]rhHXs*Copy the jailhouse-config-am57xx-evm.h file into hypervisor/include/jailhouse directory and rename it to config.h*rr}r(h*Uh+jubah1jgubeubaubj)r}r(h*X'**configs** - cell configuration files.rh+jh/h0h1jh3}r (h5]h6]h7]h8]h;]uh=Nh>hh?]r!h)r"}r#(h*jh+jh/h0h1hh3}r$(h5]h6]h7]h8]h;]uh=Mh?]r%(j_)r&}r'(h*X **configs**h3}r((h5]h6]h7]h8]h;]uh+j"h?]r)hHXconfigsr*r+}r,(h*Uh+j&ubah1jgubhHX - cell configuration files.r-r.}r/(h*X - cell configuration files.h+j"ubeubaubj)r0}r1(h*X,**driver** - jailhouse.ko kernel module coder2h+jh/h0h1jh3}r3(h5]h6]h7]h8]h;]uh=Nh>hh?]r4h)r5}r6(h*j2h+j0h/h0h1hh3}r7(h5]h6]h7]h8]h;]uh=Mh?]r8(j_)r9}r:(h*X **driver**h3}r;(h5]h6]h7]h8]h;]uh+j5h?]r<hHXdriverr=r>}r?(h*Uh+j9ubah1jgubhHX" - jailhouse.ko kernel module coder@rA}rB(h*X" - jailhouse.ko kernel module codeh+j5ubeubaubj)rC}rD(h*X **hypervisor** - hypervisor coderEh+jh/h0h1jh3}rF(h5]h6]h7]h8]h;]uh=Nh>hh?]rGh)rH}rI(h*jEh+jCh/h0h1hh3}rJ(h5]h6]h7]h8]h;]uh=Mh?]rK(j_)rL}rM(h*X**hypervisor**h3}rN(h5]h6]h7]h8]h;]uh+jHh?]rOhHX hypervisorrPrQ}rR(h*Uh+jLubah1jgubhHX - hypervisor coderSrT}rU(h*X - hypervisor codeh+jHubeubaubj)rV}rW(h*XN**inmates** - inmates demos. It also contains code for ti\_app inmate example.h+jh/h0h1jh3}rX(h5]h6]h7]h8]h;]uh=Nh>hh?]rYh)rZ}r[(h*XN**inmates** - inmates demos. It also contains code for ti\_app inmate example.h+jVh/h0h1hh3}r\(h5]h6]h7]h8]h;]uh=Mh?]r](j_)r^}r_(h*X **inmates**h3}r`(h5]h6]h7]h8]h;]uh+jZh?]rahHXinmatesrbrc}rd(h*Uh+j^ubah1jgubhHXB - inmates demos. It also contains code for ti_app inmate example.rerf}rg(h*XC - inmates demos. It also contains code for ti\_app inmate example.h+jZubeubaubj)rh}ri(h*X **scripts**rjh+jh/h0h1jh3}rk(h5]h6]h7]h8]h;]uh=Nh>hh?]rlh)rm}rn(h*jjh+jhh/h0h1hh3}ro(h5]h6]h7]h8]h;]uh=Mh?]rpj_)rq}rr(h*jjh3}rs(h5]h6]h7]h8]h;]uh+jmh?]rthHXscriptsrurv}rw(h*Uh+jqubah1jgubaubaubj)rx}ry(h*X)**tools** - jailhouse management utility h+jh/h0h1jh3}rz(h5]h6]h7]h8]h;]uh=Nh>hh?]r{h)r|}r}(h*X(**tools** - jailhouse management utilityh+jxh/h0h1hh3}r~(h5]h6]h7]h8]h;]uh=Mh?]r(j_)r}r(h*X **tools**h3}r(h5]h6]h7]h8]h;]uh+j|h?]rhHXtoolsrr}r(h*Uh+jubah1jgubhHX - jailhouse management utilityrr}r(h*X - jailhouse management utilityh+j|ubeubaubeubh)r}r(h*XThe top level SDK Makefile has the **jailhouse\_clean**, **jailhouse** and **jailhouse\_install** targets which can be used to clean, build and install jailhouse to the target file system.h+jDh/h0h1hh3}r(h5]h6]h7]h8]h;]uh=Mh>hh?]r(hHX#The top level SDK Makefile has the rr}r(h*X#The top level SDK Makefile has the h+jubj_)r}r(h*X**jailhouse\_clean**h3}r(h5]h6]h7]h8]h;]uh+jh?]rhHXjailhouse_cleanrr}r(h*Uh+jubah1jgubhHX, rr}r(h*X, h+jubj_)r}r(h*X **jailhouse**h3}r(h5]h6]h7]h8]h;]uh+jh?]rhHX jailhouserr}r(h*Uh+jubah1jgubhHX and rr}r(h*X and h+jubj_)r}r(h*X**jailhouse\_install**h3}r(h5]h6]h7]h8]h;]uh+jh?]rhHXjailhouse_installrr}r(h*Uh+jubah1jgubhHX[ targets which can be used to clean, build and install jailhouse to the target file system.rr}r(h*X[ targets which can be used to clean, build and install jailhouse to the target file system.h+jubeubh)r}r(h*X,Building and Running the Ethercat Slave Demorh+jDh/h0h1hh3}r(h8]rU,building-and-running-the-ethercat-slave-demorah7]h5]h6]h;]rhauh=Nh>hh?]rhHX,Building and Running the Ethercat Slave Demorr}r(h*jh+jubaubh)r}r(h*XPTo build and run the Ethercat Slave Demo, you need to install the PLSDK-RT, PRSDK and PRU-ICSS-ETHERCAT-SLAVE builds. We assume that you already have the first two SDKs installed. The PRU-ICSS-ETHERCAT-SLAVE can be downloaded from http://software-dl.ti.com/processor-industrial-sw/esd/PRU-ICSS-ETHERCAT-SLAVE/01_00_05_00/index_FDS.html.h+jDh/h0h1hh3}r(h5]h6]h7]h8]h;]uh=Mh>hh?]r(hHXTo build and run the Ethercat Slave Demo, you need to install the PLSDK-RT, PRSDK and PRU-ICSS-ETHERCAT-SLAVE builds. We assume that you already have the first two SDKs installed. The PRU-ICSS-ETHERCAT-SLAVE can be downloaded from rr}r(h*XTo build and run the Ethercat Slave Demo, you need to install the PLSDK-RT, PRSDK and PRU-ICSS-ETHERCAT-SLAVE builds. We assume that you already have the first two SDKs installed. The PRU-ICSS-ETHERCAT-SLAVE can be downloaded from h+jubh)r}r(h*Xhhttp://software-dl.ti.com/processor-industrial-sw/esd/PRU-ICSS-ETHERCAT-SLAVE/01_00_05_00/index_FDS.htmlrh3}r(Urefurijh8]h7]h5]h6]h;]uh+jh?]rhHXhhttp://software-dl.ti.com/processor-industrial-sw/esd/PRU-ICSS-ETHERCAT-SLAVE/01_00_05_00/index_FDS.htmlrr}r(h*Uh+jubah1hubhHX.r}r(h*X.h+jubeubh)r}r(h*XIOnce you have this SDK installed you may build Ethercat slave components.rh+jDh/h0h1hh3}r(h5]h6]h7]h8]h;]uh=Mh>hh?]rhHXIOnce you have this SDK installed you may build Ethercat slave components.rr}r(h*jh+jubaubh)r}r(h*XIf the am572x-ethercat.cell is not installed on target filesystem yet, build it from PLSDK-RT top level makefile "make jailhouse" and copy it to target under /usr/share/jailhouse/examples.rh+jDh/h0h1hh3}r(h5]h6]h7]h8]h;]uh=Mh>hh?]rhHXIf the am572x-ethercat.cell is not installed on target filesystem yet, build it from PLSDK-RT top level makefile "make jailhouse" and copy it to target under /usr/share/jailhouse/examples.rr}r(h*jh+jubaubh)r}r(h*X'To build the ethercat\_slave\_demo.bin:h+jDh/h0h1hh3}r(h5]h6]h7]h8]h;]uh=Mh>hh?]rhHX%To build the ethercat_slave_demo.bin:rr}r(h*X'To build the ethercat\_slave\_demo.bin:h+jubaubj)r}r(h*Uh+jDh/h0h1jh3}r(jX-h8]h7]h5]h6]h;]uh=Mh>hh?]r(j)r}r(h*XModify the IA\_SDK\_HOME at ~/ti/processor\_sdk\_rtos\_am57xx\_[version]/demos/jailhouse-inmate/rtos/ethercat\_slave\_demo/Makefile to point to the install directory of PRU-ICSS-ETHERCAT-SLAVE.h+jh/h0h1jh3}r(h5]h6]h7]h8]h;]uh=Nh>hh?]rh)r}r(h*XModify the IA\_SDK\_HOME at ~/ti/processor\_sdk\_rtos\_am57xx\_[version]/demos/jailhouse-inmate/rtos/ethercat\_slave\_demo/Makefile to point to the install directory of PRU-ICSS-ETHERCAT-SLAVE.h+jh/h0h1hh3}r(h5]h6]h7]h8]h;]uh=Mh?]rhHXModify the IA_SDK_HOME at ~/ti/processor_sdk_rtos_am57xx_[version]/demos/jailhouse-inmate/rtos/ethercat_slave_demo/Makefile to point to the install directory of PRU-ICSS-ETHERCAT-SLAVE.rr}r(h*XModify the IA\_SDK\_HOME at ~/ti/processor\_sdk\_rtos\_am57xx\_[version]/demos/jailhouse-inmate/rtos/ethercat\_slave\_demo/Makefile to point to the install directory of PRU-ICSS-ETHERCAT-SLAVE.h+jubaubaubj)r}r(h*XAt ~/ti/processor\_sdk\_rtos\_am57xx\_[version]/demos/jailhouse-inmate/makefile: add ethercat\_slave\_demo\* entries as pruss-test/icss-emac-test to the end of the makefile h+jh/h0h1jh3}r(h5]h6]h7]h8]h;]uh=Nh>hh?]rh)r}r(h*XAt ~/ti/processor\_sdk\_rtos\_am57xx\_[version]/demos/jailhouse-inmate/makefile: add ethercat\_slave\_demo\* entries as pruss-test/icss-emac-test to the end of the makefileh+jh/h0h1hh3}r(h5]h6]h7]h8]h;]uh=Mh?]rhHXAt ~/ti/processor_sdk_rtos_am57xx_[version]/demos/jailhouse-inmate/makefile: add ethercat_slave_demo* entries as pruss-test/icss-emac-test to the end of the makefilerr}r(h*XAt ~/ti/processor\_sdk\_rtos\_am57xx\_[version]/demos/jailhouse-inmate/makefile: add ethercat\_slave\_demo\* entries as pruss-test/icss-emac-test to the end of the makefileh+jubaubaubeubj)r}r(h*Xethercat_slave_demo: $(MAKE) -C ./rtos/ethercat_slave_demo ethercat_slave_demo_clean: $(MAKE) -C ./rtos/ethercat_slave_demo clean ethercat_slave_demo_install: $(MAKE) -C ./rtos/ethercat_slave_demo installh+jDh/h0h1jh3}r(jjh8]h7]h5]h6]h;]uh=Mh>hh?]rhHXethercat_slave_demo: $(MAKE) -C ./rtos/ethercat_slave_demo ethercat_slave_demo_clean: $(MAKE) -C ./rtos/ethercat_slave_demo clean ethercat_slave_demo_install: $(MAKE) -C ./rtos/ethercat_slave_demo installrr}r(h*Uh+jubaubj)r}r(h*Uh+jDh/h0h1jh3}r(jX-h8]h7]h5]h6]h;]uh=Mh>hh?]r(j)r}r(h*X0cd ~/ti/processor\_sdk\_rtos\_am57xx\_[version]/r h+jh/h0h1jh3}r (h5]h6]h7]h8]h;]uh=Nh>hh?]r h)r }r (h*j h+jh/h0h1hh3}r(h5]h6]h7]h8]h;]uh=Mh?]rhHX,cd ~/ti/processor_sdk_rtos_am57xx_[version]/rr}r(h*X0cd ~/ti/processor\_sdk\_rtos\_am57xx\_[version]/h+j ubaubaubj)r}r(h*Xsource setupenv.shrh+jh/h0h1jh3}r(h5]h6]h7]h8]h;]uh=Nh>hh?]rh)r}r(h*jh+jh/h0h1hh3}r(h5]h6]h7]h8]h;]uh=Mh?]rhHXsource setupenv.shrr}r(h*jh+jubaubaubj)r}r (h*XFcd ~/ti/processor\_sdk\_rtos\_am57xx\_[version]/demos/jailhouse-inmateh+jh/h0h1jh3}r!(h5]h6]h7]h8]h;]uh=Nh>hh?]r"h)r#}r$(h*XFcd ~/ti/processor\_sdk\_rtos\_am57xx\_[version]/demos/jailhouse-inmateh+jh/h0h1hh3}r%(h5]h6]h7]h8]h;]uh=Mh?]r&hHXBcd ~/ti/processor_sdk_rtos_am57xx_[version]/demos/jailhouse-inmater'r(}r)(h*XFcd ~/ti/processor\_sdk\_rtos\_am57xx\_[version]/demos/jailhouse-inmateh+j#ubaubaubj)r*}r+(h*Xsource setenv.shr,h+jh/h0h1jh3}r-(h5]h6]h7]h8]h;]uh=Nh>hh?]r.h)r/}r0(h*j,h+j*h/h0h1hh3}r1(h5]h6]h7]h8]h;]uh=Mh?]r2hHXsource setenv.shr3r4}r5(h*j,h+j/ubaubaubj)r6}r7(h*Xmake ethercat\_slave\_demo h+jh/h0h1jh3}r8(h5]h6]h7]h8]h;]uh=Nh>hh?]r9h)r:}r;(h*Xmake ethercat\_slave\_demoh+j6h/h0h1hh3}r<(h5]h6]h7]h8]h;]uh=Mh?]r=hHXmake ethercat_slave_demor>r?}r@(h*Xmake ethercat\_slave\_demoh+j:ubaubaubeubh)rA}rB(h*XdAfter the steps above, copy ethercat\_slave\_demo.bin to target under /usr/share/jailhouse/examples.h+jDh/h0h1hh3}rC(h5]h6]h7]h8]h;]uh=Mh>hh?]rDhHXbAfter the steps above, copy ethercat_slave_demo.bin to target under /usr/share/jailhouse/examples.rErF}rG(h*XdAfter the steps above, copy ethercat\_slave\_demo.bin to target under /usr/share/jailhouse/examples.h+jAubaubh)rH}rI(h*X"To run the inmate refer to the instructions for `**Running the Demo on AM572x-IDK** <#running-the-demo-on-am572x-idk>`__ . Be aware that the inmate start address is 0x90000000. So, it has to be set at the cell configuration and also used as a parameter at the "jailhouse cell load" command:h+jDh/h0h1hh3}rJ(h5]h6]h7]h8]h;]uh=Mh>hh?]rK(hHX0To run the inmate refer to the instructions for rLrM}rN(h*X0To run the inmate refer to the instructions for h+jHubh)rO}rP(h*XH`**Running the Demo on AM572x-IDK** <#running-the-demo-on-am572x-idk>`__h3}rQ(UnameX"**Running the Demo on AM572x-IDK**hX#running-the-demo-on-am572x-idkh8]h7]h5]h6]h;]uh+jHh?]rRhHX"**Running the Demo on AM572x-IDK**rSrT}rU(h*Uh+jOubah1hubhHX . Be aware that the inmate start address is 0x90000000. So, it has to be set at the cell configuration and also used as a parameter at the "jailhouse cell load" command:rVrW}rX(h*X . Be aware that the inmate start address is 0x90000000. So, it has to be set at the cell configuration and also used as a parameter at the "jailhouse cell load" command:h+jHubeubj)rY}rZ(h*X;jailhouse cell load 1 ethercat_slave_demo.bin -a 0x90000000h+jDh/h0h1jh3}r[(jjh8]h7]h5]h6]h;]uh=Mh>hh?]r\hHX;jailhouse cell load 1 ethercat_slave_demo.bin -a 0x90000000r]r^}r_(h*Uh+jYubaubh)r`}ra(h*XYProcedure to check two-way communication between the slave inmate and the master station:rbh+jDh/h0h1hh3}rc(h5]h6]h7]h8]h;]uh=Mh>hh?]rdhHXYProcedure to check two-way communication between the slave inmate and the master station:rerf}rg(h*jbh+j`ubaubj)rh}ri(h*Uh+jDh/h0h1jh3}rj(jX-h8]h7]h5]h6]h;]uh=Mh>hh?]rk(j)rl}rm(h*XRefer to http://processors.wiki.ti.com/index.php/PRU_ICSS_EtherCAT#Running_EtherCAT_Slave_Application to setup Ethercat master.h+jhh/h0h1jh3}rn(h5]h6]h7]h8]h;]uh=Nh>hh?]roh)rp}rq(h*XRefer to http://processors.wiki.ti.com/index.php/PRU_ICSS_EtherCAT#Running_EtherCAT_Slave_Application to setup Ethercat master.h+jlh/h0h1hh3}rr(h5]h6]h7]h8]h;]uh=Mh?]rs(hHX Refer to rtru}rv(h*X Refer to h+jpubh)rw}rx(h*X\http://processors.wiki.ti.com/index.php/PRU_ICSS_EtherCAT#Running_EtherCAT_Slave_Applicationryh3}rz(Urefurijyh8]h7]h5]h6]h;]uh+jph?]r{hHX\http://processors.wiki.ti.com/index.php/PRU_ICSS_EtherCAT#Running_EtherCAT_Slave_Applicationr|r}}r~(h*Uh+jwubah1hubhHX to setup Ethercat master.rr}r(h*X to setup Ethercat master.h+jpubeubaubj)r}r(h*XMaster: Online write [data] to RxPDO 32Bit Output. After this, the slave should report the corresponding value via Board\_setDigOutput. The value can be checked with “devmem2 0xeef00000” also.h+jhh/h0h1jh3}r(h5]h6]h7]h8]h;]uh=Nh>hh?]rh)r}r(h*XMaster: Online write [data] to RxPDO 32Bit Output. After this, the slave should report the corresponding value via Board\_setDigOutput. The value can be checked with “devmem2 0xeef00000” also.h+jh/h0h1hh3}r(h5]h6]h7]h8]h;]uh=Mh?]rhHXMaster: Online write [data] to RxPDO 32Bit Output. After this, the slave should report the corresponding value via Board_setDigOutput. The value can be checked with “devmem2 0xeef00000” also.rr}r(h*XMaster: Online write [data] to RxPDO 32Bit Output. After this, the slave should report the corresponding value via Board\_setDigOutput. The value can be checked with “devmem2 0xeef00000” also.h+jubaubaubj)r}r(h*XsSlave: devmem2 0xeef00004 b [data]. After this, Master should display the corresponding value in TXPDO 32Bit Input.h+jhh/h0h1jh3}r(h5]h6]h7]h8]h;]uh=Nh>hh?]rh)r}r(h*XsSlave: devmem2 0xeef00004 b [data]. After this, Master should display the corresponding value in TXPDO 32Bit Input.rh+jh/h0h1hh3}r(h5]h6]h7]h8]h;]uh=Mh?]rhHXsSlave: devmem2 0xeef00004 b [data]. After this, Master should display the corresponding value in TXPDO 32Bit Input.rr}r(h*jh+jubaubaubeubeubh)r}r(h*XJailhouse Internalsrh+jh/h0h1hh3}r(h8]rUjailhouse-internalsrah7]h5]h6]h;]rh#auh=Nh>hh?]rhHXJailhouse Internalsrr}r(h*jh+jubaubh)r}r(h*XLThis section gives some Jailhouse details and required kernel modifications.rh+jh/h0h1hh3}r(h5]h6]h7]h8]h;]uh=Mh>hh?]rhHXLThis section gives some Jailhouse details and required kernel modifications.rr}r(h*jh+jubaubh)r}r(h*XLinux Kernel Modificationsrh+jh/h0h1hh3}r(h8]rUlinux-kernel-modificationsrah7]h5]h6]h;]rhauh=Nh>hh?]rhHXLinux Kernel Modificationsrr}r(h*jh+jubaubh)r}r(h*XIn order to run hypervisor itself and inmates, jailhouse requires additional nodes in kernel dtb. Refer to platform-specific jailhouse device tree or DT overlay for details on the required nodes or modifications.rh+jh/h0h1hh3}r(h5]h6]h7]h8]h;]uh=Mh>hh?]rhHXIn order to run hypervisor itself and inmates, jailhouse requires additional nodes in kernel dtb. Refer to platform-specific jailhouse device tree or DT overlay for details on the required nodes or modifications.rr}r(h*jh+jubaubh)r}r(h*XMemory Reservationrh+jh/h0h1hh3}r(h8]rUmemory-reservationrah7]h5]h6]h;]rhauh=Nh>hh?]rhHXMemory Reservationrr}r(h*jh+jubaubh)r}r(h*XLinux kernel has to reserve some memory for jailhouse hypervisor and for inmate. This memory has to be reserved statically. Following example shows reservation of 16MB physical memory for hypervisor and 16MB for inmates.rh+jh/h0h1hh3}r(h5]h6]h7]h8]h;]uh=Mh>hh?]rhHXLinux kernel has to reserve some memory for jailhouse hypervisor and for inmate. This memory has to be reserved statically. Following example shows reservation of 16MB physical memory for hypervisor and 16MB for inmates.rr}r(h*jh+jubaubj)r}r(h*XQ/ { reserved-memory { jailhouse: jailhouse@ef000000 { reg = <0x0 0xef000000 0x0 0x1000000>; no-map; status = "okay"; }; jh_inmate: jh_inmate@ee000000 { reg = <0x0 0xee000000 0x0 0x1000000>; no-map; status = "okay"; }; }; };h+jh/h0h1jh3}r(jjh8]h7]h5]h6]h;]uh=Mh>hh?]rhHXQ/ { reserved-memory { jailhouse: jailhouse@ef000000 { reg = <0x0 0xef000000 0x0 0x1000000>; no-map; status = "okay"; }; jh_inmate: jh_inmate@ee000000 { reg = <0x0 0xee000000 0x0 0x1000000>; no-map; status = "okay"; }; }; };rr}r(h*Uh+jubaubh)r}r(h*XHardware Modules Reservationrh+jh/h0h1hh3}r(h8]rUhardware-modules-reservationrah7]h5]h6]h;]rhauh=Nh>hh?]rhHXHardware Modules Reservationrr}r(h*jh+jubaubh)r}r(h*XJailhouse is a partitioning hypervisor. This means a HW peripheral is in exclusive control of one of the cells. Jailhouse cell config file defines this ownership to ensure that all accesses to peripherals are isolated between different cells. Access to any peripheral outside of the owned will be treated as violation, and jailhouse will park that cell. To ensure that Linux uses only the assigned peripheral, we can disable the peripherals which are owned by the other cell.rh+jh/h0h1hh3}r(h5]h6]h7]h8]h;]uh=Mh>hh?]rhHXJailhouse is a partitioning hypervisor. This means a HW peripheral is in exclusive control of one of the cells. Jailhouse cell config file defines this ownership to ensure that all accesses to peripherals are isolated between different cells. Access to any peripheral outside of the owned will be treated as violation, and jailhouse will park that cell. To ensure that Linux uses only the assigned peripheral, we can disable the peripherals which are owned by the other cell.rr}r(h*jh+jubaubh)r}r(h*X]Following nodes describe an example of how devices are disabled in the root cell device tree.rh+jh/h0h1hh3}r(h5]h6]h7]h8]h;]uh=Mh>hh?]rhHX]Following nodes describe an example of how devices are disabled in the root cell device tree.rr}r(h*jh+jubaubj)r}r(h*X/* Disable uart used by inamte cell */ &main_uart1 { status = "disabled"; }; /* Disable emmc instance used by inamte cell */ &main_sdhci0 { status = "disabled"; };h+jh/h0h1jh3}r(jjh8]h7]h5]h6]h;]uh=M"h>hh?]rhHX/* Disable uart used by inamte cell */ &main_uart1 { status = "disabled"; }; /* Disable emmc instance used by inamte cell */ &main_sdhci0 { status = "disabled"; };rr}r(h*Uh+jubaubj)r}r(h*Uh+jh/h0h1jh3}r(j XCONFIG_sdk in ('PLSDK')h8]h7]h5]h6]h;]uh=Mh>hh?]r(h)r}r (h*XLinux kernel enables all SOC HW modules which are required for its configuration. Appropriate drivers configure required clocks and initialize HW registers. For all unused IPs, clocks are not configured. Also, kernel power management can put a module into the sleep mode. A jailhouse inmate doesn't share the same hardware module with Linux kernel (except debug UART). But the inmate doesn't configure required clocks and doesn't deal with power domains. So, we still rely on Linux kernel (at least at the current release) to configure clocks to inmate HW modules. If we want to use some hardware modules for an inmate, we have to tell kernel about this in advance.r h+jh/h0h1hh3}r (h5]h6]h7]h8]h;]uh=Mh>hh?]r hHXLinux kernel enables all SOC HW modules which are required for its configuration. Appropriate drivers configure required clocks and initialize HW registers. For all unused IPs, clocks are not configured. Also, kernel power management can put a module into the sleep mode. A jailhouse inmate doesn't share the same hardware module with Linux kernel (except debug UART). But the inmate doesn't configure required clocks and doesn't deal with power domains. So, we still rely on Linux kernel (at least at the current release) to configure clocks to inmate HW modules. If we want to use some hardware modules for an inmate, we have to tell kernel about this in advance.r r }r (h*j h+jubaubh)r }r (h*XThe following nodes disable using of the timer8 and uart9 by kernel. Also, this restricts kernel to put those IPs to sleep mode.r h+jh/h0h1hh3}r (h5]h6]h7]h8]h;]uh=M*h>hh?]r hHXThe following nodes disable using of the timer8 and uart9 by kernel. Also, this restricts kernel to put those IPs to sleep mode.r r }r (h*j h+j ubaubj)r }r (h*Xk&timer8 { status = "disabled"; ti,no-idle; }; &uart9 { status = "disabled"; ti,no-idle; };h+jh/h0h1jh3}r (jjh8]h7]h5]h6]h;]uh=M>h>hh?]r hHXk&timer8 { status = "disabled"; ti,no-idle; }; &uart9 { status = "disabled"; ti,no-idle; };r r }r (h*Uh+j ubaubh)r }r (h*XYou may see other nodes in the jailhouse DTSes which reserve other IPs to be used for inmates. Thus, IDK's DTS disables nodes, which IPs are used for icss\_emac and pruss inmates.h+jh/h0h1hh3}r (h5]h6]h7]h8]h;]uh=M9h>hh?]r hHXYou may see other nodes in the jailhouse DTSes which reserve other IPs to be used for inmates. Thus, IDK's DTS disables nodes, which IPs are used for icss_emac and pruss inmates.r r }r (h*XYou may see other nodes in the jailhouse DTSes which reserve other IPs to be used for inmates. Thus, IDK's DTS disables nodes, which IPs are used for icss\_emac and pruss inmates.h+j ubaubh)r }r (h*X GIC Interrupt Inputs Reservationr h+jh/h0h1hh3}r (h8]r! U gic-interrupt-inputs-reservationr" ah7]h5]h6]h;]r# hauh=Nh>hh?]r$ hHX GIC Interrupt Inputs Reservationr% r& }r' (h*j h+j ubaubh)r( }r) (h*X.Interrupt lines from hardware modules don't go to ARM interrupt controller (GIC) directly. They go to a crossbar register, which selects a GIC distributor input. The selection is done dynamically by Linux kernel. Linux keeps track of all used and unused GIC inputs. If a jailhouse inmate has to use an interrupt, it has to configure the crossbar register by itself. To prevent conflicts between the Linux crossbar manager and the inmate, and give to the inmate some unused GIC input lines, which it can use, we need to reserve some of them in the kernel dts.r* h+jh/h0h1hh3}r+ (h5]h6]h7]h8]h;]uh=M@h>hh?]r, hHX.Interrupt lines from hardware modules don't go to ARM interrupt controller (GIC) directly. They go to a crossbar register, which selects a GIC distributor input. The selection is done dynamically by Linux kernel. Linux keeps track of all used and unused GIC inputs. If a jailhouse inmate has to use an interrupt, it has to configure the crossbar register by itself. To prevent conflicts between the Linux crossbar manager and the inmate, and give to the inmate some unused GIC input lines, which it can use, we need to reserve some of them in the kernel dts.r- r. }r/ (h*j* h+j( ubaubh)r0 }r1 (h*XThis can be done by adding GIC input numbers to the "ti,irqs-skip" property of the "crossbar\_mpu:" node. Lines 134 and 135 are added to the following node.h+jh/h0h1hh3}r2 (h5]h6]h7]h8]h;]uh=MJh>hh?]r3 hHXThis can be done by adding GIC input numbers to the "ti,irqs-skip" property of the "crossbar_mpu:" node. Lines 134 and 135 are added to the following node.r4 r5 }r6 (h*XThis can be done by adding GIC input numbers to the "ti,irqs-skip" property of the "crossbar\_mpu:" node. Lines 134 and 135 are added to the following node.h+j0 ubaubj)r7 }r8 (h*XScrossbar_mpu: crossbar@4a002a48 { ti,irqs-skip = <10 133 134 135 139 140>; };h+jh/h0h1jh3}r9 (jjh8]h7]h5]h6]h;]uh=M_h>hh?]r: hHXScrossbar_mpu: crossbar@4a002a48 { ti,irqs-skip = <10 133 134 135 139 140>; };r; r< }r= (h*Uh+j7 ubaubh)r> }r? (h*X{**Note:** The icss\_emac.bin application uses much more interrupt lines. That is why IDK's dtb skips additional interrupts.h+jh/h0h1hh3}r@ (h5]h6]h7]h8]h;]uh=MTh>hh?]rA (j_)rB }rC (h*X **Note:**h3}rD (h5]h6]h7]h8]h;]uh+j> h?]rE hHXNote:rF rG }rH (h*Uh+jB ubah1jgubhHXq The icss_emac.bin application uses much more interrupt lines. That is why IDK's dtb skips additional interrupts.rI rJ }rK (h*Xr The icss\_emac.bin application uses much more interrupt lines. That is why IDK's dtb skips additional interrupts.h+j> ubeubj)rL }rM (h*Xdcrossbar_mpu: crossbar@4a002a48 { ti,irqs-skip = <10 44 127 129 133 134 135 136 137 139 140>; };h+jh/h0h1jh3}rN (jjh8]h7]h5]h6]h;]uh=Mhh>hh?]rO hHXdcrossbar_mpu: crossbar@4a002a48 { ti,irqs-skip = <10 44 127 129 133 134 135 136 137 139 140>; };rP rQ }rR (h*Uh+jL ubaubeubh)rS }rT (h*XRoot-cell configurationrU h+jh/h0h1hh3}rV (h8]rW Uroot-cell-configurationrX ah7]h5]h6]h;]rY hauh=Nh>hh?]rZ hHXRoot-cell configurationr[ r\ }r] (h*jU h+jS ubaubh)r^ }r_ (h*X{When hypervisor is being enabled, it creates a cell for Linux and moves it to that cell. The cell is called as "root-cell". The cell configuration as a "\*.c" file which is compiled to a special binary format "\*.cell" file. The hypervisor uses the "cell" file to create a cell. The cell configuration describes memory regions and their attributes which will be used by the cell:h+jh/h0h1hh3}r` (h5]h6]h7]h8]h;]uh=M`h>hh?]ra hHXyWhen hypervisor is being enabled, it creates a cell for Linux and moves it to that cell. The cell is called as "root-cell". The cell configuration as a "*.c" file which is compiled to a special binary format "*.cell" file. The hypervisor uses the "cell" file to create a cell. The cell configuration describes memory regions and their attributes which will be used by the cell:rb rc }rd (h*X{When hypervisor is being enabled, it creates a cell for Linux and moves it to that cell. The cell is called as "root-cell". The cell configuration as a "\*.c" file which is compiled to a special binary format "\*.cell" file. The hypervisor uses the "cell" file to create a cell. The cell configuration describes memory regions and their attributes which will be used by the cell:h+j^ ubaubj)re }rf (h*X.mem_regions = { /* OCMCRAM */ { .phys_start = 0x40300000, .virt_start = 0x40300000, .size = 0x80000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_IO, }, /* 0x40380000 - 0x48020000 */ { .phys_start = 0x40380000, .virt_start = 0x40380000, .size = 0x7ca0000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_IO, }, /* UART... */ { .phys_start = 0x48020000, .virt_start = 0x48020000, .size = 0xe0000,//0x00001000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_IO, }, ... /* RAM */ { .phys_start = 0x80000000, .virt_start = 0x80000000, .size = 0x6F000000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_EXECUTE, }, /* Leave hole for hypervisor */ /* RAM */ { .phys_start = 0xF0000000, .virt_start = 0xF0000000, .size = 0x10000000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_EXECUTE, },h+jh/h0h1jh3}rg (jjh8]h7]h5]h6]h;]uh=Mxh>hh?]rh hHX.mem_regions = { /* OCMCRAM */ { .phys_start = 0x40300000, .virt_start = 0x40300000, .size = 0x80000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_IO, }, /* 0x40380000 - 0x48020000 */ { .phys_start = 0x40380000, .virt_start = 0x40380000, .size = 0x7ca0000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_IO, }, /* UART... */ { .phys_start = 0x48020000, .virt_start = 0x48020000, .size = 0xe0000,//0x00001000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_IO, }, ... /* RAM */ { .phys_start = 0x80000000, .virt_start = 0x80000000, .size = 0x6F000000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_EXECUTE, }, /* Leave hole for hypervisor */ /* RAM */ { .phys_start = 0xF0000000, .virt_start = 0xF0000000, .size = 0x10000000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_EXECUTE, },ri rj }rk (h*Uh+je ubaubh)rl }rm (h*XLFollowing code snippet shows the bitmap of CPU cores dedicated for the cell:rn h+jh/h0h1hh3}ro (h5]h6]h7]h8]h;]uh=Mh>hh?]rp hHXLFollowing code snippet shows the bitmap of CPU cores dedicated for the cell:rq rr }rs (h*jn h+jl ubaubj)rt }ru (h*X.cpus = { 0x3, },h+jh/h0h1jh3}rv (jjh8]h7]h5]h6]h;]uh=Mh>hh?]rw hHX.cpus = { 0x3, },rx ry }rz (h*Uh+jt ubaubh)r{ }r| (h*XOFollowing code snippet shows the bitmap of interrupt controller SPI interrupts:r} h+jh/h0h1hh3}r~ (h5]h6]h7]h8]h;]uh=Mh>hh?]r hHXOFollowing code snippet shows the bitmap of interrupt controller SPI interrupts:r r }r (h*j} h+j{ ubaubj)r }r (h*X].irqchips = { /* GIC */ { .address = 0x48211000, .pin_base = 32, .pin_bitmap = { 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff }, }, /* GIC */ { .address = 0x48211000, .pin_base = 160, .pin_bitmap = { 0xffffffff, 0, 0, 0 }, }, },h+jh/h0h1jh3}r (jjh8]h7]h5]h6]h;]uh=Mh>hh?]r hHX].irqchips = { /* GIC */ { .address = 0x48211000, .pin_base = 32, .pin_bitmap = { 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff }, }, /* GIC */ { .address = 0x48211000, .pin_base = 160, .pin_bitmap = { 0xffffffff, 0, 0, 0 }, }, },r r }r (h*Uh+j ubaubh)r }r (h*X!These settings are for all cells.r h+jh/h0h1hh3}r (h5]h6]h7]h8]h;]uh=Mh>hh?]r hHX!These settings are for all cells.r r }r (h*j h+j ubaubh)r }r (h*XQIn addition, the root cell also allocates the physical memory for the hypervisor.r h+jh/h0h1hh3}r (h5]h6]h7]h8]h;]uh=Mh>hh?]r hHXQIn addition, the root cell also allocates the physical memory for the hypervisor.r r }r (h*j h+j ubaubj)r }r (h*XQ.hypervisor_memory = { .phys_start = 0xef000000, .size = 0x1000000, },h+jh/h0h1jh3}r (jjh8]h7]h5]h6]h;]uh=Mh>hh?]r hHXQ.hypervisor_memory = { .phys_start = 0xef000000, .size = 0x1000000, },r r }r (h*Uh+j ubaubh)r }r (h*XThe "memory regions" section is used by hypervisor to create the second stage MMU translation table. Usually for root-cell, the identical mapping is being used - "VA = PA".r h+jh/h0h1hh3}r (h5]h6]h7]h8]h;]uh=Mh>hh?]r hHXThe "memory regions" section is used by hypervisor to create the second stage MMU translation table. Usually for root-cell, the identical mapping is being used - "VA = PA".r r }r (h*j h+j ubaubh)r }r (h*XBare Metal Inmate Exampler h+jh/h0h1hh3}r (h8]r Ubare-metal-inmate-exampler ah7]h5]h6]h;]r h auh=Nh>hh?]r hHXBare Metal Inmate Exampler r }r (h*j h+j ubaubh)r }r (h*X-Jailhouse comes with inmate demos located at the **inmates/demos** directory. Current (v0.6) version has two demo inmates: **gic-demo** and **uart-demo**. Those are very simple bare-metal applications that demonstrate a uart and arm-timer interrupt. Those demos are common for all jailhouse platforms.h+jh/h0h1hh3}r (h5]h6]h7]h8]h;]uh=Mh>hh?]r (hHX1Jailhouse comes with inmate demos located at the r r }r (h*X1Jailhouse comes with inmate demos located at the h+j ubj_)r }r (h*X**inmates/demos**h3}r (h5]h6]h7]h8]h;]uh+j h?]r hHX inmates/demosr r }r (h*Uh+j ubah1jgubhHX9 directory. Current (v0.6) version has two demo inmates: r r }r (h*X9 directory. Current (v0.6) version has two demo inmates: h+j ubj_)r }r (h*X **gic-demo**h3}r (h5]h6]h7]h8]h;]uh+j h?]r hHXgic-demor r }r (h*Uh+j ubah1jgubhHX and r r }r (h*X and h+j ubj_)r }r (h*X **uart-demo**h3}r (h5]h6]h7]h8]h;]uh+j h?]r hHX uart-demor r }r (h*Uh+j ubah1jgubhHX. Those are very simple bare-metal applications that demonstrate a uart and arm-timer interrupt. Those demos are common for all jailhouse platforms.r r }r (h*X. Those are very simple bare-metal applications that demonstrate a uart and arm-timer interrupt. Those demos are common for all jailhouse platforms.h+j ubeubj)r }r (h*Uh+jh/h0h1jh3}r (j XCONFIG_sdk in ('PLSDK')h8]h7]h5]h6]h;]uh=Mh>hh?]r (h)r }r (h*XMore interesting may be the **ti-app**, a demo made especially for AM572x SOC. The code is located at the **inmate/ti\_app** directory.h+j h/h0h1hh3}r (h5]h6]h7]h8]h;]uh=Mh>hh?]r (hHXMore interesting may be the r r }r (h*XMore interesting may be the h+j ubj_)r }r (h*X **ti-app**h3}r (h5]h6]h7]h8]h;]uh+j h?]r hHXti-appr r }r (h*Uh+j ubah1jgubhHXD, a demo made especially for AM572x SOC. The code is located at the r r }r (h*XD, a demo made especially for AM572x SOC. The code is located at the h+j ubj_)r }r (h*X**inmate/ti\_app**h3}r (h5]h6]h7]h8]h;]uh+j h?]r hHX inmate/ti_appr r }r (h*Uh+j ubah1jgubhHX directory.r r }r (h*X directory.h+j ubeubh)r }r (h*X Basically this application is a sandbox to make some experiments. The current version demonstrates using a uart, timer and a GIC SPI interrupt (timer generates periodic interrupts). The application also has some extra code, which was used to measure interrupt latency.r h+j h/h0h1hh3}r (h5]h6]h7]h8]h;]uh=Mh>hh?]r hHX Basically this application is a sandbox to make some experiments. The current version demonstrates using a uart, timer and a GIC SPI interrupt (timer generates periodic interrupts). The application also has some extra code, which was used to measure interrupt latency.r r }r (h*j h+j ubaubh)r }r (h*XAs any inmate, the ti-app inmate works in a cell. The am57xx-evm-ti-app.c is the cell configuration file. For this cell, only ARM1 core will be used:r h+j h/h0h1hh3}r (h5]h6]h7]h8]h;]uh=Mh>hh?]r hHXAs any inmate, the ti-app inmate works in a cell. The am57xx-evm-ti-app.c is the cell configuration file. For this cell, only ARM1 core will be used:r r }r (h*j h+j ubaubj)r }r (h*X.cpus = { 0x2, },h+j h/h0h1jh3}r (jjh8]h7]h5]h6]h;]uh=Mh>hh?]r hHX.cpus = { 0x2, },r r }r (h*Uh+j ubaubh)r }r (h*X**NOTE:** Actually on am572 SOC, which has only 2 ARM core and Linux always uses the ARM0 core only ARM1 can be taken for an inmate.h+j h/h0h1hh3}r (h5]h6]h7]h8]h;]uh=Mh>hh?]r (j_)r }r (h*X **NOTE:**h3}r (h5]h6]h7]h8]h;]uh+j h?]r hHXNOTE:r r }r (h*Uh+j ubah1jgubhHX{ Actually on am572 SOC, which has only 2 ARM core and Linux always uses the ARM0 core only ARM1 can be taken for an inmate.r r }r (h*X{ Actually on am572 SOC, which has only 2 ARM core and Linux always uses the ARM0 core only ARM1 can be taken for an inmate.h+j ubeubh)r }r (h*X,The cell configuration has 5 memory regions:r h+j h/h0h1hh3}r (h5]h6]h7]h8]h;]uh=Mh>hh?]r! hHX,The cell configuration has 5 memory regions:r" r# }r$ (h*j h+j ubaubj)r% }r& (h*X+/* UART... */ { .phys_start = 0x48020000, .virt_start = 0x48020000, .size = 0x1000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_IO | JAILHOUSE_MEM_ROOTSHARED, }, /* UART... */ { .phys_start = 0x48424000, .virt_start = 0x48424000, .size = 0x1000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_IO | JAILHOUSE_MEM_ROOTSHARED, }, /* TIMER... */ { .phys_start = 0x48826000, .virt_start = 0x48826000, .size = 0x1000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_IO | JAILHOUSE_MEM_ROOTSHARED, }, /* L4_CFG */ { .phys_start = 0x4a000000, .virt_start = 0x4a000000, .size = 0xE00000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_IO | JAILHOUSE_MEM_ROOTSHARED, }, /* RAM */ { .phys_start = 0xee000000, .virt_start = 0, .size = 0x800000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_LOADABLE, },h+j h/h0h1jh3}r' (jjh8]h7]h5]h6]h;]uh=Mh>hh?]r( hHX+/* UART... */ { .phys_start = 0x48020000, .virt_start = 0x48020000, .size = 0x1000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_IO | JAILHOUSE_MEM_ROOTSHARED, }, /* UART... */ { .phys_start = 0x48424000, .virt_start = 0x48424000, .size = 0x1000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_IO | JAILHOUSE_MEM_ROOTSHARED, }, /* TIMER... */ { .phys_start = 0x48826000, .virt_start = 0x48826000, .size = 0x1000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_IO | JAILHOUSE_MEM_ROOTSHARED, }, /* L4_CFG */ { .phys_start = 0x4a000000, .virt_start = 0x4a000000, .size = 0xE00000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_IO | JAILHOUSE_MEM_ROOTSHARED, }, /* RAM */ { .phys_start = 0xee000000, .virt_start = 0, .size = 0x800000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_LOADABLE, },r) r* }r+ (h*Uh+j% ubaubh)r, }r- (h*XOTwo for UARTs. The first one for UART3, which is a standard EVM debug uart. The second for UART9, using of which requires some board modifications. But UART9 doesn't conflict with Linux or hypervisor and may be more useful if the inmate needs a dedicated UART. One region for timer9 and one for access multiple configuration registers.r. h+j h/h0h1hh3}r/ (h5]h6]h7]h8]h;]uh=Mh>hh?]r0 hHXOTwo for UARTs. The first one for UART3, which is a standard EVM debug uart. The second for UART9, using of which requires some board modifications. But UART9 doesn't conflict with Linux or hypervisor and may be more useful if the inmate needs a dedicated UART. One region for timer9 and one for access multiple configuration registers.r1 r2 }r3 (h*j. h+j, ubaubh)r4 }r5 (h*XVThe last region is for RAM allocated for the inmate. Similar to root-cell memory regions configuration memory mapping for all regions except for RAM are identical (VA = PA). For the RAM region virtual address has to be '0'. The physical addresses of the region must be inside of the physical memory reserved for inmates in the Linux DTS file.r6 h+j h/h0h1hh3}r7 (h5]h6]h7]h8]h;]uh=M h>hh?]r8 hHXVThe last region is for RAM allocated for the inmate. Similar to root-cell memory regions configuration memory mapping for all regions except for RAM are identical (VA = PA). For the RAM region virtual address has to be '0'. The physical addresses of the region must be inside of the physical memory reserved for inmates in the Linux DTS file.r9 r: }r; (h*j6 h+j4 ubaubh)r< }r= (h*XIn the .irqchip section of the cell configuration file we reserve GIC interrupt line #134 (**One of two lines reserved in the kernel DTS**).h+j h/h0h1hh3}r> (h5]h6]h7]h8]h;]uh=Mh>hh?]r? (hHX[In the .irqchip section of the cell configuration file we reserve GIC interrupt line #134 (r@ rA }rB (h*X[In the .irqchip section of the cell configuration file we reserve GIC interrupt line #134 (h+j< ubj_)rC }rD (h*X/**One of two lines reserved in the kernel DTS**h3}rE (h5]h6]h7]h8]h;]uh+j< h?]rF hHX+One of two lines reserved in the kernel DTSrG rH }rI (h*Uh+jC ubah1jgubhHX).rJ rK }rL (h*X).h+j< ubeubj)rM }rN (h*Xm/* GIC */ { .address = 0x48211000, .pin_base = 160, .pin_bitmap = { 0x00000040, }, },h+j h/h0h1jh3}rO (jjh8]h7]h5]h6]h;]uh=M(h>hh?]rP hHXm/* GIC */ { .address = 0x48211000, .pin_base = 160, .pin_bitmap = { 0x00000040, }, },rQ rR }rS (h*Uh+jM ubaubh)rT }rU (h*XHere where #134 comes from. The 0x00000040 is the bitmask of the sixth bit. So, .pin\_base(160) + .pin\_bitmap(6) - 32(number of SWI and PPI interrupt) = 134.h+j h/h0h1hh3}rV (h5]h6]h7]h8]h;]uh=M!h>hh?]rW hHXHere where #134 comes from. The 0x00000040 is the bitmask of the sixth bit. So, .pin_base(160) + .pin_bitmap(6) - 32(number of SWI and PPI interrupt) = 134.rX rY }rZ (h*XHere where #134 comes from. The 0x00000040 is the bitmask of the sixth bit. So, .pin\_base(160) + .pin\_bitmap(6) - 32(number of SWI and PPI interrupt) = 134.h+jT ubaubh)r[ }r\ (h*XAs other jailhouse demos the **ti-app** uses the jailhouse startup code, which sets the inmate vector table, zeros BSS segment, sets the stack up and calls the inmate\_main(). The initialization of the GIC controller is done by hypervisor. Also the hypervisor remaps GICC interface to GICV interface and intercepts all inmates accesses to GICD. It allows to read/write only GICD registers, related to the lines given in the .irq\_chips section. In our case for the line #134 only.h+j h/h0h1hh3}r] (h5]h6]h7]h8]h;]uh=M%h>hh?]r^ (hHXAs other jailhouse demos the r_ r` }ra (h*XAs other jailhouse demos the h+j[ ubj_)rb }rc (h*X **ti-app**h3}rd (h5]h6]h7]h8]h;]uh+j[ h?]re hHXti-apprf rg }rh (h*Uh+jb ubah1jgubhHX uses the jailhouse startup code, which sets the inmate vector table, zeros BSS segment, sets the stack up and calls the inmate_main(). The initialization of the GIC controller is done by hypervisor. Also the hypervisor remaps GICC interface to GICV interface and intercepts all inmates accesses to GICD. It allows to read/write only GICD registers, related to the lines given in the .irq_chips section. In our case for the line #134 only.ri rj }rk (h*X uses the jailhouse startup code, which sets the inmate vector table, zeros BSS segment, sets the stack up and calls the inmate\_main(). The initialization of the GIC controller is done by hypervisor. Also the hypervisor remaps GICC interface to GICV interface and intercepts all inmates accesses to GICD. It allows to read/write only GICD registers, related to the lines given in the .irq\_chips section. In our case for the line #134 only.h+j[ ubeubh)rl }rm (h*XIn the inmate\_main() the inmate initializes uart, sets the crossbar and calls the gic\_setup() to set the inmate's interrupt handler. The jailhouse provides inmate interrupt controller API. This can be used by inmate.h+j h/h0h1hh3}rn (h5]h6]h7]h8]h;]uh=M-h>hh?]ro hHXIn the inmate_main() the inmate initializes uart, sets the crossbar and calls the gic_setup() to set the inmate's interrupt handler. The jailhouse provides inmate interrupt controller API. This can be used by inmate.rp rq }rr (h*XIn the inmate\_main() the inmate initializes uart, sets the crossbar and calls the gic\_setup() to set the inmate's interrupt handler. The jailhouse provides inmate interrupt controller API. This can be used by inmate.h+jl ubaubh)rs }rt (h*XAThe ti-app initializes the timer and enters to the infinite loop.ru h+j h/h0h1hh3}rv (h5]h6]h7]h8]h;]uh=M2h>hh?]rw hHXAThe ti-app initializes the timer and enters to the infinite loop.rx ry }rz (h*ju h+js ubaubh)r{ }r| (h*X[Actually the inmate code has only about 100 lines and doesn't require any more explanation.r} h+j h/h0h1hh3}r~ (h5]h6]h7]h8]h;]uh=M4h>hh?]r hHX[Actually the inmate code has only about 100 lines and doesn't require any more explanation.r r }r (h*j} h+j{ ubaubh)r }r (h*XRTOS PDK Inmatesr h+j h/h0h1hh3}r (h8]r Urtos-pdk-inmatesr ah7]h5]h6]h;]r hauh=Nh>hh?]r hHXRTOS PDK Inmatesr r }r (h*j h+j ubaubh)r }r (h*XThe jailhouse demo applications and the "ti\_app" are built by jailhouse's makefile inside the jailhouse's source tree. It is more interesting to build an inmate outside of the jailhouse source tree, using independent makefile and third party libraries. This release provides **led\_test**, a simple example of a bare-metal application, which uses prebuilt RTOS PDK libraries and is built independently on Jailhouse. It also has ports of two TI RTOS SYSBIOS test applications - pruss and icss\_emac. There are two other examples: 1) bare-metal memcp\_bm - a simple application to measure memory bandwidth; 2) Ethercat\_slave\_demo - ported to Jailhouse example from "PRU-ICSS Industrial Software for Sitara™ Processors". The example requires some modifications of the PRU-ICSS Industrial Software, which is not published yet. That is why the ethercat\_slave\_demo included here as a reference only.h+j h/h0h1hh3}r (h5]h6]h7]h8]h;]uh=M:h>hh?]r (hHXThe jailhouse demo applications and the "ti_app" are built by jailhouse's makefile inside the jailhouse's source tree. It is more interesting to build an inmate outside of the jailhouse source tree, using independent makefile and third party libraries. This release provides r r }r (h*XThe jailhouse demo applications and the "ti\_app" are built by jailhouse's makefile inside the jailhouse's source tree. It is more interesting to build an inmate outside of the jailhouse source tree, using independent makefile and third party libraries. This release provides h+j ubj_)r }r (h*X **led\_test**h3}r (h5]h6]h7]h8]h;]uh+j h?]r hHXled_testr r }r (h*Uh+j ubah1jgubhHX], a simple example of a bare-metal application, which uses prebuilt RTOS PDK libraries and is built independently on Jailhouse. It also has ports of two TI RTOS SYSBIOS test applications - pruss and icss_emac. There are two other examples: 1) bare-metal memcp_bm - a simple application to measure memory bandwidth; 2) Ethercat_slave_demo - ported to Jailhouse example from "PRU-ICSS Industrial Software for Sitara™ Processors". The example requires some modifications of the PRU-ICSS Industrial Software, which is not published yet. That is why the ethercat_slave_demo included here as a reference only.r r }r (h*Xc, a simple example of a bare-metal application, which uses prebuilt RTOS PDK libraries and is built independently on Jailhouse. It also has ports of two TI RTOS SYSBIOS test applications - pruss and icss\_emac. There are two other examples: 1) bare-metal memcp\_bm - a simple application to measure memory bandwidth; 2) Ethercat\_slave\_demo - ported to Jailhouse example from "PRU-ICSS Industrial Software for Sitara™ Processors". The example requires some modifications of the PRU-ICSS Industrial Software, which is not published yet. That is why the ethercat\_slave\_demo included here as a reference only.h+j ubeubh)r }r (h*XThe code of the applications is located on the $(SDK\_INSTALL\_PATH)/processor\_sdk\_rtos\_am57xx\_4\_01\_00\_04/demos/jailhouse-inmate directory, which contains:h+j h/h0h1hh3}r (h5]h6]h7]h8]h;]uh=MIh>hh?]r hHXThe code of the applications is located on the $(SDK_INSTALL_PATH)/processor_sdk_rtos_am57xx_4_01_00_04/demos/jailhouse-inmate directory, which contains:r r }r (h*XThe code of the applications is located on the $(SDK\_INSTALL\_PATH)/processor\_sdk\_rtos\_am57xx\_4\_01\_00\_04/demos/jailhouse-inmate directory, which contains:h+j ubaubj)r }r (h*XG├── baremetal │ ├── led │ │ ├── led_test.c │ │ └── makefile │ ├── memcp_bm │ │ ├── makefile │ │ └── memcp_bm.c │ └── soc │ └── am572x │ ├── evmAM572x │ │ ├── entry.S │ │ ├── gic.c │ │ ├── linker.cmd │ │ └── make.inc │ └── rules.mk ├── makefile ├── rtos │ ├── ethercat_slave_demo │ │ ├── bios │ │ │ ├── am572x_app.cfg │ │ │ └── makefile │ │ ├── Makefile │ │ └── src │ │ └── board_jh.c │ ├── icss_emac │ │ ├── bios │ │ │ ├── icss_emac_arm_wSoCLib.cfg │ │ │ └── makefile │ │ ├── lnk_pruss_fw.cmd │ │ ├── Makefile │ │ └── src │ │ ├── idkAM572x_ethernet_config_jh.c │ │ └── idkAM572x_jh.c │ ├── pru-icss │ │ ├── bios │ │ │ ├── makefile │ │ │ └── pruss_arm_wSoCLib.cfg │ │ ├── Makefile │ │ └── src │ │ └── idkAM572x_jh.c │ └── Rules.mk └── setenv.shh+j h/h0h1jh3}r (jjh8]h7]h5]h6]h;]uh=M^h>hh?]r hHXG├── baremetal │ ├── led │ │ ├── led_test.c │ │ └── makefile │ ├── memcp_bm │ │ ├── makefile │ │ └── memcp_bm.c │ └── soc │ └── am572x │ ├── evmAM572x │ │ ├── entry.S │ │ ├── gic.c │ │ ├── linker.cmd │ │ └── make.inc │ └── rules.mk ├── makefile ├── rtos │ ├── ethercat_slave_demo │ │ ├── bios │ │ │ ├── am572x_app.cfg │ │ │ └── makefile │ │ ├── Makefile │ │ └── src │ │ └── board_jh.c │ ├── icss_emac │ │ ├── bios │ │ │ ├── icss_emac_arm_wSoCLib.cfg │ │ │ └── makefile │ │ ├── lnk_pruss_fw.cmd │ │ ├── Makefile │ │ └── src │ │ ├── idkAM572x_ethernet_config_jh.c │ │ └── idkAM572x_jh.c │ ├── pru-icss │ │ ├── bios │ │ │ ├── makefile │ │ │ └── pruss_arm_wSoCLib.cfg │ │ ├── Makefile │ │ └── src │ │ └── idkAM572x_jh.c │ └── Rules.mk └── setenv.shr r }r (h*Uh+j ubaubh)r }r (h*XBare-metal exampler h+j h/h0h1hh3}r (h8]r Ubare-metal-exampler ah7]h5]h6]h;]r hauh=Nh>hh?]r hHXBare-metal exampler r }r (h*j h+j ubaubh)r }r (h*XThe bare-metal directory has three subdirectories: **soc** - has common for bare-metal applications soc specific code; **led** - led\_test application code; **memcp\_bm** - memcp\_bm code;h+j h/h0h1hh3}r (h5]h6]h7]h8]h;]uh=M}h>hh?]r (hHX3The bare-metal directory has three subdirectories: r r }r (h*X3The bare-metal directory has three subdirectories: h+j ubj_)r }r (h*X**soc**h3}r (h5]h6]h7]h8]h;]uh+j h?]r hHXsocr r }r (h*Uh+j ubah1jgubhHX= - has common for bare-metal applications soc specific code; r r }r (h*X= - has common for bare-metal applications soc specific code; h+j ubj_)r }r (h*X**led**h3}r (h5]h6]h7]h8]h;]uh+j h?]r hHXledr r }r (h*Uh+j ubah1jgubhHX - led_test application code; r r }r (h*X - led\_test application code; h+j ubj_)r }r (h*X **memcp\_bm**h3}r (h5]h6]h7]h8]h;]uh+j h?]r hHXmemcp_bmr r }r (h*Uh+j ubah1jgubhHX - memcp_bm code;r r }r (h*X - memcp\_bm code;h+j ubeubh)r }r (h*X4The **soc/am572x/evmAM572x** sub-directory contains:r h+j h/h0h1hh3}r (h5]h6]h7]h8]h;]uh=Mh>hh?]r (hHXThe r r }r (h*XThe h+j ubj_)r }r (h*X**soc/am572x/evmAM572x**h3}r (h5]h6]h7]h8]h;]uh+j h?]r hHXsoc/am572x/evmAM572xr r }r (h*Uh+j ubah1jgubhHX sub-directory contains:r r }r (h*X sub-directory contains:h+j ubeubj)r }r (h*Uh+j h/h0h1jh3}r (jX-h8]h7]h5]h6]h;]uh=Mh>hh?]r (j)r }r (h*X)**entry.S** - startup file for an inmate;r h+j h/h0h1jh3}r (h5]h6]h7]h8]h;]uh=Nh>hh?]r h)r }r (h*j h+j h/h0h1hh3}r (h5]h6]h7]h8]h;]uh=Mh?]r (j_)r }r (h*X **entry.S**h3}r (h5]h6]h7]h8]h;]uh+j h?]r hHXentry.Sr r }r (h*Uh+j ubah1jgubhHX - startup file for an inmate;r r }r (h*X - startup file for an inmate;h+j ubeubaubj)r }r (h*Xu**gic.c** - has the dummy \_weak\_ INTCCommonIntrHandler(), which can be overridden by an actual application handler.h+j h/h0h1jh3}r (h5]h6]h7]h8]h;]uh=Nh>hh?]r h)r }r (h*Xu**gic.c** - has the dummy \_weak\_ INTCCommonIntrHandler(), which can be overridden by an actual application handler.h+j h/h0h1hh3}r (h5]h6]h7]h8]h;]uh=Mh?]r (j_)r }r (h*X **gic.c**h3}r (h5]h6]h7]h8]h;]uh+j h?]r hHXgic.cr r }r (h*Uh+j ubah1jgubhHXj - has the dummy _weak_ INTCCommonIntrHandler(), which can be overridden by an actual application handler.r r }r (h*Xl - has the dummy \_weak\_ INTCCommonIntrHandler(), which can be overridden by an actual application handler.h+j ubeubaubj)r }r (h*X**linker.cmd** - jailhouse requires that an inmate shall start from address "0". It also requires that all inmates segments be located in contiguous memory. This linker.cmd is to meet these requirements. h+j h/h0h1jh3}r (h5]h6]h7]h8]h;]uh=Nh>hh?]r h)r }r (h*X**linker.cmd** - jailhouse requires that an inmate shall start from address "0". It also requires that all inmates segments be located in contiguous memory. This linker.cmd is to meet these requirements.h+j h/h0h1hh3}r (h5]h6]h7]h8]h;]uh=Mh?]r (j_)r }r! (h*X**linker.cmd**h3}r" (h5]h6]h7]h8]h;]uh+j h?]r# hHX linker.cmdr$ r% }r& (h*Uh+j ubah1jgubhHX - jailhouse requires that an inmate shall start from address "0". It also requires that all inmates segments be located in contiguous memory. This linker.cmd is to meet these requirements.r' r( }r) (h*X - jailhouse requires that an inmate shall start from address "0". It also requires that all inmates segments be located in contiguous memory. This linker.cmd is to meet these requirements.h+j ubeubaubeubh)r* }r+ (h*XThe **led** directory contains:r, h+j h/h0h1hh3}r- (h5]h6]h7]h8]h;]uh=Mh>hh?]r. (hHXThe r/ r0 }r1 (h*XThe h+j* ubj_)r2 }r3 (h*X**led**h3}r4 (h5]h6]h7]h8]h;]uh+j* h?]r5 hHXledr6 r7 }r8 (h*Uh+j2 ubah1jgubhHX directory contains:r9 r: }r; (h*X directory contains:h+j* ubeubj)r< }r= (h*Uh+j h/h0h1jh3}r> (jX-h8]h7]h5]h6]h;]uh=Mh>hh?]r? (j)r@ }rA (h*XThe main inmate **led\_test.c** code. This file is based on $(SDK\_INSTALL\_PATH)/pdk\_am57xx\_1\_0\_6/packages/ti/board/diag/led/src/led\_test.c diagnostic application. Because the inmate works as a virtual machine in order to use caches MMU has to be enabled. So, the application creates the MMU translation table with identical mapping and enables MMU. It also has the gic\_init(), which is now used at this relese.h+j< h/h0h1jh3}rB (h5]h6]h7]h8]h;]uh=Nh>hh?]rC h)rD }rE (h*XThe main inmate **led\_test.c** code. This file is based on $(SDK\_INSTALL\_PATH)/pdk\_am57xx\_1\_0\_6/packages/ti/board/diag/led/src/led\_test.c diagnostic application. Because the inmate works as a virtual machine in order to use caches MMU has to be enabled. So, the application creates the MMU translation table with identical mapping and enables MMU. It also has the gic\_init(), which is now used at this relese.h+j@ h/h0h1hh3}rF (h5]h6]h7]h8]h;]uh=Mh?]rG (hHXThe main inmate rH rI }rJ (h*XThe main inmate h+jD ubj_)rK }rL (h*X**led\_test.c**h3}rM (h5]h6]h7]h8]h;]uh+jD h?]rN hHX led_test.crO rP }rQ (h*Uh+jK ubah1jgubhHX{ code. This file is based on $(SDK_INSTALL_PATH)/pdk_am57xx_1_0_6/packages/ti/board/diag/led/src/led_test.c diagnostic application. Because the inmate works as a virtual machine in order to use caches MMU has to be enabled. So, the application creates the MMU translation table with identical mapping and enables MMU. It also has the gic_init(), which is now used at this relese.rR rS }rT (h*X code. This file is based on $(SDK\_INSTALL\_PATH)/pdk\_am57xx\_1\_0\_6/packages/ti/board/diag/led/src/led\_test.c diagnostic application. Because the inmate works as a virtual machine in order to use caches MMU has to be enabled. So, the application creates the MMU translation table with identical mapping and enables MMU. It also has the gic\_init(), which is now used at this relese.h+jD ubeubaubj)rU }rV (h*Xa**makefile** is to build the inmate. As you can see, it links number of brebuilt PDK libraries. h+j< h/h0h1jh3}rW (h5]h6]h7]h8]h;]uh=Nh>hh?]rX h)rY }rZ (h*X_**makefile** is to build the inmate. As you can see, it links number of brebuilt PDK libraries.h+jU h/h0h1hh3}r[ (h5]h6]h7]h8]h;]uh=Mh?]r\ (j_)r] }r^ (h*X **makefile**h3}r_ (h5]h6]h7]h8]h;]uh+jY h?]r` hHXmakefilera rb }rc (h*Uh+j] ubah1jgubhHXS is to build the inmate. As you can see, it links number of brebuilt PDK libraries.rd re }rf (h*XS is to build the inmate. As you can see, it links number of brebuilt PDK libraries.h+jY ubeubaubeubh)rg }rh (h*XZTo build the **led\_test.bin** (a jailhouse inmate has to be \*.bin, but not \*.out file):h+j h/h0h1hh3}ri (h5]h6]h7]h8]h;]uh=Mh>hh?]rj (hHX To build the rk rl }rm (h*X To build the h+jg ubj_)rn }ro (h*X**led\_test.bin**h3}rp (h5]h6]h7]h8]h;]uh+jg h?]rq hHX led_test.binrr rs }rt (h*Uh+jn ubah1jgubhHX: (a jailhouse inmate has to be *.bin, but not *.out file):ru rv }rw (h*X< (a jailhouse inmate has to be \*.bin, but not \*.out file):h+jg ubeubj)rx }ry (h*Uh+j h/h0h1jh3}rz (jX-h8]h7]h5]h6]h;]uh=Mh>hh?]r{ (j)r| }r} (h*XPcd to $(SDK\_INSTALL\_PATH)/processor\_sdk\_rtos\_am57xx\_4\_01\_00\_04 drectoryh+jx h/h0h1jh3}r~ (h5]h6]h7]h8]h;]uh=Nh>hh?]r h)r }r (h*XPcd to $(SDK\_INSTALL\_PATH)/processor\_sdk\_rtos\_am57xx\_4\_01\_00\_04 drectoryh+j| h/h0h1hh3}r (h5]h6]h7]h8]h;]uh=Mh?]r hHXGcd to $(SDK_INSTALL_PATH)/processor_sdk_rtos_am57xx_4_01_00_04 drectoryr r }r (h*XPcd to $(SDK\_INSTALL\_PATH)/processor\_sdk\_rtos\_am57xx\_4\_01\_00\_04 drectoryh+j ubaubaubj)r }r (h*Xsource setupenv.shr h+jx h/h0h1jh3}r (h5]h6]h7]h8]h;]uh=Nh>hh?]r h)r }r (h*j h+j h/h0h1hh3}r (h5]h6]h7]h8]h;]uh=Mh?]r hHXsource setupenv.shr r }r (h*j h+j ubaubaubj)r }r (h*X_cd to $(SDK\_INSTALL\_PATH)/processor\_sdk\_rtos\_am57xx\_4\_01\_00\_04/demos/jailhouse-inmatesh+jx h/h0h1jh3}r (h5]h6]h7]h8]h;]uh=Nh>hh?]r h)r }r (h*X_cd to $(SDK\_INSTALL\_PATH)/processor\_sdk\_rtos\_am57xx\_4\_01\_00\_04/demos/jailhouse-inmatesh+j h/h0h1hh3}r (h5]h6]h7]h8]h;]uh=Mh?]r hHXVcd to $(SDK_INSTALL_PATH)/processor_sdk_rtos_am57xx_4_01_00_04/demos/jailhouse-inmatesr r }r (h*X_cd to $(SDK\_INSTALL\_PATH)/processor\_sdk\_rtos\_am57xx\_4\_01\_00\_04/demos/jailhouse-inmatesh+j ubaubaubj)r }r (h*Xsource setenv.shr h+jx h/h0h1jh3}r (h5]h6]h7]h8]h;]uh=Nh>hh?]r h)r }r (h*j h+j h/h0h1hh3}r (h5]h6]h7]h8]h;]uh=Mh?]r hHXsource setenv.shr r }r (h*j h+j ubaubaubj)r }r (h*Xrun **make led\_test** h+jx h/h0h1jh3}r (h5]h6]h7]h8]h;]uh=Nh>hh?]r h)r }r (h*Xrun **make led\_test**h+j h/h0h1hh3}r (h5]h6]h7]h8]h;]uh=Mh?]r (hHXrun r r }r (h*Xrun h+j ubj_)r }r (h*X**make led\_test**h3}r (h5]h6]h7]h8]h;]uh+j h?]r hHX make led_testr r }r (h*Uh+j ubah1jgubeubaubeubh)r }r (h*XPThat should build the led\_test.bin binary, that can be loaded to the jailhouse cell and run. As any other inmate it has to be run in a cell, created with appropriate cell configuration. In contrast to the led\_test.bin, which is compiled independently on jailhouse, a corresponding cell configuration is compiled by jailhouse makefile.h+j h/h0h1hh3}r (h5]h6]h7]h8]h;]uh=Mh>hh?]r hHXNThat should build the led_test.bin binary, that can be loaded to the jailhouse cell and run. As any other inmate it has to be run in a cell, created with appropriate cell configuration. In contrast to the led_test.bin, which is compiled independently on jailhouse, a corresponding cell configuration is compiled by jailhouse makefile.r r }r (h*XPThat should build the led\_test.bin binary, that can be loaded to the jailhouse cell and run. As any other inmate it has to be run in a cell, created with appropriate cell configuration. In contrast to the led\_test.bin, which is compiled independently on jailhouse, a corresponding cell configuration is compiled by jailhouse makefile.h+j ubaubh)r }r (h*XThe am57xx-pdk-leddiag.c cell configuration file is located in the $TI\_SDK\_PATH/board-support/extra-drivers/jailhouse-0.7/configs directory. Use the compiled am57xx-pdk-leddiag.cell file when you create the cell for led\_test.bin inmate.h+j h/h0h1hh3}r (h5]h6]h7]h8]h;]uh=Mh>hh?]r hHXThe am57xx-pdk-leddiag.c cell configuration file is located in the $TI_SDK_PATH/board-support/extra-drivers/jailhouse-0.7/configs directory. Use the compiled am57xx-pdk-leddiag.cell file when you create the cell for led_test.bin inmate.r r }r (h*XThe am57xx-pdk-leddiag.c cell configuration file is located in the $TI\_SDK\_PATH/board-support/extra-drivers/jailhouse-0.7/configs directory. Use the compiled am57xx-pdk-leddiag.cell file when you create the cell for led\_test.bin inmate.h+j ubaubh)r }r (h*XSee `Running the Demo on AM572x-EVM <#running-the-demo-on-am572x-evm>`__ or `Running the Demo on AM572x-IDK <#running-the-demo-on-am572x-idk>`__ to run the inmate.r h+j h/h0h1hh3}r (h5]h6]h7]h8]h;]uh=Mh>hh?]r (hHXSee r r }r (h*XSee h+j ubh)r }r (h*XD`Running the Demo on AM572x-EVM <#running-the-demo-on-am572x-evm>`__h3}r (UnameXRunning the Demo on AM572x-EVMhX#running-the-demo-on-am572x-evmh8]h7]h5]h6]h;]uh+j h?]r hHXRunning the Demo on AM572x-EVMr r }r (h*Uh+j ubah1hubhHX or r r }r (h*X or h+j ubh)r }r (h*XD`Running the Demo on AM572x-IDK <#running-the-demo-on-am572x-idk>`__h3}r (UnameXRunning the Demo on AM572x-IDKhX#running-the-demo-on-am572x-idkh8]h7]h5]h6]h;]uh+j h?]r hHXRunning the Demo on AM572x-IDKr r }r (h*Uh+j ubah1hubhHX to run the inmate.r r }r (h*X to run the inmate.h+j ubeubh)r }r (h*XThe **memcp\_bm** is very similar to led\_test. It is built in the same way as the led\_test. Use the am57xx-bm.cell file from $TI\_SDK\_PATH/board-support/extra-drivers/jailhouse-0.7/configs to create the jailhouse cell for the memcp\_bm inmate.h+j h/h0h1hh3}r (h5]h6]h7]h8]h;]uh=Mh>hh?]r (hHXThe r r }r (h*XThe h+j ubj_)r }r (h*X **memcp\_bm**h3}r (h5]h6]h7]h8]h;]uh+j h?]r hHXmemcp_bmr r }r (h*Uh+j ubah1jgubhHX is very similar to led_test. It is built in the same way as the led_test. Use the am57xx-bm.cell file from $TI_SDK_PATH/board-support/extra-drivers/jailhouse-0.7/configs to create the jailhouse cell for the memcp_bm inmate.r r }r (h*X is very similar to led\_test. It is built in the same way as the led\_test. Use the am57xx-bm.cell file from $TI\_SDK\_PATH/board-support/extra-drivers/jailhouse-0.7/configs to create the jailhouse cell for the memcp\_bm inmate.h+j ubeubh)r }r (h*XRTOS BIOS Examplesr h+j h/h0h1hh3}r (h8]r Urtos-bios-examplesr ah7]h5]h6]h;]r hauh=Nh>hh?]r hHXRTOS BIOS Examplesr r }r (h*j h+j ubaubh)r }r (h*X!The pruss and icss\_emac examples are located in the rtos/pruss and rtos/icss\_emac directories. The structures of the both directories are identical. Each directory contains the bios and src subdirectories. The bios contains XDC type application configuration file and makefile. The configuration file is reworked copy of the original RTOS application configuration file. For example the configuration file for icss\_emac inmate was ported from $(SDK\_INSTALL\_PATH)/ti/pdk\_am57xx\_1\_0\_7/packages/ti/drv/icss\_emac/test/am572x/armv7/bios/icss\_emac\_arm\_wSoCLib.cfg file. As far as jailhouse inmate is not responsible for board related configuration, the board library, i2c library, OCRAM MMU sections and some other unnecessary for the inmate components were removed from the configuration file.h+j h/h0h1hh3}r (h5]h6]h7]h8]h;]uh=Mh>hh?]r hHXThe pruss and icss_emac examples are located in the rtos/pruss and rtos/icss_emac directories. The structures of the both directories are identical. Each directory contains the bios and src subdirectories. The bios contains XDC type application configuration file and makefile. The configuration file is reworked copy of the original RTOS application configuration file. For example the configuration file for icss_emac inmate was ported from $(SDK_INSTALL_PATH)/ti/pdk_am57xx_1_0_7/packages/ti/drv/icss_emac/test/am572x/armv7/bios/icss_emac_arm_wSoCLib.cfg file. As far as jailhouse inmate is not responsible for board related configuration, the board library, i2c library, OCRAM MMU sections and some other unnecessary for the inmate components were removed from the configuration file.r r }r (h*X!The pruss and icss\_emac examples are located in the rtos/pruss and rtos/icss\_emac directories. The structures of the both directories are identical. Each directory contains the bios and src subdirectories. The bios contains XDC type application configuration file and makefile. The configuration file is reworked copy of the original RTOS application configuration file. For example the configuration file for icss\_emac inmate was ported from $(SDK\_INSTALL\_PATH)/ti/pdk\_am57xx\_1\_0\_7/packages/ti/drv/icss\_emac/test/am572x/armv7/bios/icss\_emac\_arm\_wSoCLib.cfg file. As far as jailhouse inmate is not responsible for board related configuration, the board library, i2c library, OCRAM MMU sections and some other unnecessary for the inmate components were removed from the configuration file.h+j ubaubh)r }r (h*XAs far as the application main function calls the board\_init() function, this function as well as the Board\_moduleClockInit() (with required for icss\_emac application clocks) are implemented in the idkAM572x\_jh.c file.h+j h/h0h1hh3}r (h5]h6]h7]h8]h;]uh=Mh>hh?]r hHXAs far as the application main function calls the board_init() function, this function as well as the Board_moduleClockInit() (with required for icss_emac application clocks) are implemented in the idkAM572x_jh.c file.r r }r (h*XAs far as the application main function calls the board\_init() function, this function as well as the Board\_moduleClockInit() (with required for icss\_emac application clocks) are implemented in the idkAM572x\_jh.c file.h+j ubaubh)r }r (h*XThus the ported configuration file, the idkAM572x\_jh.c and makefiles are only new files required to port RTOS SDK existing project to jailhouse inmate.h+j h/h0h1hh3}r (h5]h6]h7]h8]h;]uh=Mh>hh?]r hHXThus the ported configuration file, the idkAM572x_jh.c and makefiles are only new files required to port RTOS SDK existing project to jailhouse inmate.r r }r (h*XThus the ported configuration file, the idkAM572x\_jh.c and makefiles are only new files required to port RTOS SDK existing project to jailhouse inmate.h+j ubaubh)r }r (h*XmThe jailhouse-inmate/Makefile has the "pruss\_test" and "icss\_emac\_test" targets to build the BIOS inmates.h+j h/h0h1hh3}r (h5]h6]h7]h8]h;]uh=Mh>hh?]r hHXjThe jailhouse-inmate/Makefile has the "pruss_test" and "icss_emac_test" targets to build the BIOS inmates.r r }r (h*XmThe jailhouse-inmate/Makefile has the "pruss\_test" and "icss\_emac\_test" targets to build the BIOS inmates.h+j ubaubh)r }r (h*X'The structure of the ethercat\_slave\_demo example is very similar to the pruss and icss\_emac examples. As far as it depends on a particular version of the "PRU-ICSS Industrial Software", which has to be installed independently, building of the demo is not included into the top level makefile.h+j h/h0h1hh3}r (h5]h6]h7]h8]h;]uh=Mh>hh?]r! hHX$The structure of the ethercat_slave_demo example is very similar to the pruss and icss_emac examples. As far as it depends on a particular version of the "PRU-ICSS Industrial Software", which has to be installed independently, building of the demo is not included into the top level makefile.r" r# }r$ (h*X'The structure of the ethercat\_slave\_demo example is very similar to the pruss and icss\_emac examples. As far as it depends on a particular version of the "PRU-ICSS Industrial Software", which has to be installed independently, building of the demo is not included into the top level makefile.h+j ubaubh)r% }r& (h*XRTOS BIOS Porting Notesr' h+j h/h0h1hh3}r( (h8]r) Urtos-bios-porting-notesr* ah7]h5]h6]h;]r+ h auh=Nh>hh?]r, hHXRTOS BIOS Porting Notesr- r. }r/ (h*j' h+j% ubaubh)r0 }r1 (h*XAs you can see in the previous section, the RTOS BIOS inmates has only few new files. Almost all files were reused from RTOS SDK examples. But following notes have to be considered when porting an RTOS BIOS application to a Jailhouse inmate.r2 h+j h/h0h1hh3}r3 (h5]h6]h7]h8]h;]uh=Mh>hh?]r4 hHXAs you can see in the previous section, the RTOS BIOS inmates has only few new files. Almost all files were reused from RTOS SDK examples. But following notes have to be considered when porting an RTOS BIOS application to a Jailhouse inmate.r5 r6 }r7 (h*j2 h+j0 ubaubh)r8 }r9 (h*X2Jailhouse inmate runs in a small cell. The cell is created by hypervisor, which was started from already booted Linux OS. That says that the SOC, board and most clocks are already initialized and the inmate don't need and usually cannot touch any resources not listed in the inmate cell configuration file.r: h+j h/h0h1hh3}r; (h5]h6]h7]h8]h;]uh=Mh>hh?]r< hHX2Jailhouse inmate runs in a small cell. The cell is created by hypervisor, which was started from already booted Linux OS. That says that the SOC, board and most clocks are already initialized and the inmate don't need and usually cannot touch any resources not listed in the inmate cell configuration file.r= r> }r? (h*j: h+j8 ubaubh)r@ }rA (h*XThus the using of board and i2c libraries were removed from cponfiguration file. Also OCRAM was removed from MMU configuration.rB h+j h/h0h1hh3}rC (h5]h6]h7]h8]h;]uh=Mh>hh?]rD hHXThus the using of board and i2c libraries were removed from cponfiguration file. Also OCRAM was removed from MMU configuration.rE rF }rG (h*jB h+j@ ubaubh)rH }rI (h*X"Jailhouse hypervisor allows inmate to access certain GICD registers, but only for those interrupt lines, which are listed in the cell configuration file. The cell creating routine reconfigures GICD target registers by itself. The standard gic\_init() BIOS API configures target registers for all interrupt lines. That is not permitted for an inmate. To avoid this the latest SYSBIOS release has a special feature, which allows to disable target configuration from GIC initialization function. See the following fragment at the configuration file:h+j h/h0h1hh3}rJ (h5]h6]h7]h8]h;]uh=Mh>hh?]rK hHX!Jailhouse hypervisor allows inmate to access certain GICD registers, but only for those interrupt lines, which are listed in the cell configuration file. The cell creating routine reconfigures GICD target registers by itself. The standard gic_init() BIOS API configures target registers for all interrupt lines. That is not permitted for an inmate. To avoid this the latest SYSBIOS release has a special feature, which allows to disable target configuration from GIC initialization function. See the following fragment at the configuration file:rL rM }rN (h*X"Jailhouse hypervisor allows inmate to access certain GICD registers, but only for those interrupt lines, which are listed in the cell configuration file. The cell creating routine reconfigures GICD target registers by itself. The standard gic\_init() BIOS API configures target registers for all interrupt lines. That is not permitted for an inmate. To avoid this the latest SYSBIOS release has a special feature, which allows to disable target configuration from GIC initialization function. See the following fragment at the configuration file:h+jH ubaubj)rO }rP (h*XOvar Hwi = xdc.useModule('ti.sysbios.family.arm.gic.Hwi'); Hwi.initGicd = false;h+j h/h0h1jh3}rQ (jjh8]h7]h5]h6]h;]uh=Mh>hh?]rR hHXOvar Hwi = xdc.useModule('ti.sysbios.family.arm.gic.Hwi'); Hwi.initGicd = false;rS rT }rU (h*Uh+jO ubaubh)rV }rW (h*X}The RTOS BIOS applications are built to \*.out format. RTOS loader may load this file to the board even if the image has multiple sections with their addresses spread across the entire SOC address range. The Jailhouse supports only \*.bin format, and inmate may use only allocated for it memory carved out from Linux. Therefore the ported application shall use only limited memory.h+j h/h0h1hh3}rX (h5]h6]h7]h8]h;]uh=Mh>hh?]rY hHX{The RTOS BIOS applications are built to *.out format. RTOS loader may load this file to the board even if the image has multiple sections with their addresses spread across the entire SOC address range. The Jailhouse supports only *.bin format, and inmate may use only allocated for it memory carved out from Linux. Therefore the ported application shall use only limited memory.rZ r[ }r\ (h*X}The RTOS BIOS applications are built to \*.out format. RTOS loader may load this file to the board even if the image has multiple sections with their addresses spread across the entire SOC address range. The Jailhouse supports only \*.bin format, and inmate may use only allocated for it memory carved out from Linux. Therefore the ported application shall use only limited memory.h+jV ubaubh)r] }r^ (h*XAJailhouse may start an inmate that start from virtual address 0x0, but an usual RTOS application is linked to the 0x80000000 address and with different from that entry point. The Jailhouse allows to start such applications (see above). But using the linux-loader required additional node in the inmate cell configuration.r_ h+j h/h0h1hh3}r` (h5]h6]h7]h8]h;]uh=Mh>hh?]ra hHXAJailhouse may start an inmate that start from virtual address 0x0, but an usual RTOS application is linked to the 0x80000000 address and with different from that entry point. The Jailhouse allows to start such applications (see above). But using the linux-loader required additional node in the inmate cell configuration.rb rc }rd (h*j_ h+j] ubaubj)re }rf (h*X/* RAM loader */ { .phys_start = 0xed000000, .virt_start = 0x0, .size = 0x10000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_LOADABLE, }, /* RAM RTOS 224MB*/ { .phys_start = 0xe0000000, .virt_start = 0x80000000, .size = 0xd000000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_LOADABLE, },h+j h/h0h1jh3}rg (jjh8]h7]h5]h6]h;]uh=Mh>hh?]rh hHX/* RAM loader */ { .phys_start = 0xed000000, .virt_start = 0x0, .size = 0x10000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_LOADABLE, }, /* RAM RTOS 224MB*/ { .phys_start = 0xe0000000, .virt_start = 0x80000000, .size = 0xd000000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_LOADABLE, },ri rj }rk (h*Uh+je ubaubh)rl }rm (h*XUYou may see that cell configuration for icss\_emac inmate configures two RAM regions:h+j h/h0h1hh3}rn (h5]h6]h7]h8]h;]uh=Mh>hh?]ro hHXTYou may see that cell configuration for icss_emac inmate configures two RAM regions:rp rq }rr (h*XUYou may see that cell configuration for icss\_emac inmate configures two RAM regions:h+jl ubaubj)rs }rt (h*Uh+j h/h0h1jh3}ru (jU.h8]h7]h5]jUh6]h;]jjuh=Mh>hh?]rv (j)rw }rx (h*X8small one with virtual address 0x0 for the linux-loader;ry h+js h/h0h1jh3}rz (h5]h6]h7]h8]h;]uh=Nh>hh?]r{ h)r| }r} (h*jy h+jw h/h0h1hh3}r~ (h5]h6]h7]h8]h;]uh=Mh?]r hHX8small one with virtual address 0x0 for the linux-loader;r r }r (h*jy h+j| ubaubaubj)r }r (h*X,main region for the icss\_emac test itself; h+js h/h0h1jh3}r (h5]h6]h7]h8]h;]uh=Nh>hh?]r h)r }r (h*X+main region for the icss\_emac test itself;h+j h/h0h1hh3}r (h5]h6]h7]h8]h;]uh=Mh?]r hHX*main region for the icss_emac test itself;r r }r (h*X+main region for the icss\_emac test itself;h+j ubaubaubeubh)r }r (h*XGeneral Porting Notesr h+j h/h0h1hh3}r (h8]r Ugeneral-porting-notesr ah7]h5]h6]h;]r hauh=Nh>hh?]r hHXGeneral Porting Notesr r }r (h*j h+j ubaubh)r }r (h*XWhen you start porting your RTOS or bare-metal application to Jailhouse inmate, you have to consider several things. They are listed below. This list is not complete and has just recommendations based on common sense and previous porting experience.r h+j h/h0h1hh3}r (h5]h6]h7]h8]h;]uh=Mh>hh?]r hHXWhen you start porting your RTOS or bare-metal application to Jailhouse inmate, you have to consider several things. They are listed below. This list is not complete and has just recommendations based on common sense and previous porting experience.r r }r (h*j h+j ubaubj)r }r (h*Uh+j h/h0h1jh3}r (jX-h8]h7]h5]h6]h;]uh=M!h>hh?]r (j)r }r (h*X**Linux always starts first** before hypervisor. Linux initializes all (or almost all) common resources of SOC. Thus it initializes memory controller, clocks, interrupt controller etc. It configures PINMUX registers. In most cases it takes care about board configuration as well. h+j h/h0h1jh3}r (h5]h6]h7]h8]h;]uh=Nh>hh?]r h)r }r (h*X**Linux always starts first** before hypervisor. Linux initializes all (or almost all) common resources of SOC. Thus it initializes memory controller, clocks, interrupt controller etc. It configures PINMUX registers. In most cases it takes care about board configuration as well.h+j h/h0h1hh3}r (h5]h6]h7]h8]h;]uh=M!h?]r (j_)r }r (h*X**Linux always starts first**h3}r (h5]h6]h7]h8]h;]uh+j h?]r hHXLinux always starts firstr r }r (h*Uh+j ubah1jgubhHX before hypervisor. Linux initializes all (or almost all) common resources of SOC. Thus it initializes memory controller, clocks, interrupt controller etc. It configures PINMUX registers. In most cases it takes care about board configuration as well.r r }r (h*X before hypervisor. Linux initializes all (or almost all) common resources of SOC. Thus it initializes memory controller, clocks, interrupt controller etc. It configures PINMUX registers. In most cases it takes care about board configuration as well.h+j ubeubaubj)r }r (h*X**Inmate Cell Configuration** defines resources, which are available for the inmate. The ported application can use only those resources and responsible for theirs initialization only. The ported application will not run on the board it used to run, but on a different **virtual board**, defined by the cell configuration. Thats is why the application cannot use any common board\_init or soc\_init functions that may touch used by Linux resources. **Inmate is a guest only**. h+j h/h0h1jh3}r (h5]h6]h7]h8]h;]uh=Nh>hh?]r h)r }r (h*X**Inmate Cell Configuration** defines resources, which are available for the inmate. The ported application can use only those resources and responsible for theirs initialization only. The ported application will not run on the board it used to run, but on a different **virtual board**, defined by the cell configuration. Thats is why the application cannot use any common board\_init or soc\_init functions that may touch used by Linux resources. **Inmate is a guest only**.h+j h/h0h1hh3}r (h5]h6]h7]h8]h;]uh=M'h?]r (j_)r }r (h*X**Inmate Cell Configuration**h3}r (h5]h6]h7]h8]h;]uh+j h?]r hHXInmate Cell Configurationr r }r (h*Uh+j ubah1jgubhHX defines resources, which are available for the inmate. The ported application can use only those resources and responsible for theirs initialization only. The ported application will not run on the board it used to run, but on a different r r }r (h*X defines resources, which are available for the inmate. The ported application can use only those resources and responsible for theirs initialization only. The ported application will not run on the board it used to run, but on a different h+j ubj_)r }r (h*X**virtual board**h3}r (h5]h6]h7]h8]h;]uh+j h?]r hHX virtual boardr r }r (h*Uh+j ubah1jgubhHX, defined by the cell configuration. Thats is why the application cannot use any common board_init or soc_init functions that may touch used by Linux resources. r r }r (h*X, defined by the cell configuration. Thats is why the application cannot use any common board\_init or soc\_init functions that may touch used by Linux resources. h+j ubj_)r }r (h*X**Inmate is a guest only**h3}r (h5]h6]h7]h8]h;]uh+j h?]r hHXInmate is a guest onlyr r }r (h*Uh+j ubah1jgubhHX.r }r (h*X.h+j ubeubaubj)r }r (h*XAs it mentioned above Linux initializes **Interrupt Controller** and dynamically configures crossbar registers. It has to be planned ahead which interrupts inmate may use. Those interrupts has to be reserved at Linux's dts file. Also used by the inmate interrupts have to listed in the inmate cell configuration. Hypervisor configures GIC target registers for those interrupt. Inmate is responsible only for enabling, disabling and acknowledging the interrupts. h+j h/h0h1jh3}r (h5]h6]h7]h8]h;]uh=Nh>hh?]r h)r }r (h*XAs it mentioned above Linux initializes **Interrupt Controller** and dynamically configures crossbar registers. It has to be planned ahead which interrupts inmate may use. Those interrupts has to be reserved at Linux's dts file. Also used by the inmate interrupts have to listed in the inmate cell configuration. Hypervisor configures GIC target registers for those interrupt. Inmate is responsible only for enabling, disabling and acknowledging the interrupts.h+j h/h0h1hh3}r (h5]h6]h7]h8]h;]uh=M0h?]r (hHX(As it mentioned above Linux initializes r r }r (h*X(As it mentioned above Linux initializes h+j ubj_)r }r (h*X**Interrupt Controller**h3}r (h5]h6]h7]h8]h;]uh+j h?]r hHXInterrupt Controllerr r }r (h*Uh+j ubah1jgubhHX and dynamically configures crossbar registers. It has to be planned ahead which interrupts inmate may use. Those interrupts has to be reserved at Linux's dts file. Also used by the inmate interrupts have to listed in the inmate cell configuration. Hypervisor configures GIC target registers for those interrupt. Inmate is responsible only for enabling, disabling and acknowledging the interrupts.r r }r (h*X and dynamically configures crossbar registers. It has to be planned ahead which interrupts inmate may use. Those interrupts has to be reserved at Linux's dts file. Also used by the inmate interrupts have to listed in the inmate cell configuration. Hypervisor configures GIC target registers for those interrupt. Inmate is responsible only for enabling, disabling and acknowledging the interrupts.h+j ubeubaubj)r }r (h*XLinux owns **I2C** buses. Inmate cannot has its owe driver to control I2C bus. It is not practicable even if the both root-cell and inmate cell configurations share I2C region and Linux and the Inmate have an agreement not to use I2C at the same time. The problem is that the Linux I2C driver works in interrupt mode and if the Inmate issues an I2C transaction, Linux's interrupt handler will be called. It brakes the Linux's and Inmate's I2C drivers state machines (or whatever they have). h+j h/h0h1jh3}r (h5]h6]h7]h8]h;]uh=Nh>hh?]r h)r }r (h*XLinux owns **I2C** buses. Inmate cannot has its owe driver to control I2C bus. It is not practicable even if the both root-cell and inmate cell configurations share I2C region and Linux and the Inmate have an agreement not to use I2C at the same time. The problem is that the Linux I2C driver works in interrupt mode and if the Inmate issues an I2C transaction, Linux's interrupt handler will be called. It brakes the Linux's and Inmate's I2C drivers state machines (or whatever they have).h+j h/h0h1hh3}r (h5]h6]h7]h8]h;]uh=M8h?]r (hHX Linux owns r r }r (h*X Linux owns h+j ubj_)r }r (h*X**I2C**h3}r (h5]h6]h7]h8]h;]uh+j h?]r hHXI2Cr r }r (h*Uh+j ubah1jgubhHX buses. Inmate cannot has its owe driver to control I2C bus. It is not practicable even if the both root-cell and inmate cell configurations share I2C region and Linux and the Inmate have an agreement not to use I2C at the same time. The problem is that the Linux I2C driver works in interrupt mode and if the Inmate issues an I2C transaction, Linux's interrupt handler will be called. It brakes the Linux's and Inmate's I2C drivers state machines (or whatever they have).r r }r (h*X buses. Inmate cannot has its owe driver to control I2C bus. It is not practicable even if the both root-cell and inmate cell configurations share I2C region and Linux and the Inmate have an agreement not to use I2C at the same time. The problem is that the Linux I2C driver works in interrupt mode and if the Inmate issues an I2C transaction, Linux's interrupt handler will be called. It brakes the Linux's and Inmate's I2C drivers state machines (or whatever they have).h+j ubeubaubj)r }r (h*XUsing **GPIO** may have the same as I2C problem. It is easy to disable an entire GPIO bank from using by Linux and use it for the Inmate. But it is not practical to share the same bank by the both Linux and Inmate. h+j h/h0h1jh3}r (h5]h6]h7]h8]h;]uh=Nh>hh?]r h)r }r (h*XUsing **GPIO** may have the same as I2C problem. It is easy to disable an entire GPIO bank from using by Linux and use it for the Inmate. But it is not practical to share the same bank by the both Linux and Inmate.h+j h/h0h1hh3}r (h5]h6]h7]h8]h;]uh=MAh?]r (hHXUsing r r }r (h*XUsing h+j ubj_)r }r (h*X**GPIO**h3}r (h5]h6]h7]h8]h;]uh+j h?]r hHXGPIOr r }r (h*Uh+j ubah1jgubhHX may have the same as I2C problem. It is easy to disable an entire GPIO bank from using by Linux and use it for the Inmate. But it is not practical to share the same bank by the both Linux and Inmate.r r }r (h*X may have the same as I2C problem. It is easy to disable an entire GPIO bank from using by Linux and use it for the Inmate. But it is not practical to share the same bank by the both Linux and Inmate.h+j ubeubaubj)r }r (h*XEven if it is possible to dedicate a timer for an inmate, the source clock for that timer still comes from the SOC clock tree. That means the parent clock for that timer will be controlled by Linux. So, if Linux has enabled clock frequency scaling it may change the frequency of the timer's source clock and that affects the timer. The inmate will not have any means to disable that behavior. To avoid that Linux should run at a fixed OOP. h+j h/h0h1jh3}r (h5]h6]h7]h8]h;]uh=Nh>hh?]r h)r }r (h*XEven if it is possible to dedicate a timer for an inmate, the source clock for that timer still comes from the SOC clock tree. That means the parent clock for that timer will be controlled by Linux. So, if Linux has enabled clock frequency scaling it may change the frequency of the timer's source clock and that affects the timer. The inmate will not have any means to disable that behavior. To avoid that Linux should run at a fixed OOP.r! h+j h/h0h1hh3}r" (h5]h6]h7]h8]h;]uh=MFh?]r# hHXEven if it is possible to dedicate a timer for an inmate, the source clock for that timer still comes from the SOC clock tree. That means the parent clock for that timer will be controlled by Linux. So, if Linux has enabled clock frequency scaling it may change the frequency of the timer's source clock and that affects the timer. The inmate will not have any means to disable that behavior. To avoid that Linux should run at a fixed OOP.r$ r% }r& (h*j! h+j ubaubaubeubj)r' }r( (h*Xroot@am57xx-evm:cat /sys/devices/system/cpu/cpu0/cpufreq/scaling_min_freq 1500000 root@am57xx-evm:echo 1500000 > /sys/devices/system/cpu/cpu0/cpufreq/scaling_min_freqh+j h/h0h1jh3}r) (jjh8]h7]h5]h6]h;]uh=M^h>hh?]r* hHXroot@am57xx-evm:cat /sys/devices/system/cpu/cpu0/cpufreq/scaling_min_freq 1500000 root@am57xx-evm:echo 1500000 > /sys/devices/system/cpu/cpu0/cpufreq/scaling_min_freqr+ r, }r- (h*Uh+j' ubaubh)r. }r/ (h*X&Migration from Jailhouse v0.8 to v0.10r0 h+j h/h0h1hh3}r1 (h8]r2 U&migration-from-jailhouse-v0-8-to-v0-10r3 ah7]h5]h6]h;]r4 hauh=Nh>hh?]r5 hHX&Migration from Jailhouse v0.8 to v0.10r6 r7 }r8 (h*j0 h+j. ubaubj)r9 }r: (h*Uh+j h/h0h1jh3}r; (jX-h8]h7]h5]h6]h;]uh=MXh>hh?]r< j)r= }r> (h*XThe v0.10 Jailhouse has common debug UART that is shared between root-cell, hypervisor and an inmate compiled with the inmate library. A cell configuration for each inmate. h+j9 h/h0h1jh3}r? (h5]h6]h7]h8]h;]uh=Nh>hh?]r@ h)rA }rB (h*XThe v0.10 Jailhouse has common debug UART that is shared between root-cell, hypervisor and an inmate compiled with the inmate library. A cell configuration for each inmate.rC h+j= h/h0h1hh3}rD (h5]h6]h7]h8]h;]uh=MXh?]rE hHXThe v0.10 Jailhouse has common debug UART that is shared between root-cell, hypervisor and an inmate compiled with the inmate library. A cell configuration for each inmate.rF rG }rH (h*jC h+jA ubaubaubaubcdocutils.nodes definition_list rI )rJ }rK (h*Uh+j h/h0h1Udefinition_listrL h3}rM (h5]h6]h7]h8]h;]uh=Nh>hh?]rN cdocutils.nodes definition_list_item rO )rP }rQ (h*X2shall have ".console" subnode in the ".cell" node h+jJ h/h0h1Udefinition_list_itemrR h3}rS (h5]h6]h7]h8]h;]uh=M]h?]rT (cdocutils.nodes term rU )rV }rW (h*X$shall have ".console" subnode in therX h+jP h/h0h1UtermrY h3}rZ (h5]h6]h7]h8]h;]uh=M]h?]r[ hHX$shall have ".console" subnode in ther\ r] }r^ (h*jX h+jV ubaubcdocutils.nodes definition r_ )r` }ra (h*Uh3}rb (h5]h6]h7]h8]h;]uh+jP h?]rc h)rd }re (h*X ".cell" noderf h+j` h/h0h1hh3}rg (h5]h6]h7]h8]h;]uh=M]h?]rh hHX ".cell" noderi rj }rk (h*jf h+jd ubaubah1U definitionrl ubeubaubj)rm }rn (h*X.console = { .address = 0x48020000, /* .divider = 0x0d, */ .type = JAILHOUSE_CON_TYPE_8250, .flags = JAILHOUSE_CON_ACCESS_MMIO | JAILHOUSE_CON_REGDIST_4, },h+j h/h0h1jh3}ro (jjh8]h7]h5]h6]h;]uh=Mph>hh?]rp hHX.console = { .address = 0x48020000, /* .divider = 0x0d, */ .type = JAILHOUSE_CON_TYPE_8250, .flags = JAILHOUSE_CON_ACCESS_MMIO | JAILHOUSE_CON_REGDIST_4, },rq rr }rs (h*Uh+jm ubaubh)rt }ru (h*XB**must have** /* communication region */ in the ".mem_region" noderv h+j h/h0h1hh3}rw (h5]h6]h7]h8]h;]uh=Mih>hh?]rx (j_)ry }rz (h*X **must have**h3}r{ (h5]h6]h7]h8]h;]uh+jt h?]r| hHX must haver} r~ }r (h*Uh+jy ubah1jgubhHX /* communication region r r }r (h*X /* communication region h+jt ubcdocutils.nodes problematic r )r }r (h*X*h3}r (h8]r Uid2r ah7]h5]h6]h;]UrefidUid1r uh+jt h?]r hHX*r }r (h*Uh+j ubah1U problematicr ubhHX/ in the ".mem_region" noder r }r (h*X/ in the ".mem_region" nodeh+jt ubeubj)r }r (h*X/* communication region */ { .virt_start = 0x80000000, .size = 0x00001000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_COMM_REGION, },h+j h/h0h1jh3}r (jjh8]h7]h5]h6]h;]uh=M|h>hh?]r hHX/* communication region */ { .virt_start = 0x80000000, .size = 0x00001000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_COMM_REGION, },r r }r (h*Uh+j ubaubj)r }r (h*Uh+j h/h0h1jh3}r (jX-h8]h7]h5]h6]h;]uh=Mth>hh?]r (j)r }r (h*Xall inmates that uses jailhouse inmate library shall add their memory regions to MMU table. This SDK doesn't provide examples to show that. h+j h/h0h1jh3}r (h5]h6]h7]h8]h;]uh=Nh>hh?]r h)r }r (h*Xall inmates that uses jailhouse inmate library shall add their memory regions to MMU table. This SDK doesn't provide examples to show that.r h+j h/h0h1hh3}r (h5]h6]h7]h8]h;]uh=Mth?]r hHXall inmates that uses jailhouse inmate library shall add their memory regions to MMU table. This SDK doesn't provide examples to show that.r r }r (h*j h+j ubaubaubj)r }r (h*XFfor inmates are not started from 0x0 set the cpu_reset_address at cellr h+j h/h0h1jh3}r (h5]h6]h7]h8]h;]uh=Nh>hh?]r h)r }r (h*j h+j h/h0h1hh3}r (h5]h6]h7]h8]h;]uh=Mwh?]r hHXFfor inmates are not started from 0x0 set the cpu_reset_address at cellr r }r (h*j h+j ubaubaubeubh)r }r (h*Xconfiguration filer h+j h/h0h1hh3}r (h5]h6]h7]h8]h;]uh=Mxh>hh?]r hHXconfiguration filer r }r (h*j h+j ubaubj)r }r (h*X .cpu_reset_address = 0x90000000,h+j h/h0h1jh3}r (jjh8]h7]h5]h6]h;]uh=Mh>hh?]r hHX .cpu_reset_address = 0x90000000,r r }r (h*Uh+j ubaubj)r }r (h*Uh+j h/h0h1jh3}r (jX-h8]h7]h5]h6]h;]uh=M~h>hh?]r j)r }r (h*XThe new Jailhouse version uses shared communincation regions started at VA 0x80000000, which conflicts with the default RTOS memory configuration. All RTOS based inmate memory configuration has to be updated: h+j h/h0h1jh3}r (h5]h6]h7]h8]h;]uh=Nh>hh?]r h)r }r (h*XThe new Jailhouse version uses shared communincation regions started at VA 0x80000000, which conflicts with the default RTOS memory configuration. All RTOS based inmate memory configuration has to be updated:r h+j h/h0h1hh3}r (h5]h6]h7]h8]h;]uh=M~h?]r hHXThe new Jailhouse version uses shared communincation regions started at VA 0x80000000, which conflicts with the default RTOS memory configuration. All RTOS based inmate memory configuration has to be updated:r r }r (h*j h+j ubaubaubaubj)r }r (h*Uh+j h/h0h1jh3}r (jU.h8]h7]h5]jUh6]h;]jjuh=Mh>hh?]r (j)r }r (h*XHDDR start address at linker script changed from 0x80000000 to 0x90000000r h+j h/h0h1jh3}r (h5]h6]h7]h8]h;]uh=Nh>hh?]r h)r }r (h*j h+j h/h0h1hh3}r (h5]h6]h7]h8]h;]uh=Mh?]r hHXHDDR start address at linker script changed from 0x80000000 to 0x90000000r r }r (h*j h+j ubaubaubj)r }r (h*XOAlso update all RTOS inmate MMU congiration to reflect the new starting addressh+j h/h0h1jh3}r (h5]h6]h7]h8]h;]uh=Nh>hh?]r h)r }r (h*XOAlso update all RTOS inmate MMU congiration to reflect the new starting addressr h+j h/h0h1hh3}r (h5]h6]h7]h8]h;]uh=Mh?]r hHXOAlso update all RTOS inmate MMU congiration to reflect the new starting addressr r }r (h*j h+j ubaubaubj)r }r (h*XAs far as we don't use linux_loader anymore the RTOS imate has to start from address set at cpu_reset_address. You may need to set the application entry point explicitly at application configuration file h+j h/h0h1jh3}r (h5]h6]h7]h8]h;]uh=Nh>hh?]r h)r }r (h*XAs far as we don't use linux_loader anymore the RTOS imate has to start from address set at cpu_reset_address. You may need to set the application entry point explicitly at application configuration filer h+j h/h0h1hh3}r (h5]h6]h7]h8]h;]uh=Mh?]r hHXAs far as we don't use linux_loader anymore the RTOS imate has to start from address set at cpu_reset_address. You may need to set the application entry point explicitly at application configuration filer r }r (h*j h+j ubaubaubeubj)r }r (h*XnProgram.sectMap[".c_int00"] = new Program.SectionSpec(); Program.sectMap[".c_int00"].loadAddress = 0x90000000;h+j h/h0h1jh3}r (jjh8]h7]h5]h6]h;]uh=Mh>hh?]r hHXnProgram.sectMap[".c_int00"] = new Program.SectionSpec(); Program.sectMap[".c_int00"].loadAddress = 0x90000000;r r}r(h*Uh+j ubaubeubeubeubh/hPh1hRh3}r(h5]h6]h7]h8]h;]rh&auh=Kh>hh?]rhHX3ti-processor-sdk-linux-[platformName]-evm-rr}r(h*X3ti-processor-sdk-linux-[platformName]-evm-h+h(ubaubh^hZhghchphlhyhuhh~hhhhhhhhhhhhhUhLuUparse_messagesr]r (cdocutils.nodes system_message r )r }r (h*Uh+j h/h0h1Usystem_messager h3}r(h5]UlevelKh8]rj ah7]rj aUsourceh0h6]h;]UlineMiUtypeUWARNINGruh=Mjh>hh?]rh)r}r(h*X0Inline emphasis start-string without end-string.h3}r(h5]h6]h7]h8]h;]uh+j h?]rhHX0Inline emphasis start-string without end-string.rr}r(h*Uh+jubah1hubaubj )r}r(h*Uh+j h/h0h1j h3}r(h5]UlevelKh8]h7]Usourceh0h6]h;]UlineMxUtypejuh=Mwh>hh?]rh)r}r(h*X;Bullet list ends without a blank line; unexpected unindent.h3}r (h5]h6]h7]h8]h;]uh+jh?]r!hHX;Bullet list ends without a blank line; unexpected unindent.r"r#}r$(h*Uh+jubah1hubaubeUcurrent_sourcer%NU decorationr&NUautofootnote_startr'KUnameidsr(}r)(hj" hjhj h jh jh j h jMh j* hjhj hjhjhjhjhjVhjChj'hjhjhjhj3 hjX hj hjhj hh:h jh!jh"hh#juh?]r*h-ah*UU transformerr+NU footnote_refsr,}r-Urefnamesr.}r/Usymbol_footnotesr0]r1Uautofootnote_refsr2]r3Usymbol_footnote_refsr4]r5U citationsr6]r7h>hU current_liner8NUtransform_messagesr9]r:Ureporterr;NUid_startr<KU autofootnotesr=]r>U citation_refsr?}r@Uindirect_targetsrA]rBUsettingsrC(cdocutils.frontend Values rDorE}rF(Ufootnote_backlinksrGKUrecord_dependenciesrHNU rfc_base_urlrIUhttps://tools.ietf.org/html/rJU tracebackrKUpep_referencesrLNUstrip_commentsrMNU toc_backlinksrNjU language_coderOUenrPU datestamprQNU report_levelrRKU _destinationrSNU halt_levelrTKU strip_classesrUNhENUerror_encoding_error_handlerrVUbackslashreplacerWUdebugrXNUembed_stylesheetrYUoutput_encoding_error_handlerrZUstrictr[U sectnum_xformr\KUdump_transformsr]NU docinfo_xformr^KUwarning_streamr_NUpep_file_url_templater`Upep-%04draUexit_status_levelrbKUconfigrcNUstrict_visitorrdNUcloak_email_addressesreUtrim_footnote_reference_spacerfUenvrgNUdump_pseudo_xmlrhNUexpose_internalsriNUsectsubtitle_xformrjU source_linkrkNUrfc_referencesrlNUoutput_encodingrmUutf-8rnU source_urlroNUinput_encodingrpU utf-8-sigrqU_disable_configrrNU id_prefixrsUU tab_widthrtKUerror_encodingruUUTF-8rvU_sourcerwh0Ugettext_compactrxU generatorryNUdump_internalsrzNU smart_quotesr{U pep_base_urlr|U https://www.python.org/dev/peps/r}Usyntax_highlightr~UlongrUinput_encoding_error_handlerrj[Uauto_id_prefixrUidrUdoctitle_xformrUstrip_elements_with_classesrNU _config_filesr]Ufile_insertion_enabledrU raw_enabledrKU dump_settingsrNubUsymbol_footnote_startrKUidsr}r(j" j jjjjjjj j jMjHj* j% j3 j. jjj j jjj j jjj j jjh:h-jjjVjQjCj>j'j"jjjjjX jS j j j j jjjjhhjjjjjjj j uUsubstitution_namesr}r(X__sdk_install_dir__h&X__sdk_install_file__h^X__part_family_device_names__hgX__featuringmatrix__hpX__linux_ubuntu_version_long__hX__product_line_name__hyX__sdk_short_name__hX__rtos_ubuntu_version_long__hX__sdk_download_url__hX__part_family_name__hX__sdk_full_name__hX__linux_ubuntu_version_short__hX__windows_supported_long__hUuh1h>h3}r(h5]h8]h7]Usourceh0h6]h;]uU footnotesr]rUrefidsr}rub.