5.15.2 Intrinsics Defined for Special Load and Store Instructions

The C7000 ISA supports several load and store operations that cannot be leveraged using simple C/C++ operators. Instead, an overloaded, OpenCL-like intrinsic is provided for those operations using prefixes “__vload_” and “__vstore_” for loads and stores, respectively, in conformity with the OpenCL naming convention. Overloaded intrinsics are provided for the following load and store operations:

• Vector Load and Duplicate: __vload_dup(…)
• Vector Load and Duplicate Group: __vload_dup_vec(…)
• Vector Load and Unpack: __vload_unpack_{short, int,long}(…)
• Vector Load and Deinterleave: __vload_deinterleave_{int,long}(...)
• Vector Interleave and Store: __vstore_interleave(…)
• Vector Packing Store: __vstore_{packl,packh,packhs1,pack_byte}(…)
• Vector Reverse Bit Store: __vstore_reverse_bit(…)
• Vector Predicated Store: __vstore_pred(vpred, …)
• Vector Interleave, Predicated Store: __vstore_pred_interleave(vpred,…)
• Vector Predicated Packing Store:
  __vstore_pred_{packl, packh, packhs1,pack_byte}(vpred, ...)
• Vector Predicated Reverse Bit Store: __vstore_pred_reverse_bit(vpred, …)
• Vector Constant Store: __vstore_const_{2word, 4word, 8word, 16word}(…)
• Store of Vector Predicate: __store_predicate_{char, short, int,long}(…)
• Atomic Swap: __atomic_swap(…)
• Atomic Compare and Swap: __atomic_compare_swap(…)