These options are specific to the TMS320C28x toolset. See the referenced sections for more information. TMS320C28x-specific assembler options are listed in Section 2.3.11.
The C28x compiler supports the COFF ABI. Support is now provided for the Embedded Application Binary Interface (EABI) ABI, which uses the ELF object format and the DWARF debug format.
| --abi={eabi|coffabi} | Specifies the application binary interface (ABI). The default ABI is COFF. EABI is also supported. See Section 2.13.
All code in an EABI application must be built for EABI. Make sure all your libraries are available in EABI mode before migrating your existing COFF ABI systems to C6000 EABI. |
|
| --cla_support={cla0|cla1|cla2} | Specifies TMS320C28x Control Law Accelerator (CLA) Type 0, Type 1, or Type 2 support. This option is used to compile or assemble code written for the CLA. This option does not require any special library support when linking; the libraries used for C28x with/without FPU support should be sufficient. | |
| --common={on|off} | When on (the default with EABI), uninitialized file scope variables are emitted as common symbols. When off, common symbols are not created. The benefit of allowing common symbols to be created is that generated code can remove unused variables that would otherwise increase the size of the .bss section. (Uninitialized variables of a size larger than 32 bytes are separately optimized through placement in separate subsections that can be omitted from a link.) Variables cannot be common symbols if they are assigned to a section other than .bss. This option has no effect with COFF. | |
| --float_support={ fpu32 | fpu64 | softlib } | Specifies use of TMS320C28x 32-bit or 64-bit hardware floating-point support. Using --float_support=fpu32 specifies the C28x architecture with 32-bit hardware floating-point support. Using --float_support=fpu64 specifies the C28x architecture with 64-bit hardware floating-point support. If the --tmu_support option is used to enable support for the Trigonometric Math Unit, the --float_support option is automatically set to fpu32. The default is softlib, which performs floating-point calculations without special hardware support. | |
| --idiv_support={ none | idiv0 } | Enables support for fast integer division using hardware extensions to provide a set of instructions to accelerate integral division. If this hardware is available, use --idiv_support=idiv0 to cause these instructions to be used. (Default is none.)
If you enable fast integer division support, instructions that use the hardware are used when code performs normal division and modulus operations on 16-, 32-, and 64-bit values. These instructions are also used if code calls the fast integer division intrinsics described in Table 7-9. |
|
| --no_rpt | Prevents the compiler from generating repeat (RPT) instructions. By default, repeat instructions are generated for certain memcpy, division, and multiply-accumulate operations. However, repeat instructions are not interruptible. | |
| --protect_volatile=num | Enables volatile reference protection. Pipeline conflicts may occur between non-local variables that have been declared volatile. A conflict can occur between a write to one volatile variable that is followed by a read from a different volatile variable. The --protect_volatile option allows at least num instructions to be placed between the two volatile references to ensure the write occurs before the read. The num is optional. If no num is given, the default value is 2. For example, if --protect_volatile=4 is used, volatile writes and volatile reads are protected by at least 4 instructions.
The peripheral pipeline protection hardware protects all internal peripherals and XINTF zone 1. If you connect peripherals to Xintf zone 0, 2, 6, 7 then you may need to use the --protect_volatile option. Hardware protection or using this option is not required for memories. |
|
| --ramfunc={on|off} | If set to on, specifies that all functions should be placed in the .TI.ramfunc section, which is placed in RAM. If set to off, only functions with the ramfunc function attribute are treated this way. See Section 6.15.2.
Newer TI linker command files support the --ramfunc option automatically by placing functions in the .TI.ramfunc section. If you have a linker command file that does not include a section specification for the .TI.ramfunc section, you can modify the linker command file to place this section in RAM. See the TMS320C28x Assembly Language Tools User's Guide for details on section placement. Projects or files that were previously compiled without the --no_fast_branch option should use the --ramfunc=on option instead to generate fast branch instructions for all functions. |
|
| --rpt_threshold=k | Generates RPT loops that iterate k times or less (k is a constant between 0 and 256). Multiple RPT’s may be generated for the same loop, if iteration count is more than k and if code size does not increase too much. Using this option when optimizing for code size disables RPT loop generation for loops whose iteration count can be greater than k. | |
| --silicon_version=28 | Generates code for the TMS320C28x architecture. The only value accepted is 28. This is the default, so this option is no longer required on command lines. | |
| --unified_memory | Use the --unified_memory (-mt) option if your memory map is configured as a single unified space; this allows the compiler to generate RPT PREAD instructions for most memcpy calls and structure assignments. This also allows MAC instructions to be generated. The --unified_memory option also allows more efficient data memory instructions to be used to access switch tables.
Even under unified memory, memory for some peripherals and some RAM associated with those peripherals is allocated only in data memory. If –unified_memory is enabled, you can prevent program memory address access to specific symbols by declaring those symbols as volatile. |
|
| --tmu_support[=tmu0|tmu1] | Enables support for the Trigonometric Math Unit (TMU). Using this option automatically enables FPU32 support (as with the --float_support=fpu32 option). When TMU support is enabled, intrinsics are available to perform trigonometric instructions on the TMU. The tmu1 setting adds support for the LOG2F32 and IEXP2F32 intrinsics in addition to the intrinsics supported with the tmu0 setting.
In relaxed floating point mode, RTS library calls are replaced with the corresponding TMU hardware instructions for the following floating-point operations: floating point division, sqrt, sin, cos, atan, and atan2. Additionally, if the --tmu_support=tmu1 option is used with --fp_mode=relaxed, special versions of the following 32-bit RTS math functions are used: exp2f(), espf(), log2f(), logf(), and powf(). Relaxed versions that work with double types are not provided. There are algorithmic differences between the TMU hardware instructions and the library routines, so the results of operations may differ slightly. |
|
| --vcu_support[=vcu0|vcu2|vcrc] | Specifies that there is support for Type 0 or Type 2 of the Viterbi, Complex Math and CRC Unit (VCU). The vcrc setting specifies support for Cyclic Redundancy Check (CRC) algorithms only.
This option is useful only if the source is in assembly code, written for the VCU. The option is ignored for C/C++ code. This option does not need any special library support when linking; the libraries used for C28x with/without VCU support should be sufficient. Also note that there is no VCU Type 1. |
|