SECTIONS
{
UNION : run = RAM
{
S1 : load = OVR_MEM PAGE 1
{
s1_load = 0x00000A00h;
s1_start = .;
f1.obj (.text)
f2.obj (.text)
s1_length = . - s1_start;
}
S2 : load = OVR_MEM PAGE 2
{
s2_load = 0x00000A00h;
s2_start = .;
f3.obj (.text)
f4.obj (.text)
s2_length = . - s2_start;
}
}
.text: load = PROG PAGE 0
.data: load = PROG PAGE 0
.ebss: load = DATA PAGE 1
}
The four modules are f1, f2, f3, and f4. Modules f1 and f2 are combined into output section S1, and f3 and f4 are combined into output section S2. The PAGE specifications for S1 and S2 tell the linker to link these sections into the corresponding pages. As a result, they are both linked to load address A00h, but in different memory spaces. When the program is loaded, a loader can configure hardware so that each section is loaded into the appropriate memory bank.