To improve efficiency, the assembler reduces instruction size whenever possible. For example, a branch instruction of two words can be changed to a short branch one-word instruction if the offset is 8 bits. Table 4-9 lists the instruction to be changed and the change that occurs.
| This instruction... | Is encoded as... |
|---|---|
| MOV AX, #8Bit | MOVB AX, #8Bit |
| ADD AX, #8BitSigned | ADDB AX, #8BitSigned |
| CMP AX, #8Bit | CMPB AX, #8Bit |
| ADD ACC, #8Bit | ADDB ACC, #8Bit |
| SUB ACC, #8Bit | SUBB ACC, #8Bit |
| AND AX, #8BitMask | ANDB AX, #8BitMask |
| OR AX, #8BitMask | ORB AX, #8BitMask |
| XOR AX, #8BitMask | XORB AX, #8BitMask |
| B 8BitOffset, cond | SB 8BitOffset, cond |
| LB 8BitOffset, cond | SB 8BitOffset, cond |
| MOVH loc, ACC << 0 | MOV loc, AH |
| MOV loc, ACC << 0 | MOV loc, AL |
| MOVL XARn, #8Bit | MOVB XARn, #8Bit |
The assembler also intuitively changes instruction formats during smart encoding. For example, to push the accumulator value to the stack, you use MOV *SP++, ACC. Since it would be intuitive to use PUSH ACC for this operation, the assembler accepts PUSH ACC and through smart encoding, changes it to MOV *SP++, ACC. Table 4-10 shows a list of instructions recognized during intuitive smart encoding and what the instruction is changed to.
| This instruction... | Is encoded as... |
|---|---|
| MOV P, #0 | MPY P, T, #0 |
| SUB loc, #16BitSigned | ADD loc, #-16BitSigned |
| ADDB SP, #-7Bit | SUBB SP, #7Bit |
| ADDB aux, #-7Bit | SUBB aux, #7Bit |
| SUBB AX, #8BitSigned | ADDB AX, #-8BitSigned |
| PUSH IER | MOV *SP++, IER |
| POP IER | MOV IER, *--SP |
| PUSH ACC | MOV *SP++, ACC |
| POP ACC | MOV ACC, *--SP |
| PUSH XARn | MOV *SP++, XARn |
| POP XARn | MOV XARn, *--SP |
| PUSH #16Bit | MOV *SP++, #16Bit |
| MPY ACC, T, #8Bit | MPYB ACC, T, #8Bit |
In some cases, you might want a 2-word instruction even when there is an equivalent 1-word instruction available. In such cases, smart encoding for efficiency could be a problem. Therefore, the equivalent instructions in Table 4-11 are provided; these instructions will not be optimized.
| This instruction... | Is encoded as... |
|---|---|
| MOVW AX, #8Bit | MOV AX, #8Bit |
| ADDW AX, #8Bit | ADD AX, #8Bit |
| CMPW AX, #8Bit | CMP AX, #8Bit |
| ADDW ACC, #8Bit | ADD ACC, #8Bit |
| SUBW ACC, #8Bit | SUB ACC, #8Bit |
| JMP 8BitOffset, cond | B 8BitOffset, cond |