These options are specific to the ARM toolset. See the referenced sections for more information. ARM-specific assembler options are listed in Section 2.3.11.
The ARM compiler now supports only the Embedded Application Binary Interface (EABI) ABI, which uses the ELF object format and the DWARF debug format. If you want support for the legacy COFF ABI, please use the ARM v5.2 Code Generation Tools and refer to SPNU151J and SPNU118J for documentation.
| --code_state={16|32} | Generates 16-bit Thumb code. By default, 32-bit code is generated. When Cortex-R4, Cortex-M0, Cortex-M3, or Cortex-A8 architecture support is chosen, the --code_state option generates Thumb-2 code. For details on indirect calls in 16-bit versus 32-bit code, see Section 6.11.2.2. | |
| --common={on|off} | When on (the default), uninitialized file scope variables are emitted as common symbols. When off, common symbols are not created. The benefit of allowing common symbols to be created is that generated code can remove unused variables that would otherwise increase the size of the .bss section. (Uninitialized variables of a size larger than 32 bytes are separately optimized through placement in separate subsections that can be omitted from a link.) Variables cannot be common symbols if they are assigned to a section other than .bss or are defined relative to another common symbol. | |
| --embedded_constants={on|off} | By default the compiler embeds constants in functions. These constants can include literals, addresses, strings, etc. This is a problem if you wants to prevent reads from a memory region that contains only executable code. To enable the generation of "execute only code", the compiler provides the --embedded_constants=[on|off] option. If the option is not specified, it is assumed to be on. The option is available on the following devices: Cortex-A8, Cortex-M3, Cortex-M4, and Cortex-R4. | |
| --endian={ big | little } | Designates big- or little-endian format for the compiled code. By default, big-endian format is used. | |
| --enum_type={int|packed} | Designates the underlying type of an enumeration type. The default is packed, which causes the underlying enumeration type to be the smallest integer type that accommodates the enumeration constants.
Using --enum_type=int causes the underlying type to always be int. An enumeration constant with a value outside the int range generates an error. |
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| --float_support={ vfpv2 | vfpv3 | vfpv3d16 | fpv4spd16 | none } | Generates vector floating-point (VFP) coprocessor instructions for various versions and libraries. See Section 2.14. | |
| --global_register={r5|r6|r9} | Disallows use of rx=[5|6|9] by the compiler. | |
| -md | Disables dual-state interworking support. See Section 6.11.1. | |
| -mv={4|5e|6|6M0|7A8|7M3 |7M4|7R4|7R5} | Selects processor version: ARM V4 (ARM7), ARM V5e (ARM9E), ARM V6 (ARM11), ARM V6M0 (Cortex-M0), ARM V7A8 (Cortex-A8), ARM V7M3 (Cortex-M3), ARM V7M4 (Cortex-M4), ARM V7R4 (Cortex-R4), or ARM V7R5 (Cortex-R5). The default is ARM V4. | |
| --neon | The compiler can generate code using the SIMD instructions available in the Neon extension to the version 7 ARM architecture. The optimizer attempts to vectorize source code in order to take advantage of these SIMD instructions. In order to generate vectorized SIMD Neon code, select the version 7 architecture with the -mv=7A8 option and enable Neon instruction support with the --neon option.
The optimizer is used to vectorize the source code. At least level 2 optimization (--opt_level=2 or O2) is required, although level 3 (--opt_level=3) is recommended along with the --opt_for_speed option. |
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| --pending_instantiations=# | Specify the number of template instantiations that may be in progress at any given time. Use 0 to specify an unlimited number. | |
| --plain_char={signed|unsigned} | Specifies how to treat C/C++ plain char variables. Default is unsigned. | |
| --ramfunc={on|off} | If set to on, specifies that all functions should be placed in the .TI.ramfunc section, which is placed in RAM. If set to off, only functions with the ramfunc function attribute are treated this way. See Section 5.17.2.
Newer TI linker command files support the --ramfunc option automatically by placing functions in the .TI.ramfunc section. If you have a linker command file that does not include a section specification for the .TI.ramfunc section, you can modify the linker command file to place this section in RAM. See the ARM Assembly Language Tools User's Guide for details on section placement. |
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| --silicon_version | Selects the instruction set version. The options are:
Using the --silicon_version=7M4 option automatically sets the --float_support=fpv4spd16 option. To disable hardware floating point support, use the --float_support=none option. |
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| --unaligned_access={on|off} | Informs the compiler that the target device supports unaligned memory accesses. Typically data is aligned to its size boundary. For instance 32-bit data is aligned on a 32-bit boundary, 16-bit data on a 16-bit boundary, and 8-bit data on an 8-bit boundary. If this option is set to on, it tells the compiler it is legal to generate load and store instructions for data that falls on an unaligned boundary (32-bit data on a 16-bit boundary). Cases where unaligned data accesses can occur include calls to memcpy() and accessing packed structs. This option is on by default for all Cortex devices. | |
| --use_dead_funcs_list[=fname] | Places each function listed in the file in a separate section. The functions are placed in the fname section, if specified. This option and --generate_dead_funcs_list are not recommended within the Code Composer Studio IDE. Instead, consider using --opt_level=4, --program_level_compile, and/or --gen_func_subsections. | |
| --wchar_t={32|16} | Sets the size (in bits) of the C/C++ type wchar_t. By default the compiler generates 16-bit wchar_t. 16-bit wchar_t objects are not compatible with the 32-bit wchar_t objects; an error is generated if they are combined. | |