TI Multicore Tooling¶
TI’s C66x DSP is found in a number of multicore SoCs:
| Multicore C66x | Multicore ARM + C66x |
|---|---|
| C6678 | 66AK2H, 66AK2L, 66AK2E |
| C6657 | AM572, AM571 |
On heterogeneous multicore ARM + C66x DSP SoCs, TI supports OpenCL™ 1.1 and OpenMP® Offload Model to dispatch computation from the ARM to C66x DSPs. These standard multicore programming models make it easy to distribute computation so the full capabilities of these powerful devices can be realized.
- OpenCL provides an API based approach to dispatch computation from ARMs to DSPs
- OpenMP Offload Model takes a pragma based approach to provide similar capability. The OpenMP 4.0 specification enables the use of OpenMP on heterogeneous systems by adding support for a set of device constructs. The OpenMP community uses the term OpenMP Offload Model to refer to this set.
On homogeneous multicore C66x DSP SoCs, TI supports OpenMP 3.0. This enables existing C66x programmers to use a standard multicore programming model to parallelize computation across multiple C66x DSP cores using a pragma based approach.