GCC Cortex-M4 with hard FP Timing Benchmarks

ti.platforms.tiva:TM4C123GH6PM:1 (compiler version: 4.8.4)

Benchmark Cycles (1)
Interrupt Latency 152 (2)
Hwi_restore() 1
Hwi_disable() 4
Hwi dispatcher prolog 139
Hwi dispatcher epilog 233
Hwi dispatcher 362
Hardware Interrupt to Blocked Task 674
Hardware Interrupt to Software Interrupt 392
Swi_enable() 65
Swi_disable() 13
Post Software Interrupt Again 31
Post Software Interrupt without Context Switch 81
Post Software Interrupt with Context Switch 184
Create a New Task without Context Switch 2157
Set a Task Priority without a Context Switch 156
Task_yield() 288
Post Semaphore, No Waiting Task 49
Post Semaphore No Task Switch 244
Post Semaphore with Task Switch 381
Pend on Semaphore, No Context Switch 55
Pend on Semaphore with Task Switch 396
Clock_getTicks() 8

(1) The benchmark application was built using BIOS.LibType_Custom with the following BIOS.customCCOpts settings:

"-mcpu=cortex-m4 -mthumb -mfloat-abi=hard -mfpu=fpv4-sp-d16 -mabi=aapcs -O3 -Wunused -Wunknown-pragmas -ffunction-sections -fdata-sections -Dti_sysbios_Build_useHwiMacros -Dfar= -D__DYNAMIC_REENT__".

Timings were obtained using the Tiva Launchpad TM4C123GH6PM board running at 40MHz.

(2) The M4F target also supports zero latency interrupts. See ti.sysbios.family.arm.m3.Hwi cdocs for details.