7.2.2 Status Registers

Table 7-4 shows all of the status fields used by the compiler. Presumed value is the value the compiler expects in that field upon entry to, or return from, a function; a dash in this column indicates the compiler does not expect a particular value. The modified column indicates whether code generated by the compiler ever modifies this field.

Table 7-4 Status Register Fields

Field Name Presumed Value Modified
ARP Auxiliary Register Pointer - Yes
C Carry - Yes
N Negative flag - Yes
OVM Overflow mode 0(1) Yes
PAGE0 Direct/stack address mode 0(1) No
PM Product shift mode 0(1) Yes
SPA Stack pointer align bit - Yes
(in interrupts)
SXM Sign extension mode - Yes
TC Test/control flag - Yes
V Overflow flag - Yes
Z Zero flag - Yes
(1) The initialization routine that sets up the C run-time environment sets these fields to the presumed value.

Table 7-5 shows the additional status fields used by the compiler for FPU Targets.

Table 7-5 Floating-Point Status Register (STF(1)) Fields For FPU Targets Only

Field Name Presumed Value Modified
LVF(2)(3) Latched overflow float flag - Yes
LUF(2)(3) Latched underflow float flag - Yes
NF(2) Negative float flag - Yes
ZF(2) Zero float flag - Yes
NI(2) Negative integer flag - Yes
ZI(2) Zero integer flag bit - Yes
TF(2) Test flag bit - Yes
RNDF32 Round F32 mode(4) - Yes
RNDF64 Round F64 mode(4) - Yes
SHDWS Shadow mode status - Yes
(1) Unused STF register bits read 0 and writes are ignored.
(2) Specified flags in the STF register can be exported to the ST0 register by way of the MOVST0 instruction.
(3) The LVF and LUF flag signals can be connected to the PIE to generate an overflow-and-underflow interrupt. This can be a useful debug tool.
(4) If RNDF32 or RNDF64 is 0, mode is round to zero (truncate), otherwise mode is round to nearest (even).

All other status register fields are not used and do not affect code generated by the compiler.